]>
Commit | Line | Data |
---|---|---|
aa69a809 | 1 | /* |
eb70e5ab | 2 | * udc.c - ChipIdea UDC driver |
aa69a809 DL |
3 | * |
4 | * Copyright (C) 2008 Chipidea - MIPS Technologies, Inc. All rights reserved. | |
5 | * | |
6 | * Author: David Lopo | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | */ | |
12 | ||
36825a2d | 13 | #include <linux/delay.h> |
aa69a809 DL |
14 | #include <linux/device.h> |
15 | #include <linux/dmapool.h> | |
ded017ee | 16 | #include <linux/err.h> |
5b08319f | 17 | #include <linux/irqreturn.h> |
aa69a809 | 18 | #include <linux/kernel.h> |
5a0e3ad6 | 19 | #include <linux/slab.h> |
c036019e | 20 | #include <linux/pm_runtime.h> |
aa69a809 DL |
21 | #include <linux/usb/ch9.h> |
22 | #include <linux/usb/gadget.h> | |
95f5555f | 23 | #include <linux/usb/otg-fsm.h> |
e443b333 | 24 | #include <linux/usb/chipidea.h> |
aa69a809 | 25 | |
e443b333 AS |
26 | #include "ci.h" |
27 | #include "udc.h" | |
28 | #include "bits.h" | |
3f124d23 | 29 | #include "otg.h" |
4dcf720c | 30 | #include "otg_fsm.h" |
954aad8c | 31 | |
aa69a809 DL |
32 | /* control endpoint description */ |
33 | static const struct usb_endpoint_descriptor | |
ca9cfea0 | 34 | ctrl_endpt_out_desc = { |
aa69a809 DL |
35 | .bLength = USB_DT_ENDPOINT_SIZE, |
36 | .bDescriptorType = USB_DT_ENDPOINT, | |
37 | ||
ca9cfea0 PK |
38 | .bEndpointAddress = USB_DIR_OUT, |
39 | .bmAttributes = USB_ENDPOINT_XFER_CONTROL, | |
40 | .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX), | |
41 | }; | |
42 | ||
43 | static const struct usb_endpoint_descriptor | |
44 | ctrl_endpt_in_desc = { | |
45 | .bLength = USB_DT_ENDPOINT_SIZE, | |
46 | .bDescriptorType = USB_DT_ENDPOINT, | |
47 | ||
48 | .bEndpointAddress = USB_DIR_IN, | |
aa69a809 DL |
49 | .bmAttributes = USB_ENDPOINT_XFER_CONTROL, |
50 | .wMaxPacketSize = cpu_to_le16(CTRL_PAYLOAD_MAX), | |
51 | }; | |
52 | ||
aa69a809 DL |
53 | /** |
54 | * hw_ep_bit: calculates the bit number | |
55 | * @num: endpoint number | |
56 | * @dir: endpoint direction | |
57 | * | |
58 | * This function returns bit number | |
59 | */ | |
60 | static inline int hw_ep_bit(int num, int dir) | |
61 | { | |
c6ee9f23 | 62 | return num + ((dir == TX) ? 16 : 0); |
aa69a809 DL |
63 | } |
64 | ||
8e22978c | 65 | static inline int ep_to_bit(struct ci_hdrc *ci, int n) |
dd39c358 | 66 | { |
26c696c6 | 67 | int fill = 16 - ci->hw_ep_max / 2; |
dd39c358 | 68 | |
26c696c6 | 69 | if (n >= ci->hw_ep_max / 2) |
dd39c358 MKB |
70 | n += fill; |
71 | ||
72 | return n; | |
73 | } | |
74 | ||
aa69a809 | 75 | /** |
c0a48e6c | 76 | * hw_device_state: enables/disables interrupts (execute without interruption) |
aa69a809 DL |
77 | * @dma: 0 => disable, !0 => enable and set dma engine |
78 | * | |
79 | * This function returns an error code | |
80 | */ | |
8e22978c | 81 | static int hw_device_state(struct ci_hdrc *ci, u32 dma) |
aa69a809 DL |
82 | { |
83 | if (dma) { | |
26c696c6 | 84 | hw_write(ci, OP_ENDPTLISTADDR, ~0, dma); |
aa69a809 | 85 | /* interrupt, error, port change, reset, sleep/suspend */ |
26c696c6 | 86 | hw_write(ci, OP_USBINTR, ~0, |
aa69a809 | 87 | USBi_UI|USBi_UEI|USBi_PCI|USBi_URI|USBi_SLI); |
aa69a809 | 88 | } else { |
26c696c6 | 89 | hw_write(ci, OP_USBINTR, ~0, 0); |
aa69a809 DL |
90 | } |
91 | return 0; | |
92 | } | |
93 | ||
94 | /** | |
95 | * hw_ep_flush: flush endpoint fifo (execute without interruption) | |
96 | * @num: endpoint number | |
97 | * @dir: endpoint direction | |
98 | * | |
99 | * This function returns an error code | |
100 | */ | |
8e22978c | 101 | static int hw_ep_flush(struct ci_hdrc *ci, int num, int dir) |
aa69a809 DL |
102 | { |
103 | int n = hw_ep_bit(num, dir); | |
104 | ||
105 | do { | |
106 | /* flush any pending transfer */ | |
5bf5dbed | 107 | hw_write(ci, OP_ENDPTFLUSH, ~0, BIT(n)); |
26c696c6 | 108 | while (hw_read(ci, OP_ENDPTFLUSH, BIT(n))) |
aa69a809 | 109 | cpu_relax(); |
26c696c6 | 110 | } while (hw_read(ci, OP_ENDPTSTAT, BIT(n))); |
aa69a809 DL |
111 | |
112 | return 0; | |
113 | } | |
114 | ||
115 | /** | |
116 | * hw_ep_disable: disables endpoint (execute without interruption) | |
117 | * @num: endpoint number | |
118 | * @dir: endpoint direction | |
119 | * | |
120 | * This function returns an error code | |
121 | */ | |
8e22978c | 122 | static int hw_ep_disable(struct ci_hdrc *ci, int num, int dir) |
aa69a809 | 123 | { |
26c696c6 | 124 | hw_write(ci, OP_ENDPTCTRL + num, |
c6ee9f23 | 125 | (dir == TX) ? ENDPTCTRL_TXE : ENDPTCTRL_RXE, 0); |
aa69a809 DL |
126 | return 0; |
127 | } | |
128 | ||
129 | /** | |
130 | * hw_ep_enable: enables endpoint (execute without interruption) | |
131 | * @num: endpoint number | |
132 | * @dir: endpoint direction | |
133 | * @type: endpoint type | |
134 | * | |
135 | * This function returns an error code | |
136 | */ | |
8e22978c | 137 | static int hw_ep_enable(struct ci_hdrc *ci, int num, int dir, int type) |
aa69a809 DL |
138 | { |
139 | u32 mask, data; | |
140 | ||
c6ee9f23 | 141 | if (dir == TX) { |
aa69a809 | 142 | mask = ENDPTCTRL_TXT; /* type */ |
727b4ddb | 143 | data = type << __ffs(mask); |
aa69a809 DL |
144 | |
145 | mask |= ENDPTCTRL_TXS; /* unstall */ | |
146 | mask |= ENDPTCTRL_TXR; /* reset data toggle */ | |
147 | data |= ENDPTCTRL_TXR; | |
148 | mask |= ENDPTCTRL_TXE; /* enable */ | |
149 | data |= ENDPTCTRL_TXE; | |
150 | } else { | |
151 | mask = ENDPTCTRL_RXT; /* type */ | |
727b4ddb | 152 | data = type << __ffs(mask); |
aa69a809 DL |
153 | |
154 | mask |= ENDPTCTRL_RXS; /* unstall */ | |
155 | mask |= ENDPTCTRL_RXR; /* reset data toggle */ | |
156 | data |= ENDPTCTRL_RXR; | |
157 | mask |= ENDPTCTRL_RXE; /* enable */ | |
158 | data |= ENDPTCTRL_RXE; | |
159 | } | |
26c696c6 | 160 | hw_write(ci, OP_ENDPTCTRL + num, mask, data); |
aa69a809 DL |
161 | return 0; |
162 | } | |
163 | ||
164 | /** | |
165 | * hw_ep_get_halt: return endpoint halt status | |
166 | * @num: endpoint number | |
167 | * @dir: endpoint direction | |
168 | * | |
169 | * This function returns 1 if endpoint halted | |
170 | */ | |
8e22978c | 171 | static int hw_ep_get_halt(struct ci_hdrc *ci, int num, int dir) |
aa69a809 | 172 | { |
c6ee9f23 | 173 | u32 mask = (dir == TX) ? ENDPTCTRL_TXS : ENDPTCTRL_RXS; |
aa69a809 | 174 | |
26c696c6 | 175 | return hw_read(ci, OP_ENDPTCTRL + num, mask) ? 1 : 0; |
aa69a809 DL |
176 | } |
177 | ||
aa69a809 DL |
178 | /** |
179 | * hw_ep_prime: primes endpoint (execute without interruption) | |
180 | * @num: endpoint number | |
181 | * @dir: endpoint direction | |
182 | * @is_ctrl: true if control endpoint | |
183 | * | |
184 | * This function returns an error code | |
185 | */ | |
8e22978c | 186 | static int hw_ep_prime(struct ci_hdrc *ci, int num, int dir, int is_ctrl) |
aa69a809 DL |
187 | { |
188 | int n = hw_ep_bit(num, dir); | |
189 | ||
66b76dbe SW |
190 | /* Synchronize before ep prime */ |
191 | wmb(); | |
192 | ||
26c696c6 | 193 | if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num))) |
aa69a809 DL |
194 | return -EAGAIN; |
195 | ||
5bf5dbed | 196 | hw_write(ci, OP_ENDPTPRIME, ~0, BIT(n)); |
aa69a809 | 197 | |
26c696c6 | 198 | while (hw_read(ci, OP_ENDPTPRIME, BIT(n))) |
aa69a809 | 199 | cpu_relax(); |
26c696c6 | 200 | if (is_ctrl && dir == RX && hw_read(ci, OP_ENDPTSETUPSTAT, BIT(num))) |
aa69a809 DL |
201 | return -EAGAIN; |
202 | ||
203 | /* status shoult be tested according with manual but it doesn't work */ | |
204 | return 0; | |
205 | } | |
206 | ||
207 | /** | |
208 | * hw_ep_set_halt: configures ep halt & resets data toggle after clear (execute | |
209 | * without interruption) | |
210 | * @num: endpoint number | |
211 | * @dir: endpoint direction | |
212 | * @value: true => stall, false => unstall | |
213 | * | |
214 | * This function returns an error code | |
215 | */ | |
8e22978c | 216 | static int hw_ep_set_halt(struct ci_hdrc *ci, int num, int dir, int value) |
aa69a809 DL |
217 | { |
218 | if (value != 0 && value != 1) | |
219 | return -EINVAL; | |
220 | ||
221 | do { | |
8e22978c | 222 | enum ci_hw_regs reg = OP_ENDPTCTRL + num; |
c6ee9f23 SW |
223 | u32 mask_xs = (dir == TX) ? ENDPTCTRL_TXS : ENDPTCTRL_RXS; |
224 | u32 mask_xr = (dir == TX) ? ENDPTCTRL_TXR : ENDPTCTRL_RXR; | |
aa69a809 DL |
225 | |
226 | /* data toggle - reserved for EP0 but it's in ESS */ | |
26c696c6 | 227 | hw_write(ci, reg, mask_xs|mask_xr, |
262c1632 | 228 | value ? mask_xs : mask_xr); |
26c696c6 | 229 | } while (value != hw_ep_get_halt(ci, num, dir)); |
aa69a809 DL |
230 | |
231 | return 0; | |
232 | } | |
233 | ||
aa69a809 DL |
234 | /** |
235 | * hw_is_port_high_speed: test if port is high speed | |
236 | * | |
237 | * This function returns true if high speed port | |
238 | */ | |
8e22978c | 239 | static int hw_port_is_high_speed(struct ci_hdrc *ci) |
aa69a809 | 240 | { |
26c696c6 RZ |
241 | return ci->hw_bank.lpm ? hw_read(ci, OP_DEVLC, DEVLC_PSPD) : |
242 | hw_read(ci, OP_PORTSC, PORTSC_HSP); | |
aa69a809 DL |
243 | } |
244 | ||
aa69a809 DL |
245 | /** |
246 | * hw_test_and_clear_complete: test & clear complete status (execute without | |
247 | * interruption) | |
dd39c358 | 248 | * @n: endpoint number |
aa69a809 DL |
249 | * |
250 | * This function returns complete status | |
251 | */ | |
8e22978c | 252 | static int hw_test_and_clear_complete(struct ci_hdrc *ci, int n) |
aa69a809 | 253 | { |
26c696c6 RZ |
254 | n = ep_to_bit(ci, n); |
255 | return hw_test_and_clear(ci, OP_ENDPTCOMPLETE, BIT(n)); | |
aa69a809 DL |
256 | } |
257 | ||
258 | /** | |
259 | * hw_test_and_clear_intr_active: test & clear active interrupts (execute | |
260 | * without interruption) | |
261 | * | |
262 | * This function returns active interrutps | |
263 | */ | |
8e22978c | 264 | static u32 hw_test_and_clear_intr_active(struct ci_hdrc *ci) |
aa69a809 | 265 | { |
26c696c6 | 266 | u32 reg = hw_read_intr_status(ci) & hw_read_intr_enable(ci); |
aa69a809 | 267 | |
26c696c6 | 268 | hw_write(ci, OP_USBSTS, ~0, reg); |
aa69a809 DL |
269 | return reg; |
270 | } | |
271 | ||
272 | /** | |
273 | * hw_test_and_clear_setup_guard: test & clear setup guard (execute without | |
274 | * interruption) | |
275 | * | |
276 | * This function returns guard value | |
277 | */ | |
8e22978c | 278 | static int hw_test_and_clear_setup_guard(struct ci_hdrc *ci) |
aa69a809 | 279 | { |
26c696c6 | 280 | return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, 0); |
aa69a809 DL |
281 | } |
282 | ||
283 | /** | |
284 | * hw_test_and_set_setup_guard: test & set setup guard (execute without | |
285 | * interruption) | |
286 | * | |
287 | * This function returns guard value | |
288 | */ | |
8e22978c | 289 | static int hw_test_and_set_setup_guard(struct ci_hdrc *ci) |
aa69a809 | 290 | { |
26c696c6 | 291 | return hw_test_and_write(ci, OP_USBCMD, USBCMD_SUTW, USBCMD_SUTW); |
aa69a809 DL |
292 | } |
293 | ||
294 | /** | |
295 | * hw_usb_set_address: configures USB address (execute without interruption) | |
296 | * @value: new USB address | |
297 | * | |
ef15e549 AS |
298 | * This function explicitly sets the address, without the "USBADRA" (advance) |
299 | * feature, which is not supported by older versions of the controller. | |
aa69a809 | 300 | */ |
8e22978c | 301 | static void hw_usb_set_address(struct ci_hdrc *ci, u8 value) |
aa69a809 | 302 | { |
26c696c6 | 303 | hw_write(ci, OP_DEVICEADDR, DEVICEADDR_USBADR, |
727b4ddb | 304 | value << __ffs(DEVICEADDR_USBADR)); |
aa69a809 DL |
305 | } |
306 | ||
307 | /** | |
308 | * hw_usb_reset: restart device after a bus reset (execute without | |
309 | * interruption) | |
310 | * | |
311 | * This function returns an error code | |
312 | */ | |
8e22978c | 313 | static int hw_usb_reset(struct ci_hdrc *ci) |
aa69a809 | 314 | { |
26c696c6 | 315 | hw_usb_set_address(ci, 0); |
aa69a809 DL |
316 | |
317 | /* ESS flushes only at end?!? */ | |
26c696c6 | 318 | hw_write(ci, OP_ENDPTFLUSH, ~0, ~0); |
aa69a809 DL |
319 | |
320 | /* clear setup token semaphores */ | |
26c696c6 | 321 | hw_write(ci, OP_ENDPTSETUPSTAT, 0, 0); |
aa69a809 DL |
322 | |
323 | /* clear complete status */ | |
26c696c6 | 324 | hw_write(ci, OP_ENDPTCOMPLETE, 0, 0); |
aa69a809 DL |
325 | |
326 | /* wait until all bits cleared */ | |
26c696c6 | 327 | while (hw_read(ci, OP_ENDPTPRIME, ~0)) |
aa69a809 DL |
328 | udelay(10); /* not RTOS friendly */ |
329 | ||
330 | /* reset all endpoints ? */ | |
331 | ||
332 | /* reset internal status and wait for further instructions | |
333 | no need to verify the port reset status (ESS does it) */ | |
334 | ||
335 | return 0; | |
336 | } | |
337 | ||
aa69a809 DL |
338 | /****************************************************************************** |
339 | * UTIL block | |
340 | *****************************************************************************/ | |
cc9e6c49 | 341 | |
8e22978c | 342 | static int add_td_to_list(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq, |
cc9e6c49 MG |
343 | unsigned length) |
344 | { | |
2e270412 MG |
345 | int i; |
346 | u32 temp; | |
cc9e6c49 MG |
347 | struct td_node *lastnode, *node = kzalloc(sizeof(struct td_node), |
348 | GFP_ATOMIC); | |
349 | ||
350 | if (node == NULL) | |
351 | return -ENOMEM; | |
352 | ||
58001eff | 353 | node->ptr = dma_pool_zalloc(hwep->td_pool, GFP_ATOMIC, &node->dma); |
cc9e6c49 MG |
354 | if (node->ptr == NULL) { |
355 | kfree(node); | |
356 | return -ENOMEM; | |
357 | } | |
358 | ||
2e270412 MG |
359 | node->ptr->token = cpu_to_le32(length << __ffs(TD_TOTAL_BYTES)); |
360 | node->ptr->token &= cpu_to_le32(TD_TOTAL_BYTES); | |
361 | node->ptr->token |= cpu_to_le32(TD_STATUS_ACTIVE); | |
2fc5a7da PC |
362 | if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == TX) { |
363 | u32 mul = hwreq->req.length / hwep->ep.maxpacket; | |
364 | ||
365 | if (hwreq->req.length == 0 | |
366 | || hwreq->req.length % hwep->ep.maxpacket) | |
367 | mul++; | |
34445fb4 | 368 | node->ptr->token |= cpu_to_le32(mul << __ffs(TD_MULTO)); |
2fc5a7da | 369 | } |
2e270412 | 370 | |
2dbc5c4c | 371 | temp = (u32) (hwreq->req.dma + hwreq->req.actual); |
2e270412 MG |
372 | if (length) { |
373 | node->ptr->page[0] = cpu_to_le32(temp); | |
374 | for (i = 1; i < TD_PAGE_COUNT; i++) { | |
8e22978c | 375 | u32 page = temp + i * CI_HDRC_PAGE_SIZE; |
2e270412 MG |
376 | page &= ~TD_RESERVED_MASK; |
377 | node->ptr->page[i] = cpu_to_le32(page); | |
378 | } | |
379 | } | |
380 | ||
2dbc5c4c | 381 | hwreq->req.actual += length; |
cc9e6c49 | 382 | |
2dbc5c4c | 383 | if (!list_empty(&hwreq->tds)) { |
cc9e6c49 | 384 | /* get the last entry */ |
2dbc5c4c | 385 | lastnode = list_entry(hwreq->tds.prev, |
cc9e6c49 MG |
386 | struct td_node, td); |
387 | lastnode->ptr->next = cpu_to_le32(node->dma); | |
388 | } | |
389 | ||
390 | INIT_LIST_HEAD(&node->td); | |
2dbc5c4c | 391 | list_add_tail(&node->td, &hwreq->tds); |
cc9e6c49 MG |
392 | |
393 | return 0; | |
394 | } | |
395 | ||
aa69a809 DL |
396 | /** |
397 | * _usb_addr: calculates endpoint address from direction & number | |
398 | * @ep: endpoint | |
399 | */ | |
8e22978c | 400 | static inline u8 _usb_addr(struct ci_hw_ep *ep) |
aa69a809 DL |
401 | { |
402 | return ((ep->dir == TX) ? USB_ENDPOINT_DIR_MASK : 0) | ep->num; | |
403 | } | |
404 | ||
405 | /** | |
e46fed9f | 406 | * _hardware_enqueue: configures a request at hardware level |
2dbc5c4c | 407 | * @hwep: endpoint |
e46fed9f | 408 | * @hwreq: request |
aa69a809 DL |
409 | * |
410 | * This function returns an error code | |
411 | */ | |
8e22978c | 412 | static int _hardware_enqueue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq) |
aa69a809 | 413 | { |
8e22978c | 414 | struct ci_hdrc *ci = hwep->ci; |
0e6ca199 | 415 | int ret = 0; |
2dbc5c4c | 416 | unsigned rest = hwreq->req.length; |
2e270412 | 417 | int pages = TD_PAGE_COUNT; |
cc9e6c49 | 418 | struct td_node *firstnode, *lastnode; |
aa69a809 | 419 | |
aa69a809 | 420 | /* don't queue twice */ |
2dbc5c4c | 421 | if (hwreq->req.status == -EALREADY) |
aa69a809 DL |
422 | return -EALREADY; |
423 | ||
2dbc5c4c | 424 | hwreq->req.status = -EALREADY; |
aa69a809 | 425 | |
2dbc5c4c | 426 | ret = usb_gadget_map_request(&ci->gadget, &hwreq->req, hwep->dir); |
5e0aa49e AS |
427 | if (ret) |
428 | return ret; | |
429 | ||
2e270412 MG |
430 | /* |
431 | * The first buffer could be not page aligned. | |
432 | * In that case we have to span into one extra td. | |
433 | */ | |
2dbc5c4c | 434 | if (hwreq->req.dma % PAGE_SIZE) |
2e270412 | 435 | pages--; |
cc9e6c49 | 436 | |
779debdf FT |
437 | if (rest == 0) { |
438 | ret = add_td_to_list(hwep, hwreq, 0); | |
439 | if (ret < 0) | |
440 | goto done; | |
441 | } | |
cc9e6c49 | 442 | |
2e270412 | 443 | while (rest > 0) { |
2dbc5c4c | 444 | unsigned count = min(hwreq->req.length - hwreq->req.actual, |
8e22978c | 445 | (unsigned)(pages * CI_HDRC_PAGE_SIZE)); |
779debdf FT |
446 | ret = add_td_to_list(hwep, hwreq, count); |
447 | if (ret < 0) | |
448 | goto done; | |
449 | ||
2e270412 | 450 | rest -= count; |
0e6ca199 | 451 | } |
aa69a809 | 452 | |
a4da4f12 | 453 | if (hwreq->req.zero && hwreq->req.length && hwep->dir == TX |
779debdf FT |
454 | && (hwreq->req.length % hwep->ep.maxpacket == 0)) { |
455 | ret = add_td_to_list(hwep, hwreq, 0); | |
456 | if (ret < 0) | |
457 | goto done; | |
458 | } | |
cc9e6c49 | 459 | |
2dbc5c4c | 460 | firstnode = list_first_entry(&hwreq->tds, struct td_node, td); |
2e270412 | 461 | |
2dbc5c4c | 462 | lastnode = list_entry(hwreq->tds.prev, |
cc9e6c49 MG |
463 | struct td_node, td); |
464 | ||
465 | lastnode->ptr->next = cpu_to_le32(TD_TERMINATE); | |
2dbc5c4c | 466 | if (!hwreq->req.no_interrupt) |
cc9e6c49 | 467 | lastnode->ptr->token |= cpu_to_le32(TD_IOC); |
a9c17430 MG |
468 | wmb(); |
469 | ||
2dbc5c4c AS |
470 | hwreq->req.actual = 0; |
471 | if (!list_empty(&hwep->qh.queue)) { | |
8e22978c | 472 | struct ci_hw_req *hwreqprev; |
2dbc5c4c | 473 | int n = hw_ep_bit(hwep->num, hwep->dir); |
0e6ca199 | 474 | int tmp_stat; |
cc9e6c49 MG |
475 | struct td_node *prevlastnode; |
476 | u32 next = firstnode->dma & TD_ADDR_MASK; | |
0e6ca199 | 477 | |
2dbc5c4c | 478 | hwreqprev = list_entry(hwep->qh.queue.prev, |
8e22978c | 479 | struct ci_hw_req, queue); |
2dbc5c4c | 480 | prevlastnode = list_entry(hwreqprev->tds.prev, |
cc9e6c49 MG |
481 | struct td_node, td); |
482 | ||
483 | prevlastnode->ptr->next = cpu_to_le32(next); | |
0e6ca199 | 484 | wmb(); |
26c696c6 | 485 | if (hw_read(ci, OP_ENDPTPRIME, BIT(n))) |
0e6ca199 PK |
486 | goto done; |
487 | do { | |
26c696c6 RZ |
488 | hw_write(ci, OP_USBCMD, USBCMD_ATDTW, USBCMD_ATDTW); |
489 | tmp_stat = hw_read(ci, OP_ENDPTSTAT, BIT(n)); | |
490 | } while (!hw_read(ci, OP_USBCMD, USBCMD_ATDTW)); | |
491 | hw_write(ci, OP_USBCMD, USBCMD_ATDTW, 0); | |
0e6ca199 PK |
492 | if (tmp_stat) |
493 | goto done; | |
494 | } | |
495 | ||
496 | /* QH configuration */ | |
2dbc5c4c AS |
497 | hwep->qh.ptr->td.next = cpu_to_le32(firstnode->dma); |
498 | hwep->qh.ptr->td.token &= | |
080ff5f4 | 499 | cpu_to_le32(~(TD_STATUS_HALTED|TD_STATUS_ACTIVE)); |
aa69a809 | 500 | |
2fc5a7da | 501 | if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == RX) { |
2dbc5c4c | 502 | u32 mul = hwreq->req.length / hwep->ep.maxpacket; |
e4ce4ecd | 503 | |
2fc5a7da PC |
504 | if (hwreq->req.length == 0 |
505 | || hwreq->req.length % hwep->ep.maxpacket) | |
e4ce4ecd | 506 | mul++; |
34445fb4 | 507 | hwep->qh.ptr->cap |= cpu_to_le32(mul << __ffs(QH_MULT)); |
e4ce4ecd MG |
508 | } |
509 | ||
2dbc5c4c AS |
510 | ret = hw_ep_prime(ci, hwep->num, hwep->dir, |
511 | hwep->type == USB_ENDPOINT_XFER_CONTROL); | |
0e6ca199 PK |
512 | done: |
513 | return ret; | |
aa69a809 DL |
514 | } |
515 | ||
2e270412 MG |
516 | /* |
517 | * free_pending_td: remove a pending request for the endpoint | |
2dbc5c4c | 518 | * @hwep: endpoint |
2e270412 | 519 | */ |
8e22978c | 520 | static void free_pending_td(struct ci_hw_ep *hwep) |
2e270412 | 521 | { |
2dbc5c4c | 522 | struct td_node *pending = hwep->pending_td; |
2e270412 | 523 | |
2dbc5c4c AS |
524 | dma_pool_free(hwep->td_pool, pending->ptr, pending->dma); |
525 | hwep->pending_td = NULL; | |
2e270412 MG |
526 | kfree(pending); |
527 | } | |
528 | ||
06bdfcdb SM |
529 | static int reprime_dtd(struct ci_hdrc *ci, struct ci_hw_ep *hwep, |
530 | struct td_node *node) | |
531 | { | |
34445fb4 | 532 | hwep->qh.ptr->td.next = cpu_to_le32(node->dma); |
06bdfcdb SM |
533 | hwep->qh.ptr->td.token &= |
534 | cpu_to_le32(~(TD_STATUS_HALTED | TD_STATUS_ACTIVE)); | |
535 | ||
06bdfcdb SM |
536 | return hw_ep_prime(ci, hwep->num, hwep->dir, |
537 | hwep->type == USB_ENDPOINT_XFER_CONTROL); | |
538 | } | |
539 | ||
aa69a809 DL |
540 | /** |
541 | * _hardware_dequeue: handles a request at hardware level | |
542 | * @gadget: gadget | |
2dbc5c4c | 543 | * @hwep: endpoint |
aa69a809 DL |
544 | * |
545 | * This function returns an error code | |
546 | */ | |
8e22978c | 547 | static int _hardware_dequeue(struct ci_hw_ep *hwep, struct ci_hw_req *hwreq) |
aa69a809 | 548 | { |
cc9e6c49 | 549 | u32 tmptoken; |
2e270412 MG |
550 | struct td_node *node, *tmpnode; |
551 | unsigned remaining_length; | |
2dbc5c4c | 552 | unsigned actual = hwreq->req.length; |
06bdfcdb | 553 | struct ci_hdrc *ci = hwep->ci; |
9e506438 | 554 | |
2dbc5c4c | 555 | if (hwreq->req.status != -EALREADY) |
aa69a809 DL |
556 | return -EINVAL; |
557 | ||
2dbc5c4c | 558 | hwreq->req.status = 0; |
0e6ca199 | 559 | |
2dbc5c4c | 560 | list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) { |
cc9e6c49 | 561 | tmptoken = le32_to_cpu(node->ptr->token); |
2e270412 | 562 | if ((TD_STATUS_ACTIVE & tmptoken) != 0) { |
06bdfcdb SM |
563 | int n = hw_ep_bit(hwep->num, hwep->dir); |
564 | ||
565 | if (ci->rev == CI_REVISION_24) | |
566 | if (!hw_read(ci, OP_ENDPTSTAT, BIT(n))) | |
567 | reprime_dtd(ci, hwep, node); | |
2dbc5c4c | 568 | hwreq->req.status = -EALREADY; |
0e6ca199 | 569 | return -EBUSY; |
cc9e6c49 | 570 | } |
aa69a809 | 571 | |
2e270412 MG |
572 | remaining_length = (tmptoken & TD_TOTAL_BYTES); |
573 | remaining_length >>= __ffs(TD_TOTAL_BYTES); | |
574 | actual -= remaining_length; | |
575 | ||
2dbc5c4c AS |
576 | hwreq->req.status = tmptoken & TD_STATUS; |
577 | if ((TD_STATUS_HALTED & hwreq->req.status)) { | |
578 | hwreq->req.status = -EPIPE; | |
2e270412 | 579 | break; |
2dbc5c4c AS |
580 | } else if ((TD_STATUS_DT_ERR & hwreq->req.status)) { |
581 | hwreq->req.status = -EPROTO; | |
2e270412 | 582 | break; |
2dbc5c4c AS |
583 | } else if ((TD_STATUS_TR_ERR & hwreq->req.status)) { |
584 | hwreq->req.status = -EILSEQ; | |
2e270412 MG |
585 | break; |
586 | } | |
587 | ||
588 | if (remaining_length) { | |
c6ee9f23 | 589 | if (hwep->dir == TX) { |
2dbc5c4c | 590 | hwreq->req.status = -EPROTO; |
2e270412 MG |
591 | break; |
592 | } | |
593 | } | |
594 | /* | |
595 | * As the hardware could still address the freed td | |
596 | * which will run the udc unusable, the cleanup of the | |
597 | * td has to be delayed by one. | |
598 | */ | |
2dbc5c4c AS |
599 | if (hwep->pending_td) |
600 | free_pending_td(hwep); | |
2e270412 | 601 | |
2dbc5c4c | 602 | hwep->pending_td = node; |
2e270412 MG |
603 | list_del_init(&node->td); |
604 | } | |
aa69a809 | 605 | |
2dbc5c4c | 606 | usb_gadget_unmap_request(&hwep->ci->gadget, &hwreq->req, hwep->dir); |
aa69a809 | 607 | |
2dbc5c4c | 608 | hwreq->req.actual += actual; |
aa69a809 | 609 | |
2dbc5c4c AS |
610 | if (hwreq->req.status) |
611 | return hwreq->req.status; | |
aa69a809 | 612 | |
2dbc5c4c | 613 | return hwreq->req.actual; |
aa69a809 DL |
614 | } |
615 | ||
616 | /** | |
617 | * _ep_nuke: dequeues all endpoint requests | |
2dbc5c4c | 618 | * @hwep: endpoint |
aa69a809 DL |
619 | * |
620 | * This function returns an error code | |
621 | * Caller must hold lock | |
622 | */ | |
8e22978c | 623 | static int _ep_nuke(struct ci_hw_ep *hwep) |
2dbc5c4c AS |
624 | __releases(hwep->lock) |
625 | __acquires(hwep->lock) | |
aa69a809 | 626 | { |
2e270412 | 627 | struct td_node *node, *tmpnode; |
2dbc5c4c | 628 | if (hwep == NULL) |
aa69a809 DL |
629 | return -EINVAL; |
630 | ||
2dbc5c4c | 631 | hw_ep_flush(hwep->ci, hwep->num, hwep->dir); |
aa69a809 | 632 | |
2dbc5c4c | 633 | while (!list_empty(&hwep->qh.queue)) { |
aa69a809 DL |
634 | |
635 | /* pop oldest request */ | |
8e22978c AS |
636 | struct ci_hw_req *hwreq = list_entry(hwep->qh.queue.next, |
637 | struct ci_hw_req, queue); | |
7ca2cd29 | 638 | |
2dbc5c4c AS |
639 | list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) { |
640 | dma_pool_free(hwep->td_pool, node->ptr, node->dma); | |
2e270412 MG |
641 | list_del_init(&node->td); |
642 | node->ptr = NULL; | |
643 | kfree(node); | |
7ca2cd29 MG |
644 | } |
645 | ||
2dbc5c4c AS |
646 | list_del_init(&hwreq->queue); |
647 | hwreq->req.status = -ESHUTDOWN; | |
aa69a809 | 648 | |
2dbc5c4c AS |
649 | if (hwreq->req.complete != NULL) { |
650 | spin_unlock(hwep->lock); | |
304f7e5e | 651 | usb_gadget_giveback_request(&hwep->ep, &hwreq->req); |
2dbc5c4c | 652 | spin_lock(hwep->lock); |
aa69a809 DL |
653 | } |
654 | } | |
2e270412 | 655 | |
2dbc5c4c AS |
656 | if (hwep->pending_td) |
657 | free_pending_td(hwep); | |
2e270412 | 658 | |
aa69a809 DL |
659 | return 0; |
660 | } | |
661 | ||
56ffa1d1 PC |
662 | static int _ep_set_halt(struct usb_ep *ep, int value, bool check_transfer) |
663 | { | |
664 | struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep); | |
665 | int direction, retval = 0; | |
666 | unsigned long flags; | |
667 | ||
668 | if (ep == NULL || hwep->ep.desc == NULL) | |
669 | return -EINVAL; | |
670 | ||
671 | if (usb_endpoint_xfer_isoc(hwep->ep.desc)) | |
672 | return -EOPNOTSUPP; | |
673 | ||
674 | spin_lock_irqsave(hwep->lock, flags); | |
675 | ||
676 | if (value && hwep->dir == TX && check_transfer && | |
677 | !list_empty(&hwep->qh.queue) && | |
678 | !usb_endpoint_xfer_control(hwep->ep.desc)) { | |
679 | spin_unlock_irqrestore(hwep->lock, flags); | |
680 | return -EAGAIN; | |
681 | } | |
682 | ||
683 | direction = hwep->dir; | |
684 | do { | |
685 | retval |= hw_ep_set_halt(hwep->ci, hwep->num, hwep->dir, value); | |
686 | ||
687 | if (!value) | |
688 | hwep->wedge = 0; | |
689 | ||
690 | if (hwep->type == USB_ENDPOINT_XFER_CONTROL) | |
691 | hwep->dir = (hwep->dir == TX) ? RX : TX; | |
692 | ||
693 | } while (hwep->dir != direction); | |
694 | ||
695 | spin_unlock_irqrestore(hwep->lock, flags); | |
696 | return retval; | |
697 | } | |
698 | ||
699 | ||
aa69a809 DL |
700 | /** |
701 | * _gadget_stop_activity: stops all USB activity, flushes & disables all endpts | |
702 | * @gadget: gadget | |
703 | * | |
704 | * This function returns an error code | |
aa69a809 DL |
705 | */ |
706 | static int _gadget_stop_activity(struct usb_gadget *gadget) | |
aa69a809 DL |
707 | { |
708 | struct usb_ep *ep; | |
8e22978c | 709 | struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget); |
e2b61c1d | 710 | unsigned long flags; |
aa69a809 | 711 | |
26c696c6 RZ |
712 | spin_lock_irqsave(&ci->lock, flags); |
713 | ci->gadget.speed = USB_SPEED_UNKNOWN; | |
714 | ci->remote_wakeup = 0; | |
715 | ci->suspended = 0; | |
716 | spin_unlock_irqrestore(&ci->lock, flags); | |
e2b61c1d | 717 | |
aa69a809 DL |
718 | /* flush all endpoints */ |
719 | gadget_for_each_ep(ep, gadget) { | |
720 | usb_ep_fifo_flush(ep); | |
721 | } | |
26c696c6 RZ |
722 | usb_ep_fifo_flush(&ci->ep0out->ep); |
723 | usb_ep_fifo_flush(&ci->ep0in->ep); | |
aa69a809 | 724 | |
aa69a809 DL |
725 | /* make sure to disable all endpoints */ |
726 | gadget_for_each_ep(ep, gadget) { | |
727 | usb_ep_disable(ep); | |
728 | } | |
aa69a809 | 729 | |
26c696c6 RZ |
730 | if (ci->status != NULL) { |
731 | usb_ep_free_request(&ci->ep0in->ep, ci->status); | |
732 | ci->status = NULL; | |
aa69a809 DL |
733 | } |
734 | ||
aa69a809 DL |
735 | return 0; |
736 | } | |
737 | ||
738 | /****************************************************************************** | |
739 | * ISR block | |
740 | *****************************************************************************/ | |
741 | /** | |
742 | * isr_reset_handler: USB reset interrupt handler | |
26c696c6 | 743 | * @ci: UDC device |
aa69a809 DL |
744 | * |
745 | * This function resets USB engine after a bus reset occurred | |
746 | */ | |
8e22978c | 747 | static void isr_reset_handler(struct ci_hdrc *ci) |
26c696c6 RZ |
748 | __releases(ci->lock) |
749 | __acquires(ci->lock) | |
aa69a809 | 750 | { |
aa69a809 DL |
751 | int retval; |
752 | ||
a3aee368 | 753 | spin_unlock(&ci->lock); |
afbe4775 PC |
754 | if (ci->gadget.speed != USB_SPEED_UNKNOWN) |
755 | usb_gadget_udc_reset(&ci->gadget, ci->driver); | |
92b336d7 | 756 | |
26c696c6 | 757 | retval = _gadget_stop_activity(&ci->gadget); |
aa69a809 DL |
758 | if (retval) |
759 | goto done; | |
760 | ||
26c696c6 | 761 | retval = hw_usb_reset(ci); |
aa69a809 DL |
762 | if (retval) |
763 | goto done; | |
764 | ||
26c696c6 RZ |
765 | ci->status = usb_ep_alloc_request(&ci->ep0in->ep, GFP_ATOMIC); |
766 | if (ci->status == NULL) | |
ac1aa6a2 | 767 | retval = -ENOMEM; |
ca9cfea0 | 768 | |
b9322252 | 769 | done: |
26c696c6 | 770 | spin_lock(&ci->lock); |
aa69a809 | 771 | |
aa69a809 | 772 | if (retval) |
26c696c6 | 773 | dev_err(ci->dev, "error: %i\n", retval); |
aa69a809 DL |
774 | } |
775 | ||
776 | /** | |
777 | * isr_get_status_complete: get_status request complete function | |
778 | * @ep: endpoint | |
779 | * @req: request handled | |
780 | * | |
781 | * Caller must release lock | |
782 | */ | |
783 | static void isr_get_status_complete(struct usb_ep *ep, struct usb_request *req) | |
784 | { | |
0f089094 | 785 | if (ep == NULL || req == NULL) |
aa69a809 | 786 | return; |
aa69a809 DL |
787 | |
788 | kfree(req->buf); | |
789 | usb_ep_free_request(ep, req); | |
790 | } | |
791 | ||
dd064e9d MG |
792 | /** |
793 | * _ep_queue: queues (submits) an I/O request to an endpoint | |
e46fed9f FT |
794 | * @ep: endpoint |
795 | * @req: request | |
796 | * @gfp_flags: GFP flags (not used) | |
dd064e9d MG |
797 | * |
798 | * Caller must hold lock | |
e46fed9f | 799 | * This function returns an error code |
dd064e9d MG |
800 | */ |
801 | static int _ep_queue(struct usb_ep *ep, struct usb_request *req, | |
802 | gfp_t __maybe_unused gfp_flags) | |
803 | { | |
8e22978c AS |
804 | struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep); |
805 | struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req); | |
806 | struct ci_hdrc *ci = hwep->ci; | |
dd064e9d MG |
807 | int retval = 0; |
808 | ||
2dbc5c4c | 809 | if (ep == NULL || req == NULL || hwep->ep.desc == NULL) |
dd064e9d MG |
810 | return -EINVAL; |
811 | ||
2dbc5c4c | 812 | if (hwep->type == USB_ENDPOINT_XFER_CONTROL) { |
dd064e9d | 813 | if (req->length) |
2dbc5c4c | 814 | hwep = (ci->ep0_dir == RX) ? |
dd064e9d | 815 | ci->ep0out : ci->ep0in; |
2dbc5c4c AS |
816 | if (!list_empty(&hwep->qh.queue)) { |
817 | _ep_nuke(hwep); | |
2dbc5c4c AS |
818 | dev_warn(hwep->ci->dev, "endpoint ctrl %X nuked\n", |
819 | _usb_addr(hwep)); | |
dd064e9d MG |
820 | } |
821 | } | |
822 | ||
2dbc5c4c | 823 | if (usb_endpoint_xfer_isoc(hwep->ep.desc) && |
a98e25e7 | 824 | hwreq->req.length > hwep->ep.mult * hwep->ep.maxpacket) { |
2dbc5c4c | 825 | dev_err(hwep->ci->dev, "request length too big for isochronous\n"); |
e4ce4ecd MG |
826 | return -EMSGSIZE; |
827 | } | |
828 | ||
dd064e9d | 829 | /* first nuke then test link, e.g. previous status has not sent */ |
2dbc5c4c AS |
830 | if (!list_empty(&hwreq->queue)) { |
831 | dev_err(hwep->ci->dev, "request already in queue\n"); | |
dd064e9d MG |
832 | return -EBUSY; |
833 | } | |
834 | ||
dd064e9d | 835 | /* push request */ |
2dbc5c4c AS |
836 | hwreq->req.status = -EINPROGRESS; |
837 | hwreq->req.actual = 0; | |
dd064e9d | 838 | |
2dbc5c4c | 839 | retval = _hardware_enqueue(hwep, hwreq); |
dd064e9d MG |
840 | |
841 | if (retval == -EALREADY) | |
842 | retval = 0; | |
843 | if (!retval) | |
2dbc5c4c | 844 | list_add_tail(&hwreq->queue, &hwep->qh.queue); |
dd064e9d MG |
845 | |
846 | return retval; | |
847 | } | |
848 | ||
aa69a809 DL |
849 | /** |
850 | * isr_get_status_response: get_status request response | |
26c696c6 | 851 | * @ci: ci struct |
aa69a809 DL |
852 | * @setup: setup request packet |
853 | * | |
854 | * This function returns an error code | |
855 | */ | |
8e22978c | 856 | static int isr_get_status_response(struct ci_hdrc *ci, |
aa69a809 | 857 | struct usb_ctrlrequest *setup) |
2dbc5c4c AS |
858 | __releases(hwep->lock) |
859 | __acquires(hwep->lock) | |
aa69a809 | 860 | { |
8e22978c | 861 | struct ci_hw_ep *hwep = ci->ep0in; |
aa69a809 DL |
862 | struct usb_request *req = NULL; |
863 | gfp_t gfp_flags = GFP_ATOMIC; | |
864 | int dir, num, retval; | |
865 | ||
2dbc5c4c | 866 | if (hwep == NULL || setup == NULL) |
aa69a809 DL |
867 | return -EINVAL; |
868 | ||
2dbc5c4c AS |
869 | spin_unlock(hwep->lock); |
870 | req = usb_ep_alloc_request(&hwep->ep, gfp_flags); | |
871 | spin_lock(hwep->lock); | |
aa69a809 DL |
872 | if (req == NULL) |
873 | return -ENOMEM; | |
874 | ||
875 | req->complete = isr_get_status_complete; | |
876 | req->length = 2; | |
877 | req->buf = kzalloc(req->length, gfp_flags); | |
878 | if (req->buf == NULL) { | |
879 | retval = -ENOMEM; | |
880 | goto err_free_req; | |
881 | } | |
882 | ||
883 | if ((setup->bRequestType & USB_RECIP_MASK) == USB_RECIP_DEVICE) { | |
1009f9a3 PC |
884 | *(u16 *)req->buf = (ci->remote_wakeup << 1) | |
885 | ci->gadget.is_selfpowered; | |
aa69a809 DL |
886 | } else if ((setup->bRequestType & USB_RECIP_MASK) \ |
887 | == USB_RECIP_ENDPOINT) { | |
888 | dir = (le16_to_cpu(setup->wIndex) & USB_ENDPOINT_DIR_MASK) ? | |
889 | TX : RX; | |
890 | num = le16_to_cpu(setup->wIndex) & USB_ENDPOINT_NUMBER_MASK; | |
26c696c6 | 891 | *(u16 *)req->buf = hw_ep_get_halt(ci, num, dir); |
aa69a809 DL |
892 | } |
893 | /* else do nothing; reserved for future use */ | |
894 | ||
2dbc5c4c | 895 | retval = _ep_queue(&hwep->ep, req, gfp_flags); |
aa69a809 DL |
896 | if (retval) |
897 | goto err_free_buf; | |
898 | ||
899 | return 0; | |
900 | ||
901 | err_free_buf: | |
902 | kfree(req->buf); | |
903 | err_free_req: | |
2dbc5c4c AS |
904 | spin_unlock(hwep->lock); |
905 | usb_ep_free_request(&hwep->ep, req); | |
906 | spin_lock(hwep->lock); | |
aa69a809 DL |
907 | return retval; |
908 | } | |
909 | ||
541cace8 PK |
910 | /** |
911 | * isr_setup_status_complete: setup_status request complete function | |
912 | * @ep: endpoint | |
913 | * @req: request handled | |
914 | * | |
915 | * Caller must release lock. Put the port in test mode if test mode | |
916 | * feature is selected. | |
917 | */ | |
918 | static void | |
919 | isr_setup_status_complete(struct usb_ep *ep, struct usb_request *req) | |
920 | { | |
8e22978c | 921 | struct ci_hdrc *ci = req->context; |
541cace8 PK |
922 | unsigned long flags; |
923 | ||
26c696c6 RZ |
924 | if (ci->setaddr) { |
925 | hw_usb_set_address(ci, ci->address); | |
926 | ci->setaddr = false; | |
10775eb1 PC |
927 | if (ci->address) |
928 | usb_gadget_set_state(&ci->gadget, USB_STATE_ADDRESS); | |
ef15e549 AS |
929 | } |
930 | ||
26c696c6 RZ |
931 | spin_lock_irqsave(&ci->lock, flags); |
932 | if (ci->test_mode) | |
933 | hw_port_test_set(ci, ci->test_mode); | |
934 | spin_unlock_irqrestore(&ci->lock, flags); | |
541cace8 PK |
935 | } |
936 | ||
aa69a809 DL |
937 | /** |
938 | * isr_setup_status_phase: queues the status phase of a setup transation | |
26c696c6 | 939 | * @ci: ci struct |
aa69a809 DL |
940 | * |
941 | * This function returns an error code | |
942 | */ | |
8e22978c | 943 | static int isr_setup_status_phase(struct ci_hdrc *ci) |
aa69a809 DL |
944 | { |
945 | int retval; | |
8e22978c | 946 | struct ci_hw_ep *hwep; |
aa69a809 | 947 | |
6f3c4fb6 CG |
948 | /* |
949 | * Unexpected USB controller behavior, caused by bad signal integrity | |
950 | * or ground reference problems, can lead to isr_setup_status_phase | |
951 | * being called with ci->status equal to NULL. | |
952 | * If this situation occurs, you should review your USB hardware design. | |
953 | */ | |
954 | if (WARN_ON_ONCE(!ci->status)) | |
955 | return -EPIPE; | |
956 | ||
2dbc5c4c | 957 | hwep = (ci->ep0_dir == TX) ? ci->ep0out : ci->ep0in; |
26c696c6 RZ |
958 | ci->status->context = ci; |
959 | ci->status->complete = isr_setup_status_complete; | |
aa69a809 | 960 | |
2dbc5c4c | 961 | retval = _ep_queue(&hwep->ep, ci->status, GFP_ATOMIC); |
aa69a809 DL |
962 | |
963 | return retval; | |
964 | } | |
965 | ||
966 | /** | |
967 | * isr_tr_complete_low: transaction complete low level handler | |
2dbc5c4c | 968 | * @hwep: endpoint |
aa69a809 DL |
969 | * |
970 | * This function returns an error code | |
971 | * Caller must hold lock | |
972 | */ | |
8e22978c | 973 | static int isr_tr_complete_low(struct ci_hw_ep *hwep) |
2dbc5c4c AS |
974 | __releases(hwep->lock) |
975 | __acquires(hwep->lock) | |
aa69a809 | 976 | { |
8e22978c AS |
977 | struct ci_hw_req *hwreq, *hwreqtemp; |
978 | struct ci_hw_ep *hweptemp = hwep; | |
db89960e | 979 | int retval = 0; |
aa69a809 | 980 | |
2dbc5c4c | 981 | list_for_each_entry_safe(hwreq, hwreqtemp, &hwep->qh.queue, |
0e6ca199 | 982 | queue) { |
2dbc5c4c | 983 | retval = _hardware_dequeue(hwep, hwreq); |
0e6ca199 PK |
984 | if (retval < 0) |
985 | break; | |
2dbc5c4c AS |
986 | list_del_init(&hwreq->queue); |
987 | if (hwreq->req.complete != NULL) { | |
988 | spin_unlock(hwep->lock); | |
989 | if ((hwep->type == USB_ENDPOINT_XFER_CONTROL) && | |
990 | hwreq->req.length) | |
991 | hweptemp = hwep->ci->ep0in; | |
304f7e5e | 992 | usb_gadget_giveback_request(&hweptemp->ep, &hwreq->req); |
2dbc5c4c | 993 | spin_lock(hwep->lock); |
0e6ca199 | 994 | } |
d9bb9c18 AL |
995 | } |
996 | ||
ef907482 | 997 | if (retval == -EBUSY) |
0e6ca199 | 998 | retval = 0; |
aa69a809 | 999 | |
aa69a809 DL |
1000 | return retval; |
1001 | } | |
1002 | ||
d20f7807 LJ |
1003 | static int otg_a_alt_hnp_support(struct ci_hdrc *ci) |
1004 | { | |
1005 | dev_warn(&ci->gadget.dev, | |
1006 | "connect the device to an alternate port if you want HNP\n"); | |
1007 | return isr_setup_status_phase(ci); | |
1008 | } | |
1009 | ||
d7b00e31 PC |
1010 | /** |
1011 | * isr_setup_packet_handler: setup packet handler | |
1012 | * @ci: UDC descriptor | |
1013 | * | |
1014 | * This function handles setup packet | |
1015 | */ | |
1016 | static void isr_setup_packet_handler(struct ci_hdrc *ci) | |
1017 | __releases(ci->lock) | |
1018 | __acquires(ci->lock) | |
1019 | { | |
1020 | struct ci_hw_ep *hwep = &ci->ci_hw_ep[0]; | |
1021 | struct usb_ctrlrequest req; | |
1022 | int type, num, dir, err = -EINVAL; | |
1023 | u8 tmode = 0; | |
1024 | ||
1025 | /* | |
1026 | * Flush data and handshake transactions of previous | |
1027 | * setup packet. | |
1028 | */ | |
1029 | _ep_nuke(ci->ep0out); | |
1030 | _ep_nuke(ci->ep0in); | |
1031 | ||
1032 | /* read_setup_packet */ | |
1033 | do { | |
1034 | hw_test_and_set_setup_guard(ci); | |
1035 | memcpy(&req, &hwep->qh.ptr->setup, sizeof(req)); | |
1036 | } while (!hw_test_and_clear_setup_guard(ci)); | |
1037 | ||
1038 | type = req.bRequestType; | |
1039 | ||
1040 | ci->ep0_dir = (type & USB_DIR_IN) ? TX : RX; | |
1041 | ||
1042 | switch (req.bRequest) { | |
1043 | case USB_REQ_CLEAR_FEATURE: | |
1044 | if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) && | |
1045 | le16_to_cpu(req.wValue) == | |
1046 | USB_ENDPOINT_HALT) { | |
1047 | if (req.wLength != 0) | |
1048 | break; | |
1049 | num = le16_to_cpu(req.wIndex); | |
c6ee9f23 | 1050 | dir = (num & USB_ENDPOINT_DIR_MASK) ? TX : RX; |
d7b00e31 | 1051 | num &= USB_ENDPOINT_NUMBER_MASK; |
c6ee9f23 | 1052 | if (dir == TX) |
d7b00e31 PC |
1053 | num += ci->hw_ep_max / 2; |
1054 | if (!ci->ci_hw_ep[num].wedge) { | |
1055 | spin_unlock(&ci->lock); | |
1056 | err = usb_ep_clear_halt( | |
1057 | &ci->ci_hw_ep[num].ep); | |
1058 | spin_lock(&ci->lock); | |
1059 | if (err) | |
1060 | break; | |
1061 | } | |
1062 | err = isr_setup_status_phase(ci); | |
1063 | } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE) && | |
1064 | le16_to_cpu(req.wValue) == | |
1065 | USB_DEVICE_REMOTE_WAKEUP) { | |
1066 | if (req.wLength != 0) | |
1067 | break; | |
1068 | ci->remote_wakeup = 0; | |
1069 | err = isr_setup_status_phase(ci); | |
1070 | } else { | |
1071 | goto delegate; | |
1072 | } | |
1073 | break; | |
1074 | case USB_REQ_GET_STATUS: | |
d6da40af LJ |
1075 | if ((type != (USB_DIR_IN|USB_RECIP_DEVICE) || |
1076 | le16_to_cpu(req.wIndex) == OTG_STS_SELECTOR) && | |
d7b00e31 PC |
1077 | type != (USB_DIR_IN|USB_RECIP_ENDPOINT) && |
1078 | type != (USB_DIR_IN|USB_RECIP_INTERFACE)) | |
1079 | goto delegate; | |
1080 | if (le16_to_cpu(req.wLength) != 2 || | |
1081 | le16_to_cpu(req.wValue) != 0) | |
1082 | break; | |
1083 | err = isr_get_status_response(ci, &req); | |
1084 | break; | |
1085 | case USB_REQ_SET_ADDRESS: | |
1086 | if (type != (USB_DIR_OUT|USB_RECIP_DEVICE)) | |
1087 | goto delegate; | |
1088 | if (le16_to_cpu(req.wLength) != 0 || | |
1089 | le16_to_cpu(req.wIndex) != 0) | |
1090 | break; | |
1091 | ci->address = (u8)le16_to_cpu(req.wValue); | |
1092 | ci->setaddr = true; | |
1093 | err = isr_setup_status_phase(ci); | |
1094 | break; | |
1095 | case USB_REQ_SET_FEATURE: | |
1096 | if (type == (USB_DIR_OUT|USB_RECIP_ENDPOINT) && | |
1097 | le16_to_cpu(req.wValue) == | |
1098 | USB_ENDPOINT_HALT) { | |
1099 | if (req.wLength != 0) | |
1100 | break; | |
1101 | num = le16_to_cpu(req.wIndex); | |
c6ee9f23 | 1102 | dir = (num & USB_ENDPOINT_DIR_MASK) ? TX : RX; |
d7b00e31 | 1103 | num &= USB_ENDPOINT_NUMBER_MASK; |
c6ee9f23 | 1104 | if (dir == TX) |
d7b00e31 PC |
1105 | num += ci->hw_ep_max / 2; |
1106 | ||
1107 | spin_unlock(&ci->lock); | |
56ffa1d1 | 1108 | err = _ep_set_halt(&ci->ci_hw_ep[num].ep, 1, false); |
d7b00e31 PC |
1109 | spin_lock(&ci->lock); |
1110 | if (!err) | |
1111 | isr_setup_status_phase(ci); | |
1112 | } else if (type == (USB_DIR_OUT|USB_RECIP_DEVICE)) { | |
1113 | if (req.wLength != 0) | |
1114 | break; | |
1115 | switch (le16_to_cpu(req.wValue)) { | |
1116 | case USB_DEVICE_REMOTE_WAKEUP: | |
1117 | ci->remote_wakeup = 1; | |
1118 | err = isr_setup_status_phase(ci); | |
1119 | break; | |
1120 | case USB_DEVICE_TEST_MODE: | |
1121 | tmode = le16_to_cpu(req.wIndex) >> 8; | |
1122 | switch (tmode) { | |
1123 | case TEST_J: | |
1124 | case TEST_K: | |
1125 | case TEST_SE0_NAK: | |
1126 | case TEST_PACKET: | |
1127 | case TEST_FORCE_EN: | |
1128 | ci->test_mode = tmode; | |
1129 | err = isr_setup_status_phase( | |
1130 | ci); | |
1131 | break; | |
1132 | default: | |
1133 | break; | |
1134 | } | |
95f5555f LJ |
1135 | break; |
1136 | case USB_DEVICE_B_HNP_ENABLE: | |
1137 | if (ci_otg_is_fsm_mode(ci)) { | |
1138 | ci->gadget.b_hnp_enable = 1; | |
1139 | err = isr_setup_status_phase( | |
1140 | ci); | |
1141 | } | |
1142 | break; | |
d20f7807 LJ |
1143 | case USB_DEVICE_A_ALT_HNP_SUPPORT: |
1144 | if (ci_otg_is_fsm_mode(ci)) | |
1145 | err = otg_a_alt_hnp_support(ci); | |
1146 | break; | |
3520d462 PC |
1147 | case USB_DEVICE_A_HNP_SUPPORT: |
1148 | if (ci_otg_is_fsm_mode(ci)) { | |
1149 | ci->gadget.a_hnp_support = 1; | |
1150 | err = isr_setup_status_phase( | |
1151 | ci); | |
1152 | } | |
1153 | break; | |
d7b00e31 PC |
1154 | default: |
1155 | goto delegate; | |
1156 | } | |
1157 | } else { | |
1158 | goto delegate; | |
1159 | } | |
1160 | break; | |
1161 | default: | |
1162 | delegate: | |
1163 | if (req.wLength == 0) /* no data phase */ | |
1164 | ci->ep0_dir = TX; | |
1165 | ||
1166 | spin_unlock(&ci->lock); | |
1167 | err = ci->driver->setup(&ci->gadget, &req); | |
1168 | spin_lock(&ci->lock); | |
1169 | break; | |
1170 | } | |
1171 | ||
1172 | if (err < 0) { | |
1173 | spin_unlock(&ci->lock); | |
56ffa1d1 PC |
1174 | if (_ep_set_halt(&hwep->ep, 1, false)) |
1175 | dev_err(ci->dev, "error: _ep_set_halt\n"); | |
d7b00e31 PC |
1176 | spin_lock(&ci->lock); |
1177 | } | |
1178 | } | |
1179 | ||
aa69a809 DL |
1180 | /** |
1181 | * isr_tr_complete_handler: transaction complete interrupt handler | |
26c696c6 | 1182 | * @ci: UDC descriptor |
aa69a809 DL |
1183 | * |
1184 | * This function handles traffic events | |
1185 | */ | |
8e22978c | 1186 | static void isr_tr_complete_handler(struct ci_hdrc *ci) |
26c696c6 RZ |
1187 | __releases(ci->lock) |
1188 | __acquires(ci->lock) | |
aa69a809 DL |
1189 | { |
1190 | unsigned i; | |
d7b00e31 | 1191 | int err; |
aa69a809 | 1192 | |
26c696c6 | 1193 | for (i = 0; i < ci->hw_ep_max; i++) { |
8e22978c | 1194 | struct ci_hw_ep *hwep = &ci->ci_hw_ep[i]; |
aa69a809 | 1195 | |
2dbc5c4c | 1196 | if (hwep->ep.desc == NULL) |
aa69a809 DL |
1197 | continue; /* not configured */ |
1198 | ||
26c696c6 | 1199 | if (hw_test_and_clear_complete(ci, i)) { |
2dbc5c4c AS |
1200 | err = isr_tr_complete_low(hwep); |
1201 | if (hwep->type == USB_ENDPOINT_XFER_CONTROL) { | |
aa69a809 | 1202 | if (err > 0) /* needs status phase */ |
26c696c6 | 1203 | err = isr_setup_status_phase(ci); |
aa69a809 | 1204 | if (err < 0) { |
26c696c6 | 1205 | spin_unlock(&ci->lock); |
56ffa1d1 | 1206 | if (_ep_set_halt(&hwep->ep, 1, false)) |
26c696c6 | 1207 | dev_err(ci->dev, |
56ffa1d1 | 1208 | "error: _ep_set_halt\n"); |
26c696c6 | 1209 | spin_lock(&ci->lock); |
aa69a809 DL |
1210 | } |
1211 | } | |
1212 | } | |
1213 | ||
64fc06c4 | 1214 | /* Only handle setup packet below */ |
d7b00e31 PC |
1215 | if (i == 0 && |
1216 | hw_test_and_clear(ci, OP_ENDPTSETUPSTAT, BIT(0))) | |
1217 | isr_setup_packet_handler(ci); | |
aa69a809 DL |
1218 | } |
1219 | } | |
1220 | ||
1221 | /****************************************************************************** | |
1222 | * ENDPT block | |
1223 | *****************************************************************************/ | |
1224 | /** | |
1225 | * ep_enable: configure endpoint, making it usable | |
1226 | * | |
1227 | * Check usb_ep_enable() at "usb_gadget.h" for details | |
1228 | */ | |
1229 | static int ep_enable(struct usb_ep *ep, | |
1230 | const struct usb_endpoint_descriptor *desc) | |
1231 | { | |
8e22978c | 1232 | struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep); |
ca9cfea0 | 1233 | int retval = 0; |
aa69a809 | 1234 | unsigned long flags; |
1cd12a9c | 1235 | u32 cap = 0; |
aa69a809 | 1236 | |
aa69a809 DL |
1237 | if (ep == NULL || desc == NULL) |
1238 | return -EINVAL; | |
1239 | ||
2dbc5c4c | 1240 | spin_lock_irqsave(hwep->lock, flags); |
aa69a809 DL |
1241 | |
1242 | /* only internal SW should enable ctrl endpts */ | |
1243 | ||
d5d1e1be | 1244 | if (!list_empty(&hwep->qh.queue)) { |
2dbc5c4c | 1245 | dev_warn(hwep->ci->dev, "enabling a non-empty endpoint!\n"); |
d5d1e1be PC |
1246 | spin_unlock_irqrestore(hwep->lock, flags); |
1247 | return -EBUSY; | |
1248 | } | |
1249 | ||
1250 | hwep->ep.desc = desc; | |
aa69a809 | 1251 | |
2dbc5c4c AS |
1252 | hwep->dir = usb_endpoint_dir_in(desc) ? TX : RX; |
1253 | hwep->num = usb_endpoint_num(desc); | |
1254 | hwep->type = usb_endpoint_type(desc); | |
aa69a809 | 1255 | |
63b9e901 | 1256 | hwep->ep.maxpacket = usb_endpoint_maxp(desc); |
a98e25e7 | 1257 | hwep->ep.mult = usb_endpoint_maxp_mult(desc); |
aa69a809 | 1258 | |
2dbc5c4c | 1259 | if (hwep->type == USB_ENDPOINT_XFER_CONTROL) |
1cd12a9c | 1260 | cap |= QH_IOS; |
953c6646 AR |
1261 | |
1262 | cap |= QH_ZLT; | |
2dbc5c4c | 1263 | cap |= (hwep->ep.maxpacket << __ffs(QH_MAX_PKT)) & QH_MAX_PKT; |
2fc5a7da PC |
1264 | /* |
1265 | * For ISO-TX, we set mult at QH as the largest value, and use | |
1266 | * MultO at TD as real mult value. | |
1267 | */ | |
1268 | if (hwep->type == USB_ENDPOINT_XFER_ISOC && hwep->dir == TX) | |
1269 | cap |= 3 << __ffs(QH_MULT); | |
1cd12a9c | 1270 | |
2dbc5c4c | 1271 | hwep->qh.ptr->cap = cpu_to_le32(cap); |
1cd12a9c | 1272 | |
2dbc5c4c | 1273 | hwep->qh.ptr->td.next |= cpu_to_le32(TD_TERMINATE); /* needed? */ |
aa69a809 | 1274 | |
64fc06c4 PC |
1275 | if (hwep->num != 0 && hwep->type == USB_ENDPOINT_XFER_CONTROL) { |
1276 | dev_err(hwep->ci->dev, "Set control xfer at non-ep0\n"); | |
1277 | retval = -EINVAL; | |
1278 | } | |
1279 | ||
ac1aa6a2 A |
1280 | /* |
1281 | * Enable endpoints in the HW other than ep0 as ep0 | |
1282 | * is always enabled | |
1283 | */ | |
2dbc5c4c AS |
1284 | if (hwep->num) |
1285 | retval |= hw_ep_enable(hwep->ci, hwep->num, hwep->dir, | |
1286 | hwep->type); | |
aa69a809 | 1287 | |
2dbc5c4c | 1288 | spin_unlock_irqrestore(hwep->lock, flags); |
aa69a809 DL |
1289 | return retval; |
1290 | } | |
1291 | ||
1292 | /** | |
1293 | * ep_disable: endpoint is no longer usable | |
1294 | * | |
1295 | * Check usb_ep_disable() at "usb_gadget.h" for details | |
1296 | */ | |
1297 | static int ep_disable(struct usb_ep *ep) | |
1298 | { | |
8e22978c | 1299 | struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep); |
aa69a809 DL |
1300 | int direction, retval = 0; |
1301 | unsigned long flags; | |
1302 | ||
aa69a809 DL |
1303 | if (ep == NULL) |
1304 | return -EINVAL; | |
2dbc5c4c | 1305 | else if (hwep->ep.desc == NULL) |
aa69a809 DL |
1306 | return -EBUSY; |
1307 | ||
2dbc5c4c | 1308 | spin_lock_irqsave(hwep->lock, flags); |
aa69a809 DL |
1309 | |
1310 | /* only internal SW should disable ctrl endpts */ | |
1311 | ||
2dbc5c4c | 1312 | direction = hwep->dir; |
aa69a809 | 1313 | do { |
2dbc5c4c AS |
1314 | retval |= _ep_nuke(hwep); |
1315 | retval |= hw_ep_disable(hwep->ci, hwep->num, hwep->dir); | |
aa69a809 | 1316 | |
2dbc5c4c AS |
1317 | if (hwep->type == USB_ENDPOINT_XFER_CONTROL) |
1318 | hwep->dir = (hwep->dir == TX) ? RX : TX; | |
aa69a809 | 1319 | |
2dbc5c4c | 1320 | } while (hwep->dir != direction); |
aa69a809 | 1321 | |
2dbc5c4c | 1322 | hwep->ep.desc = NULL; |
aa69a809 | 1323 | |
2dbc5c4c | 1324 | spin_unlock_irqrestore(hwep->lock, flags); |
aa69a809 DL |
1325 | return retval; |
1326 | } | |
1327 | ||
1328 | /** | |
1329 | * ep_alloc_request: allocate a request object to use with this endpoint | |
1330 | * | |
1331 | * Check usb_ep_alloc_request() at "usb_gadget.h" for details | |
1332 | */ | |
1333 | static struct usb_request *ep_alloc_request(struct usb_ep *ep, gfp_t gfp_flags) | |
1334 | { | |
8e22978c | 1335 | struct ci_hw_req *hwreq = NULL; |
aa69a809 | 1336 | |
0f089094 | 1337 | if (ep == NULL) |
aa69a809 | 1338 | return NULL; |
aa69a809 | 1339 | |
8e22978c | 1340 | hwreq = kzalloc(sizeof(struct ci_hw_req), gfp_flags); |
2dbc5c4c AS |
1341 | if (hwreq != NULL) { |
1342 | INIT_LIST_HEAD(&hwreq->queue); | |
1343 | INIT_LIST_HEAD(&hwreq->tds); | |
aa69a809 DL |
1344 | } |
1345 | ||
2dbc5c4c | 1346 | return (hwreq == NULL) ? NULL : &hwreq->req; |
aa69a809 DL |
1347 | } |
1348 | ||
1349 | /** | |
1350 | * ep_free_request: frees a request object | |
1351 | * | |
1352 | * Check usb_ep_free_request() at "usb_gadget.h" for details | |
1353 | */ | |
1354 | static void ep_free_request(struct usb_ep *ep, struct usb_request *req) | |
1355 | { | |
8e22978c AS |
1356 | struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep); |
1357 | struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req); | |
2e270412 | 1358 | struct td_node *node, *tmpnode; |
aa69a809 DL |
1359 | unsigned long flags; |
1360 | ||
aa69a809 | 1361 | if (ep == NULL || req == NULL) { |
aa69a809 | 1362 | return; |
2dbc5c4c AS |
1363 | } else if (!list_empty(&hwreq->queue)) { |
1364 | dev_err(hwep->ci->dev, "freeing queued request\n"); | |
aa69a809 DL |
1365 | return; |
1366 | } | |
1367 | ||
2dbc5c4c | 1368 | spin_lock_irqsave(hwep->lock, flags); |
aa69a809 | 1369 | |
2dbc5c4c AS |
1370 | list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) { |
1371 | dma_pool_free(hwep->td_pool, node->ptr, node->dma); | |
2e270412 MG |
1372 | list_del_init(&node->td); |
1373 | node->ptr = NULL; | |
1374 | kfree(node); | |
1375 | } | |
cc9e6c49 | 1376 | |
2dbc5c4c | 1377 | kfree(hwreq); |
aa69a809 | 1378 | |
2dbc5c4c | 1379 | spin_unlock_irqrestore(hwep->lock, flags); |
aa69a809 DL |
1380 | } |
1381 | ||
1382 | /** | |
1383 | * ep_queue: queues (submits) an I/O request to an endpoint | |
1384 | * | |
1385 | * Check usb_ep_queue()* at usb_gadget.h" for details | |
1386 | */ | |
1387 | static int ep_queue(struct usb_ep *ep, struct usb_request *req, | |
1388 | gfp_t __maybe_unused gfp_flags) | |
1389 | { | |
8e22978c | 1390 | struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep); |
aa69a809 DL |
1391 | int retval = 0; |
1392 | unsigned long flags; | |
1393 | ||
2dbc5c4c | 1394 | if (ep == NULL || req == NULL || hwep->ep.desc == NULL) |
aa69a809 DL |
1395 | return -EINVAL; |
1396 | ||
2dbc5c4c | 1397 | spin_lock_irqsave(hwep->lock, flags); |
dd064e9d | 1398 | retval = _ep_queue(ep, req, gfp_flags); |
2dbc5c4c | 1399 | spin_unlock_irqrestore(hwep->lock, flags); |
aa69a809 DL |
1400 | return retval; |
1401 | } | |
1402 | ||
1403 | /** | |
1404 | * ep_dequeue: dequeues (cancels, unlinks) an I/O request from an endpoint | |
1405 | * | |
1406 | * Check usb_ep_dequeue() at "usb_gadget.h" for details | |
1407 | */ | |
1408 | static int ep_dequeue(struct usb_ep *ep, struct usb_request *req) | |
1409 | { | |
8e22978c AS |
1410 | struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep); |
1411 | struct ci_hw_req *hwreq = container_of(req, struct ci_hw_req, req); | |
aa69a809 | 1412 | unsigned long flags; |
e4adcff0 | 1413 | struct td_node *node, *tmpnode; |
aa69a809 | 1414 | |
2dbc5c4c AS |
1415 | if (ep == NULL || req == NULL || hwreq->req.status != -EALREADY || |
1416 | hwep->ep.desc == NULL || list_empty(&hwreq->queue) || | |
1417 | list_empty(&hwep->qh.queue)) | |
aa69a809 DL |
1418 | return -EINVAL; |
1419 | ||
2dbc5c4c | 1420 | spin_lock_irqsave(hwep->lock, flags); |
aa69a809 | 1421 | |
2dbc5c4c | 1422 | hw_ep_flush(hwep->ci, hwep->num, hwep->dir); |
aa69a809 | 1423 | |
e4adcff0 PC |
1424 | list_for_each_entry_safe(node, tmpnode, &hwreq->tds, td) { |
1425 | dma_pool_free(hwep->td_pool, node->ptr, node->dma); | |
1426 | list_del(&node->td); | |
1427 | kfree(node); | |
1428 | } | |
1429 | ||
aa69a809 | 1430 | /* pop request */ |
2dbc5c4c | 1431 | list_del_init(&hwreq->queue); |
5e0aa49e | 1432 | |
2dbc5c4c | 1433 | usb_gadget_unmap_request(&hwep->ci->gadget, req, hwep->dir); |
5e0aa49e | 1434 | |
aa69a809 DL |
1435 | req->status = -ECONNRESET; |
1436 | ||
2dbc5c4c AS |
1437 | if (hwreq->req.complete != NULL) { |
1438 | spin_unlock(hwep->lock); | |
304f7e5e | 1439 | usb_gadget_giveback_request(&hwep->ep, &hwreq->req); |
2dbc5c4c | 1440 | spin_lock(hwep->lock); |
aa69a809 DL |
1441 | } |
1442 | ||
2dbc5c4c | 1443 | spin_unlock_irqrestore(hwep->lock, flags); |
aa69a809 DL |
1444 | return 0; |
1445 | } | |
1446 | ||
1447 | /** | |
1448 | * ep_set_halt: sets the endpoint halt feature | |
1449 | * | |
1450 | * Check usb_ep_set_halt() at "usb_gadget.h" for details | |
1451 | */ | |
1452 | static int ep_set_halt(struct usb_ep *ep, int value) | |
1453 | { | |
56ffa1d1 | 1454 | return _ep_set_halt(ep, value, true); |
aa69a809 DL |
1455 | } |
1456 | ||
1457 | /** | |
1458 | * ep_set_wedge: sets the halt feature and ignores clear requests | |
1459 | * | |
1460 | * Check usb_ep_set_wedge() at "usb_gadget.h" for details | |
1461 | */ | |
1462 | static int ep_set_wedge(struct usb_ep *ep) | |
1463 | { | |
8e22978c | 1464 | struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep); |
aa69a809 DL |
1465 | unsigned long flags; |
1466 | ||
2dbc5c4c | 1467 | if (ep == NULL || hwep->ep.desc == NULL) |
aa69a809 DL |
1468 | return -EINVAL; |
1469 | ||
2dbc5c4c AS |
1470 | spin_lock_irqsave(hwep->lock, flags); |
1471 | hwep->wedge = 1; | |
1472 | spin_unlock_irqrestore(hwep->lock, flags); | |
aa69a809 DL |
1473 | |
1474 | return usb_ep_set_halt(ep); | |
1475 | } | |
1476 | ||
1477 | /** | |
1478 | * ep_fifo_flush: flushes contents of a fifo | |
1479 | * | |
1480 | * Check usb_ep_fifo_flush() at "usb_gadget.h" for details | |
1481 | */ | |
1482 | static void ep_fifo_flush(struct usb_ep *ep) | |
1483 | { | |
8e22978c | 1484 | struct ci_hw_ep *hwep = container_of(ep, struct ci_hw_ep, ep); |
aa69a809 DL |
1485 | unsigned long flags; |
1486 | ||
aa69a809 | 1487 | if (ep == NULL) { |
2dbc5c4c | 1488 | dev_err(hwep->ci->dev, "%02X: -EINVAL\n", _usb_addr(hwep)); |
aa69a809 DL |
1489 | return; |
1490 | } | |
1491 | ||
2dbc5c4c | 1492 | spin_lock_irqsave(hwep->lock, flags); |
aa69a809 | 1493 | |
2dbc5c4c | 1494 | hw_ep_flush(hwep->ci, hwep->num, hwep->dir); |
aa69a809 | 1495 | |
2dbc5c4c | 1496 | spin_unlock_irqrestore(hwep->lock, flags); |
aa69a809 DL |
1497 | } |
1498 | ||
1499 | /** | |
1500 | * Endpoint-specific part of the API to the USB controller hardware | |
1501 | * Check "usb_gadget.h" for details | |
1502 | */ | |
1503 | static const struct usb_ep_ops usb_ep_ops = { | |
1504 | .enable = ep_enable, | |
1505 | .disable = ep_disable, | |
1506 | .alloc_request = ep_alloc_request, | |
1507 | .free_request = ep_free_request, | |
1508 | .queue = ep_queue, | |
1509 | .dequeue = ep_dequeue, | |
1510 | .set_halt = ep_set_halt, | |
1511 | .set_wedge = ep_set_wedge, | |
1512 | .fifo_flush = ep_fifo_flush, | |
1513 | }; | |
1514 | ||
1515 | /****************************************************************************** | |
1516 | * GADGET block | |
1517 | *****************************************************************************/ | |
8e22978c | 1518 | static int ci_udc_vbus_session(struct usb_gadget *_gadget, int is_active) |
f01ef574 | 1519 | { |
8e22978c | 1520 | struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget); |
f01ef574 PK |
1521 | unsigned long flags; |
1522 | int gadget_ready = 0; | |
1523 | ||
26c696c6 RZ |
1524 | spin_lock_irqsave(&ci->lock, flags); |
1525 | ci->vbus_active = is_active; | |
1526 | if (ci->driver) | |
f01ef574 | 1527 | gadget_ready = 1; |
26c696c6 | 1528 | spin_unlock_irqrestore(&ci->lock, flags); |
f01ef574 PK |
1529 | |
1530 | if (gadget_ready) { | |
1531 | if (is_active) { | |
c036019e | 1532 | pm_runtime_get_sync(&_gadget->dev); |
5b157300 | 1533 | hw_device_reset(ci); |
26c696c6 | 1534 | hw_device_state(ci, ci->ep0out->qh.dma); |
10775eb1 | 1535 | usb_gadget_set_state(_gadget, USB_STATE_POWERED); |
467a78c8 | 1536 | usb_udc_vbus_handler(_gadget, true); |
f01ef574 | 1537 | } else { |
467a78c8 | 1538 | usb_udc_vbus_handler(_gadget, false); |
92b336d7 PC |
1539 | if (ci->driver) |
1540 | ci->driver->disconnect(&ci->gadget); | |
26c696c6 RZ |
1541 | hw_device_state(ci, 0); |
1542 | if (ci->platdata->notify_event) | |
1543 | ci->platdata->notify_event(ci, | |
8e22978c | 1544 | CI_HDRC_CONTROLLER_STOPPED_EVENT); |
26c696c6 | 1545 | _gadget_stop_activity(&ci->gadget); |
c036019e | 1546 | pm_runtime_put_sync(&_gadget->dev); |
10775eb1 | 1547 | usb_gadget_set_state(_gadget, USB_STATE_NOTATTACHED); |
f01ef574 PK |
1548 | } |
1549 | } | |
1550 | ||
1551 | return 0; | |
1552 | } | |
1553 | ||
8e22978c | 1554 | static int ci_udc_wakeup(struct usb_gadget *_gadget) |
e2b61c1d | 1555 | { |
8e22978c | 1556 | struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget); |
e2b61c1d PK |
1557 | unsigned long flags; |
1558 | int ret = 0; | |
1559 | ||
26c696c6 RZ |
1560 | spin_lock_irqsave(&ci->lock, flags); |
1561 | if (!ci->remote_wakeup) { | |
e2b61c1d | 1562 | ret = -EOPNOTSUPP; |
e2b61c1d PK |
1563 | goto out; |
1564 | } | |
26c696c6 | 1565 | if (!hw_read(ci, OP_PORTSC, PORTSC_SUSP)) { |
e2b61c1d | 1566 | ret = -EINVAL; |
e2b61c1d PK |
1567 | goto out; |
1568 | } | |
26c696c6 | 1569 | hw_write(ci, OP_PORTSC, PORTSC_FPR, PORTSC_FPR); |
e2b61c1d | 1570 | out: |
26c696c6 | 1571 | spin_unlock_irqrestore(&ci->lock, flags); |
e2b61c1d PK |
1572 | return ret; |
1573 | } | |
1574 | ||
8e22978c | 1575 | static int ci_udc_vbus_draw(struct usb_gadget *_gadget, unsigned ma) |
d860852e | 1576 | { |
8e22978c | 1577 | struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget); |
d860852e | 1578 | |
ef44cb42 AT |
1579 | if (ci->usb_phy) |
1580 | return usb_phy_set_power(ci->usb_phy, ma); | |
d860852e PK |
1581 | return -ENOTSUPP; |
1582 | } | |
1583 | ||
1009f9a3 PC |
1584 | static int ci_udc_selfpowered(struct usb_gadget *_gadget, int is_on) |
1585 | { | |
1586 | struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget); | |
1587 | struct ci_hw_ep *hwep = ci->ep0in; | |
1588 | unsigned long flags; | |
1589 | ||
1590 | spin_lock_irqsave(hwep->lock, flags); | |
1591 | _gadget->is_selfpowered = (is_on != 0); | |
1592 | spin_unlock_irqrestore(hwep->lock, flags); | |
1593 | ||
1594 | return 0; | |
1595 | } | |
1596 | ||
c0a48e6c MG |
1597 | /* Change Data+ pullup status |
1598 | * this func is used by usb_gadget_connect/disconnet | |
1599 | */ | |
8e22978c | 1600 | static int ci_udc_pullup(struct usb_gadget *_gadget, int is_on) |
c0a48e6c | 1601 | { |
8e22978c | 1602 | struct ci_hdrc *ci = container_of(_gadget, struct ci_hdrc, gadget); |
c0a48e6c | 1603 | |
c4e94174 LJ |
1604 | /* |
1605 | * Data+ pullup controlled by OTG state machine in OTG fsm mode; | |
1606 | * and don't touch Data+ in host mode for dual role config. | |
1607 | */ | |
1608 | if (ci_otg_is_fsm_mode(ci) || ci->role == CI_ROLE_HOST) | |
9b6567e1 LJ |
1609 | return 0; |
1610 | ||
467a78c8 | 1611 | pm_runtime_get_sync(&ci->gadget.dev); |
c0a48e6c MG |
1612 | if (is_on) |
1613 | hw_write(ci, OP_USBCMD, USBCMD_RS, USBCMD_RS); | |
1614 | else | |
1615 | hw_write(ci, OP_USBCMD, USBCMD_RS, 0); | |
467a78c8 | 1616 | pm_runtime_put_sync(&ci->gadget.dev); |
c0a48e6c MG |
1617 | |
1618 | return 0; | |
1619 | } | |
1620 | ||
8e22978c | 1621 | static int ci_udc_start(struct usb_gadget *gadget, |
1f339d84 | 1622 | struct usb_gadget_driver *driver); |
22835b80 | 1623 | static int ci_udc_stop(struct usb_gadget *gadget); |
aa69a809 DL |
1624 | /** |
1625 | * Device operations part of the API to the USB controller hardware, | |
1626 | * which don't involve endpoints (or i/o) | |
1627 | * Check "usb_gadget.h" for details | |
1628 | */ | |
f01ef574 | 1629 | static const struct usb_gadget_ops usb_gadget_ops = { |
8e22978c AS |
1630 | .vbus_session = ci_udc_vbus_session, |
1631 | .wakeup = ci_udc_wakeup, | |
1009f9a3 | 1632 | .set_selfpowered = ci_udc_selfpowered, |
8e22978c AS |
1633 | .pullup = ci_udc_pullup, |
1634 | .vbus_draw = ci_udc_vbus_draw, | |
1635 | .udc_start = ci_udc_start, | |
1636 | .udc_stop = ci_udc_stop, | |
f01ef574 | 1637 | }; |
aa69a809 | 1638 | |
8e22978c | 1639 | static int init_eps(struct ci_hdrc *ci) |
aa69a809 | 1640 | { |
790c2d52 | 1641 | int retval = 0, i, j; |
aa69a809 | 1642 | |
26c696c6 | 1643 | for (i = 0; i < ci->hw_ep_max/2; i++) |
ca9cfea0 | 1644 | for (j = RX; j <= TX; j++) { |
26c696c6 | 1645 | int k = i + j * ci->hw_ep_max/2; |
8e22978c | 1646 | struct ci_hw_ep *hwep = &ci->ci_hw_ep[k]; |
aa69a809 | 1647 | |
2dbc5c4c | 1648 | scnprintf(hwep->name, sizeof(hwep->name), "ep%i%s", i, |
ca9cfea0 | 1649 | (j == TX) ? "in" : "out"); |
aa69a809 | 1650 | |
2dbc5c4c AS |
1651 | hwep->ci = ci; |
1652 | hwep->lock = &ci->lock; | |
1653 | hwep->td_pool = ci->td_pool; | |
aa69a809 | 1654 | |
2dbc5c4c AS |
1655 | hwep->ep.name = hwep->name; |
1656 | hwep->ep.ops = &usb_ep_ops; | |
a7e3f141 RB |
1657 | |
1658 | if (i == 0) { | |
1659 | hwep->ep.caps.type_control = true; | |
1660 | } else { | |
1661 | hwep->ep.caps.type_iso = true; | |
1662 | hwep->ep.caps.type_bulk = true; | |
1663 | hwep->ep.caps.type_int = true; | |
1664 | } | |
1665 | ||
1666 | if (j == TX) | |
1667 | hwep->ep.caps.dir_in = true; | |
1668 | else | |
1669 | hwep->ep.caps.dir_out = true; | |
1670 | ||
7f67c38b MG |
1671 | /* |
1672 | * for ep0: maxP defined in desc, for other | |
1673 | * eps, maxP is set by epautoconfig() called | |
1674 | * by gadget layer | |
1675 | */ | |
e117e742 | 1676 | usb_ep_set_maxpacket_limit(&hwep->ep, (unsigned short)~0); |
aa69a809 | 1677 | |
2dbc5c4c | 1678 | INIT_LIST_HEAD(&hwep->qh.queue); |
382c1b38 FE |
1679 | hwep->qh.ptr = dma_pool_zalloc(ci->qh_pool, GFP_KERNEL, |
1680 | &hwep->qh.dma); | |
2dbc5c4c | 1681 | if (hwep->qh.ptr == NULL) |
aa69a809 | 1682 | retval = -ENOMEM; |
ca9cfea0 | 1683 | |
d36ade60 AS |
1684 | /* |
1685 | * set up shorthands for ep0 out and in endpoints, | |
1686 | * don't add to gadget's ep_list | |
1687 | */ | |
1688 | if (i == 0) { | |
1689 | if (j == RX) | |
2dbc5c4c | 1690 | ci->ep0out = hwep; |
d36ade60 | 1691 | else |
2dbc5c4c | 1692 | ci->ep0in = hwep; |
d36ade60 | 1693 | |
e117e742 | 1694 | usb_ep_set_maxpacket_limit(&hwep->ep, CTRL_PAYLOAD_MAX); |
ca9cfea0 | 1695 | continue; |
d36ade60 | 1696 | } |
ca9cfea0 | 1697 | |
2dbc5c4c | 1698 | list_add_tail(&hwep->ep.ep_list, &ci->gadget.ep_list); |
ca9cfea0 | 1699 | } |
790c2d52 AS |
1700 | |
1701 | return retval; | |
1702 | } | |
1703 | ||
8e22978c | 1704 | static void destroy_eps(struct ci_hdrc *ci) |
ad6b1b97 MKB |
1705 | { |
1706 | int i; | |
1707 | ||
1708 | for (i = 0; i < ci->hw_ep_max; i++) { | |
8e22978c | 1709 | struct ci_hw_ep *hwep = &ci->ci_hw_ep[i]; |
ad6b1b97 | 1710 | |
4a29567b PC |
1711 | if (hwep->pending_td) |
1712 | free_pending_td(hwep); | |
2dbc5c4c | 1713 | dma_pool_free(ci->qh_pool, hwep->qh.ptr, hwep->qh.dma); |
ad6b1b97 MKB |
1714 | } |
1715 | } | |
1716 | ||
790c2d52 | 1717 | /** |
8e22978c | 1718 | * ci_udc_start: register a gadget driver |
1f339d84 | 1719 | * @gadget: our gadget |
790c2d52 | 1720 | * @driver: the driver being registered |
790c2d52 | 1721 | * |
790c2d52 AS |
1722 | * Interrupts are enabled here. |
1723 | */ | |
8e22978c | 1724 | static int ci_udc_start(struct usb_gadget *gadget, |
1f339d84 | 1725 | struct usb_gadget_driver *driver) |
790c2d52 | 1726 | { |
8e22978c | 1727 | struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget); |
790c2d52 | 1728 | unsigned long flags; |
790c2d52 AS |
1729 | int retval = -ENOMEM; |
1730 | ||
1f339d84 | 1731 | if (driver->disconnect == NULL) |
790c2d52 | 1732 | return -EINVAL; |
790c2d52 | 1733 | |
790c2d52 | 1734 | |
26c696c6 RZ |
1735 | ci->ep0out->ep.desc = &ctrl_endpt_out_desc; |
1736 | retval = usb_ep_enable(&ci->ep0out->ep); | |
ac1aa6a2 A |
1737 | if (retval) |
1738 | return retval; | |
877c1f54 | 1739 | |
26c696c6 RZ |
1740 | ci->ep0in->ep.desc = &ctrl_endpt_in_desc; |
1741 | retval = usb_ep_enable(&ci->ep0in->ep); | |
ac1aa6a2 A |
1742 | if (retval) |
1743 | return retval; | |
26c696c6 RZ |
1744 | |
1745 | ci->driver = driver; | |
4dcf720c LJ |
1746 | |
1747 | /* Start otg fsm for B-device */ | |
1748 | if (ci_otg_is_fsm_mode(ci) && ci->fsm.id) { | |
1749 | ci_hdrc_otg_fsm_start(ci); | |
1750 | return retval; | |
1751 | } | |
1752 | ||
26c696c6 | 1753 | pm_runtime_get_sync(&ci->gadget.dev); |
d268e9bc | 1754 | if (ci->vbus_active) { |
65b2fb32 | 1755 | spin_lock_irqsave(&ci->lock, flags); |
5b157300 | 1756 | hw_device_reset(ci); |
d268e9bc | 1757 | } else { |
467a78c8 | 1758 | usb_udc_vbus_handler(&ci->gadget, false); |
d268e9bc | 1759 | pm_runtime_put_sync(&ci->gadget.dev); |
65b2fb32 | 1760 | return retval; |
f01ef574 PK |
1761 | } |
1762 | ||
26c696c6 | 1763 | retval = hw_device_state(ci, ci->ep0out->qh.dma); |
65b2fb32 | 1764 | spin_unlock_irqrestore(&ci->lock, flags); |
c036019e | 1765 | if (retval) |
26c696c6 | 1766 | pm_runtime_put_sync(&ci->gadget.dev); |
aa69a809 | 1767 | |
aa69a809 DL |
1768 | return retval; |
1769 | } | |
aa69a809 | 1770 | |
85da852d LJ |
1771 | static void ci_udc_stop_for_otg_fsm(struct ci_hdrc *ci) |
1772 | { | |
1773 | if (!ci_otg_is_fsm_mode(ci)) | |
1774 | return; | |
1775 | ||
1776 | mutex_lock(&ci->fsm.lock); | |
1777 | if (ci->fsm.otg->state == OTG_STATE_A_PERIPHERAL) { | |
1778 | ci->fsm.a_bidl_adis_tmout = 1; | |
1779 | ci_hdrc_otg_fsm_start(ci); | |
1780 | } else if (ci->fsm.otg->state == OTG_STATE_B_PERIPHERAL) { | |
1781 | ci->fsm.protocol = PROTO_UNDEF; | |
1782 | ci->fsm.otg->state = OTG_STATE_UNDEFINED; | |
1783 | } | |
1784 | mutex_unlock(&ci->fsm.lock); | |
1785 | } | |
1786 | ||
aa69a809 | 1787 | /** |
8e22978c | 1788 | * ci_udc_stop: unregister a gadget driver |
aa69a809 | 1789 | */ |
22835b80 | 1790 | static int ci_udc_stop(struct usb_gadget *gadget) |
aa69a809 | 1791 | { |
8e22978c | 1792 | struct ci_hdrc *ci = container_of(gadget, struct ci_hdrc, gadget); |
1f339d84 | 1793 | unsigned long flags; |
aa69a809 | 1794 | |
26c696c6 | 1795 | spin_lock_irqsave(&ci->lock, flags); |
aa69a809 | 1796 | |
d268e9bc | 1797 | if (ci->vbus_active) { |
26c696c6 RZ |
1798 | hw_device_state(ci, 0); |
1799 | if (ci->platdata->notify_event) | |
1800 | ci->platdata->notify_event(ci, | |
8e22978c | 1801 | CI_HDRC_CONTROLLER_STOPPED_EVENT); |
26c696c6 RZ |
1802 | spin_unlock_irqrestore(&ci->lock, flags); |
1803 | _gadget_stop_activity(&ci->gadget); | |
1804 | spin_lock_irqsave(&ci->lock, flags); | |
1805 | pm_runtime_put(&ci->gadget.dev); | |
f01ef574 | 1806 | } |
aa69a809 | 1807 | |
f84839da | 1808 | ci->driver = NULL; |
26c696c6 | 1809 | spin_unlock_irqrestore(&ci->lock, flags); |
aa69a809 | 1810 | |
85da852d | 1811 | ci_udc_stop_for_otg_fsm(ci); |
aa69a809 DL |
1812 | return 0; |
1813 | } | |
aa69a809 DL |
1814 | |
1815 | /****************************************************************************** | |
1816 | * BUS block | |
1817 | *****************************************************************************/ | |
1818 | /** | |
26c696c6 | 1819 | * udc_irq: ci interrupt handler |
aa69a809 DL |
1820 | * |
1821 | * This function returns IRQ_HANDLED if the IRQ has been handled | |
1822 | * It locks access to registers | |
1823 | */ | |
8e22978c | 1824 | static irqreturn_t udc_irq(struct ci_hdrc *ci) |
aa69a809 | 1825 | { |
aa69a809 DL |
1826 | irqreturn_t retval; |
1827 | u32 intr; | |
1828 | ||
26c696c6 | 1829 | if (ci == NULL) |
aa69a809 | 1830 | return IRQ_HANDLED; |
aa69a809 | 1831 | |
26c696c6 | 1832 | spin_lock(&ci->lock); |
f01ef574 | 1833 | |
8e22978c | 1834 | if (ci->platdata->flags & CI_HDRC_REGS_SHARED) { |
26c696c6 | 1835 | if (hw_read(ci, OP_USBMODE, USBMODE_CM) != |
758fc986 | 1836 | USBMODE_CM_DC) { |
26c696c6 | 1837 | spin_unlock(&ci->lock); |
f01ef574 PK |
1838 | return IRQ_NONE; |
1839 | } | |
1840 | } | |
26c696c6 | 1841 | intr = hw_test_and_clear_intr_active(ci); |
aa69a809 | 1842 | |
e443b333 | 1843 | if (intr) { |
aa69a809 | 1844 | /* order defines priority - do NOT change it */ |
e443b333 | 1845 | if (USBi_URI & intr) |
26c696c6 | 1846 | isr_reset_handler(ci); |
e443b333 | 1847 | |
aa69a809 | 1848 | if (USBi_PCI & intr) { |
26c696c6 | 1849 | ci->gadget.speed = hw_port_is_high_speed(ci) ? |
aa69a809 | 1850 | USB_SPEED_HIGH : USB_SPEED_FULL; |
26c696c6 RZ |
1851 | if (ci->suspended && ci->driver->resume) { |
1852 | spin_unlock(&ci->lock); | |
1853 | ci->driver->resume(&ci->gadget); | |
1854 | spin_lock(&ci->lock); | |
1855 | ci->suspended = 0; | |
e2b61c1d | 1856 | } |
aa69a809 | 1857 | } |
e443b333 AS |
1858 | |
1859 | if (USBi_UI & intr) | |
26c696c6 | 1860 | isr_tr_complete_handler(ci); |
e443b333 | 1861 | |
e2b61c1d | 1862 | if (USBi_SLI & intr) { |
26c696c6 RZ |
1863 | if (ci->gadget.speed != USB_SPEED_UNKNOWN && |
1864 | ci->driver->suspend) { | |
1865 | ci->suspended = 1; | |
1866 | spin_unlock(&ci->lock); | |
1867 | ci->driver->suspend(&ci->gadget); | |
10775eb1 PC |
1868 | usb_gadget_set_state(&ci->gadget, |
1869 | USB_STATE_SUSPENDED); | |
26c696c6 | 1870 | spin_lock(&ci->lock); |
e2b61c1d | 1871 | } |
e2b61c1d | 1872 | } |
aa69a809 DL |
1873 | retval = IRQ_HANDLED; |
1874 | } else { | |
aa69a809 DL |
1875 | retval = IRQ_NONE; |
1876 | } | |
26c696c6 | 1877 | spin_unlock(&ci->lock); |
aa69a809 DL |
1878 | |
1879 | return retval; | |
1880 | } | |
1881 | ||
aa69a809 | 1882 | /** |
5f36e231 | 1883 | * udc_start: initialize gadget role |
26c696c6 | 1884 | * @ci: chipidea controller |
aa69a809 | 1885 | */ |
8e22978c | 1886 | static int udc_start(struct ci_hdrc *ci) |
aa69a809 | 1887 | { |
26c696c6 | 1888 | struct device *dev = ci->dev; |
79742351 | 1889 | struct usb_otg_caps *otg_caps = &ci->platdata->ci_otg_caps; |
aa69a809 DL |
1890 | int retval = 0; |
1891 | ||
26c696c6 RZ |
1892 | ci->gadget.ops = &usb_gadget_ops; |
1893 | ci->gadget.speed = USB_SPEED_UNKNOWN; | |
1894 | ci->gadget.max_speed = USB_SPEED_HIGH; | |
26c696c6 | 1895 | ci->gadget.name = ci->platdata->name; |
79742351 LJ |
1896 | ci->gadget.otg_caps = otg_caps; |
1897 | ||
3f217e9e LJ |
1898 | if (ci->is_otg && (otg_caps->hnp_support || otg_caps->srp_support || |
1899 | otg_caps->adp_support)) | |
79742351 | 1900 | ci->gadget.is_otg = 1; |
aa69a809 | 1901 | |
26c696c6 | 1902 | INIT_LIST_HEAD(&ci->gadget.ep_list); |
aa69a809 | 1903 | |
790c2d52 | 1904 | /* alloc resources */ |
8e22978c AS |
1905 | ci->qh_pool = dma_pool_create("ci_hw_qh", dev, |
1906 | sizeof(struct ci_hw_qh), | |
1907 | 64, CI_HDRC_PAGE_SIZE); | |
26c696c6 | 1908 | if (ci->qh_pool == NULL) |
5f36e231 | 1909 | return -ENOMEM; |
790c2d52 | 1910 | |
8e22978c AS |
1911 | ci->td_pool = dma_pool_create("ci_hw_td", dev, |
1912 | sizeof(struct ci_hw_td), | |
1913 | 64, CI_HDRC_PAGE_SIZE); | |
26c696c6 | 1914 | if (ci->td_pool == NULL) { |
790c2d52 AS |
1915 | retval = -ENOMEM; |
1916 | goto free_qh_pool; | |
1917 | } | |
1918 | ||
26c696c6 | 1919 | retval = init_eps(ci); |
790c2d52 AS |
1920 | if (retval) |
1921 | goto free_pools; | |
1922 | ||
26c696c6 | 1923 | ci->gadget.ep0 = &ci->ep0in->ep; |
f01ef574 | 1924 | |
26c696c6 | 1925 | retval = usb_add_gadget_udc(dev, &ci->gadget); |
0f91349b | 1926 | if (retval) |
74475ede | 1927 | goto destroy_eps; |
0f91349b | 1928 | |
26c696c6 RZ |
1929 | pm_runtime_no_callbacks(&ci->gadget.dev); |
1930 | pm_runtime_enable(&ci->gadget.dev); | |
aa69a809 | 1931 | |
aa69a809 DL |
1932 | return retval; |
1933 | ||
ad6b1b97 MKB |
1934 | destroy_eps: |
1935 | destroy_eps(ci); | |
790c2d52 | 1936 | free_pools: |
26c696c6 | 1937 | dma_pool_destroy(ci->td_pool); |
790c2d52 | 1938 | free_qh_pool: |
26c696c6 | 1939 | dma_pool_destroy(ci->qh_pool); |
aa69a809 DL |
1940 | return retval; |
1941 | } | |
1942 | ||
1943 | /** | |
3f124d23 | 1944 | * ci_hdrc_gadget_destroy: parent remove must call this to remove UDC |
aa69a809 DL |
1945 | * |
1946 | * No interrupts active, the IRQ has been released | |
1947 | */ | |
3f124d23 | 1948 | void ci_hdrc_gadget_destroy(struct ci_hdrc *ci) |
aa69a809 | 1949 | { |
3f124d23 | 1950 | if (!ci->roles[CI_ROLE_GADGET]) |
aa69a809 | 1951 | return; |
0f089094 | 1952 | |
26c696c6 | 1953 | usb_del_gadget_udc(&ci->gadget); |
aa69a809 | 1954 | |
ad6b1b97 | 1955 | destroy_eps(ci); |
790c2d52 | 1956 | |
26c696c6 RZ |
1957 | dma_pool_destroy(ci->td_pool); |
1958 | dma_pool_destroy(ci->qh_pool); | |
3f124d23 PC |
1959 | } |
1960 | ||
1961 | static int udc_id_switch_for_device(struct ci_hdrc *ci) | |
1962 | { | |
0c33bf78 LJ |
1963 | if (ci->is_otg) |
1964 | /* Clear and enable BSV irq */ | |
1965 | hw_write_otgsc(ci, OTGSC_BSVIS | OTGSC_BSVIE, | |
1966 | OTGSC_BSVIS | OTGSC_BSVIE); | |
3f124d23 PC |
1967 | |
1968 | return 0; | |
1969 | } | |
1970 | ||
1971 | static void udc_id_switch_for_host(struct ci_hdrc *ci) | |
1972 | { | |
0c33bf78 LJ |
1973 | /* |
1974 | * host doesn't care B_SESSION_VALID event | |
1975 | * so clear and disbale BSV irq | |
1976 | */ | |
1977 | if (ci->is_otg) | |
1978 | hw_write_otgsc(ci, OTGSC_BSVIE | OTGSC_BSVIS, OTGSC_BSVIS); | |
5f36e231 AS |
1979 | } |
1980 | ||
1981 | /** | |
1982 | * ci_hdrc_gadget_init - initialize device related bits | |
1983 | * ci: the controller | |
1984 | * | |
3f124d23 | 1985 | * This function initializes the gadget, if the device is "device capable". |
5f36e231 | 1986 | */ |
8e22978c | 1987 | int ci_hdrc_gadget_init(struct ci_hdrc *ci) |
5f36e231 AS |
1988 | { |
1989 | struct ci_role_driver *rdrv; | |
1990 | ||
1991 | if (!hw_read(ci, CAP_DCCPARAMS, DCCPARAMS_DC)) | |
1992 | return -ENXIO; | |
1993 | ||
e74e8372 | 1994 | rdrv = devm_kzalloc(ci->dev, sizeof(*rdrv), GFP_KERNEL); |
5f36e231 AS |
1995 | if (!rdrv) |
1996 | return -ENOMEM; | |
1997 | ||
3f124d23 PC |
1998 | rdrv->start = udc_id_switch_for_device; |
1999 | rdrv->stop = udc_id_switch_for_host; | |
5f36e231 AS |
2000 | rdrv->irq = udc_irq; |
2001 | rdrv->name = "gadget"; | |
2002 | ci->roles[CI_ROLE_GADGET] = rdrv; | |
aa69a809 | 2003 | |
3f124d23 | 2004 | return udc_start(ci); |
aa69a809 | 2005 | } |