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1da177e4 LT |
1 | /* |
2 | * linux/drivers/usb/gadget/lh7a40x_udc.c | |
3 | * Sharp LH7A40x on-chip full speed USB device controllers | |
4 | * | |
5 | * Copyright (C) 2004 Mikko Lahteenmaki, Nordic ID | |
6 | * Copyright (C) 2004 Bo Henriksen, Nordic ID | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation; either version 2 of the License, or | |
11 | * (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
21 | * | |
22 | */ | |
23 | ||
d052d1be | 24 | #include <linux/platform_device.h> |
5a0e3ad6 | 25 | #include <linux/slab.h> |
d052d1be | 26 | |
1da177e4 LT |
27 | #include "lh7a40x_udc.h" |
28 | ||
29 | //#define DEBUG printk | |
30 | //#define DEBUG_EP0 printk | |
31 | //#define DEBUG_SETUP printk | |
32 | ||
33 | #ifndef DEBUG_EP0 | |
34 | # define DEBUG_EP0(fmt,args...) | |
35 | #endif | |
36 | #ifndef DEBUG_SETUP | |
37 | # define DEBUG_SETUP(fmt,args...) | |
38 | #endif | |
39 | #ifndef DEBUG | |
40 | # define NO_STATES | |
41 | # define DEBUG(fmt,args...) | |
42 | #endif | |
43 | ||
44 | #define DRIVER_DESC "LH7A40x USB Device Controller" | |
45 | #define DRIVER_VERSION __DATE__ | |
46 | ||
47 | #ifndef _BIT /* FIXME - what happended to _BIT in 2.6.7bk18? */ | |
48 | #define _BIT(x) (1<<(x)) | |
49 | #endif | |
50 | ||
51 | struct lh7a40x_udc *the_controller; | |
52 | ||
53 | static const char driver_name[] = "lh7a40x_udc"; | |
54 | static const char driver_desc[] = DRIVER_DESC; | |
55 | static const char ep0name[] = "ep0-control"; | |
56 | ||
57 | /* | |
58 | Local definintions. | |
59 | */ | |
60 | ||
61 | #ifndef NO_STATES | |
62 | static char *state_names[] = { | |
63 | "WAIT_FOR_SETUP", | |
64 | "DATA_STATE_XMIT", | |
65 | "DATA_STATE_NEED_ZLP", | |
66 | "WAIT_FOR_OUT_STATUS", | |
67 | "DATA_STATE_RECV" | |
68 | }; | |
69 | #endif | |
70 | ||
71 | /* | |
72 | Local declarations. | |
73 | */ | |
74 | static int lh7a40x_ep_enable(struct usb_ep *ep, | |
75 | const struct usb_endpoint_descriptor *); | |
76 | static int lh7a40x_ep_disable(struct usb_ep *ep); | |
55016f10 | 77 | static struct usb_request *lh7a40x_alloc_request(struct usb_ep *ep, gfp_t); |
1da177e4 | 78 | static void lh7a40x_free_request(struct usb_ep *ep, struct usb_request *); |
55016f10 | 79 | static int lh7a40x_queue(struct usb_ep *ep, struct usb_request *, gfp_t); |
1da177e4 LT |
80 | static int lh7a40x_dequeue(struct usb_ep *ep, struct usb_request *); |
81 | static int lh7a40x_set_halt(struct usb_ep *ep, int); | |
82 | static int lh7a40x_fifo_status(struct usb_ep *ep); | |
1da177e4 LT |
83 | static void lh7a40x_fifo_flush(struct usb_ep *ep); |
84 | static void lh7a40x_ep0_kick(struct lh7a40x_udc *dev, struct lh7a40x_ep *ep); | |
85 | static void lh7a40x_handle_ep0(struct lh7a40x_udc *dev, u32 intr); | |
86 | ||
87 | static void done(struct lh7a40x_ep *ep, struct lh7a40x_request *req, | |
88 | int status); | |
89 | static void pio_irq_enable(int bEndpointAddress); | |
90 | static void pio_irq_disable(int bEndpointAddress); | |
91 | static void stop_activity(struct lh7a40x_udc *dev, | |
92 | struct usb_gadget_driver *driver); | |
93 | static void flush(struct lh7a40x_ep *ep); | |
94 | static void udc_enable(struct lh7a40x_udc *dev); | |
95 | static void udc_set_address(struct lh7a40x_udc *dev, unsigned char address); | |
96 | ||
97 | static struct usb_ep_ops lh7a40x_ep_ops = { | |
98 | .enable = lh7a40x_ep_enable, | |
99 | .disable = lh7a40x_ep_disable, | |
100 | ||
101 | .alloc_request = lh7a40x_alloc_request, | |
102 | .free_request = lh7a40x_free_request, | |
103 | ||
1da177e4 LT |
104 | .queue = lh7a40x_queue, |
105 | .dequeue = lh7a40x_dequeue, | |
106 | ||
107 | .set_halt = lh7a40x_set_halt, | |
108 | .fifo_status = lh7a40x_fifo_status, | |
109 | .fifo_flush = lh7a40x_fifo_flush, | |
110 | }; | |
111 | ||
112 | /* Inline code */ | |
113 | ||
114 | static __inline__ int write_packet(struct lh7a40x_ep *ep, | |
115 | struct lh7a40x_request *req, int max) | |
116 | { | |
117 | u8 *buf; | |
118 | int length, count; | |
119 | volatile u32 *fifo = (volatile u32 *)ep->fifo; | |
120 | ||
121 | buf = req->req.buf + req->req.actual; | |
122 | prefetch(buf); | |
123 | ||
124 | length = req->req.length - req->req.actual; | |
125 | length = min(length, max); | |
126 | req->req.actual += length; | |
127 | ||
128 | DEBUG("Write %d (max %d), fifo %p\n", length, max, fifo); | |
129 | ||
130 | count = length; | |
131 | while (count--) { | |
132 | *fifo = *buf++; | |
133 | } | |
134 | ||
135 | return length; | |
136 | } | |
137 | ||
138 | static __inline__ void usb_set_index(u32 ep) | |
139 | { | |
140 | *(volatile u32 *)io_p2v(USB_INDEX) = ep; | |
141 | } | |
142 | ||
143 | static __inline__ u32 usb_read(u32 port) | |
144 | { | |
145 | return *(volatile u32 *)io_p2v(port); | |
146 | } | |
147 | ||
148 | static __inline__ void usb_write(u32 val, u32 port) | |
149 | { | |
150 | *(volatile u32 *)io_p2v(port) = val; | |
151 | } | |
152 | ||
153 | static __inline__ void usb_set(u32 val, u32 port) | |
154 | { | |
155 | volatile u32 *ioport = (volatile u32 *)io_p2v(port); | |
156 | u32 after = (*ioport) | val; | |
157 | *ioport = after; | |
158 | } | |
159 | ||
160 | static __inline__ void usb_clear(u32 val, u32 port) | |
161 | { | |
162 | volatile u32 *ioport = (volatile u32 *)io_p2v(port); | |
163 | u32 after = (*ioport) & ~val; | |
164 | *ioport = after; | |
165 | } | |
166 | ||
167 | /*-------------------------------------------------------------------------*/ | |
168 | ||
169 | #define GPIO_PORTC_DR (0x80000E08) | |
170 | #define GPIO_PORTC_DDR (0x80000E18) | |
171 | #define GPIO_PORTC_PDR (0x80000E70) | |
172 | ||
173 | /* get port C pin data register */ | |
174 | #define get_portc_pdr(bit) ((usb_read(GPIO_PORTC_PDR) & _BIT(bit)) != 0) | |
175 | /* get port C data direction register */ | |
176 | #define get_portc_ddr(bit) ((usb_read(GPIO_PORTC_DDR) & _BIT(bit)) != 0) | |
177 | /* set port C data register */ | |
178 | #define set_portc_dr(bit, val) (val ? usb_set(_BIT(bit), GPIO_PORTC_DR) : usb_clear(_BIT(bit), GPIO_PORTC_DR)) | |
179 | /* set port C data direction register */ | |
180 | #define set_portc_ddr(bit, val) (val ? usb_set(_BIT(bit), GPIO_PORTC_DDR) : usb_clear(_BIT(bit), GPIO_PORTC_DDR)) | |
181 | ||
182 | /* | |
183 | * LPD7A404 GPIO's: | |
184 | * Port C bit 1 = USB Port 1 Power Enable | |
185 | * Port C bit 2 = USB Port 1 Data Carrier Detect | |
186 | */ | |
187 | #define is_usb_connected() get_portc_pdr(2) | |
188 | ||
189 | #ifdef CONFIG_USB_GADGET_DEBUG_FILES | |
190 | ||
191 | static const char proc_node_name[] = "driver/udc"; | |
192 | ||
193 | static int | |
194 | udc_proc_read(char *page, char **start, off_t off, int count, | |
195 | int *eof, void *_dev) | |
196 | { | |
197 | char *buf = page; | |
198 | struct lh7a40x_udc *dev = _dev; | |
199 | char *next = buf; | |
200 | unsigned size = count; | |
201 | unsigned long flags; | |
202 | int t; | |
203 | ||
204 | if (off != 0) | |
205 | return 0; | |
206 | ||
207 | local_irq_save(flags); | |
208 | ||
209 | /* basic device status */ | |
210 | t = scnprintf(next, size, | |
211 | DRIVER_DESC "\n" | |
212 | "%s version: %s\n" | |
213 | "Gadget driver: %s\n" | |
214 | "Host: %s\n\n", | |
215 | driver_name, DRIVER_VERSION, | |
216 | dev->driver ? dev->driver->driver.name : "(none)", | |
217 | is_usb_connected()? "full speed" : "disconnected"); | |
218 | size -= t; | |
219 | next += t; | |
220 | ||
221 | t = scnprintf(next, size, | |
222 | "GPIO:\n" | |
223 | " Port C bit 1: %d, dir %d\n" | |
224 | " Port C bit 2: %d, dir %d\n\n", | |
225 | get_portc_pdr(1), get_portc_ddr(1), | |
226 | get_portc_pdr(2), get_portc_ddr(2) | |
227 | ); | |
228 | size -= t; | |
229 | next += t; | |
230 | ||
231 | t = scnprintf(next, size, | |
232 | "DCP pullup: %d\n\n", | |
233 | (usb_read(USB_PM) & PM_USB_DCP) != 0); | |
234 | size -= t; | |
235 | next += t; | |
236 | ||
237 | local_irq_restore(flags); | |
238 | *eof = 1; | |
239 | return count - size; | |
240 | } | |
241 | ||
242 | #define create_proc_files() create_proc_read_entry(proc_node_name, 0, NULL, udc_proc_read, dev) | |
243 | #define remove_proc_files() remove_proc_entry(proc_node_name, NULL) | |
244 | ||
245 | #else /* !CONFIG_USB_GADGET_DEBUG_FILES */ | |
246 | ||
247 | #define create_proc_files() do {} while (0) | |
248 | #define remove_proc_files() do {} while (0) | |
249 | ||
250 | #endif /* CONFIG_USB_GADGET_DEBUG_FILES */ | |
251 | ||
252 | /* | |
253 | * udc_disable - disable USB device controller | |
254 | */ | |
255 | static void udc_disable(struct lh7a40x_udc *dev) | |
256 | { | |
441b62c1 | 257 | DEBUG("%s, %p\n", __func__, dev); |
1da177e4 LT |
258 | |
259 | udc_set_address(dev, 0); | |
260 | ||
261 | /* Disable interrupts */ | |
262 | usb_write(0, USB_IN_INT_EN); | |
263 | usb_write(0, USB_OUT_INT_EN); | |
264 | usb_write(0, USB_INT_EN); | |
265 | ||
266 | /* Disable the USB */ | |
267 | usb_write(0, USB_PM); | |
268 | ||
269 | #ifdef CONFIG_ARCH_LH7A404 | |
270 | /* Disable USB power */ | |
271 | set_portc_dr(1, 0); | |
272 | #endif | |
273 | ||
274 | /* if hardware supports it, disconnect from usb */ | |
275 | /* make_usb_disappear(); */ | |
276 | ||
277 | dev->ep0state = WAIT_FOR_SETUP; | |
278 | dev->gadget.speed = USB_SPEED_UNKNOWN; | |
279 | dev->usb_address = 0; | |
280 | } | |
281 | ||
282 | /* | |
283 | * udc_reinit - initialize software state | |
284 | */ | |
285 | static void udc_reinit(struct lh7a40x_udc *dev) | |
286 | { | |
287 | u32 i; | |
288 | ||
441b62c1 | 289 | DEBUG("%s, %p\n", __func__, dev); |
1da177e4 LT |
290 | |
291 | /* device/ep0 records init */ | |
292 | INIT_LIST_HEAD(&dev->gadget.ep_list); | |
293 | INIT_LIST_HEAD(&dev->gadget.ep0->ep_list); | |
294 | dev->ep0state = WAIT_FOR_SETUP; | |
295 | ||
296 | /* basic endpoint records init */ | |
297 | for (i = 0; i < UDC_MAX_ENDPOINTS; i++) { | |
298 | struct lh7a40x_ep *ep = &dev->ep[i]; | |
299 | ||
300 | if (i != 0) | |
301 | list_add_tail(&ep->ep.ep_list, &dev->gadget.ep_list); | |
302 | ||
303 | ep->desc = 0; | |
304 | ep->stopped = 0; | |
305 | INIT_LIST_HEAD(&ep->queue); | |
306 | ep->pio_irqs = 0; | |
307 | } | |
308 | ||
309 | /* the rest was statically initialized, and is read-only */ | |
310 | } | |
311 | ||
312 | #define BYTES2MAXP(x) (x / 8) | |
313 | #define MAXP2BYTES(x) (x * 8) | |
314 | ||
315 | /* until it's enabled, this UDC should be completely invisible | |
316 | * to any USB host. | |
317 | */ | |
318 | static void udc_enable(struct lh7a40x_udc *dev) | |
319 | { | |
320 | int ep; | |
321 | ||
441b62c1 | 322 | DEBUG("%s, %p\n", __func__, dev); |
1da177e4 LT |
323 | |
324 | dev->gadget.speed = USB_SPEED_UNKNOWN; | |
325 | ||
326 | #ifdef CONFIG_ARCH_LH7A404 | |
327 | /* Set Port C bit 1 & 2 as output */ | |
328 | set_portc_ddr(1, 1); | |
329 | set_portc_ddr(2, 1); | |
330 | ||
331 | /* Enable USB power */ | |
332 | set_portc_dr(1, 0); | |
333 | #endif | |
334 | ||
335 | /* | |
336 | * C.f Chapter 18.1.3.1 Initializing the USB | |
337 | */ | |
338 | ||
339 | /* Disable the USB */ | |
340 | usb_clear(PM_USB_ENABLE, USB_PM); | |
341 | ||
342 | /* Reset APB & I/O sides of the USB */ | |
343 | usb_set(USB_RESET_APB | USB_RESET_IO, USB_RESET); | |
344 | mdelay(5); | |
345 | usb_clear(USB_RESET_APB | USB_RESET_IO, USB_RESET); | |
346 | ||
347 | /* Set MAXP values for each */ | |
348 | for (ep = 0; ep < UDC_MAX_ENDPOINTS; ep++) { | |
349 | struct lh7a40x_ep *ep_reg = &dev->ep[ep]; | |
350 | u32 csr; | |
351 | ||
352 | usb_set_index(ep); | |
353 | ||
354 | switch (ep_reg->ep_type) { | |
355 | case ep_bulk_in: | |
356 | case ep_interrupt: | |
357 | usb_clear(USB_IN_CSR2_USB_DMA_EN | USB_IN_CSR2_AUTO_SET, | |
358 | ep_reg->csr2); | |
359 | /* Fall through */ | |
360 | case ep_control: | |
361 | usb_write(BYTES2MAXP(ep_maxpacket(ep_reg)), | |
362 | USB_IN_MAXP); | |
363 | break; | |
364 | case ep_bulk_out: | |
365 | usb_clear(USB_OUT_CSR2_USB_DMA_EN | | |
366 | USB_OUT_CSR2_AUTO_CLR, ep_reg->csr2); | |
367 | usb_write(BYTES2MAXP(ep_maxpacket(ep_reg)), | |
368 | USB_OUT_MAXP); | |
369 | break; | |
370 | } | |
371 | ||
372 | /* Read & Write CSR1, just in case */ | |
373 | csr = usb_read(ep_reg->csr1); | |
374 | usb_write(csr, ep_reg->csr1); | |
375 | ||
376 | flush(ep_reg); | |
377 | } | |
378 | ||
379 | /* Disable interrupts */ | |
380 | usb_write(0, USB_IN_INT_EN); | |
381 | usb_write(0, USB_OUT_INT_EN); | |
382 | usb_write(0, USB_INT_EN); | |
383 | ||
384 | /* Enable interrupts */ | |
385 | usb_set(USB_IN_INT_EP0, USB_IN_INT_EN); | |
386 | usb_set(USB_INT_RESET_INT | USB_INT_RESUME_INT, USB_INT_EN); | |
387 | /* Dont enable rest of the interrupts */ | |
388 | /* usb_set(USB_IN_INT_EP3 | USB_IN_INT_EP1 | USB_IN_INT_EP0, USB_IN_INT_EN); | |
389 | usb_set(USB_OUT_INT_EP2, USB_OUT_INT_EN); */ | |
390 | ||
391 | /* Enable SUSPEND */ | |
392 | usb_set(PM_ENABLE_SUSPEND, USB_PM); | |
393 | ||
394 | /* Enable the USB */ | |
395 | usb_set(PM_USB_ENABLE, USB_PM); | |
396 | ||
397 | #ifdef CONFIG_ARCH_LH7A404 | |
398 | /* NOTE: DOES NOT WORK! */ | |
399 | /* Let host detect UDC: | |
400 | * Software must write a 0 to the PMR:DCP_CTRL bit to turn this | |
401 | * transistor on and pull the USBDP pin HIGH. | |
402 | */ | |
403 | /* usb_clear(PM_USB_DCP, USB_PM); | |
404 | usb_set(PM_USB_DCP, USB_PM); */ | |
405 | #endif | |
406 | } | |
407 | ||
408 | /* | |
409 | Register entry point for the peripheral controller driver. | |
410 | */ | |
411 | int usb_gadget_register_driver(struct usb_gadget_driver *driver) | |
412 | { | |
413 | struct lh7a40x_udc *dev = the_controller; | |
414 | int retval; | |
415 | ||
441b62c1 | 416 | DEBUG("%s: %s\n", __func__, driver->driver.name); |
1da177e4 LT |
417 | |
418 | if (!driver | |
6bea476c DB |
419 | || driver->speed != USB_SPEED_FULL |
420 | || !driver->bind | |
421 | || !driver->disconnect | |
422 | || !driver->setup) | |
1da177e4 LT |
423 | return -EINVAL; |
424 | if (!dev) | |
425 | return -ENODEV; | |
426 | if (dev->driver) | |
427 | return -EBUSY; | |
428 | ||
429 | /* first hook up the driver ... */ | |
430 | dev->driver = driver; | |
431 | dev->gadget.dev.driver = &driver->driver; | |
432 | ||
433 | device_add(&dev->gadget.dev); | |
434 | retval = driver->bind(&dev->gadget); | |
435 | if (retval) { | |
6f8aa65b FS |
436 | printk(KERN_WARNING "%s: bind to driver %s --> error %d\n", |
437 | dev->gadget.name, driver->driver.name, retval); | |
1da177e4 LT |
438 | device_del(&dev->gadget.dev); |
439 | ||
440 | dev->driver = 0; | |
441 | dev->gadget.dev.driver = 0; | |
442 | return retval; | |
443 | } | |
444 | ||
445 | /* ... then enable host detection and ep0; and we're ready | |
446 | * for set_configuration as well as eventual disconnect. | |
447 | * NOTE: this shouldn't power up until later. | |
448 | */ | |
6f8aa65b FS |
449 | printk(KERN_WARNING "%s: registered gadget driver '%s'\n", |
450 | dev->gadget.name, driver->driver.name); | |
1da177e4 LT |
451 | |
452 | udc_enable(dev); | |
453 | ||
454 | return 0; | |
455 | } | |
456 | ||
457 | EXPORT_SYMBOL(usb_gadget_register_driver); | |
458 | ||
459 | /* | |
460 | Unregister entry point for the peripheral controller driver. | |
461 | */ | |
462 | int usb_gadget_unregister_driver(struct usb_gadget_driver *driver) | |
463 | { | |
464 | struct lh7a40x_udc *dev = the_controller; | |
465 | unsigned long flags; | |
466 | ||
467 | if (!dev) | |
468 | return -ENODEV; | |
6bea476c | 469 | if (!driver || driver != dev->driver || !driver->unbind) |
1da177e4 LT |
470 | return -EINVAL; |
471 | ||
472 | spin_lock_irqsave(&dev->lock, flags); | |
473 | dev->driver = 0; | |
474 | stop_activity(dev, driver); | |
475 | spin_unlock_irqrestore(&dev->lock, flags); | |
476 | ||
477 | driver->unbind(&dev->gadget); | |
eb0be47d | 478 | dev->gadget.dev.driver = NULL; |
1da177e4 LT |
479 | device_del(&dev->gadget.dev); |
480 | ||
481 | udc_disable(dev); | |
482 | ||
483 | DEBUG("unregistered gadget driver '%s'\n", driver->driver.name); | |
484 | return 0; | |
485 | } | |
486 | ||
487 | EXPORT_SYMBOL(usb_gadget_unregister_driver); | |
488 | ||
489 | /*-------------------------------------------------------------------------*/ | |
490 | ||
491 | /** Write request to FIFO (max write == maxp size) | |
492 | * Return: 0 = still running, 1 = completed, negative = errno | |
493 | * NOTE: INDEX register must be set for EP | |
494 | */ | |
495 | static int write_fifo(struct lh7a40x_ep *ep, struct lh7a40x_request *req) | |
496 | { | |
497 | u32 max; | |
498 | u32 csr; | |
499 | ||
500 | max = le16_to_cpu(ep->desc->wMaxPacketSize); | |
501 | ||
502 | csr = usb_read(ep->csr1); | |
503 | DEBUG("CSR: %x %d\n", csr, csr & USB_IN_CSR1_FIFO_NOT_EMPTY); | |
504 | ||
505 | if (!(csr & USB_IN_CSR1_FIFO_NOT_EMPTY)) { | |
506 | unsigned count; | |
507 | int is_last, is_short; | |
508 | ||
509 | count = write_packet(ep, req, max); | |
510 | usb_set(USB_IN_CSR1_IN_PKT_RDY, ep->csr1); | |
511 | ||
512 | /* last packet is usually short (or a zlp) */ | |
513 | if (unlikely(count != max)) | |
514 | is_last = is_short = 1; | |
515 | else { | |
516 | if (likely(req->req.length != req->req.actual) | |
517 | || req->req.zero) | |
518 | is_last = 0; | |
519 | else | |
520 | is_last = 1; | |
521 | /* interrupt/iso maxpacket may not fill the fifo */ | |
522 | is_short = unlikely(max < ep_maxpacket(ep)); | |
523 | } | |
524 | ||
441b62c1 | 525 | DEBUG("%s: wrote %s %d bytes%s%s %d left %p\n", __func__, |
1da177e4 LT |
526 | ep->ep.name, count, |
527 | is_last ? "/L" : "", is_short ? "/S" : "", | |
528 | req->req.length - req->req.actual, req); | |
529 | ||
530 | /* requests complete when all IN data is in the FIFO */ | |
531 | if (is_last) { | |
532 | done(ep, req, 0); | |
533 | if (list_empty(&ep->queue)) { | |
534 | pio_irq_disable(ep_index(ep)); | |
535 | } | |
536 | return 1; | |
537 | } | |
538 | } else { | |
539 | DEBUG("Hmm.. %d ep FIFO is not empty!\n", ep_index(ep)); | |
540 | } | |
541 | ||
542 | return 0; | |
543 | } | |
544 | ||
545 | /** Read to request from FIFO (max read == bytes in fifo) | |
546 | * Return: 0 = still running, 1 = completed, negative = errno | |
547 | * NOTE: INDEX register must be set for EP | |
548 | */ | |
549 | static int read_fifo(struct lh7a40x_ep *ep, struct lh7a40x_request *req) | |
550 | { | |
551 | u32 csr; | |
552 | u8 *buf; | |
553 | unsigned bufferspace, count, is_short; | |
554 | volatile u32 *fifo = (volatile u32 *)ep->fifo; | |
555 | ||
556 | /* make sure there's a packet in the FIFO. */ | |
557 | csr = usb_read(ep->csr1); | |
558 | if (!(csr & USB_OUT_CSR1_OUT_PKT_RDY)) { | |
441b62c1 | 559 | DEBUG("%s: Packet NOT ready!\n", __func__); |
1da177e4 LT |
560 | return -EINVAL; |
561 | } | |
562 | ||
563 | buf = req->req.buf + req->req.actual; | |
564 | prefetchw(buf); | |
565 | bufferspace = req->req.length - req->req.actual; | |
566 | ||
567 | /* read all bytes from this packet */ | |
568 | count = usb_read(USB_OUT_FIFO_WC1); | |
569 | req->req.actual += min(count, bufferspace); | |
570 | ||
571 | is_short = (count < ep->ep.maxpacket); | |
572 | DEBUG("read %s %02x, %d bytes%s req %p %d/%d\n", | |
573 | ep->ep.name, csr, count, | |
574 | is_short ? "/S" : "", req, req->req.actual, req->req.length); | |
575 | ||
576 | while (likely(count-- != 0)) { | |
577 | u8 byte = (u8) (*fifo & 0xff); | |
578 | ||
579 | if (unlikely(bufferspace == 0)) { | |
580 | /* this happens when the driver's buffer | |
581 | * is smaller than what the host sent. | |
582 | * discard the extra data. | |
583 | */ | |
584 | if (req->req.status != -EOVERFLOW) | |
6f8aa65b FS |
585 | printk(KERN_WARNING "%s overflow %d\n", |
586 | ep->ep.name, count); | |
1da177e4 LT |
587 | req->req.status = -EOVERFLOW; |
588 | } else { | |
589 | *buf++ = byte; | |
590 | bufferspace--; | |
591 | } | |
592 | } | |
593 | ||
594 | usb_clear(USB_OUT_CSR1_OUT_PKT_RDY, ep->csr1); | |
595 | ||
596 | /* completion */ | |
597 | if (is_short || req->req.actual == req->req.length) { | |
598 | done(ep, req, 0); | |
599 | usb_set(USB_OUT_CSR1_FIFO_FLUSH, ep->csr1); | |
600 | ||
601 | if (list_empty(&ep->queue)) | |
602 | pio_irq_disable(ep_index(ep)); | |
603 | return 1; | |
604 | } | |
605 | ||
606 | /* finished that packet. the next one may be waiting... */ | |
607 | return 0; | |
608 | } | |
609 | ||
610 | /* | |
611 | * done - retire a request; caller blocked irqs | |
612 | * INDEX register is preserved to keep same | |
613 | */ | |
614 | static void done(struct lh7a40x_ep *ep, struct lh7a40x_request *req, int status) | |
615 | { | |
616 | unsigned int stopped = ep->stopped; | |
617 | u32 index; | |
618 | ||
441b62c1 | 619 | DEBUG("%s, %p\n", __func__, ep); |
1da177e4 LT |
620 | list_del_init(&req->queue); |
621 | ||
622 | if (likely(req->req.status == -EINPROGRESS)) | |
623 | req->req.status = status; | |
624 | else | |
625 | status = req->req.status; | |
626 | ||
627 | if (status && status != -ESHUTDOWN) | |
628 | DEBUG("complete %s req %p stat %d len %u/%u\n", | |
629 | ep->ep.name, &req->req, status, | |
630 | req->req.actual, req->req.length); | |
631 | ||
632 | /* don't modify queue heads during completion callback */ | |
633 | ep->stopped = 1; | |
634 | /* Read current index (completion may modify it) */ | |
635 | index = usb_read(USB_INDEX); | |
636 | ||
637 | spin_unlock(&ep->dev->lock); | |
638 | req->req.complete(&ep->ep, &req->req); | |
639 | spin_lock(&ep->dev->lock); | |
640 | ||
641 | /* Restore index */ | |
642 | usb_set_index(index); | |
643 | ep->stopped = stopped; | |
644 | } | |
645 | ||
646 | /** Enable EP interrupt */ | |
647 | static void pio_irq_enable(int ep) | |
648 | { | |
441b62c1 | 649 | DEBUG("%s: %d\n", __func__, ep); |
1da177e4 LT |
650 | |
651 | switch (ep) { | |
652 | case 1: | |
653 | usb_set(USB_IN_INT_EP1, USB_IN_INT_EN); | |
654 | break; | |
655 | case 2: | |
656 | usb_set(USB_OUT_INT_EP2, USB_OUT_INT_EN); | |
657 | break; | |
658 | case 3: | |
659 | usb_set(USB_IN_INT_EP3, USB_IN_INT_EN); | |
660 | break; | |
661 | default: | |
662 | DEBUG("Unknown endpoint: %d\n", ep); | |
663 | break; | |
664 | } | |
665 | } | |
666 | ||
667 | /** Disable EP interrupt */ | |
668 | static void pio_irq_disable(int ep) | |
669 | { | |
441b62c1 | 670 | DEBUG("%s: %d\n", __func__, ep); |
1da177e4 LT |
671 | |
672 | switch (ep) { | |
673 | case 1: | |
674 | usb_clear(USB_IN_INT_EP1, USB_IN_INT_EN); | |
675 | break; | |
676 | case 2: | |
677 | usb_clear(USB_OUT_INT_EP2, USB_OUT_INT_EN); | |
678 | break; | |
679 | case 3: | |
680 | usb_clear(USB_IN_INT_EP3, USB_IN_INT_EN); | |
681 | break; | |
682 | default: | |
683 | DEBUG("Unknown endpoint: %d\n", ep); | |
684 | break; | |
685 | } | |
686 | } | |
687 | ||
688 | /* | |
689 | * nuke - dequeue ALL requests | |
690 | */ | |
691 | void nuke(struct lh7a40x_ep *ep, int status) | |
692 | { | |
693 | struct lh7a40x_request *req; | |
694 | ||
441b62c1 | 695 | DEBUG("%s, %p\n", __func__, ep); |
1da177e4 LT |
696 | |
697 | /* Flush FIFO */ | |
698 | flush(ep); | |
699 | ||
700 | /* called with irqs blocked */ | |
701 | while (!list_empty(&ep->queue)) { | |
702 | req = list_entry(ep->queue.next, struct lh7a40x_request, queue); | |
703 | done(ep, req, status); | |
704 | } | |
705 | ||
093cf723 | 706 | /* Disable IRQ if EP is enabled (has descriptor) */ |
1da177e4 LT |
707 | if (ep->desc) |
708 | pio_irq_disable(ep_index(ep)); | |
709 | } | |
710 | ||
711 | /* | |
712 | void nuke_all(struct lh7a40x_udc *dev) | |
713 | { | |
714 | int n; | |
715 | for(n=0; n<UDC_MAX_ENDPOINTS; n++) { | |
716 | struct lh7a40x_ep *ep = &dev->ep[n]; | |
717 | usb_set_index(n); | |
718 | nuke(ep, 0); | |
719 | } | |
720 | }*/ | |
721 | ||
722 | /* | |
723 | static void flush_all(struct lh7a40x_udc *dev) | |
724 | { | |
725 | int n; | |
726 | for (n = 0; n < UDC_MAX_ENDPOINTS; n++) | |
727 | { | |
728 | struct lh7a40x_ep *ep = &dev->ep[n]; | |
729 | flush(ep); | |
730 | } | |
731 | } | |
732 | */ | |
733 | ||
734 | /** Flush EP | |
735 | * NOTE: INDEX register must be set before this call | |
736 | */ | |
737 | static void flush(struct lh7a40x_ep *ep) | |
738 | { | |
441b62c1 | 739 | DEBUG("%s, %p\n", __func__, ep); |
1da177e4 LT |
740 | |
741 | switch (ep->ep_type) { | |
742 | case ep_control: | |
743 | /* check, by implication c.f. 15.1.2.11 */ | |
744 | break; | |
745 | ||
746 | case ep_bulk_in: | |
747 | case ep_interrupt: | |
748 | /* if(csr & USB_IN_CSR1_IN_PKT_RDY) */ | |
749 | usb_set(USB_IN_CSR1_FIFO_FLUSH, ep->csr1); | |
750 | break; | |
751 | ||
752 | case ep_bulk_out: | |
753 | /* if(csr & USB_OUT_CSR1_OUT_PKT_RDY) */ | |
754 | usb_set(USB_OUT_CSR1_FIFO_FLUSH, ep->csr1); | |
755 | break; | |
756 | } | |
757 | } | |
758 | ||
759 | /** | |
760 | * lh7a40x_in_epn - handle IN interrupt | |
761 | */ | |
762 | static void lh7a40x_in_epn(struct lh7a40x_udc *dev, u32 ep_idx, u32 intr) | |
763 | { | |
764 | u32 csr; | |
765 | struct lh7a40x_ep *ep = &dev->ep[ep_idx]; | |
766 | struct lh7a40x_request *req; | |
767 | ||
768 | usb_set_index(ep_idx); | |
769 | ||
770 | csr = usb_read(ep->csr1); | |
441b62c1 | 771 | DEBUG("%s: %d, csr %x\n", __func__, ep_idx, csr); |
1da177e4 LT |
772 | |
773 | if (csr & USB_IN_CSR1_SENT_STALL) { | |
774 | DEBUG("USB_IN_CSR1_SENT_STALL\n"); | |
775 | usb_set(USB_IN_CSR1_SENT_STALL /*|USB_IN_CSR1_SEND_STALL */ , | |
776 | ep->csr1); | |
777 | return; | |
778 | } | |
779 | ||
780 | if (!ep->desc) { | |
441b62c1 | 781 | DEBUG("%s: NO EP DESC\n", __func__); |
1da177e4 LT |
782 | return; |
783 | } | |
784 | ||
785 | if (list_empty(&ep->queue)) | |
786 | req = 0; | |
787 | else | |
788 | req = list_entry(ep->queue.next, struct lh7a40x_request, queue); | |
789 | ||
790 | DEBUG("req: %p\n", req); | |
791 | ||
792 | if (!req) | |
793 | return; | |
794 | ||
795 | write_fifo(ep, req); | |
796 | } | |
797 | ||
798 | /* ********************************************************************************************* */ | |
799 | /* Bulk OUT (recv) | |
800 | */ | |
801 | ||
802 | static void lh7a40x_out_epn(struct lh7a40x_udc *dev, u32 ep_idx, u32 intr) | |
803 | { | |
804 | struct lh7a40x_ep *ep = &dev->ep[ep_idx]; | |
805 | struct lh7a40x_request *req; | |
806 | ||
441b62c1 | 807 | DEBUG("%s: %d\n", __func__, ep_idx); |
1da177e4 LT |
808 | |
809 | usb_set_index(ep_idx); | |
810 | ||
811 | if (ep->desc) { | |
812 | u32 csr; | |
813 | csr = usb_read(ep->csr1); | |
814 | ||
815 | while ((csr = | |
816 | usb_read(ep-> | |
817 | csr1)) & (USB_OUT_CSR1_OUT_PKT_RDY | | |
818 | USB_OUT_CSR1_SENT_STALL)) { | |
441b62c1 | 819 | DEBUG("%s: %x\n", __func__, csr); |
1da177e4 LT |
820 | |
821 | if (csr & USB_OUT_CSR1_SENT_STALL) { | |
822 | DEBUG("%s: stall sent, flush fifo\n", | |
441b62c1 | 823 | __func__); |
1da177e4 LT |
824 | /* usb_set(USB_OUT_CSR1_FIFO_FLUSH, ep->csr1); */ |
825 | flush(ep); | |
826 | } else if (csr & USB_OUT_CSR1_OUT_PKT_RDY) { | |
827 | if (list_empty(&ep->queue)) | |
828 | req = 0; | |
829 | else | |
830 | req = | |
831 | list_entry(ep->queue.next, | |
832 | struct lh7a40x_request, | |
833 | queue); | |
834 | ||
835 | if (!req) { | |
6f8aa65b FS |
836 | printk(KERN_WARNING |
837 | "%s: NULL REQ %d\n", | |
441b62c1 | 838 | __func__, ep_idx); |
1da177e4 LT |
839 | flush(ep); |
840 | break; | |
841 | } else { | |
842 | read_fifo(ep, req); | |
843 | } | |
844 | } | |
845 | ||
846 | } | |
847 | ||
848 | } else { | |
849 | /* Throw packet away.. */ | |
6f8aa65b | 850 | printk(KERN_WARNING "%s: No descriptor?!?\n", __func__); |
1da177e4 LT |
851 | flush(ep); |
852 | } | |
853 | } | |
854 | ||
855 | static void stop_activity(struct lh7a40x_udc *dev, | |
856 | struct usb_gadget_driver *driver) | |
857 | { | |
858 | int i; | |
859 | ||
860 | /* don't disconnect drivers more than once */ | |
861 | if (dev->gadget.speed == USB_SPEED_UNKNOWN) | |
862 | driver = 0; | |
863 | dev->gadget.speed = USB_SPEED_UNKNOWN; | |
864 | ||
865 | /* prevent new request submissions, kill any outstanding requests */ | |
866 | for (i = 0; i < UDC_MAX_ENDPOINTS; i++) { | |
867 | struct lh7a40x_ep *ep = &dev->ep[i]; | |
868 | ep->stopped = 1; | |
869 | ||
870 | usb_set_index(i); | |
871 | nuke(ep, -ESHUTDOWN); | |
872 | } | |
873 | ||
874 | /* report disconnect; the driver is already quiesced */ | |
875 | if (driver) { | |
876 | spin_unlock(&dev->lock); | |
877 | driver->disconnect(&dev->gadget); | |
878 | spin_lock(&dev->lock); | |
879 | } | |
880 | ||
881 | /* re-init driver-visible data structures */ | |
882 | udc_reinit(dev); | |
883 | } | |
884 | ||
885 | /** Handle USB RESET interrupt | |
886 | */ | |
887 | static void lh7a40x_reset_intr(struct lh7a40x_udc *dev) | |
888 | { | |
889 | #if 0 /* def CONFIG_ARCH_LH7A404 */ | |
890 | /* Does not work always... */ | |
891 | ||
441b62c1 | 892 | DEBUG("%s: %d\n", __func__, dev->usb_address); |
1da177e4 LT |
893 | |
894 | if (!dev->usb_address) { | |
895 | /*usb_set(USB_RESET_IO, USB_RESET); | |
896 | mdelay(5); | |
897 | usb_clear(USB_RESET_IO, USB_RESET); */ | |
898 | return; | |
899 | } | |
900 | /* Put the USB controller into reset. */ | |
901 | usb_set(USB_RESET_IO, USB_RESET); | |
902 | ||
903 | /* Set Device ID to 0 */ | |
904 | udc_set_address(dev, 0); | |
905 | ||
906 | /* Let PLL2 settle down */ | |
907 | mdelay(5); | |
908 | ||
909 | /* Release the USB controller from reset */ | |
910 | usb_clear(USB_RESET_IO, USB_RESET); | |
911 | ||
912 | /* Re-enable UDC */ | |
913 | udc_enable(dev); | |
914 | ||
915 | #endif | |
916 | dev->gadget.speed = USB_SPEED_FULL; | |
917 | } | |
918 | ||
919 | /* | |
920 | * lh7a40x usb client interrupt handler. | |
921 | */ | |
7d12e780 | 922 | static irqreturn_t lh7a40x_udc_irq(int irq, void *_dev) |
1da177e4 LT |
923 | { |
924 | struct lh7a40x_udc *dev = _dev; | |
925 | ||
926 | DEBUG("\n\n"); | |
927 | ||
928 | spin_lock(&dev->lock); | |
929 | ||
930 | for (;;) { | |
931 | u32 intr_in = usb_read(USB_IN_INT); | |
932 | u32 intr_out = usb_read(USB_OUT_INT); | |
933 | u32 intr_int = usb_read(USB_INT); | |
934 | ||
935 | /* Test also against enable bits.. (lh7a40x errata).. Sigh.. */ | |
936 | u32 in_en = usb_read(USB_IN_INT_EN); | |
937 | u32 out_en = usb_read(USB_OUT_INT_EN); | |
938 | ||
939 | if (!intr_out && !intr_in && !intr_int) | |
940 | break; | |
941 | ||
441b62c1 | 942 | DEBUG("%s (on state %s)\n", __func__, |
1da177e4 LT |
943 | state_names[dev->ep0state]); |
944 | DEBUG("intr_out = %x\n", intr_out); | |
945 | DEBUG("intr_in = %x\n", intr_in); | |
946 | DEBUG("intr_int = %x\n", intr_int); | |
947 | ||
948 | if (intr_in) { | |
949 | usb_write(intr_in, USB_IN_INT); | |
950 | ||
951 | if ((intr_in & USB_IN_INT_EP1) | |
952 | && (in_en & USB_IN_INT_EP1)) { | |
953 | DEBUG("USB_IN_INT_EP1\n"); | |
954 | lh7a40x_in_epn(dev, 1, intr_in); | |
955 | } | |
956 | if ((intr_in & USB_IN_INT_EP3) | |
957 | && (in_en & USB_IN_INT_EP3)) { | |
958 | DEBUG("USB_IN_INT_EP3\n"); | |
959 | lh7a40x_in_epn(dev, 3, intr_in); | |
960 | } | |
961 | if (intr_in & USB_IN_INT_EP0) { | |
962 | DEBUG("USB_IN_INT_EP0 (control)\n"); | |
963 | lh7a40x_handle_ep0(dev, intr_in); | |
964 | } | |
965 | } | |
966 | ||
967 | if (intr_out) { | |
968 | usb_write(intr_out, USB_OUT_INT); | |
969 | ||
970 | if ((intr_out & USB_OUT_INT_EP2) | |
971 | && (out_en & USB_OUT_INT_EP2)) { | |
972 | DEBUG("USB_OUT_INT_EP2\n"); | |
973 | lh7a40x_out_epn(dev, 2, intr_out); | |
974 | } | |
975 | } | |
976 | ||
977 | if (intr_int) { | |
978 | usb_write(intr_int, USB_INT); | |
979 | ||
980 | if (intr_int & USB_INT_RESET_INT) { | |
981 | lh7a40x_reset_intr(dev); | |
982 | } | |
983 | ||
984 | if (intr_int & USB_INT_RESUME_INT) { | |
985 | DEBUG("USB resume\n"); | |
986 | ||
987 | if (dev->gadget.speed != USB_SPEED_UNKNOWN | |
988 | && dev->driver | |
989 | && dev->driver->resume | |
990 | && is_usb_connected()) { | |
991 | dev->driver->resume(&dev->gadget); | |
992 | } | |
993 | } | |
994 | ||
995 | if (intr_int & USB_INT_SUSPEND_INT) { | |
996 | DEBUG("USB suspend%s\n", | |
997 | is_usb_connected()? "" : "+disconnect"); | |
998 | if (!is_usb_connected()) { | |
999 | stop_activity(dev, dev->driver); | |
1000 | } else if (dev->gadget.speed != | |
1001 | USB_SPEED_UNKNOWN && dev->driver | |
1002 | && dev->driver->suspend) { | |
1003 | dev->driver->suspend(&dev->gadget); | |
1004 | } | |
1005 | } | |
1006 | ||
1007 | } | |
1008 | } | |
1009 | ||
1010 | spin_unlock(&dev->lock); | |
1011 | ||
1012 | return IRQ_HANDLED; | |
1013 | } | |
1014 | ||
1015 | static int lh7a40x_ep_enable(struct usb_ep *_ep, | |
1016 | const struct usb_endpoint_descriptor *desc) | |
1017 | { | |
1018 | struct lh7a40x_ep *ep; | |
1019 | struct lh7a40x_udc *dev; | |
1020 | unsigned long flags; | |
1021 | ||
441b62c1 | 1022 | DEBUG("%s, %p\n", __func__, _ep); |
1da177e4 LT |
1023 | |
1024 | ep = container_of(_ep, struct lh7a40x_ep, ep); | |
1025 | if (!_ep || !desc || ep->desc || _ep->name == ep0name | |
1026 | || desc->bDescriptorType != USB_DT_ENDPOINT | |
1027 | || ep->bEndpointAddress != desc->bEndpointAddress | |
1028 | || ep_maxpacket(ep) < le16_to_cpu(desc->wMaxPacketSize)) { | |
441b62c1 | 1029 | DEBUG("%s, bad ep or descriptor\n", __func__); |
1da177e4 LT |
1030 | return -EINVAL; |
1031 | } | |
1032 | ||
1033 | /* xfer types must match, except that interrupt ~= bulk */ | |
1034 | if (ep->bmAttributes != desc->bmAttributes | |
1035 | && ep->bmAttributes != USB_ENDPOINT_XFER_BULK | |
1036 | && desc->bmAttributes != USB_ENDPOINT_XFER_INT) { | |
441b62c1 | 1037 | DEBUG("%s, %s type mismatch\n", __func__, _ep->name); |
1da177e4 LT |
1038 | return -EINVAL; |
1039 | } | |
1040 | ||
1041 | /* hardware _could_ do smaller, but driver doesn't */ | |
1042 | if ((desc->bmAttributes == USB_ENDPOINT_XFER_BULK | |
1043 | && le16_to_cpu(desc->wMaxPacketSize) != ep_maxpacket(ep)) | |
1044 | || !desc->wMaxPacketSize) { | |
441b62c1 | 1045 | DEBUG("%s, bad %s maxpacket\n", __func__, _ep->name); |
1da177e4 LT |
1046 | return -ERANGE; |
1047 | } | |
1048 | ||
1049 | dev = ep->dev; | |
1050 | if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN) { | |
441b62c1 | 1051 | DEBUG("%s, bogus device state\n", __func__); |
1da177e4 LT |
1052 | return -ESHUTDOWN; |
1053 | } | |
1054 | ||
1055 | spin_lock_irqsave(&ep->dev->lock, flags); | |
1056 | ||
1057 | ep->stopped = 0; | |
1058 | ep->desc = desc; | |
1059 | ep->pio_irqs = 0; | |
1060 | ep->ep.maxpacket = le16_to_cpu(desc->wMaxPacketSize); | |
1061 | ||
d5ec3349 FBH |
1062 | spin_unlock_irqrestore(&ep->dev->lock, flags); |
1063 | ||
1da177e4 LT |
1064 | /* Reset halt state (does flush) */ |
1065 | lh7a40x_set_halt(_ep, 0); | |
1066 | ||
441b62c1 | 1067 | DEBUG("%s: enabled %s\n", __func__, _ep->name); |
1da177e4 LT |
1068 | return 0; |
1069 | } | |
1070 | ||
1071 | /** Disable EP | |
1072 | * NOTE: Sets INDEX register | |
1073 | */ | |
1074 | static int lh7a40x_ep_disable(struct usb_ep *_ep) | |
1075 | { | |
1076 | struct lh7a40x_ep *ep; | |
1077 | unsigned long flags; | |
1078 | ||
441b62c1 | 1079 | DEBUG("%s, %p\n", __func__, _ep); |
1da177e4 LT |
1080 | |
1081 | ep = container_of(_ep, struct lh7a40x_ep, ep); | |
1082 | if (!_ep || !ep->desc) { | |
441b62c1 | 1083 | DEBUG("%s, %s not enabled\n", __func__, |
1da177e4 LT |
1084 | _ep ? ep->ep.name : NULL); |
1085 | return -EINVAL; | |
1086 | } | |
1087 | ||
1088 | spin_lock_irqsave(&ep->dev->lock, flags); | |
1089 | ||
1090 | usb_set_index(ep_index(ep)); | |
1091 | ||
1092 | /* Nuke all pending requests (does flush) */ | |
1093 | nuke(ep, -ESHUTDOWN); | |
1094 | ||
1095 | /* Disable ep IRQ */ | |
1096 | pio_irq_disable(ep_index(ep)); | |
1097 | ||
1098 | ep->desc = 0; | |
1099 | ep->stopped = 1; | |
1100 | ||
1101 | spin_unlock_irqrestore(&ep->dev->lock, flags); | |
1102 | ||
441b62c1 | 1103 | DEBUG("%s: disabled %s\n", __func__, _ep->name); |
1da177e4 LT |
1104 | return 0; |
1105 | } | |
1106 | ||
1107 | static struct usb_request *lh7a40x_alloc_request(struct usb_ep *ep, | |
55016f10 | 1108 | gfp_t gfp_flags) |
1da177e4 LT |
1109 | { |
1110 | struct lh7a40x_request *req; | |
1111 | ||
441b62c1 | 1112 | DEBUG("%s, %p\n", __func__, ep); |
1da177e4 | 1113 | |
7039f422 | 1114 | req = kzalloc(sizeof(*req), gfp_flags); |
1da177e4 LT |
1115 | if (!req) |
1116 | return 0; | |
1117 | ||
1da177e4 LT |
1118 | INIT_LIST_HEAD(&req->queue); |
1119 | ||
1120 | return &req->req; | |
1121 | } | |
1122 | ||
1123 | static void lh7a40x_free_request(struct usb_ep *ep, struct usb_request *_req) | |
1124 | { | |
1125 | struct lh7a40x_request *req; | |
1126 | ||
441b62c1 | 1127 | DEBUG("%s, %p\n", __func__, ep); |
1da177e4 LT |
1128 | |
1129 | req = container_of(_req, struct lh7a40x_request, req); | |
1130 | WARN_ON(!list_empty(&req->queue)); | |
1131 | kfree(req); | |
1132 | } | |
1133 | ||
1da177e4 LT |
1134 | /** Queue one request |
1135 | * Kickstart transfer if needed | |
1136 | * NOTE: Sets INDEX register | |
1137 | */ | |
1138 | static int lh7a40x_queue(struct usb_ep *_ep, struct usb_request *_req, | |
55016f10 | 1139 | gfp_t gfp_flags) |
1da177e4 LT |
1140 | { |
1141 | struct lh7a40x_request *req; | |
1142 | struct lh7a40x_ep *ep; | |
1143 | struct lh7a40x_udc *dev; | |
1144 | unsigned long flags; | |
1145 | ||
441b62c1 | 1146 | DEBUG("\n\n\n%s, %p\n", __func__, _ep); |
1da177e4 LT |
1147 | |
1148 | req = container_of(_req, struct lh7a40x_request, req); | |
1149 | if (unlikely | |
1150 | (!_req || !_req->complete || !_req->buf | |
1151 | || !list_empty(&req->queue))) { | |
441b62c1 | 1152 | DEBUG("%s, bad params\n", __func__); |
1da177e4 LT |
1153 | return -EINVAL; |
1154 | } | |
1155 | ||
1156 | ep = container_of(_ep, struct lh7a40x_ep, ep); | |
1157 | if (unlikely(!_ep || (!ep->desc && ep->ep.name != ep0name))) { | |
441b62c1 | 1158 | DEBUG("%s, bad ep\n", __func__); |
1da177e4 LT |
1159 | return -EINVAL; |
1160 | } | |
1161 | ||
1162 | dev = ep->dev; | |
1163 | if (unlikely(!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN)) { | |
441b62c1 | 1164 | DEBUG("%s, bogus device state %p\n", __func__, dev->driver); |
1da177e4 LT |
1165 | return -ESHUTDOWN; |
1166 | } | |
1167 | ||
1168 | DEBUG("%s queue req %p, len %d buf %p\n", _ep->name, _req, _req->length, | |
1169 | _req->buf); | |
1170 | ||
1171 | spin_lock_irqsave(&dev->lock, flags); | |
1172 | ||
1173 | _req->status = -EINPROGRESS; | |
1174 | _req->actual = 0; | |
1175 | ||
1176 | /* kickstart this i/o queue? */ | |
1177 | DEBUG("Add to %d Q %d %d\n", ep_index(ep), list_empty(&ep->queue), | |
1178 | ep->stopped); | |
1179 | if (list_empty(&ep->queue) && likely(!ep->stopped)) { | |
1180 | u32 csr; | |
1181 | ||
1182 | if (unlikely(ep_index(ep) == 0)) { | |
1183 | /* EP0 */ | |
1184 | list_add_tail(&req->queue, &ep->queue); | |
1185 | lh7a40x_ep0_kick(dev, ep); | |
1186 | req = 0; | |
1187 | } else if (ep_is_in(ep)) { | |
1188 | /* EP1 & EP3 */ | |
1189 | usb_set_index(ep_index(ep)); | |
1190 | csr = usb_read(ep->csr1); | |
1191 | pio_irq_enable(ep_index(ep)); | |
1192 | if ((csr & USB_IN_CSR1_FIFO_NOT_EMPTY) == 0) { | |
1193 | if (write_fifo(ep, req) == 1) | |
1194 | req = 0; | |
1195 | } | |
1196 | } else { | |
1197 | /* EP2 */ | |
1198 | usb_set_index(ep_index(ep)); | |
1199 | csr = usb_read(ep->csr1); | |
1200 | pio_irq_enable(ep_index(ep)); | |
1201 | if (!(csr & USB_OUT_CSR1_FIFO_FULL)) { | |
1202 | if (read_fifo(ep, req) == 1) | |
1203 | req = 0; | |
1204 | } | |
1205 | } | |
1206 | } | |
1207 | ||
1208 | /* pio or dma irq handler advances the queue. */ | |
1209 | if (likely(req != 0)) | |
1210 | list_add_tail(&req->queue, &ep->queue); | |
1211 | ||
1212 | spin_unlock_irqrestore(&dev->lock, flags); | |
1213 | ||
1214 | return 0; | |
1215 | } | |
1216 | ||
1217 | /* dequeue JUST ONE request */ | |
1218 | static int lh7a40x_dequeue(struct usb_ep *_ep, struct usb_request *_req) | |
1219 | { | |
1220 | struct lh7a40x_ep *ep; | |
1221 | struct lh7a40x_request *req; | |
1222 | unsigned long flags; | |
1223 | ||
441b62c1 | 1224 | DEBUG("%s, %p\n", __func__, _ep); |
1da177e4 LT |
1225 | |
1226 | ep = container_of(_ep, struct lh7a40x_ep, ep); | |
1227 | if (!_ep || ep->ep.name == ep0name) | |
1228 | return -EINVAL; | |
1229 | ||
1230 | spin_lock_irqsave(&ep->dev->lock, flags); | |
1231 | ||
1232 | /* make sure it's actually queued on this endpoint */ | |
1233 | list_for_each_entry(req, &ep->queue, queue) { | |
1234 | if (&req->req == _req) | |
1235 | break; | |
1236 | } | |
1237 | if (&req->req != _req) { | |
1238 | spin_unlock_irqrestore(&ep->dev->lock, flags); | |
1239 | return -EINVAL; | |
1240 | } | |
1241 | ||
1242 | done(ep, req, -ECONNRESET); | |
1243 | ||
1244 | spin_unlock_irqrestore(&ep->dev->lock, flags); | |
1245 | return 0; | |
1246 | } | |
1247 | ||
1248 | /** Halt specific EP | |
1249 | * Return 0 if success | |
1250 | * NOTE: Sets INDEX register to EP ! | |
1251 | */ | |
1252 | static int lh7a40x_set_halt(struct usb_ep *_ep, int value) | |
1253 | { | |
1254 | struct lh7a40x_ep *ep; | |
1255 | unsigned long flags; | |
1256 | ||
1257 | ep = container_of(_ep, struct lh7a40x_ep, ep); | |
1258 | if (unlikely(!_ep || (!ep->desc && ep->ep.name != ep0name))) { | |
441b62c1 | 1259 | DEBUG("%s, bad ep\n", __func__); |
1da177e4 LT |
1260 | return -EINVAL; |
1261 | } | |
1262 | ||
1263 | usb_set_index(ep_index(ep)); | |
1264 | ||
441b62c1 | 1265 | DEBUG("%s, ep %d, val %d\n", __func__, ep_index(ep), value); |
1da177e4 LT |
1266 | |
1267 | spin_lock_irqsave(&ep->dev->lock, flags); | |
1268 | ||
1269 | if (ep_index(ep) == 0) { | |
1270 | /* EP0 */ | |
1271 | usb_set(EP0_SEND_STALL, ep->csr1); | |
1272 | } else if (ep_is_in(ep)) { | |
1273 | u32 csr = usb_read(ep->csr1); | |
1274 | if (value && ((csr & USB_IN_CSR1_FIFO_NOT_EMPTY) | |
1275 | || !list_empty(&ep->queue))) { | |
1276 | /* | |
1277 | * Attempts to halt IN endpoints will fail (returning -EAGAIN) | |
1278 | * if any transfer requests are still queued, or if the controller | |
96de0e25 | 1279 | * FIFO still holds bytes that the host hasn't collected. |
1da177e4 LT |
1280 | */ |
1281 | spin_unlock_irqrestore(&ep->dev->lock, flags); | |
1282 | DEBUG | |
1283 | ("Attempt to halt IN endpoint failed (returning -EAGAIN) %d %d\n", | |
1284 | (csr & USB_IN_CSR1_FIFO_NOT_EMPTY), | |
1285 | !list_empty(&ep->queue)); | |
1286 | return -EAGAIN; | |
1287 | } | |
1288 | flush(ep); | |
1289 | if (value) | |
1290 | usb_set(USB_IN_CSR1_SEND_STALL, ep->csr1); | |
1291 | else { | |
1292 | usb_clear(USB_IN_CSR1_SEND_STALL, ep->csr1); | |
1293 | usb_set(USB_IN_CSR1_CLR_DATA_TOGGLE, ep->csr1); | |
1294 | } | |
1295 | ||
1296 | } else { | |
1297 | ||
1298 | flush(ep); | |
1299 | if (value) | |
1300 | usb_set(USB_OUT_CSR1_SEND_STALL, ep->csr1); | |
1301 | else { | |
1302 | usb_clear(USB_OUT_CSR1_SEND_STALL, ep->csr1); | |
1303 | usb_set(USB_OUT_CSR1_CLR_DATA_REG, ep->csr1); | |
1304 | } | |
1305 | } | |
1306 | ||
1307 | if (value) { | |
1308 | ep->stopped = 1; | |
1309 | } else { | |
1310 | ep->stopped = 0; | |
1311 | } | |
1312 | ||
1313 | spin_unlock_irqrestore(&ep->dev->lock, flags); | |
1314 | ||
1315 | DEBUG("%s %s halted\n", _ep->name, value == 0 ? "NOT" : "IS"); | |
1316 | ||
1317 | return 0; | |
1318 | } | |
1319 | ||
1320 | /** Return bytes in EP FIFO | |
1321 | * NOTE: Sets INDEX register to EP | |
1322 | */ | |
1323 | static int lh7a40x_fifo_status(struct usb_ep *_ep) | |
1324 | { | |
1325 | u32 csr; | |
1326 | int count = 0; | |
1327 | struct lh7a40x_ep *ep; | |
1328 | ||
1329 | ep = container_of(_ep, struct lh7a40x_ep, ep); | |
1330 | if (!_ep) { | |
441b62c1 | 1331 | DEBUG("%s, bad ep\n", __func__); |
1da177e4 LT |
1332 | return -ENODEV; |
1333 | } | |
1334 | ||
441b62c1 | 1335 | DEBUG("%s, %d\n", __func__, ep_index(ep)); |
1da177e4 LT |
1336 | |
1337 | /* LPD can't report unclaimed bytes from IN fifos */ | |
1338 | if (ep_is_in(ep)) | |
1339 | return -EOPNOTSUPP; | |
1340 | ||
1341 | usb_set_index(ep_index(ep)); | |
1342 | ||
1343 | csr = usb_read(ep->csr1); | |
1344 | if (ep->dev->gadget.speed != USB_SPEED_UNKNOWN || | |
1345 | csr & USB_OUT_CSR1_OUT_PKT_RDY) { | |
1346 | count = usb_read(USB_OUT_FIFO_WC1); | |
1347 | } | |
1348 | ||
1349 | return count; | |
1350 | } | |
1351 | ||
1352 | /** Flush EP FIFO | |
1353 | * NOTE: Sets INDEX register to EP | |
1354 | */ | |
1355 | static void lh7a40x_fifo_flush(struct usb_ep *_ep) | |
1356 | { | |
1357 | struct lh7a40x_ep *ep; | |
1358 | ||
1359 | ep = container_of(_ep, struct lh7a40x_ep, ep); | |
1360 | if (unlikely(!_ep || (!ep->desc && ep->ep.name != ep0name))) { | |
441b62c1 | 1361 | DEBUG("%s, bad ep\n", __func__); |
1da177e4 LT |
1362 | return; |
1363 | } | |
1364 | ||
1365 | usb_set_index(ep_index(ep)); | |
1366 | flush(ep); | |
1367 | } | |
1368 | ||
1369 | /****************************************************************/ | |
1370 | /* End Point 0 related functions */ | |
1371 | /****************************************************************/ | |
1372 | ||
1373 | /* return: 0 = still running, 1 = completed, negative = errno */ | |
1374 | static int write_fifo_ep0(struct lh7a40x_ep *ep, struct lh7a40x_request *req) | |
1375 | { | |
1376 | u32 max; | |
1377 | unsigned count; | |
1378 | int is_last; | |
1379 | ||
1380 | max = ep_maxpacket(ep); | |
1381 | ||
441b62c1 | 1382 | DEBUG_EP0("%s\n", __func__); |
1da177e4 LT |
1383 | |
1384 | count = write_packet(ep, req, max); | |
1385 | ||
1386 | /* last packet is usually short (or a zlp) */ | |
1387 | if (unlikely(count != max)) | |
1388 | is_last = 1; | |
1389 | else { | |
1390 | if (likely(req->req.length != req->req.actual) || req->req.zero) | |
1391 | is_last = 0; | |
1392 | else | |
1393 | is_last = 1; | |
1394 | } | |
1395 | ||
441b62c1 | 1396 | DEBUG_EP0("%s: wrote %s %d bytes%s %d left %p\n", __func__, |
1da177e4 LT |
1397 | ep->ep.name, count, |
1398 | is_last ? "/L" : "", req->req.length - req->req.actual, req); | |
1399 | ||
1400 | /* requests complete when all IN data is in the FIFO */ | |
1401 | if (is_last) { | |
1402 | done(ep, req, 0); | |
1403 | return 1; | |
1404 | } | |
1405 | ||
1406 | return 0; | |
1407 | } | |
1408 | ||
1409 | static __inline__ int lh7a40x_fifo_read(struct lh7a40x_ep *ep, | |
1410 | unsigned char *cp, int max) | |
1411 | { | |
1412 | int bytes; | |
1413 | int count = usb_read(USB_OUT_FIFO_WC1); | |
1414 | volatile u32 *fifo = (volatile u32 *)ep->fifo; | |
1415 | ||
1416 | if (count > max) | |
1417 | count = max; | |
1418 | bytes = count; | |
1419 | while (count--) | |
1420 | *cp++ = *fifo & 0xFF; | |
1421 | return bytes; | |
1422 | } | |
1423 | ||
1424 | static __inline__ void lh7a40x_fifo_write(struct lh7a40x_ep *ep, | |
1425 | unsigned char *cp, int count) | |
1426 | { | |
1427 | volatile u32 *fifo = (volatile u32 *)ep->fifo; | |
1428 | DEBUG_EP0("fifo_write: %d %d\n", ep_index(ep), count); | |
1429 | while (count--) | |
1430 | *fifo = *cp++; | |
1431 | } | |
1432 | ||
1433 | static int read_fifo_ep0(struct lh7a40x_ep *ep, struct lh7a40x_request *req) | |
1434 | { | |
1435 | u32 csr; | |
1436 | u8 *buf; | |
1437 | unsigned bufferspace, count, is_short; | |
1438 | volatile u32 *fifo = (volatile u32 *)ep->fifo; | |
1439 | ||
441b62c1 | 1440 | DEBUG_EP0("%s\n", __func__); |
1da177e4 LT |
1441 | |
1442 | csr = usb_read(USB_EP0_CSR); | |
1443 | if (!(csr & USB_OUT_CSR1_OUT_PKT_RDY)) | |
1444 | return 0; | |
1445 | ||
1446 | buf = req->req.buf + req->req.actual; | |
1447 | prefetchw(buf); | |
1448 | bufferspace = req->req.length - req->req.actual; | |
1449 | ||
1450 | /* read all bytes from this packet */ | |
1451 | if (likely(csr & EP0_OUT_PKT_RDY)) { | |
1452 | count = usb_read(USB_OUT_FIFO_WC1); | |
1453 | req->req.actual += min(count, bufferspace); | |
1454 | } else /* zlp */ | |
1455 | count = 0; | |
1456 | ||
1457 | is_short = (count < ep->ep.maxpacket); | |
1458 | DEBUG_EP0("read %s %02x, %d bytes%s req %p %d/%d\n", | |
1459 | ep->ep.name, csr, count, | |
1460 | is_short ? "/S" : "", req, req->req.actual, req->req.length); | |
1461 | ||
1462 | while (likely(count-- != 0)) { | |
1463 | u8 byte = (u8) (*fifo & 0xff); | |
1464 | ||
1465 | if (unlikely(bufferspace == 0)) { | |
1466 | /* this happens when the driver's buffer | |
1467 | * is smaller than what the host sent. | |
1468 | * discard the extra data. | |
1469 | */ | |
1470 | if (req->req.status != -EOVERFLOW) | |
1471 | DEBUG_EP0("%s overflow %d\n", ep->ep.name, | |
1472 | count); | |
1473 | req->req.status = -EOVERFLOW; | |
1474 | } else { | |
1475 | *buf++ = byte; | |
1476 | bufferspace--; | |
1477 | } | |
1478 | } | |
1479 | ||
1480 | /* completion */ | |
1481 | if (is_short || req->req.actual == req->req.length) { | |
1482 | done(ep, req, 0); | |
1483 | return 1; | |
1484 | } | |
1485 | ||
1486 | /* finished that packet. the next one may be waiting... */ | |
1487 | return 0; | |
1488 | } | |
1489 | ||
1490 | /** | |
1491 | * udc_set_address - set the USB address for this device | |
1492 | * @address: | |
1493 | * | |
1494 | * Called from control endpoint function after it decodes a set address setup packet. | |
1495 | */ | |
1496 | static void udc_set_address(struct lh7a40x_udc *dev, unsigned char address) | |
1497 | { | |
441b62c1 | 1498 | DEBUG_EP0("%s: %d\n", __func__, address); |
1da177e4 LT |
1499 | /* c.f. 15.1.2.2 Table 15-4 address will be used after DATA_END is set */ |
1500 | dev->usb_address = address; | |
1501 | usb_set((address & USB_FA_FUNCTION_ADDR), USB_FA); | |
1502 | usb_set(USB_FA_ADDR_UPDATE | (address & USB_FA_FUNCTION_ADDR), USB_FA); | |
1503 | /* usb_read(USB_FA); */ | |
1504 | } | |
1505 | ||
1506 | /* | |
1507 | * DATA_STATE_RECV (OUT_PKT_RDY) | |
1508 | * - if error | |
1509 | * set EP0_CLR_OUT | EP0_DATA_END | EP0_SEND_STALL bits | |
1510 | * - else | |
1511 | * set EP0_CLR_OUT bit | |
1512 | if last set EP0_DATA_END bit | |
1513 | */ | |
1514 | static void lh7a40x_ep0_out(struct lh7a40x_udc *dev, u32 csr) | |
1515 | { | |
1516 | struct lh7a40x_request *req; | |
1517 | struct lh7a40x_ep *ep = &dev->ep[0]; | |
1518 | int ret; | |
1519 | ||
441b62c1 | 1520 | DEBUG_EP0("%s: %x\n", __func__, csr); |
1da177e4 LT |
1521 | |
1522 | if (list_empty(&ep->queue)) | |
1523 | req = 0; | |
1524 | else | |
1525 | req = list_entry(ep->queue.next, struct lh7a40x_request, queue); | |
1526 | ||
1527 | if (req) { | |
1528 | ||
1529 | if (req->req.length == 0) { | |
1530 | DEBUG_EP0("ZERO LENGTH OUT!\n"); | |
1531 | usb_set((EP0_CLR_OUT | EP0_DATA_END), USB_EP0_CSR); | |
1532 | dev->ep0state = WAIT_FOR_SETUP; | |
1533 | return; | |
1534 | } | |
1535 | ret = read_fifo_ep0(ep, req); | |
1536 | if (ret) { | |
1537 | /* Done! */ | |
1538 | DEBUG_EP0("%s: finished, waiting for status\n", | |
441b62c1 | 1539 | __func__); |
1da177e4 LT |
1540 | |
1541 | usb_set((EP0_CLR_OUT | EP0_DATA_END), USB_EP0_CSR); | |
1542 | dev->ep0state = WAIT_FOR_SETUP; | |
1543 | } else { | |
1544 | /* Not done yet.. */ | |
441b62c1 | 1545 | DEBUG_EP0("%s: not finished\n", __func__); |
1da177e4 LT |
1546 | usb_set(EP0_CLR_OUT, USB_EP0_CSR); |
1547 | } | |
1548 | } else { | |
1549 | DEBUG_EP0("NO REQ??!\n"); | |
1550 | } | |
1551 | } | |
1552 | ||
1553 | /* | |
1554 | * DATA_STATE_XMIT | |
1555 | */ | |
1556 | static int lh7a40x_ep0_in(struct lh7a40x_udc *dev, u32 csr) | |
1557 | { | |
1558 | struct lh7a40x_request *req; | |
1559 | struct lh7a40x_ep *ep = &dev->ep[0]; | |
1560 | int ret, need_zlp = 0; | |
1561 | ||
441b62c1 | 1562 | DEBUG_EP0("%s: %x\n", __func__, csr); |
1da177e4 LT |
1563 | |
1564 | if (list_empty(&ep->queue)) | |
1565 | req = 0; | |
1566 | else | |
1567 | req = list_entry(ep->queue.next, struct lh7a40x_request, queue); | |
1568 | ||
1569 | if (!req) { | |
441b62c1 | 1570 | DEBUG_EP0("%s: NULL REQ\n", __func__); |
1da177e4 LT |
1571 | return 0; |
1572 | } | |
1573 | ||
1574 | if (req->req.length == 0) { | |
1575 | ||
1576 | usb_set((EP0_IN_PKT_RDY | EP0_DATA_END), USB_EP0_CSR); | |
1577 | dev->ep0state = WAIT_FOR_SETUP; | |
1578 | return 1; | |
1579 | } | |
1580 | ||
1581 | if (req->req.length - req->req.actual == EP0_PACKETSIZE) { | |
1582 | /* Next write will end with the packet size, */ | |
1583 | /* so we need Zero-length-packet */ | |
1584 | need_zlp = 1; | |
1585 | } | |
1586 | ||
1587 | ret = write_fifo_ep0(ep, req); | |
1588 | ||
1589 | if (ret == 1 && !need_zlp) { | |
1590 | /* Last packet */ | |
441b62c1 | 1591 | DEBUG_EP0("%s: finished, waiting for status\n", __func__); |
1da177e4 LT |
1592 | |
1593 | usb_set((EP0_IN_PKT_RDY | EP0_DATA_END), USB_EP0_CSR); | |
1594 | dev->ep0state = WAIT_FOR_SETUP; | |
1595 | } else { | |
441b62c1 | 1596 | DEBUG_EP0("%s: not finished\n", __func__); |
1da177e4 LT |
1597 | usb_set(EP0_IN_PKT_RDY, USB_EP0_CSR); |
1598 | } | |
1599 | ||
1600 | if (need_zlp) { | |
441b62c1 | 1601 | DEBUG_EP0("%s: Need ZLP!\n", __func__); |
1da177e4 LT |
1602 | usb_set(EP0_IN_PKT_RDY, USB_EP0_CSR); |
1603 | dev->ep0state = DATA_STATE_NEED_ZLP; | |
1604 | } | |
1605 | ||
1606 | return 1; | |
1607 | } | |
1608 | ||
1609 | static int lh7a40x_handle_get_status(struct lh7a40x_udc *dev, | |
1610 | struct usb_ctrlrequest *ctrl) | |
1611 | { | |
1612 | struct lh7a40x_ep *ep0 = &dev->ep[0]; | |
1613 | struct lh7a40x_ep *qep; | |
1614 | int reqtype = (ctrl->bRequestType & USB_RECIP_MASK); | |
1615 | u16 val = 0; | |
1616 | ||
1617 | if (reqtype == USB_RECIP_INTERFACE) { | |
1618 | /* This is not supported. | |
1619 | * And according to the USB spec, this one does nothing.. | |
1620 | * Just return 0 | |
1621 | */ | |
1622 | DEBUG_SETUP("GET_STATUS: USB_RECIP_INTERFACE\n"); | |
1623 | } else if (reqtype == USB_RECIP_DEVICE) { | |
1624 | DEBUG_SETUP("GET_STATUS: USB_RECIP_DEVICE\n"); | |
1625 | val |= (1 << 0); /* Self powered */ | |
1626 | /*val |= (1<<1); *//* Remote wakeup */ | |
1627 | } else if (reqtype == USB_RECIP_ENDPOINT) { | |
1628 | int ep_num = (ctrl->wIndex & ~USB_DIR_IN); | |
1629 | ||
1630 | DEBUG_SETUP | |
1631 | ("GET_STATUS: USB_RECIP_ENDPOINT (%d), ctrl->wLength = %d\n", | |
1632 | ep_num, ctrl->wLength); | |
1633 | ||
1634 | if (ctrl->wLength > 2 || ep_num > 3) | |
1635 | return -EOPNOTSUPP; | |
1636 | ||
1637 | qep = &dev->ep[ep_num]; | |
1638 | if (ep_is_in(qep) != ((ctrl->wIndex & USB_DIR_IN) ? 1 : 0) | |
1639 | && ep_index(qep) != 0) { | |
1640 | return -EOPNOTSUPP; | |
1641 | } | |
1642 | ||
1643 | usb_set_index(ep_index(qep)); | |
1644 | ||
1645 | /* Return status on next IN token */ | |
1646 | switch (qep->ep_type) { | |
1647 | case ep_control: | |
1648 | val = | |
1649 | (usb_read(qep->csr1) & EP0_SEND_STALL) == | |
1650 | EP0_SEND_STALL; | |
1651 | break; | |
1652 | case ep_bulk_in: | |
1653 | case ep_interrupt: | |
1654 | val = | |
1655 | (usb_read(qep->csr1) & USB_IN_CSR1_SEND_STALL) == | |
1656 | USB_IN_CSR1_SEND_STALL; | |
1657 | break; | |
1658 | case ep_bulk_out: | |
1659 | val = | |
1660 | (usb_read(qep->csr1) & USB_OUT_CSR1_SEND_STALL) == | |
1661 | USB_OUT_CSR1_SEND_STALL; | |
1662 | break; | |
1663 | } | |
1664 | ||
1665 | /* Back to EP0 index */ | |
1666 | usb_set_index(0); | |
1667 | ||
1668 | DEBUG_SETUP("GET_STATUS, ep: %d (%x), val = %d\n", ep_num, | |
1669 | ctrl->wIndex, val); | |
1670 | } else { | |
1671 | DEBUG_SETUP("Unknown REQ TYPE: %d\n", reqtype); | |
1672 | return -EOPNOTSUPP; | |
1673 | } | |
1674 | ||
1675 | /* Clear "out packet ready" */ | |
1676 | usb_set((EP0_CLR_OUT), USB_EP0_CSR); | |
1677 | /* Put status to FIFO */ | |
1678 | lh7a40x_fifo_write(ep0, (u8 *) & val, sizeof(val)); | |
1679 | /* Issue "In packet ready" */ | |
1680 | usb_set((EP0_IN_PKT_RDY | EP0_DATA_END), USB_EP0_CSR); | |
1681 | ||
1682 | return 0; | |
1683 | } | |
1684 | ||
1685 | /* | |
1686 | * WAIT_FOR_SETUP (OUT_PKT_RDY) | |
1687 | * - read data packet from EP0 FIFO | |
1688 | * - decode command | |
1689 | * - if error | |
1690 | * set EP0_CLR_OUT | EP0_DATA_END | EP0_SEND_STALL bits | |
1691 | * - else | |
1692 | * set EP0_CLR_OUT | EP0_DATA_END bits | |
1693 | */ | |
1694 | static void lh7a40x_ep0_setup(struct lh7a40x_udc *dev, u32 csr) | |
1695 | { | |
1696 | struct lh7a40x_ep *ep = &dev->ep[0]; | |
1697 | struct usb_ctrlrequest ctrl; | |
1698 | int i, bytes, is_in; | |
1699 | ||
441b62c1 | 1700 | DEBUG_SETUP("%s: %x\n", __func__, csr); |
1da177e4 LT |
1701 | |
1702 | /* Nuke all previous transfers */ | |
1703 | nuke(ep, -EPROTO); | |
1704 | ||
1705 | /* read control req from fifo (8 bytes) */ | |
1706 | bytes = lh7a40x_fifo_read(ep, (unsigned char *)&ctrl, 8); | |
1707 | ||
1708 | DEBUG_SETUP("Read CTRL REQ %d bytes\n", bytes); | |
1709 | DEBUG_SETUP("CTRL.bRequestType = %d (is_in %d)\n", ctrl.bRequestType, | |
1710 | ctrl.bRequestType == USB_DIR_IN); | |
1711 | DEBUG_SETUP("CTRL.bRequest = %d\n", ctrl.bRequest); | |
1712 | DEBUG_SETUP("CTRL.wLength = %d\n", ctrl.wLength); | |
1713 | DEBUG_SETUP("CTRL.wValue = %d (%d)\n", ctrl.wValue, ctrl.wValue >> 8); | |
1714 | DEBUG_SETUP("CTRL.wIndex = %d\n", ctrl.wIndex); | |
1715 | ||
1716 | /* Set direction of EP0 */ | |
1717 | if (likely(ctrl.bRequestType & USB_DIR_IN)) { | |
1718 | ep->bEndpointAddress |= USB_DIR_IN; | |
1719 | is_in = 1; | |
1720 | } else { | |
1721 | ep->bEndpointAddress &= ~USB_DIR_IN; | |
1722 | is_in = 0; | |
1723 | } | |
1724 | ||
1725 | dev->req_pending = 1; | |
1726 | ||
1727 | /* Handle some SETUP packets ourselves */ | |
1728 | switch (ctrl.bRequest) { | |
1729 | case USB_REQ_SET_ADDRESS: | |
1730 | if (ctrl.bRequestType != (USB_TYPE_STANDARD | USB_RECIP_DEVICE)) | |
1731 | break; | |
1732 | ||
1733 | DEBUG_SETUP("USB_REQ_SET_ADDRESS (%d)\n", ctrl.wValue); | |
1734 | udc_set_address(dev, ctrl.wValue); | |
1735 | usb_set((EP0_CLR_OUT | EP0_DATA_END), USB_EP0_CSR); | |
1736 | return; | |
1737 | ||
1738 | case USB_REQ_GET_STATUS:{ | |
1739 | if (lh7a40x_handle_get_status(dev, &ctrl) == 0) | |
1740 | return; | |
1741 | ||
1742 | case USB_REQ_CLEAR_FEATURE: | |
1743 | case USB_REQ_SET_FEATURE: | |
1744 | if (ctrl.bRequestType == USB_RECIP_ENDPOINT) { | |
1745 | struct lh7a40x_ep *qep; | |
1746 | int ep_num = (ctrl.wIndex & 0x0f); | |
1747 | ||
1748 | /* Support only HALT feature */ | |
1749 | if (ctrl.wValue != 0 || ctrl.wLength != 0 | |
1750 | || ep_num > 3 || ep_num < 1) | |
1751 | break; | |
1752 | ||
1753 | qep = &dev->ep[ep_num]; | |
d5ec3349 | 1754 | spin_unlock(&dev->lock); |
1da177e4 LT |
1755 | if (ctrl.bRequest == USB_REQ_SET_FEATURE) { |
1756 | DEBUG_SETUP("SET_FEATURE (%d)\n", | |
1757 | ep_num); | |
1758 | lh7a40x_set_halt(&qep->ep, 1); | |
1759 | } else { | |
1760 | DEBUG_SETUP("CLR_FEATURE (%d)\n", | |
1761 | ep_num); | |
1762 | lh7a40x_set_halt(&qep->ep, 0); | |
1763 | } | |
d5ec3349 | 1764 | spin_lock(&dev->lock); |
1da177e4 LT |
1765 | usb_set_index(0); |
1766 | ||
1767 | /* Reply with a ZLP on next IN token */ | |
1768 | usb_set((EP0_CLR_OUT | EP0_DATA_END), | |
1769 | USB_EP0_CSR); | |
1770 | return; | |
1771 | } | |
1772 | break; | |
1773 | } | |
1774 | ||
1775 | default: | |
1776 | break; | |
1777 | } | |
1778 | ||
1779 | if (likely(dev->driver)) { | |
1780 | /* device-2-host (IN) or no data setup command, process immediately */ | |
1781 | spin_unlock(&dev->lock); | |
1782 | i = dev->driver->setup(&dev->gadget, &ctrl); | |
1783 | spin_lock(&dev->lock); | |
1784 | ||
1785 | if (i < 0) { | |
1786 | /* setup processing failed, force stall */ | |
1787 | DEBUG_SETUP | |
1788 | (" --> ERROR: gadget setup FAILED (stalling), setup returned %d\n", | |
1789 | i); | |
1790 | usb_set_index(0); | |
1791 | usb_set((EP0_CLR_OUT | EP0_DATA_END | EP0_SEND_STALL), | |
1792 | USB_EP0_CSR); | |
1793 | ||
1794 | /* ep->stopped = 1; */ | |
1795 | dev->ep0state = WAIT_FOR_SETUP; | |
1796 | } | |
1797 | } | |
1798 | } | |
1799 | ||
1800 | /* | |
1801 | * DATA_STATE_NEED_ZLP | |
1802 | */ | |
1803 | static void lh7a40x_ep0_in_zlp(struct lh7a40x_udc *dev, u32 csr) | |
1804 | { | |
441b62c1 | 1805 | DEBUG_EP0("%s: %x\n", __func__, csr); |
1da177e4 LT |
1806 | |
1807 | /* c.f. Table 15-14 */ | |
1808 | usb_set((EP0_IN_PKT_RDY | EP0_DATA_END), USB_EP0_CSR); | |
1809 | dev->ep0state = WAIT_FOR_SETUP; | |
1810 | } | |
1811 | ||
1812 | /* | |
1813 | * handle ep0 interrupt | |
1814 | */ | |
1815 | static void lh7a40x_handle_ep0(struct lh7a40x_udc *dev, u32 intr) | |
1816 | { | |
1817 | struct lh7a40x_ep *ep = &dev->ep[0]; | |
1818 | u32 csr; | |
1819 | ||
1820 | /* Set index 0 */ | |
1821 | usb_set_index(0); | |
1822 | csr = usb_read(USB_EP0_CSR); | |
1823 | ||
441b62c1 | 1824 | DEBUG_EP0("%s: csr = %x\n", __func__, csr); |
1da177e4 LT |
1825 | |
1826 | /* | |
1827 | * For overview of what we should be doing see c.f. Chapter 18.1.2.4 | |
1828 | * We will follow that outline here modified by our own global state | |
1829 | * indication which provides hints as to what we think should be | |
1830 | * happening.. | |
1831 | */ | |
1832 | ||
1833 | /* | |
1834 | * if SENT_STALL is set | |
1835 | * - clear the SENT_STALL bit | |
1836 | */ | |
1837 | if (csr & EP0_SENT_STALL) { | |
441b62c1 | 1838 | DEBUG_EP0("%s: EP0_SENT_STALL is set: %x\n", __func__, csr); |
1da177e4 LT |
1839 | usb_clear((EP0_SENT_STALL | EP0_SEND_STALL), USB_EP0_CSR); |
1840 | nuke(ep, -ECONNABORTED); | |
1841 | dev->ep0state = WAIT_FOR_SETUP; | |
1842 | return; | |
1843 | } | |
1844 | ||
1845 | /* | |
1846 | * if a transfer is in progress && IN_PKT_RDY and OUT_PKT_RDY are clear | |
1847 | * - fill EP0 FIFO | |
1848 | * - if last packet | |
1849 | * - set IN_PKT_RDY | DATA_END | |
1850 | * - else | |
1851 | * set IN_PKT_RDY | |
1852 | */ | |
1853 | if (!(csr & (EP0_IN_PKT_RDY | EP0_OUT_PKT_RDY))) { | |
1854 | DEBUG_EP0("%s: IN_PKT_RDY and OUT_PKT_RDY are clear\n", | |
441b62c1 | 1855 | __func__); |
1da177e4 LT |
1856 | |
1857 | switch (dev->ep0state) { | |
1858 | case DATA_STATE_XMIT: | |
1859 | DEBUG_EP0("continue with DATA_STATE_XMIT\n"); | |
1860 | lh7a40x_ep0_in(dev, csr); | |
1861 | return; | |
1862 | case DATA_STATE_NEED_ZLP: | |
1863 | DEBUG_EP0("continue with DATA_STATE_NEED_ZLP\n"); | |
1864 | lh7a40x_ep0_in_zlp(dev, csr); | |
1865 | return; | |
1866 | default: | |
1867 | /* Stall? */ | |
1868 | DEBUG_EP0("Odd state!! state = %s\n", | |
1869 | state_names[dev->ep0state]); | |
1870 | dev->ep0state = WAIT_FOR_SETUP; | |
1871 | /* nuke(ep, 0); */ | |
1872 | /* usb_set(EP0_SEND_STALL, ep->csr1); */ | |
1873 | break; | |
1874 | } | |
1875 | } | |
1876 | ||
1877 | /* | |
1878 | * if SETUP_END is set | |
1879 | * - abort the last transfer | |
1880 | * - set SERVICED_SETUP_END_BIT | |
1881 | */ | |
1882 | if (csr & EP0_SETUP_END) { | |
441b62c1 | 1883 | DEBUG_EP0("%s: EP0_SETUP_END is set: %x\n", __func__, csr); |
1da177e4 LT |
1884 | |
1885 | usb_set(EP0_CLR_SETUP_END, USB_EP0_CSR); | |
1886 | ||
1887 | nuke(ep, 0); | |
1888 | dev->ep0state = WAIT_FOR_SETUP; | |
1889 | } | |
1890 | ||
1891 | /* | |
1892 | * if EP0_OUT_PKT_RDY is set | |
1893 | * - read data packet from EP0 FIFO | |
1894 | * - decode command | |
1895 | * - if error | |
1896 | * set SERVICED_OUT_PKT_RDY | DATA_END bits | SEND_STALL | |
1897 | * - else | |
1898 | * set SERVICED_OUT_PKT_RDY | DATA_END bits | |
1899 | */ | |
1900 | if (csr & EP0_OUT_PKT_RDY) { | |
1901 | ||
441b62c1 | 1902 | DEBUG_EP0("%s: EP0_OUT_PKT_RDY is set: %x\n", __func__, |
1da177e4 LT |
1903 | csr); |
1904 | ||
1905 | switch (dev->ep0state) { | |
1906 | case WAIT_FOR_SETUP: | |
1907 | DEBUG_EP0("WAIT_FOR_SETUP\n"); | |
1908 | lh7a40x_ep0_setup(dev, csr); | |
1909 | break; | |
1910 | ||
1911 | case DATA_STATE_RECV: | |
1912 | DEBUG_EP0("DATA_STATE_RECV\n"); | |
1913 | lh7a40x_ep0_out(dev, csr); | |
1914 | break; | |
1915 | ||
1916 | default: | |
1917 | /* send stall? */ | |
1918 | DEBUG_EP0("strange state!! 2. send stall? state = %d\n", | |
1919 | dev->ep0state); | |
1920 | break; | |
1921 | } | |
1922 | } | |
1923 | } | |
1924 | ||
1925 | static void lh7a40x_ep0_kick(struct lh7a40x_udc *dev, struct lh7a40x_ep *ep) | |
1926 | { | |
1927 | u32 csr; | |
1928 | ||
1929 | usb_set_index(0); | |
1930 | csr = usb_read(USB_EP0_CSR); | |
1931 | ||
441b62c1 | 1932 | DEBUG_EP0("%s: %x\n", __func__, csr); |
1da177e4 LT |
1933 | |
1934 | /* Clear "out packet ready" */ | |
1935 | usb_set(EP0_CLR_OUT, USB_EP0_CSR); | |
1936 | ||
1937 | if (ep_is_in(ep)) { | |
1938 | dev->ep0state = DATA_STATE_XMIT; | |
1939 | lh7a40x_ep0_in(dev, csr); | |
1940 | } else { | |
1941 | dev->ep0state = DATA_STATE_RECV; | |
1942 | lh7a40x_ep0_out(dev, csr); | |
1943 | } | |
1944 | } | |
1945 | ||
1946 | /* --------------------------------------------------------------------------- | |
1947 | * device-scoped parts of the api to the usb controller hardware | |
1948 | * --------------------------------------------------------------------------- | |
1949 | */ | |
1950 | ||
1951 | static int lh7a40x_udc_get_frame(struct usb_gadget *_gadget) | |
1952 | { | |
1953 | u32 frame1 = usb_read(USB_FRM_NUM1); /* Least significant 8 bits */ | |
1954 | u32 frame2 = usb_read(USB_FRM_NUM2); /* Most significant 3 bits */ | |
441b62c1 | 1955 | DEBUG("%s, %p\n", __func__, _gadget); |
1da177e4 LT |
1956 | return ((frame2 & 0x07) << 8) | (frame1 & 0xff); |
1957 | } | |
1958 | ||
1959 | static int lh7a40x_udc_wakeup(struct usb_gadget *_gadget) | |
1960 | { | |
1961 | /* host may not have enabled remote wakeup */ | |
1962 | /*if ((UDCCS0 & UDCCS0_DRWF) == 0) | |
1963 | return -EHOSTUNREACH; | |
1964 | udc_set_mask_UDCCR(UDCCR_RSM); */ | |
1965 | return -ENOTSUPP; | |
1966 | } | |
1967 | ||
1968 | static const struct usb_gadget_ops lh7a40x_udc_ops = { | |
1969 | .get_frame = lh7a40x_udc_get_frame, | |
1970 | .wakeup = lh7a40x_udc_wakeup, | |
1971 | /* current versions must always be self-powered */ | |
1972 | }; | |
1973 | ||
1974 | static void nop_release(struct device *dev) | |
1975 | { | |
7071a3ce | 1976 | DEBUG("%s %s\n", __func__, dev_name(dev)); |
1da177e4 LT |
1977 | } |
1978 | ||
1979 | static struct lh7a40x_udc memory = { | |
1980 | .usb_address = 0, | |
1981 | ||
1982 | .gadget = { | |
1983 | .ops = &lh7a40x_udc_ops, | |
1984 | .ep0 = &memory.ep[0].ep, | |
1985 | .name = driver_name, | |
1986 | .dev = { | |
c682b170 | 1987 | .init_name = "gadget", |
1da177e4 LT |
1988 | .release = nop_release, |
1989 | }, | |
1990 | }, | |
1991 | ||
1992 | /* control endpoint */ | |
1993 | .ep[0] = { | |
1994 | .ep = { | |
1995 | .name = ep0name, | |
1996 | .ops = &lh7a40x_ep_ops, | |
1997 | .maxpacket = EP0_PACKETSIZE, | |
1998 | }, | |
1999 | .dev = &memory, | |
2000 | ||
2001 | .bEndpointAddress = 0, | |
2002 | .bmAttributes = 0, | |
2003 | ||
2004 | .ep_type = ep_control, | |
2005 | .fifo = io_p2v(USB_EP0_FIFO), | |
2006 | .csr1 = USB_EP0_CSR, | |
2007 | .csr2 = USB_EP0_CSR, | |
2008 | }, | |
2009 | ||
2010 | /* first group of endpoints */ | |
2011 | .ep[1] = { | |
2012 | .ep = { | |
2013 | .name = "ep1in-bulk", | |
2014 | .ops = &lh7a40x_ep_ops, | |
2015 | .maxpacket = 64, | |
2016 | }, | |
2017 | .dev = &memory, | |
2018 | ||
2019 | .bEndpointAddress = USB_DIR_IN | 1, | |
2020 | .bmAttributes = USB_ENDPOINT_XFER_BULK, | |
2021 | ||
2022 | .ep_type = ep_bulk_in, | |
2023 | .fifo = io_p2v(USB_EP1_FIFO), | |
2024 | .csr1 = USB_IN_CSR1, | |
2025 | .csr2 = USB_IN_CSR2, | |
2026 | }, | |
2027 | ||
2028 | .ep[2] = { | |
2029 | .ep = { | |
2030 | .name = "ep2out-bulk", | |
2031 | .ops = &lh7a40x_ep_ops, | |
2032 | .maxpacket = 64, | |
2033 | }, | |
2034 | .dev = &memory, | |
2035 | ||
2036 | .bEndpointAddress = 2, | |
2037 | .bmAttributes = USB_ENDPOINT_XFER_BULK, | |
2038 | ||
2039 | .ep_type = ep_bulk_out, | |
2040 | .fifo = io_p2v(USB_EP2_FIFO), | |
2041 | .csr1 = USB_OUT_CSR1, | |
2042 | .csr2 = USB_OUT_CSR2, | |
2043 | }, | |
2044 | ||
2045 | .ep[3] = { | |
2046 | .ep = { | |
2047 | .name = "ep3in-int", | |
2048 | .ops = &lh7a40x_ep_ops, | |
2049 | .maxpacket = 64, | |
2050 | }, | |
2051 | .dev = &memory, | |
2052 | ||
2053 | .bEndpointAddress = USB_DIR_IN | 3, | |
2054 | .bmAttributes = USB_ENDPOINT_XFER_INT, | |
2055 | ||
2056 | .ep_type = ep_interrupt, | |
2057 | .fifo = io_p2v(USB_EP3_FIFO), | |
2058 | .csr1 = USB_IN_CSR1, | |
2059 | .csr2 = USB_IN_CSR2, | |
2060 | }, | |
2061 | }; | |
2062 | ||
2063 | /* | |
2064 | * probe - binds to the platform device | |
2065 | */ | |
3ae5eaec | 2066 | static int lh7a40x_udc_probe(struct platform_device *pdev) |
1da177e4 LT |
2067 | { |
2068 | struct lh7a40x_udc *dev = &memory; | |
2069 | int retval; | |
2070 | ||
441b62c1 | 2071 | DEBUG("%s: %p\n", __func__, pdev); |
1da177e4 LT |
2072 | |
2073 | spin_lock_init(&dev->lock); | |
3ae5eaec | 2074 | dev->dev = &pdev->dev; |
1da177e4 LT |
2075 | |
2076 | device_initialize(&dev->gadget.dev); | |
3ae5eaec | 2077 | dev->gadget.dev.parent = &pdev->dev; |
1da177e4 LT |
2078 | |
2079 | the_controller = dev; | |
3ae5eaec | 2080 | platform_set_drvdata(pdev, dev); |
1da177e4 LT |
2081 | |
2082 | udc_disable(dev); | |
2083 | udc_reinit(dev); | |
2084 | ||
2085 | /* irq setup after old hardware state is cleaned up */ | |
2086 | retval = | |
d54b5caa | 2087 | request_irq(IRQ_USBINTR, lh7a40x_udc_irq, IRQF_DISABLED, driver_name, |
1da177e4 LT |
2088 | dev); |
2089 | if (retval != 0) { | |
2090 | DEBUG(KERN_ERR "%s: can't get irq %i, err %d\n", driver_name, | |
2091 | IRQ_USBINTR, retval); | |
2092 | return -EBUSY; | |
2093 | } | |
2094 | ||
2095 | create_proc_files(); | |
2096 | ||
2097 | return retval; | |
2098 | } | |
2099 | ||
3ae5eaec | 2100 | static int lh7a40x_udc_remove(struct platform_device *pdev) |
1da177e4 | 2101 | { |
3ae5eaec | 2102 | struct lh7a40x_udc *dev = platform_get_drvdata(pdev); |
1da177e4 | 2103 | |
441b62c1 | 2104 | DEBUG("%s: %p\n", __func__, pdev); |
1da177e4 | 2105 | |
6bea476c DB |
2106 | if (dev->driver) |
2107 | return -EBUSY; | |
2108 | ||
1da177e4 LT |
2109 | udc_disable(dev); |
2110 | remove_proc_files(); | |
1da177e4 LT |
2111 | |
2112 | free_irq(IRQ_USBINTR, dev); | |
2113 | ||
3ae5eaec | 2114 | platform_set_drvdata(pdev, 0); |
1da177e4 LT |
2115 | |
2116 | the_controller = 0; | |
2117 | ||
2118 | return 0; | |
2119 | } | |
2120 | ||
2121 | /*-------------------------------------------------------------------------*/ | |
2122 | ||
3ae5eaec | 2123 | static struct platform_driver udc_driver = { |
1da177e4 | 2124 | .probe = lh7a40x_udc_probe, |
0f1482fd | 2125 | .remove = lh7a40x_udc_remove, |
1da177e4 LT |
2126 | /* FIXME power management support */ |
2127 | /* .suspend = ... disable UDC */ | |
2128 | /* .resume = ... re-enable UDC */ | |
3ae5eaec RK |
2129 | .driver = { |
2130 | .name = (char *)driver_name, | |
2131 | .owner = THIS_MODULE, | |
2132 | }, | |
1da177e4 LT |
2133 | }; |
2134 | ||
2135 | static int __init udc_init(void) | |
2136 | { | |
441b62c1 | 2137 | DEBUG("%s: %s version %s\n", __func__, driver_name, DRIVER_VERSION); |
3ae5eaec | 2138 | return platform_driver_register(&udc_driver); |
1da177e4 LT |
2139 | } |
2140 | ||
2141 | static void __exit udc_exit(void) | |
2142 | { | |
3ae5eaec | 2143 | platform_driver_unregister(&udc_driver); |
1da177e4 LT |
2144 | } |
2145 | ||
2146 | module_init(udc_init); | |
2147 | module_exit(udc_exit); | |
2148 | ||
2149 | MODULE_DESCRIPTION(DRIVER_DESC); | |
2150 | MODULE_AUTHOR("Mikko Lahteenmaki, Bo Henriksen"); | |
2151 | MODULE_LICENSE("GPL"); | |
f34c32f1 | 2152 | MODULE_ALIAS("platform:lh7a40x_udc"); |