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1da177e4
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1/*
2 * OHCI HCD (Host Controller Driver) for USB.
dd9048af 3 *
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4 * (C) Copyright 1999 Roman Weissgaerber <weissg@vienna.at>
5 * (C) Copyright 2000-2002 David Brownell <dbrownell@users.sourceforge.net>
dd9048af 6 *
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7 * This file is licenced under the GPL.
8 */
9
10/*-------------------------------------------------------------------------*/
11
12/*
dd9048af 13 * OHCI deals with three types of memory:
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14 * - data used only by the HCD ... kmalloc is fine
15 * - async and periodic schedules, shared by HC and HCD ... these
16 * need to use dma_pool or dma_alloc_coherent
17 * - driver buffers, read/written by HC ... the hcd glue or the
18 * device driver provides us with dma addresses
19 *
dd9048af
DB
20 * There's also "register" data, which is memory mapped.
21 * No memory seen by this driver (or any HCD) may be paged out.
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22 */
23
24/*-------------------------------------------------------------------------*/
25
26static void ohci_hcd_init (struct ohci_hcd *ohci)
27{
28 ohci->next_statechange = jiffies;
29 spin_lock_init (&ohci->lock);
30 INIT_LIST_HEAD (&ohci->pending);
81e38333 31 INIT_LIST_HEAD(&ohci->eds_in_use);
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32}
33
34/*-------------------------------------------------------------------------*/
35
36static int ohci_mem_init (struct ohci_hcd *ohci)
37{
38 ohci->td_cache = dma_pool_create ("ohci_td",
39 ohci_to_hcd(ohci)->self.controller,
40 sizeof (struct td),
41 32 /* byte alignment */,
42 0 /* no page-crossing issues */);
43 if (!ohci->td_cache)
44 return -ENOMEM;
45 ohci->ed_cache = dma_pool_create ("ohci_ed",
46 ohci_to_hcd(ohci)->self.controller,
47 sizeof (struct ed),
48 16 /* byte alignment */,
49 0 /* no page-crossing issues */);
50 if (!ohci->ed_cache) {
51 dma_pool_destroy (ohci->td_cache);
52 return -ENOMEM;
53 }
54 return 0;
55}
56
57static void ohci_mem_cleanup (struct ohci_hcd *ohci)
58{
59 if (ohci->td_cache) {
60 dma_pool_destroy (ohci->td_cache);
61 ohci->td_cache = NULL;
62 }
63 if (ohci->ed_cache) {
64 dma_pool_destroy (ohci->ed_cache);
65 ohci->ed_cache = NULL;
66 }
67}
68
69/*-------------------------------------------------------------------------*/
70
71/* ohci "done list" processing needs this mapping */
72static inline struct td *
73dma_to_td (struct ohci_hcd *hc, dma_addr_t td_dma)
74{
75 struct td *td;
76
77 td_dma &= TD_MASK;
78 td = hc->td_hash [TD_HASH_FUNC(td_dma)];
79 while (td && td->td_dma != td_dma)
80 td = td->td_hash;
81 return td;
82}
83
84/* TDs ... */
85static struct td *
55016f10 86td_alloc (struct ohci_hcd *hc, gfp_t mem_flags)
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87{
88 dma_addr_t dma;
89 struct td *td;
90
8694f59c 91 td = dma_pool_zalloc (hc->td_cache, mem_flags, &dma);
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92 if (td) {
93 /* in case hc fetches it, make it look dead */
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94 td->hwNextTD = cpu_to_hc32 (hc, dma);
95 td->td_dma = dma;
96 /* hashed in td_fill */
97 }
98 return td;
99}
100
101static void
102td_free (struct ohci_hcd *hc, struct td *td)
103{
104 struct td **prev = &hc->td_hash [TD_HASH_FUNC (td->td_dma)];
105
106 while (*prev && *prev != td)
107 prev = &(*prev)->td_hash;
108 if (*prev)
109 *prev = td->td_hash;
110 else if ((td->hwINFO & cpu_to_hc32(hc, TD_DONE)) != 0)
111 ohci_dbg (hc, "no hash for td %p\n", td);
112 dma_pool_free (hc->td_cache, td, td->td_dma);
113}
114
115/*-------------------------------------------------------------------------*/
116
117/* EDs ... */
118static struct ed *
55016f10 119ed_alloc (struct ohci_hcd *hc, gfp_t mem_flags)
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120{
121 dma_addr_t dma;
122 struct ed *ed;
123
8694f59c 124 ed = dma_pool_zalloc (hc->ed_cache, mem_flags, &dma);
1da177e4 125 if (ed) {
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126 INIT_LIST_HEAD (&ed->td_list);
127 ed->dma = dma;
128 }
129 return ed;
130}
131
132static void
133ed_free (struct ohci_hcd *hc, struct ed *ed)
134{
135 dma_pool_free (hc->ed_cache, ed, ed->dma);
136}
137