[mirror_ubuntu-bionic-kernel.git] / drivers / usb / musb / omap2430.c

/*
 * Copyright (C) 2005-2007 by Texas Instruments
 * Some code has been taken from tusb6010.c
 * Copyrights for that are attributable to:
 * Copyright (C) 2006 Nokia Corporation
 * Tony Lindgren <tony@atomide.com>
 *
 * This file is part of the Inventra Controller Driver for Linux.
 *
 * The Inventra Controller Driver for Linux is free software; you
 * can redistribute it and/or modify it under the terms of the GNU
 * General Public License version 2 as published by the Free Software
 * Foundation.
 *
 * The Inventra Controller Driver for Linux is distributed in
 * the hope that it will be useful, but WITHOUT ANY WARRANTY;
 * without even the implied warranty of MERCHANTABILITY or
 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
 * License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with The Inventra Controller Driver for Linux ; if not,
 * write to the Free Software Foundation, Inc., 59 Temple Place,
 * Suite 330, Boston, MA  02111-1307  USA
 *
 */
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/init.h>
#include <linux/list.h>
#include <linux/clk.h>
#include <linux/io.h>
#include <linux/platform_device.h>
#include <linux/dma-mapping.h>

#include "musb_core.h"
#include "omap2430.h"

struct omap2430_glue {
	struct device		*dev;
	struct platform_device	*musb;
	struct clk		*clk;
};

static struct timer_list musb_idle_timer;

static void musb_do_idle(unsigned long _musb)
{
	struct musb	*musb = (void *)_musb;
	unsigned long	flags;
#ifdef CONFIG_USB_MUSB_HDRC_HCD
	u8	power;
#endif
	u8	devctl;

	spin_lock_irqsave(&musb->lock, flags);

	devctl = musb_readb(musb->mregs, MUSB_DEVCTL);

	switch (musb->xceiv->state) {
	case OTG_STATE_A_WAIT_BCON:
		devctl &= ~MUSB_DEVCTL_SESSION;
		musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);

		devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
		if (devctl & MUSB_DEVCTL_BDEVICE) {
			musb->xceiv->state = OTG_STATE_B_IDLE;
			MUSB_DEV_MODE(musb);
		} else {
			musb->xceiv->state = OTG_STATE_A_IDLE;
			MUSB_HST_MODE(musb);
		}
		break;
#ifdef CONFIG_USB_MUSB_HDRC_HCD
	case OTG_STATE_A_SUSPEND:
		/* finish RESUME signaling? */
		if (musb->port1_status & MUSB_PORT_STAT_RESUME) {
			power = musb_readb(musb->mregs, MUSB_POWER);
			power &= ~MUSB_POWER_RESUME;
			DBG(1, "root port resume stopped, power %02x\n", power);
			musb_writeb(musb->mregs, MUSB_POWER, power);
			musb->is_active = 1;
			musb->port1_status &= ~(USB_PORT_STAT_SUSPEND
						| MUSB_PORT_STAT_RESUME);
			musb->port1_status |= USB_PORT_STAT_C_SUSPEND << 16;
			usb_hcd_poll_rh_status(musb_to_hcd(musb));
			/* NOTE: it might really be A_WAIT_BCON ... */
			musb->xceiv->state = OTG_STATE_A_HOST;
		}
		break;
#endif
#ifdef CONFIG_USB_MUSB_HDRC_HCD
	case OTG_STATE_A_HOST:
		devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
		if (devctl &  MUSB_DEVCTL_BDEVICE)
			musb->xceiv->state = OTG_STATE_B_IDLE;
		else
			musb->xceiv->state = OTG_STATE_A_WAIT_BCON;
#endif
	default:
		break;
	}
	spin_unlock_irqrestore(&musb->lock, flags);
}


static void omap2430_musb_try_idle(struct musb *musb, unsigned long timeout)
{
	unsigned long		default_timeout = jiffies + msecs_to_jiffies(3);
	static unsigned long	last_timer;

	if (timeout == 0)
		timeout = default_timeout;

	/* Never idle if active, or when VBUS timeout is not set as host */
	if (musb->is_active || ((musb->a_wait_bcon == 0)
			&& (musb->xceiv->state == OTG_STATE_A_WAIT_BCON))) {
		DBG(4, "%s active, deleting timer\n", otg_state_string(musb));
		del_timer(&musb_idle_timer);
		last_timer = jiffies;
		return;
	}

	if (time_after(last_timer, timeout)) {
		if (!timer_pending(&musb_idle_timer))
			last_timer = timeout;
		else {
			DBG(4, "Longer idle timer already pending, ignoring\n");
			return;
		}
	}
	last_timer = timeout;

	DBG(4, "%s inactive, for idle timer for %lu ms\n",
		otg_state_string(musb),
		(unsigned long)jiffies_to_msecs(timeout - jiffies));
	mod_timer(&musb_idle_timer, timeout);
}

static void omap2430_musb_set_vbus(struct musb *musb, int is_on)
{
	u8		devctl;
	/* HDRC controls CPEN, but beware current surges during device
	 * connect.  They can trigger transient overcurrent conditions
	 * that must be ignored.
	 */

	devctl = musb_readb(musb->mregs, MUSB_DEVCTL);

	if (is_on) {
		musb->is_active = 1;
		musb->xceiv->default_a = 1;
		musb->xceiv->state = OTG_STATE_A_WAIT_VRISE;
		devctl |= MUSB_DEVCTL_SESSION;

		MUSB_HST_MODE(musb);
	} else {
		musb->is_active = 0;

		/* NOTE:  we're skipping A_WAIT_VFALL -> A_IDLE and
		 * jumping right to B_IDLE...
		 */

		musb->xceiv->default_a = 0;
		musb->xceiv->state = OTG_STATE_B_IDLE;
		devctl &= ~MUSB_DEVCTL_SESSION;

		MUSB_DEV_MODE(musb);
	}
	musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);

	DBG(1, "VBUS %s, devctl %02x "
		/* otg %3x conf %08x prcm %08x */ "\n",
		otg_state_string(musb),
		musb_readb(musb->mregs, MUSB_DEVCTL));
}

static int omap2430_musb_resume(struct musb *musb);

static int omap2430_musb_set_mode(struct musb *musb, u8 musb_mode)
{
	u8	devctl = musb_readb(musb->mregs, MUSB_DEVCTL);

	devctl |= MUSB_DEVCTL_SESSION;
	musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);

	return 0;
}

static int omap2430_musb_init(struct musb *musb)
{
	u32 l;
	struct device *dev = musb->controller;
	struct musb_hdrc_platform_data *plat = dev->platform_data;
	struct omap_musb_board_data *data = plat->board_data;

	/* We require some kind of external transceiver, hooked
	 * up through ULPI.  TWL4030-family PMICs include one,
	 * which needs a driver, drivers aren't always needed.
	 */
	musb->xceiv = otg_get_transceiver();
	if (!musb->xceiv) {
		pr_err("HS USB OTG: no transceiver configured\n");
		return -ENODEV;
	}

	omap2430_musb_resume(musb);

	l = musb_readl(musb->mregs, OTG_SYSCONFIG);
	l &= ~ENABLEWAKEUP;	/* disable wakeup */
	l &= ~NOSTDBY;		/* remove possible nostdby */
	l |= SMARTSTDBY;	/* enable smart standby */
	l &= ~AUTOIDLE;		/* disable auto idle */
	l &= ~NOIDLE;		/* remove possible noidle */
	l |= SMARTIDLE;		/* enable smart idle */
	/*
	 * MUSB AUTOIDLE don't work in 3430.
	 * Workaround by Richard Woodruff/TI
	 */
	if (!cpu_is_omap3430())
		l |= AUTOIDLE;		/* enable auto idle */
	musb_writel(musb->mregs, OTG_SYSCONFIG, l);

	l = musb_readl(musb->mregs, OTG_INTERFSEL);

	if (data->interface_type == MUSB_INTERFACE_UTMI) {
		/* OMAP4 uses Internal PHY GS70 which uses UTMI interface */
		l &= ~ULPI_12PIN;       /* Disable ULPI */
		l |= UTMI_8BIT;         /* Enable UTMI  */
	} else {
		l |= ULPI_12PIN;
	}

	musb_writel(musb->mregs, OTG_INTERFSEL, l);

	pr_debug("HS USB OTG: revision 0x%x, sysconfig 0x%02x, "
			"sysstatus 0x%x, intrfsel 0x%x, simenable  0x%x\n",
			musb_readl(musb->mregs, OTG_REVISION),
			musb_readl(musb->mregs, OTG_SYSCONFIG),
			musb_readl(musb->mregs, OTG_SYSSTATUS),
			musb_readl(musb->mregs, OTG_INTERFSEL),
			musb_readl(musb->mregs, OTG_SIMENABLE));

	if (is_host_enabled(musb))
		musb->board_set_vbus = omap2430_musb_set_vbus;

	setup_timer(&musb_idle_timer, musb_do_idle, (unsigned long) musb);

	return 0;
}

static void omap2430_save_context(struct musb *musb)
{
	musb->context.otg_sysconfig = musb_readl(musb->mregs, OTG_SYSCONFIG);
	musb->context.otg_forcestandby = musb_readl(musb->mregs, OTG_FORCESTDBY);
}

static void omap2430_restore_context(struct musb *musb)
{
	musb_writel(musb->mregs, OTG_SYSCONFIG, musb->context.otg_sysconfig);
	musb_writel(musb->mregs, OTG_FORCESTDBY, musb->context.otg_forcestandby);
}

static int omap2430_musb_suspend(struct musb *musb)
{
	u32 l;

	/* in any role */
	l = musb_readl(musb->mregs, OTG_FORCESTDBY);
	l |= ENABLEFORCE;	/* enable MSTANDBY */
	musb_writel(musb->mregs, OTG_FORCESTDBY, l);

	l = musb_readl(musb->mregs, OTG_SYSCONFIG);
	l |= ENABLEWAKEUP;	/* enable wakeup */
	musb_writel(musb->mregs, OTG_SYSCONFIG, l);

	omap2430_save_context(musb);

	otg_set_suspend(musb->xceiv, 1);

	return 0;
}

static int omap2430_musb_resume(struct musb *musb)
{
	u32 l;

	otg_set_suspend(musb->xceiv, 0);

	omap2430_restore_context(musb);

	l = musb_readl(musb->mregs, OTG_SYSCONFIG);
	l &= ~ENABLEWAKEUP;	/* disable wakeup */
	musb_writel(musb->mregs, OTG_SYSCONFIG, l);

	l = musb_readl(musb->mregs, OTG_FORCESTDBY);
	l &= ~ENABLEFORCE;	/* disable MSTANDBY */
	musb_writel(musb->mregs, OTG_FORCESTDBY, l);

	return 0;
}

static int omap2430_musb_exit(struct musb *musb)
{

	omap2430_musb_suspend(musb);

	otg_put_transceiver(musb->xceiv);
	return 0;
}

static const struct musb_platform_ops omap2430_ops = {
	.init		= omap2430_musb_init,
	.exit		= omap2430_musb_exit,

	.suspend	= omap2430_musb_suspend,
	.resume		= omap2430_musb_resume,

	.set_mode	= omap2430_musb_set_mode,
	.try_idle	= omap2430_musb_try_idle,

	.set_vbus	= omap2430_musb_set_vbus,
};

static u64 omap2430_dmamask = DMA_BIT_MASK(32);

static int __init omap2430_probe(struct platform_device *pdev)
{
	struct musb_hdrc_platform_data	*pdata = pdev->dev.platform_data;
	struct platform_device		*musb;
	struct omap2430_glue		*glue;
	struct clk			*clk;

	int				ret = -ENOMEM;

	glue = kzalloc(sizeof(*glue), GFP_KERNEL);
	if (!glue) {
		dev_err(&pdev->dev, "failed to allocate glue context\n");
		goto err0;
	}

	musb = platform_device_alloc("musb-hdrc", -1);
	if (!musb) {
		dev_err(&pdev->dev, "failed to allocate musb device\n");
		goto err1;
	}

	clk = clk_get(&pdev->dev, "ick");
	if (IS_ERR(clk)) {
		dev_err(&pdev->dev, "failed to get clock\n");
		ret = PTR_ERR(clk);
		goto err2;
	}

	ret = clk_enable(clk);
	if (ret) {
		dev_err(&pdev->dev, "failed to enable clock\n");
		goto err3;
	}

	musb->dev.parent		= &pdev->dev;
	musb->dev.dma_mask		= &omap2430_dmamask;
	musb->dev.coherent_dma_mask	= omap2430_dmamask;

	glue->dev			= &pdev->dev;
	glue->musb			= musb;
	glue->clk			= clk;

	pdata->platform_ops		= &omap2430_ops;

	platform_set_drvdata(pdev, glue);

	ret = platform_device_add_resources(musb, pdev->resource,
			pdev->num_resources);
	if (ret) {
		dev_err(&pdev->dev, "failed to add resources\n");
		goto err4;
	}

	ret = platform_device_add_data(musb, pdata, sizeof(*pdata));
	if (ret) {
		dev_err(&pdev->dev, "failed to add platform_data\n");
		goto err4;
	}

	ret = platform_device_add(musb);
	if (ret) {
		dev_err(&pdev->dev, "failed to register musb device\n");
		goto err4;
	}

	return 0;

err4:
	clk_disable(clk);

err3:
	clk_put(clk);

err2:
	platform_device_put(musb);

err1:
	kfree(glue);

err0:
	return ret;
}

static int __exit omap2430_remove(struct platform_device *pdev)
{
	struct omap2430_glue		*glue = platform_get_drvdata(pdev);

	platform_device_del(glue->musb);
	platform_device_put(glue->musb);
	clk_disable(glue->clk);
	clk_put(glue->clk);
	kfree(glue);

	return 0;
}

static struct platform_driver omap2430_driver = {
	.remove		= __exit_p(omap2430_remove),
	.driver		= {
		.name	= "musb-omap2430",
	},
};

MODULE_DESCRIPTION("OMAP2PLUS MUSB Glue Layer");
MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>");
MODULE_LICENSE("GPL v2");

static int __init omap2430_init(void)
{
	return platform_driver_probe(&omap2430_driver, omap2430_probe);
}
subsys_initcall(omap2430_init);

static void __exit omap2430_exit(void)
{
	platform_driver_unregister(&omap2430_driver);
}
module_exit(omap2430_exit);
Commit	Line	Data
550a7375 FB	1	/*
	2	* Copyright (C) 2005-2007 by Texas Instruments
	3	* Some code has been taken from tusb6010.c
	4	* Copyrights for that are attributable to:
	5	* Copyright (C) 2006 Nokia Corporation
550a7375 FB	6	* Tony Lindgren <tony@atomide.com>
	7	*
	8	* This file is part of the Inventra Controller Driver for Linux.
	9	*
	10	* The Inventra Controller Driver for Linux is free software; you
	11	* can redistribute it and/or modify it under the terms of the GNU
	12	* General Public License version 2 as published by the Free Software
	13	* Foundation.
	14	*
	15	* The Inventra Controller Driver for Linux is distributed in
	16	* the hope that it will be useful, but WITHOUT ANY WARRANTY;
	17	* without even the implied warranty of MERCHANTABILITY or
	18	* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
	19	* License for more details.
	20	*
	21	* You should have received a copy of the GNU General Public License
	22	* along with The Inventra Controller Driver for Linux ; if not,
	23	* write to the Free Software Foundation, Inc., 59 Temple Place,
	24	* Suite 330, Boston, MA 02111-1307 USA
	25	*
	26	*/
	27	#include <linux/module.h>
	28	#include <linux/kernel.h>
	29	#include <linux/sched.h>
550a7375 FB	30	#include <linux/init.h>
	31	#include <linux/list.h>
	32	#include <linux/clk.h>
	33	#include <linux/io.h>
dc09886b FB	34	#include <linux/platform_device.h>
dc09886b FB	35	#include <linux/dma-mapping.h>
550a7375	36
550a7375 FB	37	#include "musb_core.h"
	38	#include "omap2430.h"
	39
a3cee12a FB	40	struct omap2430_glue {
	41	struct device *dev;
	42	struct platform_device *musb;
03491761	43	struct clk *clk;
a3cee12a FB	44	};
a3cee12a FB	45
550a7375 FB	46	static struct timer_list musb_idle_timer;
	47
	48	static void musb_do_idle(unsigned long _musb)
	49	{
	50	struct musb musb = (void )_musb;
	51	unsigned long flags;
eef767b7	52	#ifdef CONFIG_USB_MUSB_HDRC_HCD
550a7375	53	u8 power;
eef767b7	54	#endif
550a7375 FB	55	u8 devctl;
550a7375 FB	56
550a7375 FB	57	spin_lock_irqsave(&musb->lock, flags);
550a7375 FB	58
71783e0d DB	59	devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
71783e0d DB	60
84e250ff	61	switch (musb->xceiv->state) {
550a7375 FB	62	case OTG_STATE_A_WAIT_BCON:
	63	devctl &= ~MUSB_DEVCTL_SESSION;
	64	musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
	65
	66	devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
	67	if (devctl & MUSB_DEVCTL_BDEVICE) {
84e250ff	68	musb->xceiv->state = OTG_STATE_B_IDLE;
550a7375 FB	69	MUSB_DEV_MODE(musb);
550a7375 FB	70	} else {
84e250ff	71	musb->xceiv->state = OTG_STATE_A_IDLE;
550a7375 FB	72	MUSB_HST_MODE(musb);
	73	}
	74	break;
	75	#ifdef CONFIG_USB_MUSB_HDRC_HCD
	76	case OTG_STATE_A_SUSPEND:
	77	/* finish RESUME signaling? */
	78	if (musb->port1_status & MUSB_PORT_STAT_RESUME) {
	79	power = musb_readb(musb->mregs, MUSB_POWER);
	80	power &= ~MUSB_POWER_RESUME;
	81	DBG(1, "root port resume stopped, power %02x\n", power);
	82	musb_writeb(musb->mregs, MUSB_POWER, power);
	83	musb->is_active = 1;
	84	musb->port1_status &= ~(USB_PORT_STAT_SUSPEND
	85	\| MUSB_PORT_STAT_RESUME);
	86	musb->port1_status \|= USB_PORT_STAT_C_SUSPEND << 16;
	87	usb_hcd_poll_rh_status(musb_to_hcd(musb));
	88	/* NOTE: it might really be A_WAIT_BCON ... */
84e250ff	89	musb->xceiv->state = OTG_STATE_A_HOST;
550a7375 FB	90	}
	91	break;
	92	#endif
	93	#ifdef CONFIG_USB_MUSB_HDRC_HCD
	94	case OTG_STATE_A_HOST:
	95	devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
	96	if (devctl & MUSB_DEVCTL_BDEVICE)
84e250ff	97	musb->xceiv->state = OTG_STATE_B_IDLE;
550a7375	98	else
84e250ff	99	musb->xceiv->state = OTG_STATE_A_WAIT_BCON;
550a7375 FB	100	#endif
	101	default:
	102	break;
	103	}
	104	spin_unlock_irqrestore(&musb->lock, flags);
	105	}
	106
	107
743411b3	108	static void omap2430_musb_try_idle(struct musb *musb, unsigned long timeout)
550a7375 FB	109	{
	110	unsigned long default_timeout = jiffies + msecs_to_jiffies(3);
	111	static unsigned long last_timer;
	112
	113	if (timeout == 0)
	114	timeout = default_timeout;
	115
	116	/* Never idle if active, or when VBUS timeout is not set as host */
	117	if (musb->is_active \|\| ((musb->a_wait_bcon == 0)
84e250ff	118	&& (musb->xceiv->state == OTG_STATE_A_WAIT_BCON))) {
550a7375 FB	119	DBG(4, "%s active, deleting timer\n", otg_state_string(musb));
	120	del_timer(&musb_idle_timer);
	121	last_timer = jiffies;
	122	return;
	123	}
	124
	125	if (time_after(last_timer, timeout)) {
	126	if (!timer_pending(&musb_idle_timer))
	127	last_timer = timeout;
	128	else {
	129	DBG(4, "Longer idle timer already pending, ignoring\n");
	130	return;
	131	}
	132	}
	133	last_timer = timeout;
	134
	135	DBG(4, "%s inactive, for idle timer for %lu ms\n",
	136	otg_state_string(musb),
	137	(unsigned long)jiffies_to_msecs(timeout - jiffies));
	138	mod_timer(&musb_idle_timer, timeout);
	139	}
	140
743411b3	141	static void omap2430_musb_set_vbus(struct musb *musb, int is_on)
550a7375 FB	142	{
	143	u8 devctl;
	144	/* HDRC controls CPEN, but beware current surges during device
	145	* connect. They can trigger transient overcurrent conditions
	146	* that must be ignored.
	147	*/
	148
	149	devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
	150
	151	if (is_on) {
	152	musb->is_active = 1;
84e250ff DB	153	musb->xceiv->default_a = 1;
84e250ff DB	154	musb->xceiv->state = OTG_STATE_A_WAIT_VRISE;
550a7375 FB	155	devctl \|= MUSB_DEVCTL_SESSION;
	156
	157	MUSB_HST_MODE(musb);
	158	} else {
	159	musb->is_active = 0;
	160
	161	/* NOTE: we're skipping A_WAIT_VFALL -> A_IDLE and
	162	* jumping right to B_IDLE...
	163	*/
	164
84e250ff DB	165	musb->xceiv->default_a = 0;
84e250ff DB	166	musb->xceiv->state = OTG_STATE_B_IDLE;
550a7375 FB	167	devctl &= ~MUSB_DEVCTL_SESSION;
	168
	169	MUSB_DEV_MODE(musb);
	170	}
	171	musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
	172
	173	DBG(1, "VBUS %s, devctl %02x "
	174	/* otg %3x conf %08x prcm %08x */ "\n",
	175	otg_state_string(musb),
	176	musb_readb(musb->mregs, MUSB_DEVCTL));
	177	}
550a7375	178
743411b3	179	static int omap2430_musb_resume(struct musb *musb);
550a7375	180
743411b3	181	static int omap2430_musb_set_mode(struct musb *musb, u8 musb_mode)
550a7375 FB	182	{
	183	u8 devctl = musb_readb(musb->mregs, MUSB_DEVCTL);
	184
	185	devctl \|= MUSB_DEVCTL_SESSION;
	186	musb_writeb(musb->mregs, MUSB_DEVCTL, devctl);
	187
96a274d1	188	return 0;
550a7375 FB	189	}
550a7375 FB	190
743411b3	191	static int omap2430_musb_init(struct musb *musb)
550a7375 FB	192	{
550a7375 FB	193	u32 l;
ea65df57 HK	194	struct device *dev = musb->controller;
	195	struct musb_hdrc_platform_data *plat = dev->platform_data;
	196	struct omap_musb_board_data *data = plat->board_data;
550a7375	197
84e250ff DB	198	/* We require some kind of external transceiver, hooked
	199	* up through ULPI. TWL4030-family PMICs include one,
	200	* which needs a driver, drivers aren't always needed.
	201	*/
	202	musb->xceiv = otg_get_transceiver();
	203	if (!musb->xceiv) {
	204	pr_err("HS USB OTG: no transceiver configured\n");
	205	return -ENODEV;
	206	}
	207
743411b3	208	omap2430_musb_resume(musb);
550a7375	209
8573e6a6	210	l = musb_readl(musb->mregs, OTG_SYSCONFIG);
550a7375 FB	211	l &= ~ENABLEWAKEUP; /* disable wakeup */
	212	l &= ~NOSTDBY; /* remove possible nostdby */
	213	l \|= SMARTSTDBY; /* enable smart standby */
	214	l &= ~AUTOIDLE; /* disable auto idle */
	215	l &= ~NOIDLE; /* remove possible noidle */
	216	l \|= SMARTIDLE; /* enable smart idle */
9a4b5e36 NM	217	/*
	218	* MUSB AUTOIDLE don't work in 3430.
	219	* Workaround by Richard Woodruff/TI
	220	*/
	221	if (!cpu_is_omap3430())
	222	l \|= AUTOIDLE; /* enable auto idle */
8573e6a6	223	musb_writel(musb->mregs, OTG_SYSCONFIG, l);
550a7375	224
8573e6a6	225	l = musb_readl(musb->mregs, OTG_INTERFSEL);
de2e1b0c MM	226
	227	if (data->interface_type == MUSB_INTERFACE_UTMI) {
	228	/* OMAP4 uses Internal PHY GS70 which uses UTMI interface */
	229	l &= ~ULPI_12PIN; /* Disable ULPI */
	230	l \|= UTMI_8BIT; /* Enable UTMI */
	231	} else {
	232	l \|= ULPI_12PIN;
	233	}
	234
8573e6a6	235	musb_writel(musb->mregs, OTG_INTERFSEL, l);
550a7375 FB	236
	237	pr_debug("HS USB OTG: revision 0x%x, sysconfig 0x%02x, "
	238	"sysstatus 0x%x, intrfsel 0x%x, simenable 0x%x\n",
8573e6a6 FB	239	musb_readl(musb->mregs, OTG_REVISION),
	240	musb_readl(musb->mregs, OTG_SYSCONFIG),
	241	musb_readl(musb->mregs, OTG_SYSSTATUS),
	242	musb_readl(musb->mregs, OTG_INTERFSEL),
	243	musb_readl(musb->mregs, OTG_SIMENABLE));
550a7375	244
550a7375	245	if (is_host_enabled(musb))
743411b3	246	musb->board_set_vbus = omap2430_musb_set_vbus;
550a7375 FB	247
	248	setup_timer(&musb_idle_timer, musb_do_idle, (unsigned long) musb);
	249
	250	return 0;
	251	}
	252
49635141	253	static void omap2430_save_context(struct musb *musb)
4f712e01	254	{
49635141 FB	255	musb->context.otg_sysconfig = musb_readl(musb->mregs, OTG_SYSCONFIG);
49635141 FB	256	musb->context.otg_forcestandby = musb_readl(musb->mregs, OTG_FORCESTDBY);
4f712e01 AKG	257	}
4f712e01 AKG	258
49635141	259	static void omap2430_restore_context(struct musb *musb)
4f712e01	260	{
49635141 FB	261	musb_writel(musb->mregs, OTG_SYSCONFIG, musb->context.otg_sysconfig);
49635141 FB	262	musb_writel(musb->mregs, OTG_FORCESTDBY, musb->context.otg_forcestandby);
4f712e01	263	}
4f712e01	264
743411b3	265	static int omap2430_musb_suspend(struct musb *musb)
550a7375 FB	266	{
	267	u32 l;
	268
550a7375	269	/* in any role */
8573e6a6	270	l = musb_readl(musb->mregs, OTG_FORCESTDBY);
550a7375	271	l \|= ENABLEFORCE; /* enable MSTANDBY */
8573e6a6	272	musb_writel(musb->mregs, OTG_FORCESTDBY, l);
550a7375	273
8573e6a6	274	l = musb_readl(musb->mregs, OTG_SYSCONFIG);
550a7375	275	l \|= ENABLEWAKEUP; /* enable wakeup */
8573e6a6	276	musb_writel(musb->mregs, OTG_SYSCONFIG, l);
550a7375	277
49635141 FB	278	omap2430_save_context(musb);
49635141 FB	279
84e250ff	280	otg_set_suspend(musb->xceiv, 1);
550a7375	281
550a7375 FB	282	return 0;
	283	}
	284
743411b3	285	static int omap2430_musb_resume(struct musb *musb)
550a7375 FB	286	{
	287	u32 l;
	288
84e250ff	289	otg_set_suspend(musb->xceiv, 0);
550a7375	290
49635141 FB	291	omap2430_restore_context(musb);
49635141 FB	292
8573e6a6	293	l = musb_readl(musb->mregs, OTG_SYSCONFIG);
550a7375	294	l &= ~ENABLEWAKEUP; /* disable wakeup */
8573e6a6	295	musb_writel(musb->mregs, OTG_SYSCONFIG, l);
550a7375	296
8573e6a6	297	l = musb_readl(musb->mregs, OTG_FORCESTDBY);
550a7375	298	l &= ~ENABLEFORCE; /* disable MSTANDBY */
8573e6a6	299	musb_writel(musb->mregs, OTG_FORCESTDBY, l);
550a7375 FB	300
	301	return 0;
	302	}
	303
743411b3	304	static int omap2430_musb_exit(struct musb *musb)
550a7375 FB	305	{
550a7375 FB	306
743411b3	307	omap2430_musb_suspend(musb);
550a7375	308
f4053874	309	otg_put_transceiver(musb->xceiv);
550a7375 FB	310	return 0;
550a7375 FB	311	}
743411b3	312
f7ec9437	313	static const struct musb_platform_ops omap2430_ops = {
743411b3 FB	314	.init = omap2430_musb_init,
	315	.exit = omap2430_musb_exit,
	316
	317	.suspend = omap2430_musb_suspend,
	318	.resume = omap2430_musb_resume,
	319
743411b3 FB	320	.set_mode = omap2430_musb_set_mode,
	321	.try_idle = omap2430_musb_try_idle,
	322
	323	.set_vbus = omap2430_musb_set_vbus,
	324	};
dc09886b FB	325
	326	static u64 omap2430_dmamask = DMA_BIT_MASK(32);
	327
	328	static int __init omap2430_probe(struct platform_device *pdev)
	329	{
	330	struct musb_hdrc_platform_data *pdata = pdev->dev.platform_data;
	331	struct platform_device *musb;
a3cee12a	332	struct omap2430_glue *glue;
03491761	333	struct clk *clk;
dc09886b FB	334
	335	int ret = -ENOMEM;
	336
a3cee12a FB	337	glue = kzalloc(sizeof(*glue), GFP_KERNEL);
	338	if (!glue) {
	339	dev_err(&pdev->dev, "failed to allocate glue context\n");
	340	goto err0;
	341	}
	342
dc09886b FB	343	musb = platform_device_alloc("musb-hdrc", -1);
	344	if (!musb) {
	345	dev_err(&pdev->dev, "failed to allocate musb device\n");
a3cee12a	346	goto err1;
dc09886b FB	347	}
dc09886b FB	348
03491761 FB	349	clk = clk_get(&pdev->dev, "ick");
	350	if (IS_ERR(clk)) {
	351	dev_err(&pdev->dev, "failed to get clock\n");
	352	ret = PTR_ERR(clk);
	353	goto err2;
	354	}
	355
	356	ret = clk_enable(clk);
	357	if (ret) {
	358	dev_err(&pdev->dev, "failed to enable clock\n");
	359	goto err3;
	360	}
	361
dc09886b FB	362	musb->dev.parent = &pdev->dev;
	363	musb->dev.dma_mask = &omap2430_dmamask;
	364	musb->dev.coherent_dma_mask = omap2430_dmamask;
	365
a3cee12a FB	366	glue->dev = &pdev->dev;
a3cee12a FB	367	glue->musb = musb;
03491761	368	glue->clk = clk;
a3cee12a	369
f7ec9437 FB	370	pdata->platform_ops = &omap2430_ops;
f7ec9437 FB	371
a3cee12a	372	platform_set_drvdata(pdev, glue);
dc09886b FB	373
	374	ret = platform_device_add_resources(musb, pdev->resource,
	375	pdev->num_resources);
	376	if (ret) {
	377	dev_err(&pdev->dev, "failed to add resources\n");
03491761	378	goto err4;
dc09886b FB	379	}
	380
	381	ret = platform_device_add_data(musb, pdata, sizeof(*pdata));
	382	if (ret) {
	383	dev_err(&pdev->dev, "failed to add platform_data\n");
03491761	384	goto err4;
dc09886b FB	385	}
	386
	387	ret = platform_device_add(musb);
	388	if (ret) {
	389	dev_err(&pdev->dev, "failed to register musb device\n");
03491761	390	goto err4;
dc09886b FB	391	}
	392
	393	return 0;
	394
03491761 FB	395	err4:
	396	clk_disable(clk);
	397
	398	err3:
	399	clk_put(clk);
	400
a3cee12a	401	err2:
dc09886b FB	402	platform_device_put(musb);
dc09886b FB	403
a3cee12a FB	404	err1:
	405	kfree(glue);
	406
dc09886b FB	407	err0:
	408	return ret;
	409	}
	410
	411	static int __exit omap2430_remove(struct platform_device *pdev)
	412	{
a3cee12a	413	struct omap2430_glue *glue = platform_get_drvdata(pdev);
dc09886b	414
a3cee12a FB	415	platform_device_del(glue->musb);
a3cee12a FB	416	platform_device_put(glue->musb);
03491761 FB	417	clk_disable(glue->clk);
03491761 FB	418	clk_put(glue->clk);
a3cee12a	419	kfree(glue);
dc09886b FB	420
	421	return 0;
	422	}
	423
	424	static struct platform_driver omap2430_driver = {
	425	.remove = __exit_p(omap2430_remove),
	426	.driver = {
	427	.name = "musb-omap2430",
	428	},
	429	};
	430
	431	MODULE_DESCRIPTION("OMAP2PLUS MUSB Glue Layer");
	432	MODULE_AUTHOR("Felipe Balbi <balbi@ti.com>");
	433	MODULE_LICENSE("GPL v2");
	434
	435	static int __init omap2430_init(void)
	436	{
	437	return platform_driver_probe(&omap2430_driver, omap2430_probe);
	438	}
	439	subsys_initcall(omap2430_init);
	440
	441	static void __exit omap2430_exit(void)
	442	{
	443	platform_driver_unregister(&omap2430_driver);
	444	}
	445	module_exit(omap2430_exit);