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Commit | Line | Data |
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6515b203 FB |
1 | /* |
2 | * ACPI implementation | |
5fafdf24 | 3 | * |
6515b203 | 4 | * Copyright (c) 2006 Fabrice Bellard |
5fafdf24 | 5 | * |
6515b203 FB |
6 | * This library is free software; you can redistribute it and/or |
7 | * modify it under the terms of the GNU Lesser General Public | |
61f3c91a | 8 | * License version 2.1 as published by the Free Software Foundation. |
6515b203 FB |
9 | * |
10 | * This library is distributed in the hope that it will be useful, | |
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
13 | * Lesser General Public License for more details. | |
14 | * | |
15 | * You should have received a copy of the GNU Lesser General Public | |
8167ee88 | 16 | * License along with this library; if not, see <http://www.gnu.org/licenses/> |
6b620ca3 PB |
17 | * |
18 | * Contributions after 2012-01-13 are licensed under the terms of the | |
19 | * GNU GPL, version 2 or (at your option) any later version. | |
6515b203 | 20 | */ |
e688df6b | 21 | |
b6a0aa05 | 22 | #include "qemu/osdep.h" |
64552b6b | 23 | #include "hw/irq.h" |
0d09e41a | 24 | #include "hw/acpi/acpi.h" |
e3845e7c | 25 | #include "hw/nvram/fw_cfg.h" |
0c764a9d | 26 | #include "qemu/config-file.h" |
e688df6b | 27 | #include "qapi/error.h" |
0c764a9d | 28 | #include "qapi/opts-visitor.h" |
9af23989 | 29 | #include "qapi/qapi-events-run-state.h" |
27c9188f | 30 | #include "qapi/qapi-visit-acpi.h" |
2ab4b135 | 31 | #include "qemu/error-report.h" |
0b8fa32f | 32 | #include "qemu/module.h" |
922a01a0 | 33 | #include "qemu/option.h" |
54d31236 | 34 | #include "sysemu/runstate.h" |
6515b203 | 35 | |
104bf02e MT |
36 | struct acpi_table_header { |
37 | uint16_t _length; /* our length, not actual part of the hdr */ | |
e980f2bf | 38 | /* allows easier parsing for fw_cfg clients */ |
9cbb8eca PMD |
39 | char sig[4] |
40 | QEMU_NONSTRING; /* ACPI signature (4 ASCII characters) */ | |
8a92ea2f AL |
41 | uint32_t length; /* Length of table, in bytes, including header */ |
42 | uint8_t revision; /* ACPI Specification minor version # */ | |
43 | uint8_t checksum; /* To make sum of entire table == 0 */ | |
9cbb8eca PMD |
44 | char oem_id[6] |
45 | QEMU_NONSTRING; /* OEM identification */ | |
46 | char oem_table_id[8] | |
47 | QEMU_NONSTRING; /* OEM table identification */ | |
8a92ea2f | 48 | uint32_t oem_revision; /* OEM revision number */ |
9cbb8eca PMD |
49 | char asl_compiler_id[4] |
50 | QEMU_NONSTRING; /* ASL compiler vendor ID */ | |
8a92ea2f | 51 | uint32_t asl_compiler_revision; /* ASL compiler revision number */ |
541dc0d4 | 52 | } QEMU_PACKED; |
8a92ea2f | 53 | |
104bf02e MT |
54 | #define ACPI_TABLE_HDR_SIZE sizeof(struct acpi_table_header) |
55 | #define ACPI_TABLE_PFX_SIZE sizeof(uint16_t) /* size of the extra prefix */ | |
56 | ||
e980f2bf | 57 | static const char unsigned dfl_hdr[ACPI_TABLE_HDR_SIZE - ACPI_TABLE_PFX_SIZE] = |
104bf02e MT |
58 | "QEMU\0\0\0\0\1\0" /* sig (4), len(4), revno (1), csum (1) */ |
59 | "QEMUQEQEMUQEMU\1\0\0\0" /* OEM id (6), table (8), revno (4) */ | |
60 | "QEMU\1\0\0\0" /* ASL compiler ID (4), version (4) */ | |
61 | ; | |
62 | ||
cb88a4ea | 63 | char unsigned *acpi_tables; |
8a92ea2f AL |
64 | size_t acpi_tables_len; |
65 | ||
0c764a9d LE |
66 | static QemuOptsList qemu_acpi_opts = { |
67 | .name = "acpi", | |
68 | .implied_opt_name = "data", | |
69 | .head = QTAILQ_HEAD_INITIALIZER(qemu_acpi_opts.head), | |
70 | .desc = { { 0 } } /* validated with OptsVisitor */ | |
71 | }; | |
72 | ||
73 | static void acpi_register_config(void) | |
74 | { | |
75 | qemu_add_opts(&qemu_acpi_opts); | |
76 | } | |
77 | ||
34294e2f | 78 | opts_init(acpi_register_config); |
0c764a9d | 79 | |
8a92ea2f AL |
80 | static int acpi_checksum(const uint8_t *data, int len) |
81 | { | |
82 | int sum, i; | |
83 | sum = 0; | |
104bf02e | 84 | for (i = 0; i < len; i++) { |
8a92ea2f | 85 | sum += data[i]; |
104bf02e | 86 | } |
8a92ea2f AL |
87 | return (-sum) & 0xff; |
88 | } | |
89 | ||
e980f2bf LE |
90 | |
91 | /* Install a copy of the ACPI table specified in @blob. | |
92 | * | |
93 | * If @has_header is set, @blob starts with the System Description Table Header | |
94 | * structure. Otherwise, "dfl_hdr" is prepended. In any case, each header field | |
95 | * is optionally overwritten from @hdrs. | |
96 | * | |
97 | * It is valid to call this function with | |
98 | * (@blob == NULL && bloblen == 0 && !has_header). | |
99 | * | |
100 | * @hdrs->file and @hdrs->data are ignored. | |
101 | * | |
102 | * SIZE_MAX is considered "infinity" in this function. | |
103 | * | |
104 | * The number of tables that can be installed is not limited, but the 16-bit | |
105 | * counter at the beginning of "acpi_tables" wraps around after UINT16_MAX. | |
106 | */ | |
107 | static void acpi_table_install(const char unsigned *blob, size_t bloblen, | |
108 | bool has_header, | |
109 | const struct AcpiTableOptions *hdrs, | |
110 | Error **errp) | |
111 | { | |
112 | size_t body_start; | |
113 | const char unsigned *hdr_src; | |
114 | size_t body_size, acpi_payload_size; | |
115 | struct acpi_table_header *ext_hdr; | |
116 | unsigned changed_fields; | |
117 | ||
118 | /* Calculate where the ACPI table body starts within the blob, plus where | |
119 | * to copy the ACPI table header from. | |
120 | */ | |
121 | if (has_header) { | |
122 | /* _length | ACPI header in blob | blob body | |
123 | * ^^^^^^^^^^^^^^^^^^^ ^^^^^^^^^^^^^^^^^^^ ^^^^^^^^^ | |
124 | * ACPI_TABLE_PFX_SIZE sizeof dfl_hdr body_size | |
125 | * == body_start | |
126 | * | |
127 | * ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ | |
128 | * acpi_payload_size == bloblen | |
129 | */ | |
130 | body_start = sizeof dfl_hdr; | |
131 | ||
132 | if (bloblen < body_start) { | |
133 | error_setg(errp, "ACPI table claiming to have header is too " | |
134 | "short, available: %zu, expected: %zu", bloblen, | |
135 | body_start); | |
136 | return; | |
137 | } | |
138 | hdr_src = blob; | |
139 | } else { | |
140 | /* _length | ACPI header in template | blob body | |
141 | * ^^^^^^^^^^^^^^^^^^^ ^^^^^^^^^^^^^^^^^^^^^^^ ^^^^^^^^^^ | |
142 | * ACPI_TABLE_PFX_SIZE sizeof dfl_hdr body_size | |
143 | * == bloblen | |
144 | * | |
145 | * ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ | |
146 | * acpi_payload_size | |
147 | */ | |
148 | body_start = 0; | |
149 | hdr_src = dfl_hdr; | |
150 | } | |
151 | body_size = bloblen - body_start; | |
152 | acpi_payload_size = sizeof dfl_hdr + body_size; | |
153 | ||
154 | if (acpi_payload_size > UINT16_MAX) { | |
155 | error_setg(errp, "ACPI table too big, requested: %zu, max: %u", | |
156 | acpi_payload_size, (unsigned)UINT16_MAX); | |
157 | return; | |
158 | } | |
159 | ||
160 | /* We won't fail from here on. Initialize / extend the globals. */ | |
161 | if (acpi_tables == NULL) { | |
162 | acpi_tables_len = sizeof(uint16_t); | |
163 | acpi_tables = g_malloc0(acpi_tables_len); | |
164 | } | |
165 | ||
166 | acpi_tables = g_realloc(acpi_tables, acpi_tables_len + | |
167 | ACPI_TABLE_PFX_SIZE + | |
168 | sizeof dfl_hdr + body_size); | |
169 | ||
170 | ext_hdr = (struct acpi_table_header *)(acpi_tables + acpi_tables_len); | |
171 | acpi_tables_len += ACPI_TABLE_PFX_SIZE; | |
172 | ||
173 | memcpy(acpi_tables + acpi_tables_len, hdr_src, sizeof dfl_hdr); | |
174 | acpi_tables_len += sizeof dfl_hdr; | |
175 | ||
176 | if (blob != NULL) { | |
177 | memcpy(acpi_tables + acpi_tables_len, blob + body_start, body_size); | |
178 | acpi_tables_len += body_size; | |
179 | } | |
180 | ||
181 | /* increase number of tables */ | |
c65e5de9 | 182 | stw_le_p(acpi_tables, lduw_le_p(acpi_tables) + 1u); |
e980f2bf LE |
183 | |
184 | /* Update the header fields. The strings need not be NUL-terminated. */ | |
185 | changed_fields = 0; | |
186 | ext_hdr->_length = cpu_to_le16(acpi_payload_size); | |
187 | ||
188 | if (hdrs->has_sig) { | |
189 | strncpy(ext_hdr->sig, hdrs->sig, sizeof ext_hdr->sig); | |
190 | ++changed_fields; | |
191 | } | |
192 | ||
193 | if (has_header && le32_to_cpu(ext_hdr->length) != acpi_payload_size) { | |
8297be80 AF |
194 | warn_report("ACPI table has wrong length, header says " |
195 | "%" PRIu32 ", actual size %zu bytes", | |
196 | le32_to_cpu(ext_hdr->length), acpi_payload_size); | |
e980f2bf LE |
197 | } |
198 | ext_hdr->length = cpu_to_le32(acpi_payload_size); | |
199 | ||
200 | if (hdrs->has_rev) { | |
201 | ext_hdr->revision = hdrs->rev; | |
202 | ++changed_fields; | |
203 | } | |
204 | ||
205 | ext_hdr->checksum = 0; | |
206 | ||
207 | if (hdrs->has_oem_id) { | |
208 | strncpy(ext_hdr->oem_id, hdrs->oem_id, sizeof ext_hdr->oem_id); | |
209 | ++changed_fields; | |
210 | } | |
211 | if (hdrs->has_oem_table_id) { | |
212 | strncpy(ext_hdr->oem_table_id, hdrs->oem_table_id, | |
213 | sizeof ext_hdr->oem_table_id); | |
214 | ++changed_fields; | |
215 | } | |
216 | if (hdrs->has_oem_rev) { | |
217 | ext_hdr->oem_revision = cpu_to_le32(hdrs->oem_rev); | |
218 | ++changed_fields; | |
219 | } | |
220 | if (hdrs->has_asl_compiler_id) { | |
221 | strncpy(ext_hdr->asl_compiler_id, hdrs->asl_compiler_id, | |
222 | sizeof ext_hdr->asl_compiler_id); | |
223 | ++changed_fields; | |
224 | } | |
225 | if (hdrs->has_asl_compiler_rev) { | |
226 | ext_hdr->asl_compiler_revision = cpu_to_le32(hdrs->asl_compiler_rev); | |
227 | ++changed_fields; | |
228 | } | |
229 | ||
230 | if (!has_header && changed_fields == 0) { | |
2ab4b135 | 231 | warn_report("ACPI table: no headers are specified"); |
e980f2bf LE |
232 | } |
233 | ||
234 | /* recalculate checksum */ | |
235 | ext_hdr->checksum = acpi_checksum((const char unsigned *)ext_hdr + | |
236 | ACPI_TABLE_PFX_SIZE, acpi_payload_size); | |
237 | } | |
238 | ||
23084327 | 239 | void acpi_table_add(const QemuOpts *opts, Error **errp) |
8a92ea2f | 240 | { |
0c764a9d | 241 | AcpiTableOptions *hdrs = NULL; |
0c764a9d LE |
242 | char **pathnames = NULL; |
243 | char **cur; | |
e980f2bf LE |
244 | size_t bloblen = 0; |
245 | char unsigned *blob = NULL; | |
8a92ea2f | 246 | |
0c764a9d | 247 | { |
09204eac | 248 | Visitor *v; |
0c764a9d | 249 | |
09204eac | 250 | v = opts_visitor_new(opts); |
b11a093c | 251 | visit_type_AcpiTableOptions(v, NULL, &hdrs, errp); |
09204eac | 252 | visit_free(v); |
0c764a9d LE |
253 | } |
254 | ||
b11a093c | 255 | if (!hdrs) { |
0c764a9d LE |
256 | goto out; |
257 | } | |
258 | if (hdrs->has_file == hdrs->has_data) { | |
dcfe4805 | 259 | error_setg(errp, "'-acpitable' requires one of 'data' or 'file'"); |
0c764a9d LE |
260 | goto out; |
261 | } | |
0c764a9d LE |
262 | |
263 | pathnames = g_strsplit(hdrs->has_file ? hdrs->file : hdrs->data, ":", 0); | |
264 | if (pathnames == NULL || pathnames[0] == NULL) { | |
dcfe4805 | 265 | error_setg(errp, "'-acpitable' requires at least one pathname"); |
445d9cae | 266 | goto out; |
104bf02e MT |
267 | } |
268 | ||
104bf02e | 269 | /* now read in the data files, reallocating buffer as needed */ |
0c764a9d LE |
270 | for (cur = pathnames; *cur; ++cur) { |
271 | int fd = open(*cur, O_RDONLY | O_BINARY); | |
104bf02e MT |
272 | |
273 | if (fd < 0) { | |
dcfe4805 | 274 | error_setg(errp, "can't open file %s: %s", *cur, strerror(errno)); |
445d9cae | 275 | goto out; |
104bf02e MT |
276 | } |
277 | ||
278 | for (;;) { | |
cb88a4ea | 279 | char unsigned data[8192]; |
e980f2bf LE |
280 | ssize_t r; |
281 | ||
282 | r = read(fd, data, sizeof data); | |
104bf02e MT |
283 | if (r == 0) { |
284 | break; | |
285 | } else if (r > 0) { | |
e980f2bf LE |
286 | blob = g_realloc(blob, bloblen + r); |
287 | memcpy(blob + bloblen, data, r); | |
288 | bloblen += r; | |
104bf02e | 289 | } else if (errno != EINTR) { |
dcfe4805 MA |
290 | error_setg(errp, "can't read file %s: %s", *cur, |
291 | strerror(errno)); | |
104bf02e | 292 | close(fd); |
445d9cae | 293 | goto out; |
104bf02e MT |
294 | } |
295 | } | |
296 | ||
297 | close(fd); | |
298 | } | |
299 | ||
dcfe4805 | 300 | acpi_table_install(blob, bloblen, hdrs->has_file, hdrs, errp); |
104bf02e | 301 | |
445d9cae | 302 | out: |
e980f2bf | 303 | g_free(blob); |
0c764a9d | 304 | g_strfreev(pathnames); |
96a1616c | 305 | qapi_free_AcpiTableOptions(hdrs); |
8a92ea2f | 306 | } |
a54d41a8 | 307 | |
60de1163 MT |
308 | unsigned acpi_table_len(void *current) |
309 | { | |
310 | struct acpi_table_header *hdr = current - sizeof(hdr->_length); | |
311 | return hdr->_length; | |
312 | } | |
313 | ||
314 | static | |
315 | void *acpi_table_hdr(void *h) | |
316 | { | |
317 | struct acpi_table_header *hdr = h; | |
318 | return &hdr->sig; | |
319 | } | |
320 | ||
321 | uint8_t *acpi_table_first(void) | |
322 | { | |
7d9b68ac | 323 | if (!acpi_tables) { |
60de1163 MT |
324 | return NULL; |
325 | } | |
326 | return acpi_table_hdr(acpi_tables + ACPI_TABLE_PFX_SIZE); | |
327 | } | |
328 | ||
329 | uint8_t *acpi_table_next(uint8_t *current) | |
330 | { | |
331 | uint8_t *next = current + acpi_table_len(current); | |
332 | ||
333 | if (next - acpi_tables >= acpi_tables_len) { | |
334 | return NULL; | |
335 | } else { | |
336 | return acpi_table_hdr(next); | |
337 | } | |
338 | } | |
339 | ||
88594e4f LE |
340 | int acpi_get_slic_oem(AcpiSlicOem *oem) |
341 | { | |
342 | uint8_t *u; | |
343 | ||
344 | for (u = acpi_table_first(); u; u = acpi_table_next(u)) { | |
345 | struct acpi_table_header *hdr = (void *)(u - sizeof(hdr->_length)); | |
346 | ||
347 | if (memcmp(hdr->sig, "SLIC", 4) == 0) { | |
8cdb99af IM |
348 | oem->id = g_strndup(hdr->oem_id, 6); |
349 | oem->table_id = g_strndup(hdr->oem_table_id, 8); | |
88594e4f LE |
350 | return 0; |
351 | } | |
352 | } | |
353 | return -1; | |
354 | } | |
355 | ||
da98c8eb GH |
356 | static void acpi_notify_wakeup(Notifier *notifier, void *data) |
357 | { | |
358 | ACPIREGS *ar = container_of(notifier, ACPIREGS, wakeup); | |
359 | WakeupReason *reason = data; | |
360 | ||
361 | switch (*reason) { | |
62aeb0f7 GH |
362 | case QEMU_WAKEUP_REASON_RTC: |
363 | ar->pm1.evt.sts |= | |
364 | (ACPI_BITMASK_WAKE_STATUS | ACPI_BITMASK_RT_CLOCK_STATUS); | |
365 | break; | |
6595abc0 GH |
366 | case QEMU_WAKEUP_REASON_PMTIMER: |
367 | ar->pm1.evt.sts |= | |
368 | (ACPI_BITMASK_WAKE_STATUS | ACPI_BITMASK_TIMER_STATUS); | |
369 | break; | |
da98c8eb | 370 | case QEMU_WAKEUP_REASON_OTHER: |
da98c8eb GH |
371 | /* ACPI_BITMASK_WAKE_STATUS should be set on resume. |
372 | Pretend that resume was caused by power button */ | |
373 | ar->pm1.evt.sts |= | |
374 | (ACPI_BITMASK_WAKE_STATUS | ACPI_BITMASK_POWER_BUTTON_STATUS); | |
375 | break; | |
4bc78a87 LJ |
376 | default: |
377 | break; | |
da98c8eb GH |
378 | } |
379 | } | |
380 | ||
04dc308f | 381 | /* ACPI PM1a EVT */ |
2886be1b | 382 | uint16_t acpi_pm1_evt_get_sts(ACPIREGS *ar) |
04dc308f | 383 | { |
3ef0eab1 PD |
384 | /* Compare ns-clock, not PM timer ticks, because |
385 | acpi_pm_tmr_update function uses ns for setting the timer. */ | |
386 | int64_t d = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL); | |
387 | if (d >= muldiv64(ar->tmr.overflow_time, | |
73bcb24d | 388 | NANOSECONDS_PER_SECOND, PM_TIMER_FREQUENCY)) { |
355bf2e5 | 389 | ar->pm1.evt.sts |= ACPI_BITMASK_TIMER_STATUS; |
04dc308f | 390 | } |
355bf2e5 | 391 | return ar->pm1.evt.sts; |
04dc308f IY |
392 | } |
393 | ||
b5a7c024 | 394 | static void acpi_pm1_evt_write_sts(ACPIREGS *ar, uint16_t val) |
04dc308f | 395 | { |
2886be1b | 396 | uint16_t pm1_sts = acpi_pm1_evt_get_sts(ar); |
04dc308f IY |
397 | if (pm1_sts & val & ACPI_BITMASK_TIMER_STATUS) { |
398 | /* if TMRSTS is reset, then compute the new overflow time */ | |
355bf2e5 | 399 | acpi_pm_tmr_calc_overflow_time(ar); |
04dc308f | 400 | } |
355bf2e5 | 401 | ar->pm1.evt.sts &= ~val; |
04dc308f IY |
402 | } |
403 | ||
b5a7c024 | 404 | static void acpi_pm1_evt_write_en(ACPIREGS *ar, uint16_t val) |
8283c4f5 GH |
405 | { |
406 | ar->pm1.evt.en = val; | |
62aeb0f7 GH |
407 | qemu_system_wakeup_enable(QEMU_WAKEUP_REASON_RTC, |
408 | val & ACPI_BITMASK_RT_CLOCK_ENABLE); | |
6595abc0 GH |
409 | qemu_system_wakeup_enable(QEMU_WAKEUP_REASON_PMTIMER, |
410 | val & ACPI_BITMASK_TIMER_ENABLE); | |
8283c4f5 GH |
411 | } |
412 | ||
355bf2e5 | 413 | void acpi_pm1_evt_power_down(ACPIREGS *ar) |
04dc308f | 414 | { |
355bf2e5 GH |
415 | if (ar->pm1.evt.en & ACPI_BITMASK_POWER_BUTTON_ENABLE) { |
416 | ar->pm1.evt.sts |= ACPI_BITMASK_POWER_BUTTON_STATUS; | |
417 | ar->tmr.update_sci(ar); | |
04dc308f IY |
418 | } |
419 | } | |
420 | ||
355bf2e5 | 421 | void acpi_pm1_evt_reset(ACPIREGS *ar) |
04dc308f | 422 | { |
355bf2e5 GH |
423 | ar->pm1.evt.sts = 0; |
424 | ar->pm1.evt.en = 0; | |
62aeb0f7 | 425 | qemu_system_wakeup_enable(QEMU_WAKEUP_REASON_RTC, 0); |
6595abc0 | 426 | qemu_system_wakeup_enable(QEMU_WAKEUP_REASON_PMTIMER, 0); |
04dc308f IY |
427 | } |
428 | ||
b5a7c024 GH |
429 | static uint64_t acpi_pm_evt_read(void *opaque, hwaddr addr, unsigned width) |
430 | { | |
431 | ACPIREGS *ar = opaque; | |
432 | switch (addr) { | |
433 | case 0: | |
434 | return acpi_pm1_evt_get_sts(ar); | |
435 | case 2: | |
436 | return ar->pm1.evt.en; | |
437 | default: | |
438 | return 0; | |
439 | } | |
440 | } | |
441 | ||
442 | static void acpi_pm_evt_write(void *opaque, hwaddr addr, uint64_t val, | |
443 | unsigned width) | |
444 | { | |
445 | ACPIREGS *ar = opaque; | |
446 | switch (addr) { | |
447 | case 0: | |
448 | acpi_pm1_evt_write_sts(ar, val); | |
449 | ar->pm1.evt.update_sci(ar); | |
450 | break; | |
451 | case 2: | |
452 | acpi_pm1_evt_write_en(ar, val); | |
453 | ar->pm1.evt.update_sci(ar); | |
454 | break; | |
455 | } | |
456 | } | |
457 | ||
458 | static const MemoryRegionOps acpi_pm_evt_ops = { | |
459 | .read = acpi_pm_evt_read, | |
460 | .write = acpi_pm_evt_write, | |
dba04c34 MT |
461 | .impl.min_access_size = 2, |
462 | .valid.min_access_size = 1, | |
b5a7c024 GH |
463 | .valid.max_access_size = 2, |
464 | .endianness = DEVICE_LITTLE_ENDIAN, | |
465 | }; | |
466 | ||
467 | void acpi_pm1_evt_init(ACPIREGS *ar, acpi_update_sci_fn update_sci, | |
468 | MemoryRegion *parent) | |
469 | { | |
470 | ar->pm1.evt.update_sci = update_sci; | |
64bde0f3 PB |
471 | memory_region_init_io(&ar->pm1.evt.io, memory_region_owner(parent), |
472 | &acpi_pm_evt_ops, ar, "acpi-evt", 4); | |
b5a7c024 GH |
473 | memory_region_add_subregion(parent, 0, &ar->pm1.evt.io); |
474 | } | |
475 | ||
a54d41a8 | 476 | /* ACPI PM_TMR */ |
355bf2e5 | 477 | void acpi_pm_tmr_update(ACPIREGS *ar, bool enable) |
a54d41a8 IY |
478 | { |
479 | int64_t expire_time; | |
480 | ||
481 | /* schedule a timer interruption if needed */ | |
482 | if (enable) { | |
73bcb24d | 483 | expire_time = muldiv64(ar->tmr.overflow_time, NANOSECONDS_PER_SECOND, |
a54d41a8 | 484 | PM_TIMER_FREQUENCY); |
bc72ad67 | 485 | timer_mod(ar->tmr.timer, expire_time); |
a54d41a8 | 486 | } else { |
bc72ad67 | 487 | timer_del(ar->tmr.timer); |
a54d41a8 IY |
488 | } |
489 | } | |
490 | ||
87776ab7 PB |
491 | static inline int64_t acpi_pm_tmr_get_clock(void) |
492 | { | |
493 | return muldiv64(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL), PM_TIMER_FREQUENCY, | |
494 | NANOSECONDS_PER_SECOND); | |
495 | } | |
496 | ||
355bf2e5 | 497 | void acpi_pm_tmr_calc_overflow_time(ACPIREGS *ar) |
a54d41a8 IY |
498 | { |
499 | int64_t d = acpi_pm_tmr_get_clock(); | |
355bf2e5 | 500 | ar->tmr.overflow_time = (d + 0x800000LL) & ~0x7fffffLL; |
a54d41a8 IY |
501 | } |
502 | ||
77d58b1e | 503 | static uint32_t acpi_pm_tmr_get(ACPIREGS *ar) |
a54d41a8 | 504 | { |
3a93113a | 505 | uint32_t d = acpi_pm_tmr_get_clock(); |
a54d41a8 IY |
506 | return d & 0xffffff; |
507 | } | |
508 | ||
509 | static void acpi_pm_tmr_timer(void *opaque) | |
510 | { | |
355bf2e5 | 511 | ACPIREGS *ar = opaque; |
fb064112 DHB |
512 | |
513 | qemu_system_wakeup_request(QEMU_WAKEUP_REASON_PMTIMER, NULL); | |
355bf2e5 | 514 | ar->tmr.update_sci(ar); |
a54d41a8 IY |
515 | } |
516 | ||
77d58b1e GH |
517 | static uint64_t acpi_pm_tmr_read(void *opaque, hwaddr addr, unsigned width) |
518 | { | |
519 | return acpi_pm_tmr_get(opaque); | |
520 | } | |
521 | ||
2d3b9895 GH |
522 | static void acpi_pm_tmr_write(void *opaque, hwaddr addr, uint64_t val, |
523 | unsigned width) | |
524 | { | |
525 | /* nothing */ | |
526 | } | |
527 | ||
77d58b1e GH |
528 | static const MemoryRegionOps acpi_pm_tmr_ops = { |
529 | .read = acpi_pm_tmr_read, | |
2d3b9895 | 530 | .write = acpi_pm_tmr_write, |
dba04c34 MT |
531 | .impl.min_access_size = 4, |
532 | .valid.min_access_size = 1, | |
77d58b1e GH |
533 | .valid.max_access_size = 4, |
534 | .endianness = DEVICE_LITTLE_ENDIAN, | |
535 | }; | |
536 | ||
537 | void acpi_pm_tmr_init(ACPIREGS *ar, acpi_update_sci_fn update_sci, | |
538 | MemoryRegion *parent) | |
a54d41a8 | 539 | { |
355bf2e5 | 540 | ar->tmr.update_sci = update_sci; |
bc72ad67 | 541 | ar->tmr.timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, acpi_pm_tmr_timer, ar); |
64bde0f3 PB |
542 | memory_region_init_io(&ar->tmr.io, memory_region_owner(parent), |
543 | &acpi_pm_tmr_ops, ar, "acpi-tmr", 4); | |
77d58b1e | 544 | memory_region_add_subregion(parent, 8, &ar->tmr.io); |
a54d41a8 IY |
545 | } |
546 | ||
355bf2e5 | 547 | void acpi_pm_tmr_reset(ACPIREGS *ar) |
a54d41a8 | 548 | { |
355bf2e5 | 549 | ar->tmr.overflow_time = 0; |
bc72ad67 | 550 | timer_del(ar->tmr.timer); |
a54d41a8 | 551 | } |
eaba51c5 IY |
552 | |
553 | /* ACPI PM1aCNT */ | |
afafe4bb | 554 | static void acpi_pm1_cnt_write(ACPIREGS *ar, uint16_t val) |
eaba51c5 | 555 | { |
355bf2e5 | 556 | ar->pm1.cnt.cnt = val & ~(ACPI_BITMASK_SLEEP_ENABLE); |
eaba51c5 IY |
557 | |
558 | if (val & ACPI_BITMASK_SLEEP_ENABLE) { | |
559 | /* change suspend type */ | |
560 | uint16_t sus_typ = (val >> 10) & 7; | |
4cbf31a8 | 561 | switch (sus_typ) { |
eaba51c5 | 562 | case 0: /* soft power off */ |
cf83f140 | 563 | qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN); |
eaba51c5 IY |
564 | break; |
565 | case 1: | |
da98c8eb GH |
566 | qemu_system_suspend_request(); |
567 | break; | |
eaba51c5 | 568 | default: |
afafe4bb | 569 | if (sus_typ == ar->pm1.cnt.s4_val) { /* S4 request */ |
3ab72385 | 570 | qapi_event_send_suspend_disk(); |
cf83f140 | 571 | qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN); |
459ae5ea | 572 | } |
eaba51c5 IY |
573 | break; |
574 | } | |
575 | } | |
576 | } | |
577 | ||
355bf2e5 | 578 | void acpi_pm1_cnt_update(ACPIREGS *ar, |
eaba51c5 IY |
579 | bool sci_enable, bool sci_disable) |
580 | { | |
581 | /* ACPI specs 3.0, 4.7.2.5 */ | |
6be8cf56 IY |
582 | if (ar->pm1.cnt.acpi_only) { |
583 | return; | |
584 | } | |
585 | ||
eaba51c5 | 586 | if (sci_enable) { |
355bf2e5 | 587 | ar->pm1.cnt.cnt |= ACPI_BITMASK_SCI_ENABLE; |
eaba51c5 | 588 | } else if (sci_disable) { |
355bf2e5 | 589 | ar->pm1.cnt.cnt &= ~ACPI_BITMASK_SCI_ENABLE; |
eaba51c5 IY |
590 | } |
591 | } | |
592 | ||
afafe4bb GH |
593 | static uint64_t acpi_pm_cnt_read(void *opaque, hwaddr addr, unsigned width) |
594 | { | |
595 | ACPIREGS *ar = opaque; | |
596 | return ar->pm1.cnt.cnt; | |
597 | } | |
598 | ||
599 | static void acpi_pm_cnt_write(void *opaque, hwaddr addr, uint64_t val, | |
600 | unsigned width) | |
601 | { | |
602 | acpi_pm1_cnt_write(opaque, val); | |
603 | } | |
604 | ||
605 | static const MemoryRegionOps acpi_pm_cnt_ops = { | |
606 | .read = acpi_pm_cnt_read, | |
607 | .write = acpi_pm_cnt_write, | |
dba04c34 MT |
608 | .impl.min_access_size = 2, |
609 | .valid.min_access_size = 1, | |
afafe4bb GH |
610 | .valid.max_access_size = 2, |
611 | .endianness = DEVICE_LITTLE_ENDIAN, | |
612 | }; | |
613 | ||
9a10bbb4 | 614 | void acpi_pm1_cnt_init(ACPIREGS *ar, MemoryRegion *parent, |
6be8cf56 IY |
615 | bool disable_s3, bool disable_s4, uint8_t s4_val, |
616 | bool acpi_only) | |
afafe4bb | 617 | { |
e3845e7c LE |
618 | FWCfgState *fw_cfg; |
619 | ||
560e6396 | 620 | ar->pm1.cnt.s4_val = s4_val; |
6be8cf56 | 621 | ar->pm1.cnt.acpi_only = acpi_only; |
afafe4bb GH |
622 | ar->wakeup.notify = acpi_notify_wakeup; |
623 | qemu_register_wakeup_notifier(&ar->wakeup); | |
46ea94ca DHB |
624 | |
625 | /* | |
626 | * Register wake-up support in QMP query-current-machine API | |
627 | */ | |
628 | qemu_register_wakeup_support(); | |
629 | ||
64bde0f3 PB |
630 | memory_region_init_io(&ar->pm1.cnt.io, memory_region_owner(parent), |
631 | &acpi_pm_cnt_ops, ar, "acpi-cnt", 2); | |
afafe4bb | 632 | memory_region_add_subregion(parent, 4, &ar->pm1.cnt.io); |
e3845e7c LE |
633 | |
634 | fw_cfg = fw_cfg_find(); | |
635 | if (fw_cfg) { | |
636 | uint8_t suspend[6] = {128, 0, 0, 129, 128, 128}; | |
637 | suspend[3] = 1 | ((!disable_s3) << 7); | |
638 | suspend[4] = s4_val | ((!disable_s4) << 7); | |
639 | ||
640 | fw_cfg_add_file(fw_cfg, "etc/system-states", g_memdup(suspend, 6), 6); | |
641 | } | |
afafe4bb GH |
642 | } |
643 | ||
355bf2e5 | 644 | void acpi_pm1_cnt_reset(ACPIREGS *ar) |
eaba51c5 | 645 | { |
355bf2e5 | 646 | ar->pm1.cnt.cnt = 0; |
6be8cf56 IY |
647 | if (ar->pm1.cnt.acpi_only) { |
648 | ar->pm1.cnt.cnt |= ACPI_BITMASK_SCI_ENABLE; | |
649 | } | |
eaba51c5 | 650 | } |
23910d3f IY |
651 | |
652 | /* ACPI GPE */ | |
355bf2e5 | 653 | void acpi_gpe_init(ACPIREGS *ar, uint8_t len) |
23910d3f | 654 | { |
355bf2e5 | 655 | ar->gpe.len = len; |
d9a3b33d MT |
656 | /* Only first len / 2 bytes are ever used, |
657 | * but the caller in ich9.c migrates full len bytes. | |
658 | * TODO: fix ich9.c and drop the extra allocation. | |
659 | */ | |
660 | ar->gpe.sts = g_malloc0(len); | |
661 | ar->gpe.en = g_malloc0(len); | |
23910d3f IY |
662 | } |
663 | ||
355bf2e5 | 664 | void acpi_gpe_reset(ACPIREGS *ar) |
23910d3f | 665 | { |
355bf2e5 GH |
666 | memset(ar->gpe.sts, 0, ar->gpe.len / 2); |
667 | memset(ar->gpe.en, 0, ar->gpe.len / 2); | |
23910d3f IY |
668 | } |
669 | ||
355bf2e5 | 670 | static uint8_t *acpi_gpe_ioport_get_ptr(ACPIREGS *ar, uint32_t addr) |
23910d3f IY |
671 | { |
672 | uint8_t *cur = NULL; | |
673 | ||
355bf2e5 GH |
674 | if (addr < ar->gpe.len / 2) { |
675 | cur = ar->gpe.sts + addr; | |
676 | } else if (addr < ar->gpe.len) { | |
677 | cur = ar->gpe.en + addr - ar->gpe.len / 2; | |
23910d3f IY |
678 | } else { |
679 | abort(); | |
680 | } | |
681 | ||
682 | return cur; | |
683 | } | |
684 | ||
355bf2e5 | 685 | void acpi_gpe_ioport_writeb(ACPIREGS *ar, uint32_t addr, uint32_t val) |
23910d3f IY |
686 | { |
687 | uint8_t *cur; | |
688 | ||
355bf2e5 GH |
689 | cur = acpi_gpe_ioport_get_ptr(ar, addr); |
690 | if (addr < ar->gpe.len / 2) { | |
23910d3f IY |
691 | /* GPE_STS */ |
692 | *cur = (*cur) & ~val; | |
355bf2e5 | 693 | } else if (addr < ar->gpe.len) { |
23910d3f IY |
694 | /* GPE_EN */ |
695 | *cur = val; | |
696 | } else { | |
697 | abort(); | |
698 | } | |
699 | } | |
700 | ||
355bf2e5 | 701 | uint32_t acpi_gpe_ioport_readb(ACPIREGS *ar, uint32_t addr) |
23910d3f IY |
702 | { |
703 | uint8_t *cur; | |
704 | uint32_t val; | |
705 | ||
355bf2e5 | 706 | cur = acpi_gpe_ioport_get_ptr(ar, addr); |
23910d3f IY |
707 | val = 0; |
708 | if (cur != NULL) { | |
709 | val = *cur; | |
710 | } | |
711 | ||
712 | return val; | |
713 | } | |
06313503 | 714 | |
ca9b46bc | 715 | void acpi_send_gpe_event(ACPIREGS *ar, qemu_irq irq, |
eaf23bf7 | 716 | AcpiEventStatusBits status) |
ca9b46bc ZG |
717 | { |
718 | ar->gpe.sts[0] |= status; | |
719 | acpi_update_sci(ar, irq); | |
720 | } | |
721 | ||
06313503 IM |
722 | void acpi_update_sci(ACPIREGS *regs, qemu_irq irq) |
723 | { | |
724 | int sci_level, pm1a_sts; | |
725 | ||
726 | pm1a_sts = acpi_pm1_evt_get_sts(regs); | |
727 | ||
728 | sci_level = ((pm1a_sts & | |
729 | regs->pm1.evt.en & ACPI_BITMASK_PM1_COMMON_ENABLED) != 0) || | |
730 | ((regs->gpe.sts[0] & regs->gpe.en[0]) != 0); | |
731 | ||
732 | qemu_set_irq(irq, sci_level); | |
733 | ||
734 | /* schedule a timer interruption if needed */ | |
735 | acpi_pm_tmr_update(regs, | |
736 | (regs->pm1.evt.en & ACPI_BITMASK_TIMER_ENABLE) && | |
737 | !(pm1a_sts & ACPI_BITMASK_TIMER_STATUS)); | |
738 | } |