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Commit | Line | Data |
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93d89f63 IY |
1 | /* |
2 | * ACPI implementation | |
3 | * | |
4 | * Copyright (c) 2006 Fabrice Bellard | |
5 | * | |
6 | * This library is free software; you can redistribute it and/or | |
7 | * modify it under the terms of the GNU Lesser General Public | |
61f3c91a | 8 | * License version 2.1 as published by the Free Software Foundation. |
93d89f63 IY |
9 | * |
10 | * This library is distributed in the hope that it will be useful, | |
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
13 | * Lesser General Public License for more details. | |
14 | * | |
15 | * You should have received a copy of the GNU Lesser General Public | |
16 | * License along with this library; if not, see <http://www.gnu.org/licenses/> | |
6b620ca3 PB |
17 | * |
18 | * Contributions after 2012-01-13 are licensed under the terms of the | |
19 | * GNU GPL, version 2 or (at your option) any later version. | |
93d89f63 | 20 | */ |
71e8a915 | 21 | |
b6a0aa05 | 22 | #include "qemu/osdep.h" |
0d09e41a | 23 | #include "hw/i386/pc.h" |
64552b6b | 24 | #include "hw/irq.h" |
0d09e41a PB |
25 | #include "hw/isa/apm.h" |
26 | #include "hw/i2c/pm_smbus.h" | |
83c9f4ca | 27 | #include "hw/pci/pci.h" |
a27bd6c7 | 28 | #include "hw/qdev-properties.h" |
0d09e41a | 29 | #include "hw/acpi/acpi.h" |
2bfd0845 MCA |
30 | #include "hw/acpi/pcihp.h" |
31 | #include "hw/acpi/piix4.h" | |
54d31236 | 32 | #include "sysemu/runstate.h" |
9c17d615 | 33 | #include "sysemu/sysemu.h" |
da278d58 | 34 | #include "sysemu/xen.h" |
da34e65c | 35 | #include "qapi/error.h" |
1de7afc9 | 36 | #include "qemu/range.h" |
9e047b98 | 37 | #include "hw/acpi/pcihp.h" |
81cea5e7 | 38 | #include "hw/acpi/cpu_hotplug.h" |
5e1b5d93 | 39 | #include "hw/acpi/cpu.h" |
c24d5e0b | 40 | #include "hw/hotplug.h" |
34774320 | 41 | #include "hw/mem/pc-dimm.h" |
132a908b | 42 | #include "hw/mem/nvdimm.h" |
34774320 | 43 | #include "hw/acpi/memory_hotplug.h" |
43f50410 | 44 | #include "hw/acpi/acpi_dev_interface.h" |
d6454270 | 45 | #include "migration/vmstate.h" |
2e5b09fd | 46 | #include "hw/core/cpu.h" |
b37d56ec | 47 | #include "trace.h" |
db1015e9 | 48 | #include "qom/object.h" |
50d8ff8b | 49 | |
ac404095 | 50 | #define GPE_BASE 0xafe0 |
23910d3f | 51 | #define GPE_LEN 4 |
c177684c | 52 | |
caf108bc JS |
53 | #define ACPI_PCIHP_ADDR_PIIX4 0xae00 |
54 | ||
ac404095 | 55 | struct pci_status { |
7faa8075 | 56 | uint32_t up; /* deprecated, maintained for migration compatibility */ |
ac404095 IY |
57 | uint32_t down; |
58 | }; | |
59 | ||
56e5b2a1 GH |
60 | static void piix4_acpi_system_hot_add_init(MemoryRegion *parent, |
61 | PCIBus *bus, PIIX4PMState *s); | |
ac404095 | 62 | |
93d89f63 IY |
63 | #define ACPI_ENABLE 0xf1 |
64 | #define ACPI_DISABLE 0xf0 | |
65 | ||
355bf2e5 | 66 | static void pm_tmr_timer(ACPIREGS *ar) |
93d89f63 | 67 | { |
355bf2e5 | 68 | PIIX4PMState *s = container_of(ar, PIIX4PMState, ar); |
06313503 | 69 | acpi_update_sci(&s->ar, s->irq); |
93d89f63 IY |
70 | } |
71 | ||
93d89f63 IY |
72 | static void apm_ctrl_changed(uint32_t val, void *arg) |
73 | { | |
74 | PIIX4PMState *s = arg; | |
6a6b5580 | 75 | PCIDevice *d = PCI_DEVICE(s); |
93d89f63 IY |
76 | |
77 | /* ACPI specs 3.0, 4.7.2.5 */ | |
355bf2e5 | 78 | acpi_pm1_cnt_update(&s->ar, val == ACPI_ENABLE, val == ACPI_DISABLE); |
afd6895b PB |
79 | if (val == ACPI_ENABLE || val == ACPI_DISABLE) { |
80 | return; | |
81 | } | |
93d89f63 | 82 | |
6a6b5580 | 83 | if (d->config[0x5b] & (1 << 1)) { |
93d89f63 IY |
84 | if (s->smi_irq) { |
85 | qemu_irq_raise(s->smi_irq); | |
86 | } | |
87 | } | |
88 | } | |
89 | ||
93d89f63 IY |
90 | static void pm_io_space_update(PIIX4PMState *s) |
91 | { | |
6a6b5580 | 92 | PCIDevice *d = PCI_DEVICE(s); |
93d89f63 | 93 | |
277e9340 MT |
94 | s->io_base = le32_to_cpu(*(uint32_t *)(d->config + 0x40)); |
95 | s->io_base &= 0xffc0; | |
93d89f63 | 96 | |
af11110b | 97 | memory_region_transaction_begin(); |
6a6b5580 | 98 | memory_region_set_enabled(&s->io, d->config[0x80] & 1); |
277e9340 | 99 | memory_region_set_address(&s->io, s->io_base); |
af11110b | 100 | memory_region_transaction_commit(); |
93d89f63 IY |
101 | } |
102 | ||
24fe083d GH |
103 | static void smbus_io_space_update(PIIX4PMState *s) |
104 | { | |
6a6b5580 AF |
105 | PCIDevice *d = PCI_DEVICE(s); |
106 | ||
107 | s->smb_io_base = le32_to_cpu(*(uint32_t *)(d->config + 0x90)); | |
24fe083d GH |
108 | s->smb_io_base &= 0xffc0; |
109 | ||
110 | memory_region_transaction_begin(); | |
6a6b5580 | 111 | memory_region_set_enabled(&s->smb.io, d->config[0xd2] & 1); |
24fe083d GH |
112 | memory_region_set_address(&s->smb.io, s->smb_io_base); |
113 | memory_region_transaction_commit(); | |
93d89f63 IY |
114 | } |
115 | ||
116 | static void pm_write_config(PCIDevice *d, | |
117 | uint32_t address, uint32_t val, int len) | |
118 | { | |
119 | pci_default_write_config(d, address, val, len); | |
24fe083d GH |
120 | if (range_covers_byte(address, len, 0x80) || |
121 | ranges_overlap(address, len, 0x40, 4)) { | |
93d89f63 | 122 | pm_io_space_update((PIIX4PMState *)d); |
24fe083d GH |
123 | } |
124 | if (range_covers_byte(address, len, 0xd2) || | |
125 | ranges_overlap(address, len, 0x90, 4)) { | |
126 | smbus_io_space_update((PIIX4PMState *)d); | |
127 | } | |
93d89f63 IY |
128 | } |
129 | ||
130 | static int vmstate_acpi_post_load(void *opaque, int version_id) | |
131 | { | |
132 | PIIX4PMState *s = opaque; | |
133 | ||
134 | pm_io_space_update(s); | |
2b4e573c | 135 | smbus_io_space_update(s); |
93d89f63 IY |
136 | return 0; |
137 | } | |
138 | ||
23910d3f IY |
139 | #define VMSTATE_GPE_ARRAY(_field, _state) \ |
140 | { \ | |
141 | .name = (stringify(_field)), \ | |
142 | .version_id = 0, \ | |
23910d3f IY |
143 | .info = &vmstate_info_uint16, \ |
144 | .size = sizeof(uint16_t), \ | |
b0b873a0 | 145 | .flags = VMS_SINGLE | VMS_POINTER, \ |
23910d3f IY |
146 | .offset = vmstate_offset_pointer(_state, _field, uint8_t), \ |
147 | } | |
148 | ||
4cf3e6f3 AW |
149 | static const VMStateDescription vmstate_gpe = { |
150 | .name = "gpe", | |
151 | .version_id = 1, | |
152 | .minimum_version_id = 1, | |
d49805ae | 153 | .fields = (VMStateField[]) { |
23910d3f IY |
154 | VMSTATE_GPE_ARRAY(sts, ACPIGPE), |
155 | VMSTATE_GPE_ARRAY(en, ACPIGPE), | |
4cf3e6f3 AW |
156 | VMSTATE_END_OF_LIST() |
157 | } | |
158 | }; | |
159 | ||
160 | static const VMStateDescription vmstate_pci_status = { | |
161 | .name = "pci_status", | |
162 | .version_id = 1, | |
163 | .minimum_version_id = 1, | |
d49805ae | 164 | .fields = (VMStateField[]) { |
e358edc8 IM |
165 | VMSTATE_UINT32(up, struct AcpiPciHpPciStatus), |
166 | VMSTATE_UINT32(down, struct AcpiPciHpPciStatus), | |
4cf3e6f3 AW |
167 | VMSTATE_END_OF_LIST() |
168 | } | |
169 | }; | |
170 | ||
0affda04 | 171 | static bool vmstate_test_use_acpi_hotplug_bridge(void *opaque, int version_id) |
9e047b98 MT |
172 | { |
173 | PIIX4PMState *s = opaque; | |
0affda04 | 174 | return s->use_acpi_hotplug_bridge; |
9e047b98 MT |
175 | } |
176 | ||
0affda04 AS |
177 | static bool vmstate_test_no_use_acpi_hotplug_bridge(void *opaque, |
178 | int version_id) | |
9e047b98 MT |
179 | { |
180 | PIIX4PMState *s = opaque; | |
0affda04 | 181 | return !s->use_acpi_hotplug_bridge; |
9e047b98 MT |
182 | } |
183 | ||
f816a62d IM |
184 | static bool vmstate_test_use_memhp(void *opaque) |
185 | { | |
186 | PIIX4PMState *s = opaque; | |
187 | return s->acpi_memory_hotplug.is_enabled; | |
188 | } | |
189 | ||
190 | static const VMStateDescription vmstate_memhp_state = { | |
191 | .name = "piix4_pm/memhp", | |
192 | .version_id = 1, | |
193 | .minimum_version_id = 1, | |
5cd8cada | 194 | .needed = vmstate_test_use_memhp, |
f816a62d IM |
195 | .fields = (VMStateField[]) { |
196 | VMSTATE_MEMORY_HOTPLUG(acpi_memory_hotplug, PIIX4PMState), | |
197 | VMSTATE_END_OF_LIST() | |
198 | } | |
199 | }; | |
200 | ||
679dd1a9 IM |
201 | static bool vmstate_test_use_cpuhp(void *opaque) |
202 | { | |
203 | PIIX4PMState *s = opaque; | |
204 | return !s->cpu_hotplug_legacy; | |
205 | } | |
206 | ||
207 | static int vmstate_cpuhp_pre_load(void *opaque) | |
208 | { | |
209 | Object *obj = OBJECT(opaque); | |
5325cc34 | 210 | object_property_set_bool(obj, "cpu-hotplug-legacy", false, &error_abort); |
679dd1a9 IM |
211 | return 0; |
212 | } | |
213 | ||
214 | static const VMStateDescription vmstate_cpuhp_state = { | |
215 | .name = "piix4_pm/cpuhp", | |
216 | .version_id = 1, | |
217 | .minimum_version_id = 1, | |
679dd1a9 IM |
218 | .needed = vmstate_test_use_cpuhp, |
219 | .pre_load = vmstate_cpuhp_pre_load, | |
220 | .fields = (VMStateField[]) { | |
221 | VMSTATE_CPU_HOTPLUG(cpuhp_state, PIIX4PMState), | |
222 | VMSTATE_END_OF_LIST() | |
223 | } | |
224 | }; | |
225 | ||
4ab2f2a8 CM |
226 | static bool piix4_vmstate_need_smbus(void *opaque, int version_id) |
227 | { | |
228 | return pm_smbus_vmstate_needed(); | |
229 | } | |
230 | ||
a83c2844 DDAG |
231 | /* |
232 | * This is a fudge to turn off the acpi_index field, | |
233 | * whose test was always broken on piix4 with 6.2 and older machine types. | |
234 | */ | |
235 | static bool vmstate_test_migrate_acpi_index(void *opaque, int version_id) | |
236 | { | |
237 | PIIX4PMState *s = PIIX4_PM(opaque); | |
238 | return s->use_acpi_hotplug_bridge && !s->not_migrate_acpi_index; | |
239 | } | |
240 | ||
b0b873a0 MT |
241 | /* qemu-kvm 1.2 uses version 3 but advertised as 2 |
242 | * To support incoming qemu-kvm 1.2 migration, change version_id | |
243 | * and minimum_version_id to 2 below (which breaks migration from | |
244 | * qemu 1.2). | |
245 | * | |
246 | */ | |
93d89f63 IY |
247 | static const VMStateDescription vmstate_acpi = { |
248 | .name = "piix4_pm", | |
b0b873a0 MT |
249 | .version_id = 3, |
250 | .minimum_version_id = 3, | |
93d89f63 | 251 | .post_load = vmstate_acpi_post_load, |
d49805ae | 252 | .fields = (VMStateField[]) { |
6a6b5580 | 253 | VMSTATE_PCI_DEVICE(parent_obj, PIIX4PMState), |
355bf2e5 GH |
254 | VMSTATE_UINT16(ar.pm1.evt.sts, PIIX4PMState), |
255 | VMSTATE_UINT16(ar.pm1.evt.en, PIIX4PMState), | |
256 | VMSTATE_UINT16(ar.pm1.cnt.cnt, PIIX4PMState), | |
93d89f63 | 257 | VMSTATE_STRUCT(apm, PIIX4PMState, 0, vmstate_apm, APMState), |
4ab2f2a8 CM |
258 | VMSTATE_STRUCT_TEST(smb, PIIX4PMState, piix4_vmstate_need_smbus, 3, |
259 | pmsmb_vmstate, PMSMBus), | |
e720677e | 260 | VMSTATE_TIMER_PTR(ar.tmr.timer, PIIX4PMState), |
355bf2e5 GH |
261 | VMSTATE_INT64(ar.tmr.overflow_time, PIIX4PMState), |
262 | VMSTATE_STRUCT(ar.gpe, PIIX4PMState, 2, vmstate_gpe, ACPIGPE), | |
e358edc8 IM |
263 | VMSTATE_STRUCT_TEST( |
264 | acpi_pci_hotplug.acpi_pcihp_pci_status[ACPI_PCIHP_BSEL_DEFAULT], | |
265 | PIIX4PMState, | |
0affda04 | 266 | vmstate_test_no_use_acpi_hotplug_bridge, |
e358edc8 IM |
267 | 2, vmstate_pci_status, |
268 | struct AcpiPciHpPciStatus), | |
9e047b98 | 269 | VMSTATE_PCI_HOTPLUG(acpi_pci_hotplug, PIIX4PMState, |
b32bd763 | 270 | vmstate_test_use_acpi_hotplug_bridge, |
a83c2844 | 271 | vmstate_test_migrate_acpi_index), |
93d89f63 | 272 | VMSTATE_END_OF_LIST() |
f816a62d | 273 | }, |
5cd8cada JQ |
274 | .subsections = (const VMStateDescription*[]) { |
275 | &vmstate_memhp_state, | |
679dd1a9 | 276 | &vmstate_cpuhp_state, |
5cd8cada | 277 | NULL |
93d89f63 IY |
278 | } |
279 | }; | |
280 | ||
217e8ef9 | 281 | static void piix4_pm_reset(DeviceState *dev) |
93d89f63 | 282 | { |
217e8ef9 | 283 | PIIX4PMState *s = PIIX4_PM(dev); |
6a6b5580 AF |
284 | PCIDevice *d = PCI_DEVICE(s); |
285 | uint8_t *pci_conf = d->config; | |
93d89f63 IY |
286 | |
287 | pci_conf[0x58] = 0; | |
288 | pci_conf[0x59] = 0; | |
289 | pci_conf[0x5a] = 0; | |
290 | pci_conf[0x5b] = 0; | |
291 | ||
4d09d37c GN |
292 | pci_conf[0x40] = 0x01; /* PM io base read only bit */ |
293 | pci_conf[0x80] = 0; | |
294 | ||
61e66c62 | 295 | if (!s->smm_enabled) { |
93d89f63 IY |
296 | /* Mark SMM as already inited (until KVM supports SMM). */ |
297 | pci_conf[0x5B] = 0x02; | |
298 | } | |
0fd74325 IY |
299 | |
300 | acpi_pm1_evt_reset(&s->ar); | |
301 | acpi_pm1_cnt_reset(&s->ar); | |
302 | acpi_pm_tmr_reset(&s->ar); | |
303 | acpi_gpe_reset(&s->ar); | |
304 | acpi_update_sci(&s->ar, s->irq); | |
305 | ||
c046e8c4 | 306 | pm_io_space_update(s); |
45284cfb IM |
307 | if (s->use_acpi_hotplug_bridge || s->use_acpi_root_pci_hotplug) { |
308 | acpi_pcihp_reset(&s->acpi_pci_hotplug, !s->use_acpi_root_pci_hotplug); | |
309 | } | |
93d89f63 IY |
310 | } |
311 | ||
d010f91c | 312 | static void piix4_pm_powerdown_req(Notifier *n, void *opaque) |
93d89f63 | 313 | { |
d010f91c | 314 | PIIX4PMState *s = container_of(n, PIIX4PMState, powerdown_notifier); |
93d89f63 | 315 | |
355bf2e5 GH |
316 | assert(s != NULL); |
317 | acpi_pm1_evt_power_down(&s->ar); | |
93d89f63 IY |
318 | } |
319 | ||
ec266f40 DH |
320 | static void piix4_device_pre_plug_cb(HotplugHandler *hotplug_dev, |
321 | DeviceState *dev, Error **errp) | |
322 | { | |
9040e6df WY |
323 | PIIX4PMState *s = PIIX4_PM(hotplug_dev); |
324 | ||
ec266f40 DH |
325 | if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) { |
326 | acpi_pcihp_device_pre_plug_cb(hotplug_dev, dev, errp); | |
9040e6df WY |
327 | } else if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) { |
328 | if (!s->acpi_memory_hotplug.is_enabled) { | |
329 | error_setg(errp, | |
330 | "memory hotplug is not enabled: %s.memory-hotplug-support " | |
331 | "is not set", object_get_typename(OBJECT(s))); | |
332 | } | |
333 | } else if ( | |
ec266f40 DH |
334 | !object_dynamic_cast(OBJECT(dev), TYPE_CPU)) { |
335 | error_setg(errp, "acpi: device pre plug request for not supported" | |
336 | " device type: %s", object_get_typename(OBJECT(dev))); | |
337 | } | |
338 | } | |
339 | ||
f1adc360 IM |
340 | static void piix4_device_plug_cb(HotplugHandler *hotplug_dev, |
341 | DeviceState *dev, Error **errp) | |
9e047b98 | 342 | { |
c24d5e0b | 343 | PIIX4PMState *s = PIIX4_PM(hotplug_dev); |
f1adc360 | 344 | |
9040e6df | 345 | if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) { |
75f27498 XG |
346 | if (object_dynamic_cast(OBJECT(dev), TYPE_NVDIMM)) { |
347 | nvdimm_acpi_plug_cb(hotplug_dev, dev); | |
348 | } else { | |
349 | acpi_memory_plug_cb(hotplug_dev, &s->acpi_memory_hotplug, | |
350 | dev, errp); | |
351 | } | |
34774320 | 352 | } else if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) { |
2bed1ba7 | 353 | acpi_pcihp_device_plug_cb(hotplug_dev, &s->acpi_pci_hotplug, dev, errp); |
5e1b5d93 IM |
354 | } else if (object_dynamic_cast(OBJECT(dev), TYPE_CPU)) { |
355 | if (s->cpu_hotplug_legacy) { | |
356 | legacy_acpi_cpu_plug_cb(hotplug_dev, &s->gpe_cpu, dev, errp); | |
357 | } else { | |
358 | acpi_cpu_plug_cb(hotplug_dev, &s->cpuhp_state, dev, errp); | |
359 | } | |
f1adc360 | 360 | } else { |
ec266f40 | 361 | g_assert_not_reached(); |
f1adc360 | 362 | } |
c24d5e0b | 363 | } |
9e047b98 | 364 | |
14d5a28f IM |
365 | static void piix4_device_unplug_request_cb(HotplugHandler *hotplug_dev, |
366 | DeviceState *dev, Error **errp) | |
c24d5e0b IM |
367 | { |
368 | PIIX4PMState *s = PIIX4_PM(hotplug_dev); | |
f1adc360 | 369 | |
64fec58e TC |
370 | if (s->acpi_memory_hotplug.is_enabled && |
371 | object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) { | |
0058c082 | 372 | acpi_memory_unplug_request_cb(hotplug_dev, &s->acpi_memory_hotplug, |
64fec58e TC |
373 | dev, errp); |
374 | } else if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) { | |
c97adf3c DH |
375 | acpi_pcihp_device_unplug_request_cb(hotplug_dev, &s->acpi_pci_hotplug, |
376 | dev, errp); | |
8872c25a IM |
377 | } else if (object_dynamic_cast(OBJECT(dev), TYPE_CPU) && |
378 | !s->cpu_hotplug_legacy) { | |
379 | acpi_cpu_unplug_request_cb(hotplug_dev, &s->cpuhp_state, dev, errp); | |
f1adc360 IM |
380 | } else { |
381 | error_setg(errp, "acpi: device unplug request for not supported device" | |
382 | " type: %s", object_get_typename(OBJECT(dev))); | |
383 | } | |
9e047b98 MT |
384 | } |
385 | ||
c0e57a60 TC |
386 | static void piix4_device_unplug_cb(HotplugHandler *hotplug_dev, |
387 | DeviceState *dev, Error **errp) | |
388 | { | |
f7d3e29d TC |
389 | PIIX4PMState *s = PIIX4_PM(hotplug_dev); |
390 | ||
391 | if (s->acpi_memory_hotplug.is_enabled && | |
392 | object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) { | |
393 | acpi_memory_unplug_cb(&s->acpi_memory_hotplug, dev, errp); | |
c97adf3c DH |
394 | } else if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) { |
395 | acpi_pcihp_device_unplug_cb(hotplug_dev, &s->acpi_pci_hotplug, dev, | |
396 | errp); | |
8872c25a IM |
397 | } else if (object_dynamic_cast(OBJECT(dev), TYPE_CPU) && |
398 | !s->cpu_hotplug_legacy) { | |
399 | acpi_cpu_unplug_cb(&s->cpuhp_state, dev, errp); | |
f7d3e29d TC |
400 | } else { |
401 | error_setg(errp, "acpi: device unplug for not supported device" | |
402 | " type: %s", object_get_typename(OBJECT(dev))); | |
403 | } | |
c0e57a60 TC |
404 | } |
405 | ||
9e8dd451 | 406 | static void piix4_pm_machine_ready(Notifier *n, void *opaque) |
6141dbfe PB |
407 | { |
408 | PIIX4PMState *s = container_of(n, PIIX4PMState, machine_ready); | |
6a6b5580 AF |
409 | PCIDevice *d = PCI_DEVICE(s); |
410 | MemoryRegion *io_as = pci_address_space_io(d); | |
6141dbfe PB |
411 | uint8_t *pci_conf; |
412 | ||
6a6b5580 | 413 | pci_conf = d->config; |
b6f32962 | 414 | pci_conf[0x5f] = 0x10 | |
3ce10901 | 415 | (memory_region_present(io_as, 0x378) ? 0x80 : 0); |
6141dbfe | 416 | pci_conf[0x63] = 0x60; |
3ce10901 PB |
417 | pci_conf[0x67] = (memory_region_present(io_as, 0x3f8) ? 0x08 : 0) | |
418 | (memory_region_present(io_as, 0x2f8) ? 0x90 : 0); | |
6141dbfe PB |
419 | } |
420 | ||
5ad1037c | 421 | static void piix4_pm_add_properties(PIIX4PMState *s) |
277e9340 MT |
422 | { |
423 | static const uint8_t acpi_enable_cmd = ACPI_ENABLE; | |
424 | static const uint8_t acpi_disable_cmd = ACPI_DISABLE; | |
425 | static const uint32_t gpe0_blk = GPE_BASE; | |
426 | static const uint32_t gpe0_blk_len = GPE_LEN; | |
427 | static const uint16_t sci_int = 9; | |
428 | ||
429 | object_property_add_uint8_ptr(OBJECT(s), ACPI_PM_PROP_ACPI_ENABLE_CMD, | |
d2623129 | 430 | &acpi_enable_cmd, OBJ_PROP_FLAG_READ); |
277e9340 | 431 | object_property_add_uint8_ptr(OBJECT(s), ACPI_PM_PROP_ACPI_DISABLE_CMD, |
d2623129 | 432 | &acpi_disable_cmd, OBJ_PROP_FLAG_READ); |
277e9340 | 433 | object_property_add_uint32_ptr(OBJECT(s), ACPI_PM_PROP_GPE0_BLK, |
d2623129 | 434 | &gpe0_blk, OBJ_PROP_FLAG_READ); |
277e9340 | 435 | object_property_add_uint32_ptr(OBJECT(s), ACPI_PM_PROP_GPE0_BLK_LEN, |
d2623129 | 436 | &gpe0_blk_len, OBJ_PROP_FLAG_READ); |
277e9340 | 437 | object_property_add_uint16_ptr(OBJECT(s), ACPI_PM_PROP_SCI_INT, |
d2623129 | 438 | &sci_int, OBJ_PROP_FLAG_READ); |
277e9340 | 439 | object_property_add_uint32_ptr(OBJECT(s), ACPI_PM_PROP_PM_IO_BASE, |
d2623129 | 440 | &s->io_base, OBJ_PROP_FLAG_READ); |
277e9340 MT |
441 | } |
442 | ||
9af21dbe | 443 | static void piix4_pm_realize(PCIDevice *dev, Error **errp) |
93d89f63 | 444 | { |
74e445f6 | 445 | PIIX4PMState *s = PIIX4_PM(dev); |
93d89f63 IY |
446 | uint8_t *pci_conf; |
447 | ||
6a6b5580 | 448 | pci_conf = dev->config; |
93d89f63 IY |
449 | pci_conf[0x06] = 0x80; |
450 | pci_conf[0x07] = 0x02; | |
93d89f63 | 451 | pci_conf[0x09] = 0x00; |
93d89f63 IY |
452 | pci_conf[0x3d] = 0x01; // interrupt pin 1 |
453 | ||
93d89f63 | 454 | /* APM */ |
42d8a3cf | 455 | apm_init(dev, &s->apm, apm_ctrl_changed, s); |
93d89f63 | 456 | |
61e66c62 | 457 | if (!s->smm_enabled) { |
93d89f63 IY |
458 | /* Mark SMM as already inited to prevent SMM from running. KVM does not |
459 | * support SMM mode. */ | |
460 | pci_conf[0x5B] = 0x02; | |
461 | } | |
462 | ||
463 | /* XXX: which specification is used ? The i82731AB has different | |
464 | mappings */ | |
e8ec0571 IY |
465 | pci_conf[0x90] = s->smb_io_base | 1; |
466 | pci_conf[0x91] = s->smb_io_base >> 8; | |
93d89f63 | 467 | pci_conf[0xd2] = 0x09; |
45726b6e | 468 | pm_smbus_init(DEVICE(dev), &s->smb, true); |
24fe083d | 469 | memory_region_set_enabled(&s->smb.io, pci_conf[0xd2] & 1); |
56e5b2a1 GH |
470 | memory_region_add_subregion(pci_address_space_io(dev), |
471 | s->smb_io_base, &s->smb.io); | |
93d89f63 | 472 | |
64bde0f3 | 473 | memory_region_init(&s->io, OBJECT(s), "piix4-pm", 64); |
af11110b | 474 | memory_region_set_enabled(&s->io, false); |
56e5b2a1 GH |
475 | memory_region_add_subregion(pci_address_space_io(dev), |
476 | 0, &s->io); | |
93d89f63 | 477 | |
77d58b1e | 478 | acpi_pm_tmr_init(&s->ar, pm_tmr_timer, &s->io); |
b5a7c024 | 479 | acpi_pm1_evt_init(&s->ar, pm_tmr_timer, &s->io); |
6be8cf56 IY |
480 | acpi_pm1_cnt_init(&s->ar, &s->io, s->disable_s3, s->disable_s4, s->s4_val, |
481 | !s->smm_compat && !s->smm_enabled); | |
355bf2e5 | 482 | acpi_gpe_init(&s->ar, GPE_LEN); |
93d89f63 | 483 | |
d010f91c IM |
484 | s->powerdown_notifier.notify = piix4_pm_powerdown_req; |
485 | qemu_register_powerdown_notifier(&s->powerdown_notifier); | |
93d89f63 | 486 | |
6141dbfe PB |
487 | s->machine_ready.notify = piix4_pm_machine_ready; |
488 | qemu_add_machine_init_done_notifier(&s->machine_ready); | |
56e5b2a1 | 489 | |
3f0efcac MCA |
490 | if (xen_enabled()) { |
491 | s->use_acpi_hotplug_bridge = false; | |
492 | } | |
493 | ||
fd56e061 DG |
494 | piix4_acpi_system_hot_add_init(pci_address_space_io(dev), |
495 | pci_get_bus(dev), s); | |
9bc6bfdf | 496 | qbus_set_hotplug_handler(BUS(pci_get_bus(dev)), OBJECT(s)); |
e8ec0571 | 497 | |
5ad1037c | 498 | piix4_pm_add_properties(s); |
e8ec0571 IY |
499 | } |
500 | ||
29786d42 MCA |
501 | static void piix4_pm_init(Object *obj) |
502 | { | |
503 | PIIX4PMState *s = PIIX4_PM(obj); | |
504 | ||
505 | qdev_init_gpio_out(DEVICE(obj), &s->irq, 1); | |
b49e9442 | 506 | qdev_init_gpio_out_named(DEVICE(obj), &s->smi_irq, "smi-irq", 1); |
29786d42 MCA |
507 | } |
508 | ||
b65b93f2 | 509 | static uint64_t gpe_readb(void *opaque, hwaddr addr, unsigned width) |
93d89f63 | 510 | { |
633aa0ac | 511 | PIIX4PMState *s = opaque; |
355bf2e5 | 512 | uint32_t val = acpi_gpe_ioport_readb(&s->ar, addr); |
93d89f63 | 513 | |
b37d56ec | 514 | trace_piix4_gpe_readb(addr, width, val); |
93d89f63 IY |
515 | return val; |
516 | } | |
517 | ||
b65b93f2 GH |
518 | static void gpe_writeb(void *opaque, hwaddr addr, uint64_t val, |
519 | unsigned width) | |
93d89f63 | 520 | { |
633aa0ac | 521 | PIIX4PMState *s = opaque; |
633aa0ac | 522 | |
b37d56ec | 523 | trace_piix4_gpe_writeb(addr, width, val); |
355bf2e5 | 524 | acpi_gpe_ioport_writeb(&s->ar, addr, val); |
06313503 | 525 | acpi_update_sci(&s->ar, s->irq); |
93d89f63 IY |
526 | } |
527 | ||
b65b93f2 GH |
528 | static const MemoryRegionOps piix4_gpe_ops = { |
529 | .read = gpe_readb, | |
530 | .write = gpe_writeb, | |
531 | .valid.min_access_size = 1, | |
532 | .valid.max_access_size = 4, | |
533 | .impl.min_access_size = 1, | |
534 | .impl.max_access_size = 1, | |
535 | .endianness = DEVICE_LITTLE_ENDIAN, | |
536 | }; | |
537 | ||
16bcab97 IM |
538 | |
539 | static bool piix4_get_cpu_hotplug_legacy(Object *obj, Error **errp) | |
540 | { | |
541 | PIIX4PMState *s = PIIX4_PM(obj); | |
542 | ||
543 | return s->cpu_hotplug_legacy; | |
544 | } | |
545 | ||
546 | static void piix4_set_cpu_hotplug_legacy(Object *obj, bool value, Error **errp) | |
547 | { | |
548 | PIIX4PMState *s = PIIX4_PM(obj); | |
549 | ||
679dd1a9 IM |
550 | assert(!value); |
551 | if (s->cpu_hotplug_legacy && value == false) { | |
552 | acpi_switch_to_modern_cphp(&s->gpe_cpu, &s->cpuhp_state, | |
553 | PIIX4_CPU_HOTPLUG_IO_BASE); | |
554 | } | |
16bcab97 IM |
555 | s->cpu_hotplug_legacy = value; |
556 | } | |
557 | ||
56e5b2a1 GH |
558 | static void piix4_acpi_system_hot_add_init(MemoryRegion *parent, |
559 | PCIBus *bus, PIIX4PMState *s) | |
93d89f63 | 560 | { |
64bde0f3 PB |
561 | memory_region_init_io(&s->io_gpe, OBJECT(s), &piix4_gpe_ops, s, |
562 | "acpi-gpe0", GPE_LEN); | |
56e5b2a1 | 563 | memory_region_add_subregion(parent, GPE_BASE, &s->io_gpe); |
ac404095 | 564 | |
df4008c9 AS |
565 | if (s->use_acpi_hotplug_bridge || s->use_acpi_root_pci_hotplug) { |
566 | acpi_pcihp_init(OBJECT(s), &s->acpi_pci_hotplug, bus, parent, | |
caf108bc | 567 | s->use_acpi_hotplug_bridge, ACPI_PCIHP_ADDR_PIIX4); |
df4008c9 | 568 | } |
b8622725 | 569 | |
16bcab97 IM |
570 | s->cpu_hotplug_legacy = true; |
571 | object_property_add_bool(OBJECT(s), "cpu-hotplug-legacy", | |
572 | piix4_get_cpu_hotplug_legacy, | |
d2623129 | 573 | piix4_set_cpu_hotplug_legacy); |
96e3e12b IM |
574 | legacy_acpi_cpu_hotplug_init(parent, OBJECT(s), &s->gpe_cpu, |
575 | PIIX4_CPU_HOTPLUG_IO_BASE); | |
34774320 IM |
576 | |
577 | if (s->acpi_memory_hotplug.is_enabled) { | |
80db0e78 IM |
578 | acpi_memory_hotplug_init(parent, OBJECT(s), &s->acpi_memory_hotplug, |
579 | ACPI_MEMORY_HOTPLUG_BASE); | |
34774320 | 580 | } |
93d89f63 | 581 | } |
5fdae20c | 582 | |
43f50410 IM |
583 | static void piix4_ospm_status(AcpiDeviceIf *adev, ACPIOSTInfoList ***list) |
584 | { | |
585 | PIIX4PMState *s = PIIX4_PM(adev); | |
586 | ||
587 | acpi_memory_ospm_status(&s->acpi_memory_hotplug, list); | |
76623d00 IM |
588 | if (!s->cpu_hotplug_legacy) { |
589 | acpi_cpu_ospm_status(&s->cpuhp_state, list); | |
590 | } | |
43f50410 IM |
591 | } |
592 | ||
eaf23bf7 IM |
593 | static void piix4_send_gpe(AcpiDeviceIf *adev, AcpiEventStatusBits ev) |
594 | { | |
595 | PIIX4PMState *s = PIIX4_PM(adev); | |
596 | ||
597 | acpi_send_gpe_event(&s->ar, s->irq, ev); | |
598 | } | |
599 | ||
5fdae20c IM |
600 | static Property piix4_pm_properties[] = { |
601 | DEFINE_PROP_UINT32("smb_io_base", PIIX4PMState, smb_io_base, 0), | |
602 | DEFINE_PROP_UINT8(ACPI_PM_PROP_S3_DISABLED, PIIX4PMState, disable_s3, 0), | |
603 | DEFINE_PROP_UINT8(ACPI_PM_PROP_S4_DISABLED, PIIX4PMState, disable_s4, 0), | |
604 | DEFINE_PROP_UINT8(ACPI_PM_PROP_S4_VAL, PIIX4PMState, s4_val, 2), | |
aa29466b | 605 | DEFINE_PROP_BOOL(ACPI_PM_PROP_ACPI_PCIHP_BRIDGE, PIIX4PMState, |
0affda04 | 606 | use_acpi_hotplug_bridge, true), |
aa29466b | 607 | DEFINE_PROP_BOOL(ACPI_PM_PROP_ACPI_PCI_ROOTHP, PIIX4PMState, |
3d7e78aa | 608 | use_acpi_root_pci_hotplug, true), |
34774320 IM |
609 | DEFINE_PROP_BOOL("memory-hotplug-support", PIIX4PMState, |
610 | acpi_memory_hotplug.is_enabled, true), | |
24cd04fc | 611 | DEFINE_PROP_BOOL("smm-compat", PIIX4PMState, smm_compat, false), |
7ace6b4f | 612 | DEFINE_PROP_BOOL("smm-enabled", PIIX4PMState, smm_enabled, false), |
a83c2844 DDAG |
613 | DEFINE_PROP_BOOL("x-not-migrate-acpi-index", PIIX4PMState, |
614 | not_migrate_acpi_index, false), | |
5fdae20c IM |
615 | DEFINE_PROP_END_OF_LIST(), |
616 | }; | |
617 | ||
618 | static void piix4_pm_class_init(ObjectClass *klass, void *data) | |
619 | { | |
620 | DeviceClass *dc = DEVICE_CLASS(klass); | |
621 | PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); | |
c24d5e0b | 622 | HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(klass); |
43f50410 | 623 | AcpiDeviceIfClass *adevc = ACPI_DEVICE_IF_CLASS(klass); |
5fdae20c | 624 | |
9af21dbe | 625 | k->realize = piix4_pm_realize; |
5fdae20c IM |
626 | k->config_write = pm_write_config; |
627 | k->vendor_id = PCI_VENDOR_ID_INTEL; | |
628 | k->device_id = PCI_DEVICE_ID_INTEL_82371AB_3; | |
629 | k->revision = 0x03; | |
630 | k->class_id = PCI_CLASS_BRIDGE_OTHER; | |
217e8ef9 | 631 | dc->reset = piix4_pm_reset; |
5fdae20c IM |
632 | dc->desc = "PM"; |
633 | dc->vmsd = &vmstate_acpi; | |
4f67d30b | 634 | device_class_set_props(dc, piix4_pm_properties); |
5fdae20c IM |
635 | /* |
636 | * Reason: part of PIIX4 southbridge, needs to be wired up, | |
637 | * e.g. by mips_malta_init() | |
638 | */ | |
e90f2a8c | 639 | dc->user_creatable = false; |
2897ae02 | 640 | dc->hotpluggable = false; |
ec266f40 | 641 | hc->pre_plug = piix4_device_pre_plug_cb; |
f1adc360 | 642 | hc->plug = piix4_device_plug_cb; |
14d5a28f | 643 | hc->unplug_request = piix4_device_unplug_request_cb; |
c0e57a60 | 644 | hc->unplug = piix4_device_unplug_cb; |
43f50410 | 645 | adevc->ospm_status = piix4_ospm_status; |
eaf23bf7 | 646 | adevc->send_event = piix4_send_gpe; |
ac35f13b | 647 | adevc->madt_cpu = pc_madt_cpu_entry; |
5fdae20c IM |
648 | } |
649 | ||
650 | static const TypeInfo piix4_pm_info = { | |
651 | .name = TYPE_PIIX4_PM, | |
652 | .parent = TYPE_PCI_DEVICE, | |
29786d42 | 653 | .instance_init = piix4_pm_init, |
5fdae20c IM |
654 | .instance_size = sizeof(PIIX4PMState), |
655 | .class_init = piix4_pm_class_init, | |
c24d5e0b IM |
656 | .interfaces = (InterfaceInfo[]) { |
657 | { TYPE_HOTPLUG_HANDLER }, | |
43f50410 | 658 | { TYPE_ACPI_DEVICE_IF }, |
fd3b02c8 | 659 | { INTERFACE_CONVENTIONAL_PCI_DEVICE }, |
c24d5e0b IM |
660 | { } |
661 | } | |
5fdae20c IM |
662 | }; |
663 | ||
664 | static void piix4_pm_register_types(void) | |
665 | { | |
666 | type_register_static(&piix4_pm_info); | |
667 | } | |
668 | ||
669 | type_init(piix4_pm_register_types) |