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0caa7113 EV |
1 | /* |
2 | * Samsung exynos4 SoC based boards emulation | |
3 | * | |
4 | * Copyright (c) 2011 Samsung Electronics Co., Ltd. All rights reserved. | |
5 | * Maksim Kozlov <m.kozlov@samsung.com> | |
6 | * Evgeny Voevodin <e.voevodin@samsung.com> | |
7 | * Igor Mitsyanko <i.mitsyanko@samsung.com> | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify it | |
10 | * under the terms of the GNU General Public License as published by the | |
11 | * Free Software Foundation; either version 2 of the License, or | |
12 | * (at your option) any later version. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, but WITHOUT | |
15 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
16 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
17 | * for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License along | |
20 | * with this program; if not, see <http://www.gnu.org/licenses/>. | |
21 | * | |
22 | */ | |
23 | ||
12b16722 | 24 | #include "qemu/osdep.h" |
e12a0dd2 | 25 | #include "qemu/units.h" |
a2f2f624 | 26 | #include "qapi/error.h" |
f2ad5140 | 27 | #include "qemu/error-report.h" |
83c9f4ca | 28 | #include "hw/sysbus.h" |
1422e32d | 29 | #include "net/net.h" |
12ec8bd5 | 30 | #include "hw/arm/boot.h" |
022c62cb | 31 | #include "exec/address-spaces.h" |
0d09e41a | 32 | #include "hw/arm/exynos4210.h" |
94630665 | 33 | #include "hw/net/lan9118.h" |
a27bd6c7 | 34 | #include "hw/qdev-properties.h" |
83c9f4ca | 35 | #include "hw/boards.h" |
64552b6b | 36 | #include "hw/irq.h" |
0caa7113 | 37 | |
2c2c6496 EV |
38 | #define SMDK_LAN9118_BASE_ADDR 0x05000000 |
39 | ||
0caa7113 EV |
40 | typedef enum Exynos4BoardType { |
41 | EXYNOS4_BOARD_NURI, | |
42 | EXYNOS4_BOARD_SMDKC210, | |
43 | EXYNOS4_NUM_OF_BOARDS | |
44 | } Exynos4BoardType; | |
45 | ||
a2f2f624 | 46 | typedef struct Exynos4BoardState { |
98e4f4fd | 47 | Exynos4210State soc; |
a2f2f624 KK |
48 | MemoryRegion dram0_mem; |
49 | MemoryRegion dram1_mem; | |
50 | } Exynos4BoardState; | |
51 | ||
0caa7113 EV |
52 | static int exynos4_board_id[EXYNOS4_NUM_OF_BOARDS] = { |
53 | [EXYNOS4_BOARD_NURI] = 0xD33, | |
54 | [EXYNOS4_BOARD_SMDKC210] = 0xB16, | |
55 | }; | |
56 | ||
57 | static int exynos4_board_smp_bootreg_addr[EXYNOS4_NUM_OF_BOARDS] = { | |
58 | [EXYNOS4_BOARD_NURI] = EXYNOS4210_SECOND_CPU_BOOTREG, | |
59 | [EXYNOS4_BOARD_SMDKC210] = EXYNOS4210_SECOND_CPU_BOOTREG, | |
60 | }; | |
61 | ||
62 | static unsigned long exynos4_board_ram_size[EXYNOS4_NUM_OF_BOARDS] = { | |
e12a0dd2 PMD |
63 | [EXYNOS4_BOARD_NURI] = 1 * GiB, |
64 | [EXYNOS4_BOARD_SMDKC210] = 1 * GiB, | |
0caa7113 EV |
65 | }; |
66 | ||
67 | static struct arm_boot_info exynos4_board_binfo = { | |
68 | .loader_start = EXYNOS4210_BASE_BOOT_ADDR, | |
69 | .smp_loader_start = EXYNOS4210_SMP_BOOT_ADDR, | |
3f088e36 | 70 | .write_secondary_boot = exynos4210_write_secondary, |
0caa7113 EV |
71 | }; |
72 | ||
2c2c6496 EV |
73 | static void lan9215_init(uint32_t base, qemu_irq irq) |
74 | { | |
75 | DeviceState *dev; | |
76 | SysBusDevice *s; | |
77 | ||
78 | /* This should be a 9215 but the 9118 is close enough */ | |
a005d073 | 79 | if (nd_table[0].used) { |
2c2c6496 | 80 | qemu_check_nic_model(&nd_table[0], "lan9118"); |
3e80f690 | 81 | dev = qdev_new(TYPE_LAN9118); |
2c2c6496 EV |
82 | qdev_set_nic_properties(dev, &nd_table[0]); |
83 | qdev_prop_set_uint32(dev, "mode_16bit", 1); | |
1356b98d | 84 | s = SYS_BUS_DEVICE(dev); |
3c6ef471 | 85 | sysbus_realize_and_unref(s, &error_fatal); |
2c2c6496 EV |
86 | sysbus_mmio_map(s, 0, base); |
87 | sysbus_connect_irq(s, 0, irq); | |
88 | } | |
89 | } | |
90 | ||
a2f2f624 KK |
91 | static void exynos4_boards_init_ram(Exynos4BoardState *s, |
92 | MemoryRegion *system_mem, | |
93 | unsigned long ram_size) | |
94 | { | |
95 | unsigned long mem_size = ram_size; | |
96 | ||
97 | if (mem_size > EXYNOS4210_DRAM_MAX_SIZE) { | |
98a99ce0 | 98 | memory_region_init_ram(&s->dram1_mem, NULL, "exynos4210.dram1", |
a2f2f624 KK |
99 | mem_size - EXYNOS4210_DRAM_MAX_SIZE, |
100 | &error_fatal); | |
a2f2f624 KK |
101 | memory_region_add_subregion(system_mem, EXYNOS4210_DRAM1_BASE_ADDR, |
102 | &s->dram1_mem); | |
103 | mem_size = EXYNOS4210_DRAM_MAX_SIZE; | |
104 | } | |
105 | ||
98a99ce0 | 106 | memory_region_init_ram(&s->dram0_mem, NULL, "exynos4210.dram0", mem_size, |
a2f2f624 | 107 | &error_fatal); |
a2f2f624 KK |
108 | memory_region_add_subregion(system_mem, EXYNOS4210_DRAM0_BASE_ADDR, |
109 | &s->dram0_mem); | |
110 | } | |
111 | ||
112 | static Exynos4BoardState * | |
113 | exynos4_boards_init_common(MachineState *machine, | |
114 | Exynos4BoardType board_type) | |
0caa7113 | 115 | { |
a2f2f624 | 116 | Exynos4BoardState *s = g_new(Exynos4BoardState, 1); |
0caa7113 EV |
117 | |
118 | exynos4_board_binfo.ram_size = exynos4_board_ram_size[board_type]; | |
119 | exynos4_board_binfo.board_id = exynos4_board_id[board_type]; | |
120 | exynos4_board_binfo.smp_bootreg_addr = | |
121 | exynos4_board_smp_bootreg_addr[board_type]; | |
96eacf64 PM |
122 | exynos4_board_binfo.gic_cpu_if_addr = |
123 | EXYNOS4210_SMP_PRIVATE_BASE_ADDR + 0x100; | |
0caa7113 | 124 | |
a2f2f624 KK |
125 | exynos4_boards_init_ram(s, get_system_memory(), |
126 | exynos4_board_ram_size[board_type]); | |
127 | ||
0074fce6 MA |
128 | object_initialize_child(OBJECT(machine), "soc", &s->soc, |
129 | TYPE_EXYNOS4210_SOC); | |
130 | sysbus_realize(SYS_BUS_DEVICE(&s->soc), &error_fatal); | |
a2f2f624 KK |
131 | |
132 | return s; | |
0caa7113 EV |
133 | } |
134 | ||
3ef96221 | 135 | static void nuri_init(MachineState *machine) |
0caa7113 | 136 | { |
f0109f72 PMD |
137 | Exynos4BoardState *s = exynos4_boards_init_common(machine, |
138 | EXYNOS4_BOARD_NURI); | |
0caa7113 | 139 | |
f0109f72 | 140 | arm_load_kernel(s->soc.cpu[0], machine, &exynos4_board_binfo); |
0caa7113 EV |
141 | } |
142 | ||
3ef96221 | 143 | static void smdkc210_init(MachineState *machine) |
0caa7113 | 144 | { |
a2f2f624 KK |
145 | Exynos4BoardState *s = exynos4_boards_init_common(machine, |
146 | EXYNOS4_BOARD_SMDKC210); | |
0caa7113 | 147 | |
2c2c6496 | 148 | lan9215_init(SMDK_LAN9118_BASE_ADDR, |
98e4f4fd | 149 | qemu_irq_invert(s->soc.irq_table[exynos4210_get_irq(37, 1)])); |
f0109f72 | 150 | arm_load_kernel(s->soc.cpu[0], machine, &exynos4_board_binfo); |
0caa7113 EV |
151 | } |
152 | ||
8a661aea | 153 | static void nuri_class_init(ObjectClass *oc, void *data) |
e264d29d | 154 | { |
8a661aea AF |
155 | MachineClass *mc = MACHINE_CLASS(oc); |
156 | ||
e264d29d EH |
157 | mc->desc = "Samsung NURI board (Exynos4210)"; |
158 | mc->init = nuri_init; | |
159 | mc->max_cpus = EXYNOS4210_NCPUS; | |
72649619 EC |
160 | mc->min_cpus = EXYNOS4210_NCPUS; |
161 | mc->default_cpus = EXYNOS4210_NCPUS; | |
4672cbd7 | 162 | mc->ignore_memory_transaction_failures = true; |
e264d29d | 163 | } |
97c6671c | 164 | |
8a661aea AF |
165 | static const TypeInfo nuri_type = { |
166 | .name = MACHINE_TYPE_NAME("nuri"), | |
167 | .parent = TYPE_MACHINE, | |
168 | .class_init = nuri_class_init, | |
169 | }; | |
0caa7113 | 170 | |
8a661aea | 171 | static void smdkc210_class_init(ObjectClass *oc, void *data) |
0caa7113 | 172 | { |
8a661aea AF |
173 | MachineClass *mc = MACHINE_CLASS(oc); |
174 | ||
e264d29d EH |
175 | mc->desc = "Samsung SMDKC210 board (Exynos4210)"; |
176 | mc->init = smdkc210_init; | |
177 | mc->max_cpus = EXYNOS4210_NCPUS; | |
72649619 EC |
178 | mc->min_cpus = EXYNOS4210_NCPUS; |
179 | mc->default_cpus = EXYNOS4210_NCPUS; | |
4672cbd7 | 180 | mc->ignore_memory_transaction_failures = true; |
0caa7113 EV |
181 | } |
182 | ||
8a661aea AF |
183 | static const TypeInfo smdkc210_type = { |
184 | .name = MACHINE_TYPE_NAME("smdkc210"), | |
185 | .parent = TYPE_MACHINE, | |
186 | .class_init = smdkc210_class_init, | |
187 | }; | |
188 | ||
189 | static void exynos4_machines_init(void) | |
190 | { | |
191 | type_register_static(&nuri_type); | |
192 | type_register_static(&smdkc210_type); | |
193 | } | |
194 | ||
0e6aac87 | 195 | type_init(exynos4_machines_init) |