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Commit | Line | Data |
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36d20cb2 MA |
1 | /* |
2 | * QEMU Machine | |
3 | * | |
4 | * Copyright (C) 2014 Red Hat Inc | |
5 | * | |
6 | * Authors: | |
7 | * Marcel Apfelbaum <marcel.a@redhat.com> | |
8 | * | |
9 | * This work is licensed under the terms of the GNU GPL, version 2 or later. | |
10 | * See the COPYING file in the top-level directory. | |
11 | */ | |
12 | ||
18c86e2b | 13 | #include "qemu/osdep.h" |
6f479566 LX |
14 | #include "qemu/option.h" |
15 | #include "qapi/qmp/qerror.h" | |
16 | #include "sysemu/replay.h" | |
fc6b3cf9 | 17 | #include "qemu/units.h" |
36d20cb2 | 18 | #include "hw/boards.h" |
da34e65c | 19 | #include "qapi/error.h" |
9af23989 | 20 | #include "qapi/qapi-visit-common.h" |
6b1b1440 | 21 | #include "qapi/visitor.h" |
33cd52b5 AG |
22 | #include "hw/sysbus.h" |
23 | #include "sysemu/sysemu.h" | |
3bfe5716 | 24 | #include "sysemu/numa.h" |
33cd52b5 | 25 | #include "qemu/error-report.h" |
c6ff347c | 26 | #include "sysemu/qtest.h" |
edc24ccd | 27 | #include "hw/pci/pci.h" |
f6a0d06b | 28 | #include "hw/mem/nvdimm.h" |
82b911aa | 29 | #include "migration/vmstate.h" |
6b1b1440 | 30 | |
576a00bd CH |
31 | GlobalProperty hw_compat_5_2[] = {}; |
32 | const size_t hw_compat_5_2_len = G_N_ELEMENTS(hw_compat_5_2); | |
33 | ||
6a558822 SH |
34 | GlobalProperty hw_compat_5_1[] = { |
35 | { "vhost-scsi", "num_queues", "1"}, | |
a4eef071 | 36 | { "vhost-user-blk", "num-queues", "1"}, |
6a558822 | 37 | { "vhost-user-scsi", "num_queues", "1"}, |
9445e1e1 | 38 | { "virtio-blk-device", "num-queues", "1"}, |
6a558822 | 39 | { "virtio-scsi-device", "num_queues", "1"}, |
6eb7a071 | 40 | { "nvme", "use-intel-id", "on"}, |
b1b0393c | 41 | { "pvpanic", "events", "1"}, /* PVPANIC_PANICKED */ |
6a558822 | 42 | }; |
3ff3c5d3 CH |
43 | const size_t hw_compat_5_1_len = G_N_ELEMENTS(hw_compat_5_1); |
44 | ||
7483cbba | 45 | GlobalProperty hw_compat_5_0[] = { |
2ebc2121 | 46 | { "pci-host-bridge", "x-config-reg-migration-enabled", "off" }, |
7483cbba | 47 | { "virtio-balloon-device", "page-poison", "false" }, |
f983ff95 PB |
48 | { "vmport", "x-read-set-eax", "off" }, |
49 | { "vmport", "x-signal-unsupported-cmd", "off" }, | |
50 | { "vmport", "x-report-vmx-type", "off" }, | |
51 | { "vmport", "x-cmds-v2", "off" }, | |
d55f5182 | 52 | { "virtio-device", "x-disable-legacy-check", "true" }, |
7483cbba | 53 | }; |
541aaa1d CH |
54 | const size_t hw_compat_5_0_len = G_N_ELEMENTS(hw_compat_5_0); |
55 | ||
5f258577 | 56 | GlobalProperty hw_compat_4_2[] = { |
c9b7d9ec DP |
57 | { "virtio-blk-device", "queue-size", "128"}, |
58 | { "virtio-scsi-device", "virtqueue_size", "128"}, | |
5f258577 | 59 | { "virtio-blk-device", "x-enable-wce-if-config-wce", "off" }, |
1bf8a989 DP |
60 | { "virtio-blk-device", "seg-max-adjust", "off"}, |
61 | { "virtio-scsi-device", "seg_max_adjust", "off"}, | |
62 | { "vhost-blk-device", "seg_max_adjust", "off"}, | |
7bacaf5f | 63 | { "usb-host", "suppress-remote-wake", "off" }, |
32187f3d | 64 | { "usb-redir", "suppress-remote-wake", "off" }, |
ed71c09f GH |
65 | { "qxl", "revision", "4" }, |
66 | { "qxl-vga", "revision", "4" }, | |
394f0f72 | 67 | { "fw_cfg", "acpi-mr-restore", "false" }, |
5f258577 EY |
68 | }; |
69 | const size_t hw_compat_4_2_len = G_N_ELEMENTS(hw_compat_4_2); | |
70 | ||
eb1556c4 JS |
71 | GlobalProperty hw_compat_4_1[] = { |
72 | { "virtio-pci", "x-pcie-flr-init", "off" }, | |
9d7bd082 | 73 | { "virtio-device", "use-disabled-flag", "false" }, |
eb1556c4 | 74 | }; |
9aec2e52 CH |
75 | const size_t hw_compat_4_1_len = G_N_ELEMENTS(hw_compat_4_1); |
76 | ||
8e8cbed0 | 77 | GlobalProperty hw_compat_4_0[] = { |
0a719662 GH |
78 | { "VGA", "edid", "false" }, |
79 | { "secondary-vga", "edid", "false" }, | |
80 | { "bochs-display", "edid", "false" }, | |
81 | { "virtio-vga", "edid", "false" }, | |
02501fc3 | 82 | { "virtio-gpu-device", "edid", "false" }, |
e57f2c31 | 83 | { "virtio-device", "use-started", "false" }, |
2bbadb08 | 84 | { "virtio-balloon-device", "qemu-4-0-config-size", "true" }, |
032cfe6a | 85 | { "pl031", "migrate-tick-offset", "false" }, |
0a719662 | 86 | }; |
9bf2650b CH |
87 | const size_t hw_compat_4_0_len = G_N_ELEMENTS(hw_compat_4_0); |
88 | ||
abd93cc7 | 89 | GlobalProperty hw_compat_3_1[] = { |
6c36bddf EH |
90 | { "pcie-root-port", "x-speed", "2_5" }, |
91 | { "pcie-root-port", "x-width", "1" }, | |
92 | { "memory-backend-file", "x-use-canonical-path-for-ramblock-id", "true" }, | |
93 | { "memory-backend-memfd", "x-use-canonical-path-for-ramblock-id", "true" }, | |
b6148757 MAL |
94 | { "tpm-crb", "ppi", "false" }, |
95 | { "tpm-tis", "ppi", "false" }, | |
b63e1050 GH |
96 | { "usb-kbd", "serial", "42" }, |
97 | { "usb-mouse", "serial", "42" }, | |
442bac16 | 98 | { "usb-tablet", "serial", "42" }, |
5c81161f SG |
99 | { "virtio-blk-device", "discard", "false" }, |
100 | { "virtio-blk-device", "write-zeroes", "false" }, | |
2bbadb08 | 101 | { "virtio-balloon-device", "qemu-4-0-config-size", "false" }, |
c8557f1b | 102 | { "pcie-root-port-base", "disable-acs", "true" }, /* Added in 4.1 */ |
abd93cc7 MAL |
103 | }; |
104 | const size_t hw_compat_3_1_len = G_N_ELEMENTS(hw_compat_3_1); | |
105 | ||
ddb3235d MAL |
106 | GlobalProperty hw_compat_3_0[] = {}; |
107 | const size_t hw_compat_3_0_len = G_N_ELEMENTS(hw_compat_3_0); | |
108 | ||
0d47310b | 109 | GlobalProperty hw_compat_2_12[] = { |
6c36bddf EH |
110 | { "migration", "decompress-error-check", "off" }, |
111 | { "hda-audio", "use-timer", "false" }, | |
112 | { "cirrus-vga", "global-vmstate", "true" }, | |
113 | { "VGA", "global-vmstate", "true" }, | |
114 | { "vmware-svga", "global-vmstate", "true" }, | |
115 | { "qxl-vga", "global-vmstate", "true" }, | |
0d47310b MAL |
116 | }; |
117 | const size_t hw_compat_2_12_len = G_N_ELEMENTS(hw_compat_2_12); | |
118 | ||
43df70a9 | 119 | GlobalProperty hw_compat_2_11[] = { |
6c36bddf EH |
120 | { "hpet", "hpet-offset-saved", "false" }, |
121 | { "virtio-blk-pci", "vectors", "2" }, | |
122 | { "vhost-user-blk-pci", "vectors", "2" }, | |
123 | { "e1000", "migrate_tso_props", "off" }, | |
43df70a9 MAL |
124 | }; |
125 | const size_t hw_compat_2_11_len = G_N_ELEMENTS(hw_compat_2_11); | |
126 | ||
503224f4 | 127 | GlobalProperty hw_compat_2_10[] = { |
6c36bddf EH |
128 | { "virtio-mouse-device", "wheel-axis", "false" }, |
129 | { "virtio-tablet-device", "wheel-axis", "false" }, | |
503224f4 MAL |
130 | }; |
131 | const size_t hw_compat_2_10_len = G_N_ELEMENTS(hw_compat_2_10); | |
132 | ||
3e803152 | 133 | GlobalProperty hw_compat_2_9[] = { |
6c36bddf EH |
134 | { "pci-bridge", "shpc", "off" }, |
135 | { "intel-iommu", "pt", "off" }, | |
136 | { "virtio-net-device", "x-mtu-bypass-backend", "off" }, | |
137 | { "pcie-root-port", "x-migrate-msix", "false" }, | |
3e803152 MAL |
138 | }; |
139 | const size_t hw_compat_2_9_len = G_N_ELEMENTS(hw_compat_2_9); | |
140 | ||
edc24ccd | 141 | GlobalProperty hw_compat_2_8[] = { |
6c36bddf EH |
142 | { "fw_cfg_mem", "x-file-slots", "0x10" }, |
143 | { "fw_cfg_io", "x-file-slots", "0x10" }, | |
144 | { "pflash_cfi01", "old-multiple-chip-handling", "on" }, | |
145 | { "pci-bridge", "shpc", "on" }, | |
146 | { TYPE_PCI_DEVICE, "x-pcie-extcap-init", "off" }, | |
147 | { "virtio-pci", "x-pcie-deverr-init", "off" }, | |
148 | { "virtio-pci", "x-pcie-lnkctl-init", "off" }, | |
149 | { "virtio-pci", "x-pcie-pm-init", "off" }, | |
150 | { "cirrus-vga", "vgamem_mb", "8" }, | |
151 | { "isa-cirrus-vga", "vgamem_mb", "8" }, | |
edc24ccd MAL |
152 | }; |
153 | const size_t hw_compat_2_8_len = G_N_ELEMENTS(hw_compat_2_8); | |
154 | ||
5a995064 | 155 | GlobalProperty hw_compat_2_7[] = { |
6c36bddf EH |
156 | { "virtio-pci", "page-per-vq", "on" }, |
157 | { "virtio-serial-device", "emergency-write", "off" }, | |
158 | { "ioapic", "version", "0x11" }, | |
159 | { "intel-iommu", "x-buggy-eim", "true" }, | |
160 | { "virtio-pci", "x-ignore-backend-features", "on" }, | |
5a995064 MAL |
161 | }; |
162 | const size_t hw_compat_2_7_len = G_N_ELEMENTS(hw_compat_2_7); | |
163 | ||
ff8f261f | 164 | GlobalProperty hw_compat_2_6[] = { |
6c36bddf | 165 | { "virtio-mmio", "format_transport_address", "off" }, |
dd56040d DDAG |
166 | /* Optional because not all virtio-pci devices support legacy mode */ |
167 | { "virtio-pci", "disable-modern", "on", .optional = true }, | |
168 | { "virtio-pci", "disable-legacy", "off", .optional = true }, | |
ff8f261f MAL |
169 | }; |
170 | const size_t hw_compat_2_6_len = G_N_ELEMENTS(hw_compat_2_6); | |
171 | ||
fe759610 | 172 | GlobalProperty hw_compat_2_5[] = { |
6c36bddf EH |
173 | { "isa-fdc", "fallback", "144" }, |
174 | { "pvscsi", "x-old-pci-configuration", "on" }, | |
175 | { "pvscsi", "x-disable-pcie", "on" }, | |
176 | { "vmxnet3", "x-old-msi-offsets", "on" }, | |
177 | { "vmxnet3", "x-disable-pcie", "on" }, | |
fe759610 MAL |
178 | }; |
179 | const size_t hw_compat_2_5_len = G_N_ELEMENTS(hw_compat_2_5); | |
180 | ||
2f99b9c2 | 181 | GlobalProperty hw_compat_2_4[] = { |
11a18c84 PMD |
182 | /* Optional because the 'scsi' property is Linux-only */ |
183 | { "virtio-blk-device", "scsi", "true", .optional = true }, | |
6c36bddf EH |
184 | { "e1000", "extra_mac_registers", "off" }, |
185 | { "virtio-pci", "x-disable-pcie", "on" }, | |
186 | { "virtio-pci", "migrate-extra", "off" }, | |
187 | { "fw_cfg_mem", "dma_enabled", "off" }, | |
188 | { "fw_cfg_io", "dma_enabled", "off" } | |
2f99b9c2 MAL |
189 | }; |
190 | const size_t hw_compat_2_4_len = G_N_ELEMENTS(hw_compat_2_4); | |
191 | ||
8995dd90 | 192 | GlobalProperty hw_compat_2_3[] = { |
6c36bddf EH |
193 | { "virtio-blk-pci", "any_layout", "off" }, |
194 | { "virtio-balloon-pci", "any_layout", "off" }, | |
195 | { "virtio-serial-pci", "any_layout", "off" }, | |
196 | { "virtio-9p-pci", "any_layout", "off" }, | |
197 | { "virtio-rng-pci", "any_layout", "off" }, | |
198 | { TYPE_PCI_DEVICE, "x-pcie-lnksta-dllla", "off" }, | |
199 | { "migration", "send-configuration", "off" }, | |
200 | { "migration", "send-section-footer", "off" }, | |
201 | { "migration", "store-global-state", "off" }, | |
8995dd90 MAL |
202 | }; |
203 | const size_t hw_compat_2_3_len = G_N_ELEMENTS(hw_compat_2_3); | |
204 | ||
1c30044e MAL |
205 | GlobalProperty hw_compat_2_2[] = {}; |
206 | const size_t hw_compat_2_2_len = G_N_ELEMENTS(hw_compat_2_2); | |
207 | ||
c4fc5695 | 208 | GlobalProperty hw_compat_2_1[] = { |
6c36bddf EH |
209 | { "intel-hda", "old_msi_addr", "on" }, |
210 | { "VGA", "qemu-extended-regs", "off" }, | |
211 | { "secondary-vga", "qemu-extended-regs", "off" }, | |
212 | { "virtio-scsi-pci", "any_layout", "off" }, | |
213 | { "usb-mouse", "usb_version", "1" }, | |
214 | { "usb-kbd", "usb_version", "1" }, | |
215 | { "virtio-pci", "virtio-pci-bus-master-bug-migration", "on" }, | |
c4fc5695 MAL |
216 | }; |
217 | const size_t hw_compat_2_1_len = G_N_ELEMENTS(hw_compat_2_1); | |
218 | ||
6b1b1440 MA |
219 | static char *machine_get_kernel(Object *obj, Error **errp) |
220 | { | |
221 | MachineState *ms = MACHINE(obj); | |
222 | ||
223 | return g_strdup(ms->kernel_filename); | |
224 | } | |
225 | ||
226 | static void machine_set_kernel(Object *obj, const char *value, Error **errp) | |
227 | { | |
228 | MachineState *ms = MACHINE(obj); | |
229 | ||
556068ee | 230 | g_free(ms->kernel_filename); |
6b1b1440 MA |
231 | ms->kernel_filename = g_strdup(value); |
232 | } | |
233 | ||
234 | static char *machine_get_initrd(Object *obj, Error **errp) | |
235 | { | |
236 | MachineState *ms = MACHINE(obj); | |
237 | ||
238 | return g_strdup(ms->initrd_filename); | |
239 | } | |
240 | ||
241 | static void machine_set_initrd(Object *obj, const char *value, Error **errp) | |
242 | { | |
243 | MachineState *ms = MACHINE(obj); | |
244 | ||
556068ee | 245 | g_free(ms->initrd_filename); |
6b1b1440 MA |
246 | ms->initrd_filename = g_strdup(value); |
247 | } | |
248 | ||
249 | static char *machine_get_append(Object *obj, Error **errp) | |
250 | { | |
251 | MachineState *ms = MACHINE(obj); | |
252 | ||
253 | return g_strdup(ms->kernel_cmdline); | |
254 | } | |
255 | ||
256 | static void machine_set_append(Object *obj, const char *value, Error **errp) | |
257 | { | |
258 | MachineState *ms = MACHINE(obj); | |
259 | ||
556068ee | 260 | g_free(ms->kernel_cmdline); |
6b1b1440 MA |
261 | ms->kernel_cmdline = g_strdup(value); |
262 | } | |
263 | ||
264 | static char *machine_get_dtb(Object *obj, Error **errp) | |
265 | { | |
266 | MachineState *ms = MACHINE(obj); | |
267 | ||
268 | return g_strdup(ms->dtb); | |
269 | } | |
270 | ||
271 | static void machine_set_dtb(Object *obj, const char *value, Error **errp) | |
272 | { | |
273 | MachineState *ms = MACHINE(obj); | |
274 | ||
556068ee | 275 | g_free(ms->dtb); |
6b1b1440 MA |
276 | ms->dtb = g_strdup(value); |
277 | } | |
278 | ||
279 | static char *machine_get_dumpdtb(Object *obj, Error **errp) | |
280 | { | |
281 | MachineState *ms = MACHINE(obj); | |
282 | ||
283 | return g_strdup(ms->dumpdtb); | |
284 | } | |
285 | ||
286 | static void machine_set_dumpdtb(Object *obj, const char *value, Error **errp) | |
287 | { | |
288 | MachineState *ms = MACHINE(obj); | |
289 | ||
556068ee | 290 | g_free(ms->dumpdtb); |
6b1b1440 MA |
291 | ms->dumpdtb = g_strdup(value); |
292 | } | |
293 | ||
294 | static void machine_get_phandle_start(Object *obj, Visitor *v, | |
d7bce999 EB |
295 | const char *name, void *opaque, |
296 | Error **errp) | |
6b1b1440 MA |
297 | { |
298 | MachineState *ms = MACHINE(obj); | |
299 | int64_t value = ms->phandle_start; | |
300 | ||
51e72bc1 | 301 | visit_type_int(v, name, &value, errp); |
6b1b1440 MA |
302 | } |
303 | ||
304 | static void machine_set_phandle_start(Object *obj, Visitor *v, | |
d7bce999 EB |
305 | const char *name, void *opaque, |
306 | Error **errp) | |
6b1b1440 MA |
307 | { |
308 | MachineState *ms = MACHINE(obj); | |
6b1b1440 MA |
309 | int64_t value; |
310 | ||
668f62ec | 311 | if (!visit_type_int(v, name, &value, errp)) { |
6b1b1440 MA |
312 | return; |
313 | } | |
314 | ||
315 | ms->phandle_start = value; | |
316 | } | |
317 | ||
318 | static char *machine_get_dt_compatible(Object *obj, Error **errp) | |
319 | { | |
320 | MachineState *ms = MACHINE(obj); | |
321 | ||
322 | return g_strdup(ms->dt_compatible); | |
323 | } | |
324 | ||
325 | static void machine_set_dt_compatible(Object *obj, const char *value, Error **errp) | |
326 | { | |
327 | MachineState *ms = MACHINE(obj); | |
328 | ||
556068ee | 329 | g_free(ms->dt_compatible); |
6b1b1440 MA |
330 | ms->dt_compatible = g_strdup(value); |
331 | } | |
332 | ||
333 | static bool machine_get_dump_guest_core(Object *obj, Error **errp) | |
334 | { | |
335 | MachineState *ms = MACHINE(obj); | |
336 | ||
337 | return ms->dump_guest_core; | |
338 | } | |
339 | ||
340 | static void machine_set_dump_guest_core(Object *obj, bool value, Error **errp) | |
341 | { | |
342 | MachineState *ms = MACHINE(obj); | |
343 | ||
344 | ms->dump_guest_core = value; | |
345 | } | |
346 | ||
347 | static bool machine_get_mem_merge(Object *obj, Error **errp) | |
348 | { | |
349 | MachineState *ms = MACHINE(obj); | |
350 | ||
351 | return ms->mem_merge; | |
352 | } | |
353 | ||
354 | static void machine_set_mem_merge(Object *obj, bool value, Error **errp) | |
355 | { | |
356 | MachineState *ms = MACHINE(obj); | |
357 | ||
358 | ms->mem_merge = value; | |
359 | } | |
360 | ||
361 | static bool machine_get_usb(Object *obj, Error **errp) | |
362 | { | |
363 | MachineState *ms = MACHINE(obj); | |
364 | ||
365 | return ms->usb; | |
366 | } | |
367 | ||
368 | static void machine_set_usb(Object *obj, bool value, Error **errp) | |
369 | { | |
370 | MachineState *ms = MACHINE(obj); | |
371 | ||
372 | ms->usb = value; | |
c6e76503 | 373 | ms->usb_disabled = !value; |
6b1b1440 MA |
374 | } |
375 | ||
cfc58cf3 EH |
376 | static bool machine_get_graphics(Object *obj, Error **errp) |
377 | { | |
378 | MachineState *ms = MACHINE(obj); | |
379 | ||
380 | return ms->enable_graphics; | |
381 | } | |
382 | ||
383 | static void machine_set_graphics(Object *obj, bool value, Error **errp) | |
384 | { | |
385 | MachineState *ms = MACHINE(obj); | |
386 | ||
387 | ms->enable_graphics = value; | |
388 | } | |
389 | ||
6b1b1440 MA |
390 | static char *machine_get_firmware(Object *obj, Error **errp) |
391 | { | |
392 | MachineState *ms = MACHINE(obj); | |
393 | ||
394 | return g_strdup(ms->firmware); | |
395 | } | |
396 | ||
397 | static void machine_set_firmware(Object *obj, const char *value, Error **errp) | |
398 | { | |
399 | MachineState *ms = MACHINE(obj); | |
400 | ||
556068ee | 401 | g_free(ms->firmware); |
6b1b1440 MA |
402 | ms->firmware = g_strdup(value); |
403 | } | |
404 | ||
9850c604 AG |
405 | static void machine_set_suppress_vmdesc(Object *obj, bool value, Error **errp) |
406 | { | |
407 | MachineState *ms = MACHINE(obj); | |
408 | ||
409 | ms->suppress_vmdesc = value; | |
410 | } | |
411 | ||
412 | static bool machine_get_suppress_vmdesc(Object *obj, Error **errp) | |
413 | { | |
414 | MachineState *ms = MACHINE(obj); | |
415 | ||
416 | return ms->suppress_vmdesc; | |
417 | } | |
418 | ||
db588194 BS |
419 | static char *machine_get_memory_encryption(Object *obj, Error **errp) |
420 | { | |
421 | MachineState *ms = MACHINE(obj); | |
422 | ||
423 | return g_strdup(ms->memory_encryption); | |
424 | } | |
425 | ||
426 | static void machine_set_memory_encryption(Object *obj, const char *value, | |
427 | Error **errp) | |
428 | { | |
429 | MachineState *ms = MACHINE(obj); | |
430 | ||
431 | g_free(ms->memory_encryption); | |
432 | ms->memory_encryption = g_strdup(value); | |
4ba59be1 DDAG |
433 | |
434 | /* | |
435 | * With memory encryption, the host can't see the real contents of RAM, | |
436 | * so there's no point in it trying to merge areas. | |
437 | */ | |
438 | if (value) { | |
439 | machine_set_mem_merge(obj, false, errp); | |
440 | } | |
db588194 BS |
441 | } |
442 | ||
f6a0d06b EA |
443 | static bool machine_get_nvdimm(Object *obj, Error **errp) |
444 | { | |
445 | MachineState *ms = MACHINE(obj); | |
446 | ||
447 | return ms->nvdimms_state->is_enabled; | |
448 | } | |
449 | ||
450 | static void machine_set_nvdimm(Object *obj, bool value, Error **errp) | |
451 | { | |
452 | MachineState *ms = MACHINE(obj); | |
453 | ||
454 | ms->nvdimms_state->is_enabled = value; | |
455 | } | |
456 | ||
244b3f44 TX |
457 | static bool machine_get_hmat(Object *obj, Error **errp) |
458 | { | |
459 | MachineState *ms = MACHINE(obj); | |
460 | ||
461 | return ms->numa_state->hmat_enabled; | |
462 | } | |
463 | ||
464 | static void machine_set_hmat(Object *obj, bool value, Error **errp) | |
465 | { | |
466 | MachineState *ms = MACHINE(obj); | |
467 | ||
468 | ms->numa_state->hmat_enabled = value; | |
469 | } | |
470 | ||
f6a0d06b EA |
471 | static char *machine_get_nvdimm_persistence(Object *obj, Error **errp) |
472 | { | |
473 | MachineState *ms = MACHINE(obj); | |
474 | ||
475 | return g_strdup(ms->nvdimms_state->persistence_string); | |
476 | } | |
477 | ||
478 | static void machine_set_nvdimm_persistence(Object *obj, const char *value, | |
479 | Error **errp) | |
480 | { | |
481 | MachineState *ms = MACHINE(obj); | |
482 | NVDIMMState *nvdimms_state = ms->nvdimms_state; | |
483 | ||
484 | if (strcmp(value, "cpu") == 0) { | |
485 | nvdimms_state->persistence = 3; | |
486 | } else if (strcmp(value, "mem-ctrl") == 0) { | |
487 | nvdimms_state->persistence = 2; | |
488 | } else { | |
489 | error_setg(errp, "-machine nvdimm-persistence=%s: unsupported option", | |
490 | value); | |
491 | return; | |
492 | } | |
493 | ||
494 | g_free(nvdimms_state->persistence_string); | |
495 | nvdimms_state->persistence_string = g_strdup(value); | |
496 | } | |
497 | ||
0bd1909d | 498 | void machine_class_allow_dynamic_sysbus_dev(MachineClass *mc, const char *type) |
33cd52b5 | 499 | { |
0bd1909d EH |
500 | strList *item = g_new0(strList, 1); |
501 | ||
502 | item->value = g_strdup(type); | |
503 | item->next = mc->allowed_dynamic_sysbus_devices; | |
504 | mc->allowed_dynamic_sysbus_devices = item; | |
33cd52b5 AG |
505 | } |
506 | ||
0bd1909d | 507 | static void validate_sysbus_device(SysBusDevice *sbdev, void *opaque) |
33cd52b5 | 508 | { |
0bd1909d EH |
509 | MachineState *machine = opaque; |
510 | MachineClass *mc = MACHINE_GET_CLASS(machine); | |
511 | bool allowed = false; | |
512 | strList *wl; | |
33cd52b5 | 513 | |
0bd1909d EH |
514 | for (wl = mc->allowed_dynamic_sysbus_devices; |
515 | !allowed && wl; | |
516 | wl = wl->next) { | |
517 | allowed |= !!object_dynamic_cast(OBJECT(sbdev), wl->value); | |
518 | } | |
519 | ||
520 | if (!allowed) { | |
521 | error_report("Option '-device %s' cannot be handled by this machine", | |
522 | object_class_get_name(object_get_class(OBJECT(sbdev)))); | |
523 | exit(1); | |
33cd52b5 | 524 | } |
0bd1909d EH |
525 | } |
526 | ||
aa8b1839 IM |
527 | static char *machine_get_memdev(Object *obj, Error **errp) |
528 | { | |
529 | MachineState *ms = MACHINE(obj); | |
530 | ||
531 | return g_strdup(ms->ram_memdev_id); | |
532 | } | |
533 | ||
534 | static void machine_set_memdev(Object *obj, const char *value, Error **errp) | |
535 | { | |
536 | MachineState *ms = MACHINE(obj); | |
537 | ||
538 | g_free(ms->ram_memdev_id); | |
539 | ms->ram_memdev_id = g_strdup(value); | |
540 | } | |
541 | ||
542 | ||
0bd1909d EH |
543 | static void machine_init_notify(Notifier *notifier, void *data) |
544 | { | |
545 | MachineState *machine = MACHINE(qdev_get_machine()); | |
33cd52b5 AG |
546 | |
547 | /* | |
0bd1909d EH |
548 | * Loop through all dynamically created sysbus devices and check if they are |
549 | * all allowed. If a device is not allowed, error out. | |
33cd52b5 | 550 | */ |
0bd1909d | 551 | foreach_dynamic_sysbus_device(validate_sysbus_device, machine); |
33cd52b5 AG |
552 | } |
553 | ||
f2d672c2 IM |
554 | HotpluggableCPUList *machine_query_hotpluggable_cpus(MachineState *machine) |
555 | { | |
556 | int i; | |
f2d672c2 | 557 | HotpluggableCPUList *head = NULL; |
d342eb76 IM |
558 | MachineClass *mc = MACHINE_GET_CLASS(machine); |
559 | ||
560 | /* force board to initialize possible_cpus if it hasn't been done yet */ | |
561 | mc->possible_cpu_arch_ids(machine); | |
f2d672c2 | 562 | |
f2d672c2 | 563 | for (i = 0; i < machine->possible_cpus->len; i++) { |
d342eb76 | 564 | Object *cpu; |
f2d672c2 IM |
565 | HotpluggableCPUList *list_item = g_new0(typeof(*list_item), 1); |
566 | HotpluggableCPU *cpu_item = g_new0(typeof(*cpu_item), 1); | |
567 | ||
d342eb76 | 568 | cpu_item->type = g_strdup(machine->possible_cpus->cpus[i].type); |
f2d672c2 IM |
569 | cpu_item->vcpus_count = machine->possible_cpus->cpus[i].vcpus_count; |
570 | cpu_item->props = g_memdup(&machine->possible_cpus->cpus[i].props, | |
571 | sizeof(*cpu_item->props)); | |
572 | ||
573 | cpu = machine->possible_cpus->cpus[i].cpu; | |
574 | if (cpu) { | |
575 | cpu_item->has_qom_path = true; | |
576 | cpu_item->qom_path = object_get_canonical_path(cpu); | |
577 | } | |
578 | list_item->value = cpu_item; | |
579 | list_item->next = head; | |
580 | head = list_item; | |
581 | } | |
582 | return head; | |
583 | } | |
584 | ||
7c88e65d IM |
585 | /** |
586 | * machine_set_cpu_numa_node: | |
587 | * @machine: machine object to modify | |
588 | * @props: specifies which cpu objects to assign to | |
589 | * numa node specified by @props.node_id | |
590 | * @errp: if an error occurs, a pointer to an area to store the error | |
591 | * | |
592 | * Associate NUMA node specified by @props.node_id with cpu slots that | |
593 | * match socket/core/thread-ids specified by @props. It's recommended to use | |
594 | * query-hotpluggable-cpus.props values to specify affected cpu slots, | |
595 | * which would lead to exact 1:1 mapping of cpu slots to NUMA node. | |
596 | * | |
597 | * However for CLI convenience it's possible to pass in subset of properties, | |
598 | * which would affect all cpu slots that match it. | |
599 | * Ex for pc machine: | |
600 | * -smp 4,cores=2,sockets=2 -numa node,nodeid=0 -numa node,nodeid=1 \ | |
601 | * -numa cpu,node-id=0,socket_id=0 \ | |
602 | * -numa cpu,node-id=1,socket_id=1 | |
603 | * will assign all child cores of socket 0 to node 0 and | |
604 | * of socket 1 to node 1. | |
605 | * | |
606 | * On attempt of reassigning (already assigned) cpu slot to another NUMA node, | |
607 | * return error. | |
608 | * Empty subset is disallowed and function will return with error in this case. | |
609 | */ | |
610 | void machine_set_cpu_numa_node(MachineState *machine, | |
611 | const CpuInstanceProperties *props, Error **errp) | |
612 | { | |
613 | MachineClass *mc = MACHINE_GET_CLASS(machine); | |
244b3f44 | 614 | NodeInfo *numa_info = machine->numa_state->nodes; |
7c88e65d IM |
615 | bool match = false; |
616 | int i; | |
617 | ||
618 | if (!mc->possible_cpu_arch_ids) { | |
619 | error_setg(errp, "mapping of CPUs to NUMA node is not supported"); | |
620 | return; | |
621 | } | |
622 | ||
623 | /* disabling node mapping is not supported, forbid it */ | |
624 | assert(props->has_node_id); | |
625 | ||
626 | /* force board to initialize possible_cpus if it hasn't been done yet */ | |
627 | mc->possible_cpu_arch_ids(machine); | |
628 | ||
629 | for (i = 0; i < machine->possible_cpus->len; i++) { | |
630 | CPUArchId *slot = &machine->possible_cpus->cpus[i]; | |
631 | ||
632 | /* reject unsupported by board properties */ | |
633 | if (props->has_thread_id && !slot->props.has_thread_id) { | |
634 | error_setg(errp, "thread-id is not supported"); | |
635 | return; | |
636 | } | |
637 | ||
638 | if (props->has_core_id && !slot->props.has_core_id) { | |
639 | error_setg(errp, "core-id is not supported"); | |
640 | return; | |
641 | } | |
642 | ||
643 | if (props->has_socket_id && !slot->props.has_socket_id) { | |
644 | error_setg(errp, "socket-id is not supported"); | |
645 | return; | |
646 | } | |
647 | ||
176d2cda LX |
648 | if (props->has_die_id && !slot->props.has_die_id) { |
649 | error_setg(errp, "die-id is not supported"); | |
650 | return; | |
651 | } | |
652 | ||
7c88e65d IM |
653 | /* skip slots with explicit mismatch */ |
654 | if (props->has_thread_id && props->thread_id != slot->props.thread_id) { | |
655 | continue; | |
656 | } | |
657 | ||
658 | if (props->has_core_id && props->core_id != slot->props.core_id) { | |
659 | continue; | |
660 | } | |
661 | ||
176d2cda LX |
662 | if (props->has_die_id && props->die_id != slot->props.die_id) { |
663 | continue; | |
664 | } | |
665 | ||
7c88e65d IM |
666 | if (props->has_socket_id && props->socket_id != slot->props.socket_id) { |
667 | continue; | |
668 | } | |
669 | ||
670 | /* reject assignment if slot is already assigned, for compatibility | |
671 | * of legacy cpu_index mapping with SPAPR core based mapping do not | |
672 | * error out if cpu thread and matched core have the same node-id */ | |
673 | if (slot->props.has_node_id && | |
674 | slot->props.node_id != props->node_id) { | |
675 | error_setg(errp, "CPU is already assigned to node-id: %" PRId64, | |
676 | slot->props.node_id); | |
677 | return; | |
678 | } | |
679 | ||
680 | /* assign slot to node as it's matched '-numa cpu' key */ | |
681 | match = true; | |
682 | slot->props.node_id = props->node_id; | |
683 | slot->props.has_node_id = props->has_node_id; | |
244b3f44 TX |
684 | |
685 | if (machine->numa_state->hmat_enabled) { | |
686 | if ((numa_info[props->node_id].initiator < MAX_NODES) && | |
687 | (props->node_id != numa_info[props->node_id].initiator)) { | |
688 | error_setg(errp, "The initiator of CPU NUMA node %" PRId64 | |
689 | " should be itself", props->node_id); | |
690 | return; | |
691 | } | |
692 | numa_info[props->node_id].has_cpu = true; | |
693 | numa_info[props->node_id].initiator = props->node_id; | |
694 | } | |
7c88e65d IM |
695 | } |
696 | ||
697 | if (!match) { | |
698 | error_setg(errp, "no match found"); | |
699 | } | |
700 | } | |
701 | ||
6f479566 LX |
702 | static void smp_parse(MachineState *ms, QemuOpts *opts) |
703 | { | |
704 | if (opts) { | |
705 | unsigned cpus = qemu_opt_get_number(opts, "cpus", 0); | |
706 | unsigned sockets = qemu_opt_get_number(opts, "sockets", 0); | |
707 | unsigned cores = qemu_opt_get_number(opts, "cores", 0); | |
708 | unsigned threads = qemu_opt_get_number(opts, "threads", 0); | |
709 | ||
710 | /* compute missing values, prefer sockets over cores over threads */ | |
711 | if (cpus == 0 || sockets == 0) { | |
712 | cores = cores > 0 ? cores : 1; | |
713 | threads = threads > 0 ? threads : 1; | |
714 | if (cpus == 0) { | |
715 | sockets = sockets > 0 ? sockets : 1; | |
716 | cpus = cores * threads * sockets; | |
717 | } else { | |
718 | ms->smp.max_cpus = | |
719 | qemu_opt_get_number(opts, "maxcpus", cpus); | |
720 | sockets = ms->smp.max_cpus / (cores * threads); | |
721 | } | |
722 | } else if (cores == 0) { | |
723 | threads = threads > 0 ? threads : 1; | |
724 | cores = cpus / (sockets * threads); | |
725 | cores = cores > 0 ? cores : 1; | |
726 | } else if (threads == 0) { | |
727 | threads = cpus / (cores * sockets); | |
728 | threads = threads > 0 ? threads : 1; | |
729 | } else if (sockets * cores * threads < cpus) { | |
730 | error_report("cpu topology: " | |
731 | "sockets (%u) * cores (%u) * threads (%u) < " | |
732 | "smp_cpus (%u)", | |
733 | sockets, cores, threads, cpus); | |
734 | exit(1); | |
735 | } | |
736 | ||
737 | ms->smp.max_cpus = | |
738 | qemu_opt_get_number(opts, "maxcpus", cpus); | |
739 | ||
740 | if (ms->smp.max_cpus < cpus) { | |
741 | error_report("maxcpus must be equal to or greater than smp"); | |
742 | exit(1); | |
743 | } | |
744 | ||
c4332cd1 IM |
745 | if (sockets * cores * threads != ms->smp.max_cpus) { |
746 | error_report("Invalid CPU topology: " | |
747 | "sockets (%u) * cores (%u) * threads (%u) " | |
748 | "!= maxcpus (%u)", | |
6f479566 LX |
749 | sockets, cores, threads, |
750 | ms->smp.max_cpus); | |
751 | exit(1); | |
752 | } | |
753 | ||
6f479566 LX |
754 | ms->smp.cpus = cpus; |
755 | ms->smp.cores = cores; | |
756 | ms->smp.threads = threads; | |
8cb30e3a | 757 | ms->smp.sockets = sockets; |
6f479566 LX |
758 | } |
759 | ||
760 | if (ms->smp.cpus > 1) { | |
761 | Error *blocker = NULL; | |
762 | error_setg(&blocker, QERR_REPLAY_NOT_SUPPORTED, "smp"); | |
763 | replay_add_blocker(blocker); | |
764 | } | |
765 | } | |
766 | ||
076b35b5 ND |
767 | static void machine_class_init(ObjectClass *oc, void *data) |
768 | { | |
769 | MachineClass *mc = MACHINE_CLASS(oc); | |
770 | ||
771 | /* Default 128 MB as guest ram size */ | |
d23b6caa | 772 | mc->default_ram_size = 128 * MiB; |
71ae9e94 | 773 | mc->rom_file_has_mr = true; |
6f479566 | 774 | mc->smp_parse = smp_parse; |
26b81df4 | 775 | |
55641213 LV |
776 | /* numa node memory size aligned on 8MB by default. |
777 | * On Linux, each node's border has to be 8MB aligned | |
778 | */ | |
779 | mc->numa_mem_align_shift = 23; | |
780 | ||
26b81df4 | 781 | object_class_property_add_str(oc, "kernel", |
d2623129 | 782 | machine_get_kernel, machine_set_kernel); |
26b81df4 | 783 | object_class_property_set_description(oc, "kernel", |
7eecec7d | 784 | "Linux kernel image file"); |
26b81df4 EH |
785 | |
786 | object_class_property_add_str(oc, "initrd", | |
d2623129 | 787 | machine_get_initrd, machine_set_initrd); |
26b81df4 | 788 | object_class_property_set_description(oc, "initrd", |
7eecec7d | 789 | "Linux initial ramdisk file"); |
26b81df4 EH |
790 | |
791 | object_class_property_add_str(oc, "append", | |
d2623129 | 792 | machine_get_append, machine_set_append); |
26b81df4 | 793 | object_class_property_set_description(oc, "append", |
7eecec7d | 794 | "Linux kernel command line"); |
26b81df4 EH |
795 | |
796 | object_class_property_add_str(oc, "dtb", | |
d2623129 | 797 | machine_get_dtb, machine_set_dtb); |
26b81df4 | 798 | object_class_property_set_description(oc, "dtb", |
7eecec7d | 799 | "Linux kernel device tree file"); |
26b81df4 EH |
800 | |
801 | object_class_property_add_str(oc, "dumpdtb", | |
d2623129 | 802 | machine_get_dumpdtb, machine_set_dumpdtb); |
26b81df4 | 803 | object_class_property_set_description(oc, "dumpdtb", |
7eecec7d | 804 | "Dump current dtb to a file and quit"); |
26b81df4 EH |
805 | |
806 | object_class_property_add(oc, "phandle-start", "int", | |
807 | machine_get_phandle_start, machine_set_phandle_start, | |
d2623129 | 808 | NULL, NULL); |
26b81df4 | 809 | object_class_property_set_description(oc, "phandle-start", |
7eecec7d | 810 | "The first phandle ID we may generate dynamically"); |
26b81df4 EH |
811 | |
812 | object_class_property_add_str(oc, "dt-compatible", | |
d2623129 | 813 | machine_get_dt_compatible, machine_set_dt_compatible); |
26b81df4 | 814 | object_class_property_set_description(oc, "dt-compatible", |
7eecec7d | 815 | "Overrides the \"compatible\" property of the dt root node"); |
26b81df4 EH |
816 | |
817 | object_class_property_add_bool(oc, "dump-guest-core", | |
d2623129 | 818 | machine_get_dump_guest_core, machine_set_dump_guest_core); |
26b81df4 | 819 | object_class_property_set_description(oc, "dump-guest-core", |
7eecec7d | 820 | "Include guest memory in a core dump"); |
26b81df4 EH |
821 | |
822 | object_class_property_add_bool(oc, "mem-merge", | |
d2623129 | 823 | machine_get_mem_merge, machine_set_mem_merge); |
26b81df4 | 824 | object_class_property_set_description(oc, "mem-merge", |
7eecec7d | 825 | "Enable/disable memory merge support"); |
26b81df4 EH |
826 | |
827 | object_class_property_add_bool(oc, "usb", | |
d2623129 | 828 | machine_get_usb, machine_set_usb); |
26b81df4 | 829 | object_class_property_set_description(oc, "usb", |
7eecec7d | 830 | "Set on/off to enable/disable usb"); |
26b81df4 EH |
831 | |
832 | object_class_property_add_bool(oc, "graphics", | |
d2623129 | 833 | machine_get_graphics, machine_set_graphics); |
26b81df4 | 834 | object_class_property_set_description(oc, "graphics", |
7eecec7d | 835 | "Set on/off to enable/disable graphics emulation"); |
26b81df4 | 836 | |
26b81df4 | 837 | object_class_property_add_str(oc, "firmware", |
d2623129 | 838 | machine_get_firmware, machine_set_firmware); |
26b81df4 | 839 | object_class_property_set_description(oc, "firmware", |
7eecec7d | 840 | "Firmware image"); |
26b81df4 EH |
841 | |
842 | object_class_property_add_bool(oc, "suppress-vmdesc", | |
d2623129 | 843 | machine_get_suppress_vmdesc, machine_set_suppress_vmdesc); |
26b81df4 | 844 | object_class_property_set_description(oc, "suppress-vmdesc", |
7eecec7d | 845 | "Set on to disable self-describing migration"); |
26b81df4 | 846 | |
db588194 | 847 | object_class_property_add_str(oc, "memory-encryption", |
d2623129 | 848 | machine_get_memory_encryption, machine_set_memory_encryption); |
db588194 | 849 | object_class_property_set_description(oc, "memory-encryption", |
7eecec7d | 850 | "Set memory encryption object to use"); |
acd5b054 EH |
851 | |
852 | object_class_property_add_str(oc, "memory-backend", | |
853 | machine_get_memdev, machine_set_memdev); | |
854 | object_class_property_set_description(oc, "memory-backend", | |
855 | "Set RAM backend" | |
856 | "Valid value is ID of hostmem based backend"); | |
076b35b5 ND |
857 | } |
858 | ||
dcb3d601 EH |
859 | static void machine_class_base_init(ObjectClass *oc, void *data) |
860 | { | |
2c920e45 PB |
861 | MachineClass *mc = MACHINE_CLASS(oc); |
862 | mc->max_cpus = mc->max_cpus ?: 1; | |
863 | mc->min_cpus = mc->min_cpus ?: 1; | |
864 | mc->default_cpus = mc->default_cpus ?: 1; | |
865 | ||
dcb3d601 EH |
866 | if (!object_class_is_abstract(oc)) { |
867 | const char *cname = object_class_get_name(oc); | |
868 | assert(g_str_has_suffix(cname, TYPE_MACHINE_SUFFIX)); | |
98cec76a EH |
869 | mc->name = g_strndup(cname, |
870 | strlen(cname) - strlen(TYPE_MACHINE_SUFFIX)); | |
b66bbee3 | 871 | mc->compat_props = g_ptr_array_new(); |
dcb3d601 EH |
872 | } |
873 | } | |
874 | ||
6b1b1440 MA |
875 | static void machine_initfn(Object *obj) |
876 | { | |
33cd52b5 | 877 | MachineState *ms = MACHINE(obj); |
b2fc91db | 878 | MachineClass *mc = MACHINE_GET_CLASS(obj); |
33cd52b5 | 879 | |
47c8ca53 | 880 | ms->dump_guest_core = true; |
75cc7f01 | 881 | ms->mem_merge = true; |
cfc58cf3 | 882 | ms->enable_graphics = true; |
d8870d02 | 883 | |
f6a0d06b EA |
884 | if (mc->nvdimm_supported) { |
885 | Object *obj = OBJECT(ms); | |
886 | ||
887 | ms->nvdimms_state = g_new0(NVDIMMState, 1); | |
888 | object_property_add_bool(obj, "nvdimm", | |
d2623129 | 889 | machine_get_nvdimm, machine_set_nvdimm); |
f6a0d06b EA |
890 | object_property_set_description(obj, "nvdimm", |
891 | "Set on/off to enable/disable " | |
7eecec7d | 892 | "NVDIMM instantiation"); |
f6a0d06b EA |
893 | |
894 | object_property_add_str(obj, "nvdimm-persistence", | |
895 | machine_get_nvdimm_persistence, | |
d2623129 | 896 | machine_set_nvdimm_persistence); |
f6a0d06b EA |
897 | object_property_set_description(obj, "nvdimm-persistence", |
898 | "Set NVDIMM persistence" | |
7eecec7d | 899 | "Valid values are cpu, mem-ctrl"); |
f6a0d06b EA |
900 | } |
901 | ||
fcd3f2cc | 902 | if (mc->cpu_index_to_instance_props && mc->get_default_cpu_node_id) { |
aa570207 | 903 | ms->numa_state = g_new0(NumaState, 1); |
244b3f44 | 904 | object_property_add_bool(obj, "hmat", |
d2623129 | 905 | machine_get_hmat, machine_set_hmat); |
244b3f44 TX |
906 | object_property_set_description(obj, "hmat", |
907 | "Set on/off to enable/disable " | |
908 | "ACPI Heterogeneous Memory Attribute " | |
7eecec7d | 909 | "Table (HMAT)"); |
aa570207 | 910 | } |
f6a0d06b | 911 | |
33cd52b5 AG |
912 | /* Register notifier when init is done for sysbus sanity checks */ |
913 | ms->sysbus_notifier.notify = machine_init_notify; | |
914 | qemu_add_machine_init_done_notifier(&ms->sysbus_notifier); | |
8b0e484c PB |
915 | |
916 | /* default to mc->default_cpus */ | |
917 | ms->smp.cpus = mc->default_cpus; | |
918 | ms->smp.max_cpus = mc->default_cpus; | |
919 | ms->smp.cores = 1; | |
920 | ms->smp.threads = 1; | |
921 | ms->smp.sockets = 1; | |
6b1b1440 MA |
922 | } |
923 | ||
924 | static void machine_finalize(Object *obj) | |
925 | { | |
926 | MachineState *ms = MACHINE(obj); | |
927 | ||
6b1b1440 MA |
928 | g_free(ms->kernel_filename); |
929 | g_free(ms->initrd_filename); | |
930 | g_free(ms->kernel_cmdline); | |
931 | g_free(ms->dtb); | |
932 | g_free(ms->dumpdtb); | |
933 | g_free(ms->dt_compatible); | |
934 | g_free(ms->firmware); | |
2ff4f67c | 935 | g_free(ms->device_memory); |
f6a0d06b | 936 | g_free(ms->nvdimms_state); |
aa570207 | 937 | g_free(ms->numa_state); |
6b1b1440 | 938 | } |
36d20cb2 | 939 | |
5e97b623 MA |
940 | bool machine_usb(MachineState *machine) |
941 | { | |
942 | return machine->usb; | |
943 | } | |
944 | ||
6cabe7fa MA |
945 | int machine_phandle_start(MachineState *machine) |
946 | { | |
947 | return machine->phandle_start; | |
948 | } | |
949 | ||
47c8ca53 MA |
950 | bool machine_dump_guest_core(MachineState *machine) |
951 | { | |
952 | return machine->dump_guest_core; | |
953 | } | |
954 | ||
75cc7f01 MA |
955 | bool machine_mem_merge(MachineState *machine) |
956 | { | |
957 | return machine->mem_merge; | |
958 | } | |
959 | ||
ec78f811 IM |
960 | static char *cpu_slot_to_string(const CPUArchId *cpu) |
961 | { | |
962 | GString *s = g_string_new(NULL); | |
963 | if (cpu->props.has_socket_id) { | |
964 | g_string_append_printf(s, "socket-id: %"PRId64, cpu->props.socket_id); | |
965 | } | |
176d2cda LX |
966 | if (cpu->props.has_die_id) { |
967 | g_string_append_printf(s, "die-id: %"PRId64, cpu->props.die_id); | |
968 | } | |
ec78f811 IM |
969 | if (cpu->props.has_core_id) { |
970 | if (s->len) { | |
971 | g_string_append_printf(s, ", "); | |
972 | } | |
973 | g_string_append_printf(s, "core-id: %"PRId64, cpu->props.core_id); | |
974 | } | |
975 | if (cpu->props.has_thread_id) { | |
976 | if (s->len) { | |
977 | g_string_append_printf(s, ", "); | |
978 | } | |
979 | g_string_append_printf(s, "thread-id: %"PRId64, cpu->props.thread_id); | |
980 | } | |
981 | return g_string_free(s, false); | |
982 | } | |
983 | ||
244b3f44 TX |
984 | static void numa_validate_initiator(NumaState *numa_state) |
985 | { | |
986 | int i; | |
987 | NodeInfo *numa_info = numa_state->nodes; | |
988 | ||
989 | for (i = 0; i < numa_state->num_nodes; i++) { | |
990 | if (numa_info[i].initiator == MAX_NODES) { | |
991 | error_report("The initiator of NUMA node %d is missing, use " | |
992 | "'-numa node,initiator' option to declare it", i); | |
993 | exit(1); | |
994 | } | |
995 | ||
996 | if (!numa_info[numa_info[i].initiator].present) { | |
997 | error_report("NUMA node %" PRIu16 " is missing, use " | |
998 | "'-numa node' option to declare it first", | |
999 | numa_info[i].initiator); | |
1000 | exit(1); | |
1001 | } | |
1002 | ||
1003 | if (!numa_info[numa_info[i].initiator].has_cpu) { | |
1004 | error_report("The initiator of NUMA node %d is invalid", i); | |
1005 | exit(1); | |
1006 | } | |
1007 | } | |
1008 | } | |
1009 | ||
7a3099fc | 1010 | static void machine_numa_finish_cpu_init(MachineState *machine) |
ec78f811 IM |
1011 | { |
1012 | int i; | |
60bed6a3 | 1013 | bool default_mapping; |
ec78f811 IM |
1014 | GString *s = g_string_new(NULL); |
1015 | MachineClass *mc = MACHINE_GET_CLASS(machine); | |
1016 | const CPUArchIdList *possible_cpus = mc->possible_cpu_arch_ids(machine); | |
1017 | ||
aa570207 | 1018 | assert(machine->numa_state->num_nodes); |
60bed6a3 IM |
1019 | for (i = 0; i < possible_cpus->len; i++) { |
1020 | if (possible_cpus->cpus[i].props.has_node_id) { | |
1021 | break; | |
1022 | } | |
1023 | } | |
1024 | default_mapping = (i == possible_cpus->len); | |
1025 | ||
ec78f811 IM |
1026 | for (i = 0; i < possible_cpus->len; i++) { |
1027 | const CPUArchId *cpu_slot = &possible_cpus->cpus[i]; | |
1028 | ||
ec78f811 | 1029 | if (!cpu_slot->props.has_node_id) { |
d41f3e75 IM |
1030 | /* fetch default mapping from board and enable it */ |
1031 | CpuInstanceProperties props = cpu_slot->props; | |
1032 | ||
79e07936 | 1033 | props.node_id = mc->get_default_cpu_node_id(machine, i); |
d41f3e75 | 1034 | if (!default_mapping) { |
60bed6a3 IM |
1035 | /* record slots with not set mapping, |
1036 | * TODO: make it hard error in future */ | |
1037 | char *cpu_str = cpu_slot_to_string(cpu_slot); | |
1038 | g_string_append_printf(s, "%sCPU %d [%s]", | |
1039 | s->len ? ", " : "", i, cpu_str); | |
1040 | g_free(cpu_str); | |
d41f3e75 IM |
1041 | |
1042 | /* non mapped cpus used to fallback to node 0 */ | |
1043 | props.node_id = 0; | |
60bed6a3 | 1044 | } |
d41f3e75 IM |
1045 | |
1046 | props.has_node_id = true; | |
1047 | machine_set_cpu_numa_node(machine, &props, &error_fatal); | |
ec78f811 IM |
1048 | } |
1049 | } | |
244b3f44 TX |
1050 | |
1051 | if (machine->numa_state->hmat_enabled) { | |
1052 | numa_validate_initiator(machine->numa_state); | |
1053 | } | |
1054 | ||
c6ff347c | 1055 | if (s->len && !qtest_enabled()) { |
3dc6f869 AF |
1056 | warn_report("CPU(s) not present in any NUMA nodes: %s", |
1057 | s->str); | |
1058 | warn_report("All CPU(s) up to maxcpus should be described " | |
1059 | "in NUMA config, ability to start up with partial NUMA " | |
1060 | "mappings is obsoleted and will be removed in future"); | |
ec78f811 IM |
1061 | } |
1062 | g_string_free(s, true); | |
1063 | } | |
1064 | ||
82b911aa IM |
1065 | MemoryRegion *machine_consume_memdev(MachineState *machine, |
1066 | HostMemoryBackend *backend) | |
1067 | { | |
1068 | MemoryRegion *ret = host_memory_backend_get_memory(backend); | |
1069 | ||
1070 | if (memory_region_is_mapped(ret)) { | |
7a309cc9 MA |
1071 | error_report("memory backend %s can't be used multiple times.", |
1072 | object_get_canonical_path_component(OBJECT(backend))); | |
82b911aa IM |
1073 | exit(EXIT_FAILURE); |
1074 | } | |
1075 | host_memory_backend_set_mapped(backend, true); | |
1076 | vmstate_register_ram_global(ret); | |
1077 | return ret; | |
1078 | } | |
1079 | ||
3df8c4f3 PB |
1080 | bool machine_smp_parse(MachineState *ms, QemuOpts *opts, Error **errp) |
1081 | { | |
1082 | MachineClass *mc = MACHINE_GET_CLASS(ms); | |
1083 | ||
1084 | mc->smp_parse(ms, opts); | |
1085 | ||
1086 | /* sanity-check smp_cpus and max_cpus against mc */ | |
1087 | if (ms->smp.cpus < mc->min_cpus) { | |
1088 | error_setg(errp, "Invalid SMP CPUs %d. The min CPUs " | |
1089 | "supported by machine '%s' is %d", | |
1090 | ms->smp.cpus, | |
1091 | mc->name, mc->min_cpus); | |
1092 | return false; | |
1093 | } else if (ms->smp.max_cpus > mc->max_cpus) { | |
1094 | error_setg(errp, "Invalid SMP CPUs %d. The max CPUs " | |
1095 | "supported by machine '%s' is %d", | |
1096 | current_machine->smp.max_cpus, | |
1097 | mc->name, mc->max_cpus); | |
1098 | return false; | |
1099 | } | |
1100 | return true; | |
1101 | } | |
1102 | ||
482dfe9a IM |
1103 | void machine_run_board_init(MachineState *machine) |
1104 | { | |
1105 | MachineClass *machine_class = MACHINE_GET_CLASS(machine); | |
61ad65d0 RH |
1106 | ObjectClass *oc = object_class_by_name(machine->cpu_type); |
1107 | CPUClass *cc; | |
ec78f811 | 1108 | |
82b911aa IM |
1109 | if (machine->ram_memdev_id) { |
1110 | Object *o; | |
1111 | o = object_resolve_path_type(machine->ram_memdev_id, | |
1112 | TYPE_MEMORY_BACKEND, NULL); | |
1113 | machine->ram = machine_consume_memdev(machine, MEMORY_BACKEND(o)); | |
1114 | } | |
1115 | ||
fcd3f2cc | 1116 | if (machine->numa_state) { |
aa570207 TX |
1117 | numa_complete_configuration(machine); |
1118 | if (machine->numa_state->num_nodes) { | |
1119 | machine_numa_finish_cpu_init(machine); | |
1120 | } | |
3aeaac8f | 1121 | } |
c9cf636d AF |
1122 | |
1123 | /* If the machine supports the valid_cpu_types check and the user | |
1124 | * specified a CPU with -cpu check here that the user CPU is supported. | |
1125 | */ | |
1126 | if (machine_class->valid_cpu_types && machine->cpu_type) { | |
c9cf636d AF |
1127 | int i; |
1128 | ||
1129 | for (i = 0; machine_class->valid_cpu_types[i]; i++) { | |
61ad65d0 | 1130 | if (object_class_dynamic_cast(oc, |
c9cf636d AF |
1131 | machine_class->valid_cpu_types[i])) { |
1132 | /* The user specificed CPU is in the valid field, we are | |
1133 | * good to go. | |
1134 | */ | |
1135 | break; | |
1136 | } | |
1137 | } | |
1138 | ||
1139 | if (!machine_class->valid_cpu_types[i]) { | |
1140 | /* The user specified CPU is not valid */ | |
1141 | error_report("Invalid CPU type: %s", machine->cpu_type); | |
1142 | error_printf("The valid types are: %s", | |
1143 | machine_class->valid_cpu_types[0]); | |
1144 | for (i = 1; machine_class->valid_cpu_types[i]; i++) { | |
1145 | error_printf(", %s", machine_class->valid_cpu_types[i]); | |
1146 | } | |
1147 | error_printf("\n"); | |
1148 | ||
1149 | exit(1); | |
1150 | } | |
1151 | } | |
1152 | ||
61ad65d0 RH |
1153 | /* Check if CPU type is deprecated and warn if so */ |
1154 | cc = CPU_CLASS(oc); | |
1155 | if (cc && cc->deprecation_note) { | |
1156 | warn_report("CPU model %s is deprecated -- %s", machine->cpu_type, | |
1157 | cc->deprecation_note); | |
1158 | } | |
1159 | ||
482dfe9a IM |
1160 | machine_class->init(machine); |
1161 | } | |
1162 | ||
36d20cb2 MA |
1163 | static const TypeInfo machine_info = { |
1164 | .name = TYPE_MACHINE, | |
1165 | .parent = TYPE_OBJECT, | |
1166 | .abstract = true, | |
1167 | .class_size = sizeof(MachineClass), | |
076b35b5 | 1168 | .class_init = machine_class_init, |
dcb3d601 | 1169 | .class_base_init = machine_class_base_init, |
36d20cb2 | 1170 | .instance_size = sizeof(MachineState), |
6b1b1440 MA |
1171 | .instance_init = machine_initfn, |
1172 | .instance_finalize = machine_finalize, | |
36d20cb2 MA |
1173 | }; |
1174 | ||
1175 | static void machine_register_types(void) | |
1176 | { | |
1177 | type_register_static(&machine_info); | |
1178 | } | |
1179 | ||
1180 | type_init(machine_register_types) |