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Commit | Line | Data |
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36d20cb2 MA |
1 | /* |
2 | * QEMU Machine | |
3 | * | |
4 | * Copyright (C) 2014 Red Hat Inc | |
5 | * | |
6 | * Authors: | |
7 | * Marcel Apfelbaum <marcel.a@redhat.com> | |
8 | * | |
9 | * This work is licensed under the terms of the GNU GPL, version 2 or later. | |
10 | * See the COPYING file in the top-level directory. | |
11 | */ | |
12 | ||
18c86e2b | 13 | #include "qemu/osdep.h" |
6f479566 LX |
14 | #include "qemu/option.h" |
15 | #include "qapi/qmp/qerror.h" | |
16 | #include "sysemu/replay.h" | |
fc6b3cf9 | 17 | #include "qemu/units.h" |
36d20cb2 | 18 | #include "hw/boards.h" |
da34e65c | 19 | #include "qapi/error.h" |
9af23989 | 20 | #include "qapi/qapi-visit-common.h" |
6b1b1440 | 21 | #include "qapi/visitor.h" |
33cd52b5 AG |
22 | #include "hw/sysbus.h" |
23 | #include "sysemu/sysemu.h" | |
3bfe5716 | 24 | #include "sysemu/numa.h" |
33cd52b5 | 25 | #include "qemu/error-report.h" |
c6ff347c | 26 | #include "sysemu/qtest.h" |
edc24ccd | 27 | #include "hw/pci/pci.h" |
f6a0d06b | 28 | #include "hw/mem/nvdimm.h" |
82b911aa | 29 | #include "migration/vmstate.h" |
6b1b1440 | 30 | |
6a558822 SH |
31 | GlobalProperty hw_compat_5_1[] = { |
32 | { "vhost-scsi", "num_queues", "1"}, | |
a4eef071 | 33 | { "vhost-user-blk", "num-queues", "1"}, |
6a558822 | 34 | { "vhost-user-scsi", "num_queues", "1"}, |
9445e1e1 | 35 | { "virtio-blk-device", "num-queues", "1"}, |
6a558822 | 36 | { "virtio-scsi-device", "num_queues", "1"}, |
6eb7a071 | 37 | { "nvme", "use-intel-id", "on"}, |
b1b0393c | 38 | { "pvpanic", "events", "1"}, /* PVPANIC_PANICKED */ |
6a558822 | 39 | }; |
3ff3c5d3 CH |
40 | const size_t hw_compat_5_1_len = G_N_ELEMENTS(hw_compat_5_1); |
41 | ||
7483cbba | 42 | GlobalProperty hw_compat_5_0[] = { |
2ebc2121 | 43 | { "pci-host-bridge", "x-config-reg-migration-enabled", "off" }, |
7483cbba | 44 | { "virtio-balloon-device", "page-poison", "false" }, |
f983ff95 PB |
45 | { "vmport", "x-read-set-eax", "off" }, |
46 | { "vmport", "x-signal-unsupported-cmd", "off" }, | |
47 | { "vmport", "x-report-vmx-type", "off" }, | |
48 | { "vmport", "x-cmds-v2", "off" }, | |
d55f5182 | 49 | { "virtio-device", "x-disable-legacy-check", "true" }, |
7483cbba | 50 | }; |
541aaa1d CH |
51 | const size_t hw_compat_5_0_len = G_N_ELEMENTS(hw_compat_5_0); |
52 | ||
5f258577 | 53 | GlobalProperty hw_compat_4_2[] = { |
c9b7d9ec DP |
54 | { "virtio-blk-device", "queue-size", "128"}, |
55 | { "virtio-scsi-device", "virtqueue_size", "128"}, | |
5f258577 | 56 | { "virtio-blk-device", "x-enable-wce-if-config-wce", "off" }, |
1bf8a989 DP |
57 | { "virtio-blk-device", "seg-max-adjust", "off"}, |
58 | { "virtio-scsi-device", "seg_max_adjust", "off"}, | |
59 | { "vhost-blk-device", "seg_max_adjust", "off"}, | |
7bacaf5f | 60 | { "usb-host", "suppress-remote-wake", "off" }, |
32187f3d | 61 | { "usb-redir", "suppress-remote-wake", "off" }, |
ed71c09f GH |
62 | { "qxl", "revision", "4" }, |
63 | { "qxl-vga", "revision", "4" }, | |
394f0f72 | 64 | { "fw_cfg", "acpi-mr-restore", "false" }, |
5f258577 EY |
65 | }; |
66 | const size_t hw_compat_4_2_len = G_N_ELEMENTS(hw_compat_4_2); | |
67 | ||
eb1556c4 JS |
68 | GlobalProperty hw_compat_4_1[] = { |
69 | { "virtio-pci", "x-pcie-flr-init", "off" }, | |
9d7bd082 | 70 | { "virtio-device", "use-disabled-flag", "false" }, |
eb1556c4 | 71 | }; |
9aec2e52 CH |
72 | const size_t hw_compat_4_1_len = G_N_ELEMENTS(hw_compat_4_1); |
73 | ||
8e8cbed0 | 74 | GlobalProperty hw_compat_4_0[] = { |
0a719662 GH |
75 | { "VGA", "edid", "false" }, |
76 | { "secondary-vga", "edid", "false" }, | |
77 | { "bochs-display", "edid", "false" }, | |
78 | { "virtio-vga", "edid", "false" }, | |
02501fc3 | 79 | { "virtio-gpu-device", "edid", "false" }, |
e57f2c31 | 80 | { "virtio-device", "use-started", "false" }, |
2bbadb08 | 81 | { "virtio-balloon-device", "qemu-4-0-config-size", "true" }, |
032cfe6a | 82 | { "pl031", "migrate-tick-offset", "false" }, |
0a719662 | 83 | }; |
9bf2650b CH |
84 | const size_t hw_compat_4_0_len = G_N_ELEMENTS(hw_compat_4_0); |
85 | ||
abd93cc7 | 86 | GlobalProperty hw_compat_3_1[] = { |
6c36bddf EH |
87 | { "pcie-root-port", "x-speed", "2_5" }, |
88 | { "pcie-root-port", "x-width", "1" }, | |
89 | { "memory-backend-file", "x-use-canonical-path-for-ramblock-id", "true" }, | |
90 | { "memory-backend-memfd", "x-use-canonical-path-for-ramblock-id", "true" }, | |
b6148757 MAL |
91 | { "tpm-crb", "ppi", "false" }, |
92 | { "tpm-tis", "ppi", "false" }, | |
b63e1050 GH |
93 | { "usb-kbd", "serial", "42" }, |
94 | { "usb-mouse", "serial", "42" }, | |
442bac16 | 95 | { "usb-tablet", "serial", "42" }, |
5c81161f SG |
96 | { "virtio-blk-device", "discard", "false" }, |
97 | { "virtio-blk-device", "write-zeroes", "false" }, | |
2bbadb08 | 98 | { "virtio-balloon-device", "qemu-4-0-config-size", "false" }, |
c8557f1b | 99 | { "pcie-root-port-base", "disable-acs", "true" }, /* Added in 4.1 */ |
abd93cc7 MAL |
100 | }; |
101 | const size_t hw_compat_3_1_len = G_N_ELEMENTS(hw_compat_3_1); | |
102 | ||
ddb3235d MAL |
103 | GlobalProperty hw_compat_3_0[] = {}; |
104 | const size_t hw_compat_3_0_len = G_N_ELEMENTS(hw_compat_3_0); | |
105 | ||
0d47310b | 106 | GlobalProperty hw_compat_2_12[] = { |
6c36bddf EH |
107 | { "migration", "decompress-error-check", "off" }, |
108 | { "hda-audio", "use-timer", "false" }, | |
109 | { "cirrus-vga", "global-vmstate", "true" }, | |
110 | { "VGA", "global-vmstate", "true" }, | |
111 | { "vmware-svga", "global-vmstate", "true" }, | |
112 | { "qxl-vga", "global-vmstate", "true" }, | |
0d47310b MAL |
113 | }; |
114 | const size_t hw_compat_2_12_len = G_N_ELEMENTS(hw_compat_2_12); | |
115 | ||
43df70a9 | 116 | GlobalProperty hw_compat_2_11[] = { |
6c36bddf EH |
117 | { "hpet", "hpet-offset-saved", "false" }, |
118 | { "virtio-blk-pci", "vectors", "2" }, | |
119 | { "vhost-user-blk-pci", "vectors", "2" }, | |
120 | { "e1000", "migrate_tso_props", "off" }, | |
43df70a9 MAL |
121 | }; |
122 | const size_t hw_compat_2_11_len = G_N_ELEMENTS(hw_compat_2_11); | |
123 | ||
503224f4 | 124 | GlobalProperty hw_compat_2_10[] = { |
6c36bddf EH |
125 | { "virtio-mouse-device", "wheel-axis", "false" }, |
126 | { "virtio-tablet-device", "wheel-axis", "false" }, | |
503224f4 MAL |
127 | }; |
128 | const size_t hw_compat_2_10_len = G_N_ELEMENTS(hw_compat_2_10); | |
129 | ||
3e803152 | 130 | GlobalProperty hw_compat_2_9[] = { |
6c36bddf EH |
131 | { "pci-bridge", "shpc", "off" }, |
132 | { "intel-iommu", "pt", "off" }, | |
133 | { "virtio-net-device", "x-mtu-bypass-backend", "off" }, | |
134 | { "pcie-root-port", "x-migrate-msix", "false" }, | |
3e803152 MAL |
135 | }; |
136 | const size_t hw_compat_2_9_len = G_N_ELEMENTS(hw_compat_2_9); | |
137 | ||
edc24ccd | 138 | GlobalProperty hw_compat_2_8[] = { |
6c36bddf EH |
139 | { "fw_cfg_mem", "x-file-slots", "0x10" }, |
140 | { "fw_cfg_io", "x-file-slots", "0x10" }, | |
141 | { "pflash_cfi01", "old-multiple-chip-handling", "on" }, | |
142 | { "pci-bridge", "shpc", "on" }, | |
143 | { TYPE_PCI_DEVICE, "x-pcie-extcap-init", "off" }, | |
144 | { "virtio-pci", "x-pcie-deverr-init", "off" }, | |
145 | { "virtio-pci", "x-pcie-lnkctl-init", "off" }, | |
146 | { "virtio-pci", "x-pcie-pm-init", "off" }, | |
147 | { "cirrus-vga", "vgamem_mb", "8" }, | |
148 | { "isa-cirrus-vga", "vgamem_mb", "8" }, | |
edc24ccd MAL |
149 | }; |
150 | const size_t hw_compat_2_8_len = G_N_ELEMENTS(hw_compat_2_8); | |
151 | ||
5a995064 | 152 | GlobalProperty hw_compat_2_7[] = { |
6c36bddf EH |
153 | { "virtio-pci", "page-per-vq", "on" }, |
154 | { "virtio-serial-device", "emergency-write", "off" }, | |
155 | { "ioapic", "version", "0x11" }, | |
156 | { "intel-iommu", "x-buggy-eim", "true" }, | |
157 | { "virtio-pci", "x-ignore-backend-features", "on" }, | |
5a995064 MAL |
158 | }; |
159 | const size_t hw_compat_2_7_len = G_N_ELEMENTS(hw_compat_2_7); | |
160 | ||
ff8f261f | 161 | GlobalProperty hw_compat_2_6[] = { |
6c36bddf | 162 | { "virtio-mmio", "format_transport_address", "off" }, |
dd56040d DDAG |
163 | /* Optional because not all virtio-pci devices support legacy mode */ |
164 | { "virtio-pci", "disable-modern", "on", .optional = true }, | |
165 | { "virtio-pci", "disable-legacy", "off", .optional = true }, | |
ff8f261f MAL |
166 | }; |
167 | const size_t hw_compat_2_6_len = G_N_ELEMENTS(hw_compat_2_6); | |
168 | ||
fe759610 | 169 | GlobalProperty hw_compat_2_5[] = { |
6c36bddf EH |
170 | { "isa-fdc", "fallback", "144" }, |
171 | { "pvscsi", "x-old-pci-configuration", "on" }, | |
172 | { "pvscsi", "x-disable-pcie", "on" }, | |
173 | { "vmxnet3", "x-old-msi-offsets", "on" }, | |
174 | { "vmxnet3", "x-disable-pcie", "on" }, | |
fe759610 MAL |
175 | }; |
176 | const size_t hw_compat_2_5_len = G_N_ELEMENTS(hw_compat_2_5); | |
177 | ||
2f99b9c2 | 178 | GlobalProperty hw_compat_2_4[] = { |
11a18c84 PMD |
179 | /* Optional because the 'scsi' property is Linux-only */ |
180 | { "virtio-blk-device", "scsi", "true", .optional = true }, | |
6c36bddf EH |
181 | { "e1000", "extra_mac_registers", "off" }, |
182 | { "virtio-pci", "x-disable-pcie", "on" }, | |
183 | { "virtio-pci", "migrate-extra", "off" }, | |
184 | { "fw_cfg_mem", "dma_enabled", "off" }, | |
185 | { "fw_cfg_io", "dma_enabled", "off" } | |
2f99b9c2 MAL |
186 | }; |
187 | const size_t hw_compat_2_4_len = G_N_ELEMENTS(hw_compat_2_4); | |
188 | ||
8995dd90 | 189 | GlobalProperty hw_compat_2_3[] = { |
6c36bddf EH |
190 | { "virtio-blk-pci", "any_layout", "off" }, |
191 | { "virtio-balloon-pci", "any_layout", "off" }, | |
192 | { "virtio-serial-pci", "any_layout", "off" }, | |
193 | { "virtio-9p-pci", "any_layout", "off" }, | |
194 | { "virtio-rng-pci", "any_layout", "off" }, | |
195 | { TYPE_PCI_DEVICE, "x-pcie-lnksta-dllla", "off" }, | |
196 | { "migration", "send-configuration", "off" }, | |
197 | { "migration", "send-section-footer", "off" }, | |
198 | { "migration", "store-global-state", "off" }, | |
8995dd90 MAL |
199 | }; |
200 | const size_t hw_compat_2_3_len = G_N_ELEMENTS(hw_compat_2_3); | |
201 | ||
1c30044e MAL |
202 | GlobalProperty hw_compat_2_2[] = {}; |
203 | const size_t hw_compat_2_2_len = G_N_ELEMENTS(hw_compat_2_2); | |
204 | ||
c4fc5695 | 205 | GlobalProperty hw_compat_2_1[] = { |
6c36bddf EH |
206 | { "intel-hda", "old_msi_addr", "on" }, |
207 | { "VGA", "qemu-extended-regs", "off" }, | |
208 | { "secondary-vga", "qemu-extended-regs", "off" }, | |
209 | { "virtio-scsi-pci", "any_layout", "off" }, | |
210 | { "usb-mouse", "usb_version", "1" }, | |
211 | { "usb-kbd", "usb_version", "1" }, | |
212 | { "virtio-pci", "virtio-pci-bus-master-bug-migration", "on" }, | |
c4fc5695 MAL |
213 | }; |
214 | const size_t hw_compat_2_1_len = G_N_ELEMENTS(hw_compat_2_1); | |
215 | ||
6b1b1440 MA |
216 | static char *machine_get_kernel(Object *obj, Error **errp) |
217 | { | |
218 | MachineState *ms = MACHINE(obj); | |
219 | ||
220 | return g_strdup(ms->kernel_filename); | |
221 | } | |
222 | ||
223 | static void machine_set_kernel(Object *obj, const char *value, Error **errp) | |
224 | { | |
225 | MachineState *ms = MACHINE(obj); | |
226 | ||
556068ee | 227 | g_free(ms->kernel_filename); |
6b1b1440 MA |
228 | ms->kernel_filename = g_strdup(value); |
229 | } | |
230 | ||
231 | static char *machine_get_initrd(Object *obj, Error **errp) | |
232 | { | |
233 | MachineState *ms = MACHINE(obj); | |
234 | ||
235 | return g_strdup(ms->initrd_filename); | |
236 | } | |
237 | ||
238 | static void machine_set_initrd(Object *obj, const char *value, Error **errp) | |
239 | { | |
240 | MachineState *ms = MACHINE(obj); | |
241 | ||
556068ee | 242 | g_free(ms->initrd_filename); |
6b1b1440 MA |
243 | ms->initrd_filename = g_strdup(value); |
244 | } | |
245 | ||
246 | static char *machine_get_append(Object *obj, Error **errp) | |
247 | { | |
248 | MachineState *ms = MACHINE(obj); | |
249 | ||
250 | return g_strdup(ms->kernel_cmdline); | |
251 | } | |
252 | ||
253 | static void machine_set_append(Object *obj, const char *value, Error **errp) | |
254 | { | |
255 | MachineState *ms = MACHINE(obj); | |
256 | ||
556068ee | 257 | g_free(ms->kernel_cmdline); |
6b1b1440 MA |
258 | ms->kernel_cmdline = g_strdup(value); |
259 | } | |
260 | ||
261 | static char *machine_get_dtb(Object *obj, Error **errp) | |
262 | { | |
263 | MachineState *ms = MACHINE(obj); | |
264 | ||
265 | return g_strdup(ms->dtb); | |
266 | } | |
267 | ||
268 | static void machine_set_dtb(Object *obj, const char *value, Error **errp) | |
269 | { | |
270 | MachineState *ms = MACHINE(obj); | |
271 | ||
556068ee | 272 | g_free(ms->dtb); |
6b1b1440 MA |
273 | ms->dtb = g_strdup(value); |
274 | } | |
275 | ||
276 | static char *machine_get_dumpdtb(Object *obj, Error **errp) | |
277 | { | |
278 | MachineState *ms = MACHINE(obj); | |
279 | ||
280 | return g_strdup(ms->dumpdtb); | |
281 | } | |
282 | ||
283 | static void machine_set_dumpdtb(Object *obj, const char *value, Error **errp) | |
284 | { | |
285 | MachineState *ms = MACHINE(obj); | |
286 | ||
556068ee | 287 | g_free(ms->dumpdtb); |
6b1b1440 MA |
288 | ms->dumpdtb = g_strdup(value); |
289 | } | |
290 | ||
291 | static void machine_get_phandle_start(Object *obj, Visitor *v, | |
d7bce999 EB |
292 | const char *name, void *opaque, |
293 | Error **errp) | |
6b1b1440 MA |
294 | { |
295 | MachineState *ms = MACHINE(obj); | |
296 | int64_t value = ms->phandle_start; | |
297 | ||
51e72bc1 | 298 | visit_type_int(v, name, &value, errp); |
6b1b1440 MA |
299 | } |
300 | ||
301 | static void machine_set_phandle_start(Object *obj, Visitor *v, | |
d7bce999 EB |
302 | const char *name, void *opaque, |
303 | Error **errp) | |
6b1b1440 MA |
304 | { |
305 | MachineState *ms = MACHINE(obj); | |
6b1b1440 MA |
306 | int64_t value; |
307 | ||
668f62ec | 308 | if (!visit_type_int(v, name, &value, errp)) { |
6b1b1440 MA |
309 | return; |
310 | } | |
311 | ||
312 | ms->phandle_start = value; | |
313 | } | |
314 | ||
315 | static char *machine_get_dt_compatible(Object *obj, Error **errp) | |
316 | { | |
317 | MachineState *ms = MACHINE(obj); | |
318 | ||
319 | return g_strdup(ms->dt_compatible); | |
320 | } | |
321 | ||
322 | static void machine_set_dt_compatible(Object *obj, const char *value, Error **errp) | |
323 | { | |
324 | MachineState *ms = MACHINE(obj); | |
325 | ||
556068ee | 326 | g_free(ms->dt_compatible); |
6b1b1440 MA |
327 | ms->dt_compatible = g_strdup(value); |
328 | } | |
329 | ||
330 | static bool machine_get_dump_guest_core(Object *obj, Error **errp) | |
331 | { | |
332 | MachineState *ms = MACHINE(obj); | |
333 | ||
334 | return ms->dump_guest_core; | |
335 | } | |
336 | ||
337 | static void machine_set_dump_guest_core(Object *obj, bool value, Error **errp) | |
338 | { | |
339 | MachineState *ms = MACHINE(obj); | |
340 | ||
341 | ms->dump_guest_core = value; | |
342 | } | |
343 | ||
344 | static bool machine_get_mem_merge(Object *obj, Error **errp) | |
345 | { | |
346 | MachineState *ms = MACHINE(obj); | |
347 | ||
348 | return ms->mem_merge; | |
349 | } | |
350 | ||
351 | static void machine_set_mem_merge(Object *obj, bool value, Error **errp) | |
352 | { | |
353 | MachineState *ms = MACHINE(obj); | |
354 | ||
355 | ms->mem_merge = value; | |
356 | } | |
357 | ||
358 | static bool machine_get_usb(Object *obj, Error **errp) | |
359 | { | |
360 | MachineState *ms = MACHINE(obj); | |
361 | ||
362 | return ms->usb; | |
363 | } | |
364 | ||
365 | static void machine_set_usb(Object *obj, bool value, Error **errp) | |
366 | { | |
367 | MachineState *ms = MACHINE(obj); | |
368 | ||
369 | ms->usb = value; | |
c6e76503 | 370 | ms->usb_disabled = !value; |
6b1b1440 MA |
371 | } |
372 | ||
cfc58cf3 EH |
373 | static bool machine_get_graphics(Object *obj, Error **errp) |
374 | { | |
375 | MachineState *ms = MACHINE(obj); | |
376 | ||
377 | return ms->enable_graphics; | |
378 | } | |
379 | ||
380 | static void machine_set_graphics(Object *obj, bool value, Error **errp) | |
381 | { | |
382 | MachineState *ms = MACHINE(obj); | |
383 | ||
384 | ms->enable_graphics = value; | |
385 | } | |
386 | ||
6b1b1440 MA |
387 | static char *machine_get_firmware(Object *obj, Error **errp) |
388 | { | |
389 | MachineState *ms = MACHINE(obj); | |
390 | ||
391 | return g_strdup(ms->firmware); | |
392 | } | |
393 | ||
394 | static void machine_set_firmware(Object *obj, const char *value, Error **errp) | |
395 | { | |
396 | MachineState *ms = MACHINE(obj); | |
397 | ||
556068ee | 398 | g_free(ms->firmware); |
6b1b1440 MA |
399 | ms->firmware = g_strdup(value); |
400 | } | |
401 | ||
9850c604 AG |
402 | static void machine_set_suppress_vmdesc(Object *obj, bool value, Error **errp) |
403 | { | |
404 | MachineState *ms = MACHINE(obj); | |
405 | ||
406 | ms->suppress_vmdesc = value; | |
407 | } | |
408 | ||
409 | static bool machine_get_suppress_vmdesc(Object *obj, Error **errp) | |
410 | { | |
411 | MachineState *ms = MACHINE(obj); | |
412 | ||
413 | return ms->suppress_vmdesc; | |
414 | } | |
415 | ||
db588194 BS |
416 | static char *machine_get_memory_encryption(Object *obj, Error **errp) |
417 | { | |
418 | MachineState *ms = MACHINE(obj); | |
419 | ||
420 | return g_strdup(ms->memory_encryption); | |
421 | } | |
422 | ||
423 | static void machine_set_memory_encryption(Object *obj, const char *value, | |
424 | Error **errp) | |
425 | { | |
426 | MachineState *ms = MACHINE(obj); | |
427 | ||
428 | g_free(ms->memory_encryption); | |
429 | ms->memory_encryption = g_strdup(value); | |
4ba59be1 DDAG |
430 | |
431 | /* | |
432 | * With memory encryption, the host can't see the real contents of RAM, | |
433 | * so there's no point in it trying to merge areas. | |
434 | */ | |
435 | if (value) { | |
436 | machine_set_mem_merge(obj, false, errp); | |
437 | } | |
db588194 BS |
438 | } |
439 | ||
f6a0d06b EA |
440 | static bool machine_get_nvdimm(Object *obj, Error **errp) |
441 | { | |
442 | MachineState *ms = MACHINE(obj); | |
443 | ||
444 | return ms->nvdimms_state->is_enabled; | |
445 | } | |
446 | ||
447 | static void machine_set_nvdimm(Object *obj, bool value, Error **errp) | |
448 | { | |
449 | MachineState *ms = MACHINE(obj); | |
450 | ||
451 | ms->nvdimms_state->is_enabled = value; | |
452 | } | |
453 | ||
244b3f44 TX |
454 | static bool machine_get_hmat(Object *obj, Error **errp) |
455 | { | |
456 | MachineState *ms = MACHINE(obj); | |
457 | ||
458 | return ms->numa_state->hmat_enabled; | |
459 | } | |
460 | ||
461 | static void machine_set_hmat(Object *obj, bool value, Error **errp) | |
462 | { | |
463 | MachineState *ms = MACHINE(obj); | |
464 | ||
465 | ms->numa_state->hmat_enabled = value; | |
466 | } | |
467 | ||
f6a0d06b EA |
468 | static char *machine_get_nvdimm_persistence(Object *obj, Error **errp) |
469 | { | |
470 | MachineState *ms = MACHINE(obj); | |
471 | ||
472 | return g_strdup(ms->nvdimms_state->persistence_string); | |
473 | } | |
474 | ||
475 | static void machine_set_nvdimm_persistence(Object *obj, const char *value, | |
476 | Error **errp) | |
477 | { | |
478 | MachineState *ms = MACHINE(obj); | |
479 | NVDIMMState *nvdimms_state = ms->nvdimms_state; | |
480 | ||
481 | if (strcmp(value, "cpu") == 0) { | |
482 | nvdimms_state->persistence = 3; | |
483 | } else if (strcmp(value, "mem-ctrl") == 0) { | |
484 | nvdimms_state->persistence = 2; | |
485 | } else { | |
486 | error_setg(errp, "-machine nvdimm-persistence=%s: unsupported option", | |
487 | value); | |
488 | return; | |
489 | } | |
490 | ||
491 | g_free(nvdimms_state->persistence_string); | |
492 | nvdimms_state->persistence_string = g_strdup(value); | |
493 | } | |
494 | ||
0bd1909d | 495 | void machine_class_allow_dynamic_sysbus_dev(MachineClass *mc, const char *type) |
33cd52b5 | 496 | { |
0bd1909d EH |
497 | strList *item = g_new0(strList, 1); |
498 | ||
499 | item->value = g_strdup(type); | |
500 | item->next = mc->allowed_dynamic_sysbus_devices; | |
501 | mc->allowed_dynamic_sysbus_devices = item; | |
33cd52b5 AG |
502 | } |
503 | ||
0bd1909d | 504 | static void validate_sysbus_device(SysBusDevice *sbdev, void *opaque) |
33cd52b5 | 505 | { |
0bd1909d EH |
506 | MachineState *machine = opaque; |
507 | MachineClass *mc = MACHINE_GET_CLASS(machine); | |
508 | bool allowed = false; | |
509 | strList *wl; | |
33cd52b5 | 510 | |
0bd1909d EH |
511 | for (wl = mc->allowed_dynamic_sysbus_devices; |
512 | !allowed && wl; | |
513 | wl = wl->next) { | |
514 | allowed |= !!object_dynamic_cast(OBJECT(sbdev), wl->value); | |
515 | } | |
516 | ||
517 | if (!allowed) { | |
518 | error_report("Option '-device %s' cannot be handled by this machine", | |
519 | object_class_get_name(object_get_class(OBJECT(sbdev)))); | |
520 | exit(1); | |
33cd52b5 | 521 | } |
0bd1909d EH |
522 | } |
523 | ||
aa8b1839 IM |
524 | static char *machine_get_memdev(Object *obj, Error **errp) |
525 | { | |
526 | MachineState *ms = MACHINE(obj); | |
527 | ||
528 | return g_strdup(ms->ram_memdev_id); | |
529 | } | |
530 | ||
531 | static void machine_set_memdev(Object *obj, const char *value, Error **errp) | |
532 | { | |
533 | MachineState *ms = MACHINE(obj); | |
534 | ||
535 | g_free(ms->ram_memdev_id); | |
536 | ms->ram_memdev_id = g_strdup(value); | |
537 | } | |
538 | ||
539 | ||
0bd1909d EH |
540 | static void machine_init_notify(Notifier *notifier, void *data) |
541 | { | |
542 | MachineState *machine = MACHINE(qdev_get_machine()); | |
33cd52b5 AG |
543 | |
544 | /* | |
0bd1909d EH |
545 | * Loop through all dynamically created sysbus devices and check if they are |
546 | * all allowed. If a device is not allowed, error out. | |
33cd52b5 | 547 | */ |
0bd1909d | 548 | foreach_dynamic_sysbus_device(validate_sysbus_device, machine); |
33cd52b5 AG |
549 | } |
550 | ||
f2d672c2 IM |
551 | HotpluggableCPUList *machine_query_hotpluggable_cpus(MachineState *machine) |
552 | { | |
553 | int i; | |
f2d672c2 | 554 | HotpluggableCPUList *head = NULL; |
d342eb76 IM |
555 | MachineClass *mc = MACHINE_GET_CLASS(machine); |
556 | ||
557 | /* force board to initialize possible_cpus if it hasn't been done yet */ | |
558 | mc->possible_cpu_arch_ids(machine); | |
f2d672c2 | 559 | |
f2d672c2 | 560 | for (i = 0; i < machine->possible_cpus->len; i++) { |
d342eb76 | 561 | Object *cpu; |
f2d672c2 IM |
562 | HotpluggableCPUList *list_item = g_new0(typeof(*list_item), 1); |
563 | HotpluggableCPU *cpu_item = g_new0(typeof(*cpu_item), 1); | |
564 | ||
d342eb76 | 565 | cpu_item->type = g_strdup(machine->possible_cpus->cpus[i].type); |
f2d672c2 IM |
566 | cpu_item->vcpus_count = machine->possible_cpus->cpus[i].vcpus_count; |
567 | cpu_item->props = g_memdup(&machine->possible_cpus->cpus[i].props, | |
568 | sizeof(*cpu_item->props)); | |
569 | ||
570 | cpu = machine->possible_cpus->cpus[i].cpu; | |
571 | if (cpu) { | |
572 | cpu_item->has_qom_path = true; | |
573 | cpu_item->qom_path = object_get_canonical_path(cpu); | |
574 | } | |
575 | list_item->value = cpu_item; | |
576 | list_item->next = head; | |
577 | head = list_item; | |
578 | } | |
579 | return head; | |
580 | } | |
581 | ||
7c88e65d IM |
582 | /** |
583 | * machine_set_cpu_numa_node: | |
584 | * @machine: machine object to modify | |
585 | * @props: specifies which cpu objects to assign to | |
586 | * numa node specified by @props.node_id | |
587 | * @errp: if an error occurs, a pointer to an area to store the error | |
588 | * | |
589 | * Associate NUMA node specified by @props.node_id with cpu slots that | |
590 | * match socket/core/thread-ids specified by @props. It's recommended to use | |
591 | * query-hotpluggable-cpus.props values to specify affected cpu slots, | |
592 | * which would lead to exact 1:1 mapping of cpu slots to NUMA node. | |
593 | * | |
594 | * However for CLI convenience it's possible to pass in subset of properties, | |
595 | * which would affect all cpu slots that match it. | |
596 | * Ex for pc machine: | |
597 | * -smp 4,cores=2,sockets=2 -numa node,nodeid=0 -numa node,nodeid=1 \ | |
598 | * -numa cpu,node-id=0,socket_id=0 \ | |
599 | * -numa cpu,node-id=1,socket_id=1 | |
600 | * will assign all child cores of socket 0 to node 0 and | |
601 | * of socket 1 to node 1. | |
602 | * | |
603 | * On attempt of reassigning (already assigned) cpu slot to another NUMA node, | |
604 | * return error. | |
605 | * Empty subset is disallowed and function will return with error in this case. | |
606 | */ | |
607 | void machine_set_cpu_numa_node(MachineState *machine, | |
608 | const CpuInstanceProperties *props, Error **errp) | |
609 | { | |
610 | MachineClass *mc = MACHINE_GET_CLASS(machine); | |
244b3f44 | 611 | NodeInfo *numa_info = machine->numa_state->nodes; |
7c88e65d IM |
612 | bool match = false; |
613 | int i; | |
614 | ||
615 | if (!mc->possible_cpu_arch_ids) { | |
616 | error_setg(errp, "mapping of CPUs to NUMA node is not supported"); | |
617 | return; | |
618 | } | |
619 | ||
620 | /* disabling node mapping is not supported, forbid it */ | |
621 | assert(props->has_node_id); | |
622 | ||
623 | /* force board to initialize possible_cpus if it hasn't been done yet */ | |
624 | mc->possible_cpu_arch_ids(machine); | |
625 | ||
626 | for (i = 0; i < machine->possible_cpus->len; i++) { | |
627 | CPUArchId *slot = &machine->possible_cpus->cpus[i]; | |
628 | ||
629 | /* reject unsupported by board properties */ | |
630 | if (props->has_thread_id && !slot->props.has_thread_id) { | |
631 | error_setg(errp, "thread-id is not supported"); | |
632 | return; | |
633 | } | |
634 | ||
635 | if (props->has_core_id && !slot->props.has_core_id) { | |
636 | error_setg(errp, "core-id is not supported"); | |
637 | return; | |
638 | } | |
639 | ||
640 | if (props->has_socket_id && !slot->props.has_socket_id) { | |
641 | error_setg(errp, "socket-id is not supported"); | |
642 | return; | |
643 | } | |
644 | ||
176d2cda LX |
645 | if (props->has_die_id && !slot->props.has_die_id) { |
646 | error_setg(errp, "die-id is not supported"); | |
647 | return; | |
648 | } | |
649 | ||
7c88e65d IM |
650 | /* skip slots with explicit mismatch */ |
651 | if (props->has_thread_id && props->thread_id != slot->props.thread_id) { | |
652 | continue; | |
653 | } | |
654 | ||
655 | if (props->has_core_id && props->core_id != slot->props.core_id) { | |
656 | continue; | |
657 | } | |
658 | ||
176d2cda LX |
659 | if (props->has_die_id && props->die_id != slot->props.die_id) { |
660 | continue; | |
661 | } | |
662 | ||
7c88e65d IM |
663 | if (props->has_socket_id && props->socket_id != slot->props.socket_id) { |
664 | continue; | |
665 | } | |
666 | ||
667 | /* reject assignment if slot is already assigned, for compatibility | |
668 | * of legacy cpu_index mapping with SPAPR core based mapping do not | |
669 | * error out if cpu thread and matched core have the same node-id */ | |
670 | if (slot->props.has_node_id && | |
671 | slot->props.node_id != props->node_id) { | |
672 | error_setg(errp, "CPU is already assigned to node-id: %" PRId64, | |
673 | slot->props.node_id); | |
674 | return; | |
675 | } | |
676 | ||
677 | /* assign slot to node as it's matched '-numa cpu' key */ | |
678 | match = true; | |
679 | slot->props.node_id = props->node_id; | |
680 | slot->props.has_node_id = props->has_node_id; | |
244b3f44 TX |
681 | |
682 | if (machine->numa_state->hmat_enabled) { | |
683 | if ((numa_info[props->node_id].initiator < MAX_NODES) && | |
684 | (props->node_id != numa_info[props->node_id].initiator)) { | |
685 | error_setg(errp, "The initiator of CPU NUMA node %" PRId64 | |
686 | " should be itself", props->node_id); | |
687 | return; | |
688 | } | |
689 | numa_info[props->node_id].has_cpu = true; | |
690 | numa_info[props->node_id].initiator = props->node_id; | |
691 | } | |
7c88e65d IM |
692 | } |
693 | ||
694 | if (!match) { | |
695 | error_setg(errp, "no match found"); | |
696 | } | |
697 | } | |
698 | ||
6f479566 LX |
699 | static void smp_parse(MachineState *ms, QemuOpts *opts) |
700 | { | |
701 | if (opts) { | |
702 | unsigned cpus = qemu_opt_get_number(opts, "cpus", 0); | |
703 | unsigned sockets = qemu_opt_get_number(opts, "sockets", 0); | |
704 | unsigned cores = qemu_opt_get_number(opts, "cores", 0); | |
705 | unsigned threads = qemu_opt_get_number(opts, "threads", 0); | |
706 | ||
707 | /* compute missing values, prefer sockets over cores over threads */ | |
708 | if (cpus == 0 || sockets == 0) { | |
709 | cores = cores > 0 ? cores : 1; | |
710 | threads = threads > 0 ? threads : 1; | |
711 | if (cpus == 0) { | |
712 | sockets = sockets > 0 ? sockets : 1; | |
713 | cpus = cores * threads * sockets; | |
714 | } else { | |
715 | ms->smp.max_cpus = | |
716 | qemu_opt_get_number(opts, "maxcpus", cpus); | |
717 | sockets = ms->smp.max_cpus / (cores * threads); | |
718 | } | |
719 | } else if (cores == 0) { | |
720 | threads = threads > 0 ? threads : 1; | |
721 | cores = cpus / (sockets * threads); | |
722 | cores = cores > 0 ? cores : 1; | |
723 | } else if (threads == 0) { | |
724 | threads = cpus / (cores * sockets); | |
725 | threads = threads > 0 ? threads : 1; | |
726 | } else if (sockets * cores * threads < cpus) { | |
727 | error_report("cpu topology: " | |
728 | "sockets (%u) * cores (%u) * threads (%u) < " | |
729 | "smp_cpus (%u)", | |
730 | sockets, cores, threads, cpus); | |
731 | exit(1); | |
732 | } | |
733 | ||
734 | ms->smp.max_cpus = | |
735 | qemu_opt_get_number(opts, "maxcpus", cpus); | |
736 | ||
737 | if (ms->smp.max_cpus < cpus) { | |
738 | error_report("maxcpus must be equal to or greater than smp"); | |
739 | exit(1); | |
740 | } | |
741 | ||
c4332cd1 IM |
742 | if (sockets * cores * threads != ms->smp.max_cpus) { |
743 | error_report("Invalid CPU topology: " | |
744 | "sockets (%u) * cores (%u) * threads (%u) " | |
745 | "!= maxcpus (%u)", | |
6f479566 LX |
746 | sockets, cores, threads, |
747 | ms->smp.max_cpus); | |
748 | exit(1); | |
749 | } | |
750 | ||
6f479566 LX |
751 | ms->smp.cpus = cpus; |
752 | ms->smp.cores = cores; | |
753 | ms->smp.threads = threads; | |
8cb30e3a | 754 | ms->smp.sockets = sockets; |
6f479566 LX |
755 | } |
756 | ||
757 | if (ms->smp.cpus > 1) { | |
758 | Error *blocker = NULL; | |
759 | error_setg(&blocker, QERR_REPLAY_NOT_SUPPORTED, "smp"); | |
760 | replay_add_blocker(blocker); | |
761 | } | |
762 | } | |
763 | ||
076b35b5 ND |
764 | static void machine_class_init(ObjectClass *oc, void *data) |
765 | { | |
766 | MachineClass *mc = MACHINE_CLASS(oc); | |
767 | ||
768 | /* Default 128 MB as guest ram size */ | |
d23b6caa | 769 | mc->default_ram_size = 128 * MiB; |
71ae9e94 | 770 | mc->rom_file_has_mr = true; |
6f479566 | 771 | mc->smp_parse = smp_parse; |
26b81df4 | 772 | |
55641213 LV |
773 | /* numa node memory size aligned on 8MB by default. |
774 | * On Linux, each node's border has to be 8MB aligned | |
775 | */ | |
776 | mc->numa_mem_align_shift = 23; | |
777 | ||
26b81df4 | 778 | object_class_property_add_str(oc, "kernel", |
d2623129 | 779 | machine_get_kernel, machine_set_kernel); |
26b81df4 | 780 | object_class_property_set_description(oc, "kernel", |
7eecec7d | 781 | "Linux kernel image file"); |
26b81df4 EH |
782 | |
783 | object_class_property_add_str(oc, "initrd", | |
d2623129 | 784 | machine_get_initrd, machine_set_initrd); |
26b81df4 | 785 | object_class_property_set_description(oc, "initrd", |
7eecec7d | 786 | "Linux initial ramdisk file"); |
26b81df4 EH |
787 | |
788 | object_class_property_add_str(oc, "append", | |
d2623129 | 789 | machine_get_append, machine_set_append); |
26b81df4 | 790 | object_class_property_set_description(oc, "append", |
7eecec7d | 791 | "Linux kernel command line"); |
26b81df4 EH |
792 | |
793 | object_class_property_add_str(oc, "dtb", | |
d2623129 | 794 | machine_get_dtb, machine_set_dtb); |
26b81df4 | 795 | object_class_property_set_description(oc, "dtb", |
7eecec7d | 796 | "Linux kernel device tree file"); |
26b81df4 EH |
797 | |
798 | object_class_property_add_str(oc, "dumpdtb", | |
d2623129 | 799 | machine_get_dumpdtb, machine_set_dumpdtb); |
26b81df4 | 800 | object_class_property_set_description(oc, "dumpdtb", |
7eecec7d | 801 | "Dump current dtb to a file and quit"); |
26b81df4 EH |
802 | |
803 | object_class_property_add(oc, "phandle-start", "int", | |
804 | machine_get_phandle_start, machine_set_phandle_start, | |
d2623129 | 805 | NULL, NULL); |
26b81df4 | 806 | object_class_property_set_description(oc, "phandle-start", |
7eecec7d | 807 | "The first phandle ID we may generate dynamically"); |
26b81df4 EH |
808 | |
809 | object_class_property_add_str(oc, "dt-compatible", | |
d2623129 | 810 | machine_get_dt_compatible, machine_set_dt_compatible); |
26b81df4 | 811 | object_class_property_set_description(oc, "dt-compatible", |
7eecec7d | 812 | "Overrides the \"compatible\" property of the dt root node"); |
26b81df4 EH |
813 | |
814 | object_class_property_add_bool(oc, "dump-guest-core", | |
d2623129 | 815 | machine_get_dump_guest_core, machine_set_dump_guest_core); |
26b81df4 | 816 | object_class_property_set_description(oc, "dump-guest-core", |
7eecec7d | 817 | "Include guest memory in a core dump"); |
26b81df4 EH |
818 | |
819 | object_class_property_add_bool(oc, "mem-merge", | |
d2623129 | 820 | machine_get_mem_merge, machine_set_mem_merge); |
26b81df4 | 821 | object_class_property_set_description(oc, "mem-merge", |
7eecec7d | 822 | "Enable/disable memory merge support"); |
26b81df4 EH |
823 | |
824 | object_class_property_add_bool(oc, "usb", | |
d2623129 | 825 | machine_get_usb, machine_set_usb); |
26b81df4 | 826 | object_class_property_set_description(oc, "usb", |
7eecec7d | 827 | "Set on/off to enable/disable usb"); |
26b81df4 EH |
828 | |
829 | object_class_property_add_bool(oc, "graphics", | |
d2623129 | 830 | machine_get_graphics, machine_set_graphics); |
26b81df4 | 831 | object_class_property_set_description(oc, "graphics", |
7eecec7d | 832 | "Set on/off to enable/disable graphics emulation"); |
26b81df4 | 833 | |
26b81df4 | 834 | object_class_property_add_str(oc, "firmware", |
d2623129 | 835 | machine_get_firmware, machine_set_firmware); |
26b81df4 | 836 | object_class_property_set_description(oc, "firmware", |
7eecec7d | 837 | "Firmware image"); |
26b81df4 EH |
838 | |
839 | object_class_property_add_bool(oc, "suppress-vmdesc", | |
d2623129 | 840 | machine_get_suppress_vmdesc, machine_set_suppress_vmdesc); |
26b81df4 | 841 | object_class_property_set_description(oc, "suppress-vmdesc", |
7eecec7d | 842 | "Set on to disable self-describing migration"); |
26b81df4 | 843 | |
db588194 | 844 | object_class_property_add_str(oc, "memory-encryption", |
d2623129 | 845 | machine_get_memory_encryption, machine_set_memory_encryption); |
db588194 | 846 | object_class_property_set_description(oc, "memory-encryption", |
7eecec7d | 847 | "Set memory encryption object to use"); |
acd5b054 EH |
848 | |
849 | object_class_property_add_str(oc, "memory-backend", | |
850 | machine_get_memdev, machine_set_memdev); | |
851 | object_class_property_set_description(oc, "memory-backend", | |
852 | "Set RAM backend" | |
853 | "Valid value is ID of hostmem based backend"); | |
076b35b5 ND |
854 | } |
855 | ||
dcb3d601 EH |
856 | static void machine_class_base_init(ObjectClass *oc, void *data) |
857 | { | |
2c920e45 PB |
858 | MachineClass *mc = MACHINE_CLASS(oc); |
859 | mc->max_cpus = mc->max_cpus ?: 1; | |
860 | mc->min_cpus = mc->min_cpus ?: 1; | |
861 | mc->default_cpus = mc->default_cpus ?: 1; | |
862 | ||
dcb3d601 EH |
863 | if (!object_class_is_abstract(oc)) { |
864 | const char *cname = object_class_get_name(oc); | |
865 | assert(g_str_has_suffix(cname, TYPE_MACHINE_SUFFIX)); | |
98cec76a EH |
866 | mc->name = g_strndup(cname, |
867 | strlen(cname) - strlen(TYPE_MACHINE_SUFFIX)); | |
b66bbee3 | 868 | mc->compat_props = g_ptr_array_new(); |
dcb3d601 EH |
869 | } |
870 | } | |
871 | ||
6b1b1440 MA |
872 | static void machine_initfn(Object *obj) |
873 | { | |
33cd52b5 | 874 | MachineState *ms = MACHINE(obj); |
b2fc91db | 875 | MachineClass *mc = MACHINE_GET_CLASS(obj); |
33cd52b5 | 876 | |
47c8ca53 | 877 | ms->dump_guest_core = true; |
75cc7f01 | 878 | ms->mem_merge = true; |
cfc58cf3 | 879 | ms->enable_graphics = true; |
d8870d02 | 880 | |
f6a0d06b EA |
881 | if (mc->nvdimm_supported) { |
882 | Object *obj = OBJECT(ms); | |
883 | ||
884 | ms->nvdimms_state = g_new0(NVDIMMState, 1); | |
885 | object_property_add_bool(obj, "nvdimm", | |
d2623129 | 886 | machine_get_nvdimm, machine_set_nvdimm); |
f6a0d06b EA |
887 | object_property_set_description(obj, "nvdimm", |
888 | "Set on/off to enable/disable " | |
7eecec7d | 889 | "NVDIMM instantiation"); |
f6a0d06b EA |
890 | |
891 | object_property_add_str(obj, "nvdimm-persistence", | |
892 | machine_get_nvdimm_persistence, | |
d2623129 | 893 | machine_set_nvdimm_persistence); |
f6a0d06b EA |
894 | object_property_set_description(obj, "nvdimm-persistence", |
895 | "Set NVDIMM persistence" | |
7eecec7d | 896 | "Valid values are cpu, mem-ctrl"); |
f6a0d06b EA |
897 | } |
898 | ||
fcd3f2cc | 899 | if (mc->cpu_index_to_instance_props && mc->get_default_cpu_node_id) { |
aa570207 | 900 | ms->numa_state = g_new0(NumaState, 1); |
244b3f44 | 901 | object_property_add_bool(obj, "hmat", |
d2623129 | 902 | machine_get_hmat, machine_set_hmat); |
244b3f44 TX |
903 | object_property_set_description(obj, "hmat", |
904 | "Set on/off to enable/disable " | |
905 | "ACPI Heterogeneous Memory Attribute " | |
7eecec7d | 906 | "Table (HMAT)"); |
aa570207 | 907 | } |
f6a0d06b | 908 | |
33cd52b5 AG |
909 | /* Register notifier when init is done for sysbus sanity checks */ |
910 | ms->sysbus_notifier.notify = machine_init_notify; | |
911 | qemu_add_machine_init_done_notifier(&ms->sysbus_notifier); | |
8b0e484c PB |
912 | |
913 | /* default to mc->default_cpus */ | |
914 | ms->smp.cpus = mc->default_cpus; | |
915 | ms->smp.max_cpus = mc->default_cpus; | |
916 | ms->smp.cores = 1; | |
917 | ms->smp.threads = 1; | |
918 | ms->smp.sockets = 1; | |
6b1b1440 MA |
919 | } |
920 | ||
921 | static void machine_finalize(Object *obj) | |
922 | { | |
923 | MachineState *ms = MACHINE(obj); | |
924 | ||
6b1b1440 MA |
925 | g_free(ms->kernel_filename); |
926 | g_free(ms->initrd_filename); | |
927 | g_free(ms->kernel_cmdline); | |
928 | g_free(ms->dtb); | |
929 | g_free(ms->dumpdtb); | |
930 | g_free(ms->dt_compatible); | |
931 | g_free(ms->firmware); | |
2ff4f67c | 932 | g_free(ms->device_memory); |
f6a0d06b | 933 | g_free(ms->nvdimms_state); |
aa570207 | 934 | g_free(ms->numa_state); |
6b1b1440 | 935 | } |
36d20cb2 | 936 | |
5e97b623 MA |
937 | bool machine_usb(MachineState *machine) |
938 | { | |
939 | return machine->usb; | |
940 | } | |
941 | ||
6cabe7fa MA |
942 | int machine_phandle_start(MachineState *machine) |
943 | { | |
944 | return machine->phandle_start; | |
945 | } | |
946 | ||
47c8ca53 MA |
947 | bool machine_dump_guest_core(MachineState *machine) |
948 | { | |
949 | return machine->dump_guest_core; | |
950 | } | |
951 | ||
75cc7f01 MA |
952 | bool machine_mem_merge(MachineState *machine) |
953 | { | |
954 | return machine->mem_merge; | |
955 | } | |
956 | ||
ec78f811 IM |
957 | static char *cpu_slot_to_string(const CPUArchId *cpu) |
958 | { | |
959 | GString *s = g_string_new(NULL); | |
960 | if (cpu->props.has_socket_id) { | |
961 | g_string_append_printf(s, "socket-id: %"PRId64, cpu->props.socket_id); | |
962 | } | |
176d2cda LX |
963 | if (cpu->props.has_die_id) { |
964 | g_string_append_printf(s, "die-id: %"PRId64, cpu->props.die_id); | |
965 | } | |
ec78f811 IM |
966 | if (cpu->props.has_core_id) { |
967 | if (s->len) { | |
968 | g_string_append_printf(s, ", "); | |
969 | } | |
970 | g_string_append_printf(s, "core-id: %"PRId64, cpu->props.core_id); | |
971 | } | |
972 | if (cpu->props.has_thread_id) { | |
973 | if (s->len) { | |
974 | g_string_append_printf(s, ", "); | |
975 | } | |
976 | g_string_append_printf(s, "thread-id: %"PRId64, cpu->props.thread_id); | |
977 | } | |
978 | return g_string_free(s, false); | |
979 | } | |
980 | ||
244b3f44 TX |
981 | static void numa_validate_initiator(NumaState *numa_state) |
982 | { | |
983 | int i; | |
984 | NodeInfo *numa_info = numa_state->nodes; | |
985 | ||
986 | for (i = 0; i < numa_state->num_nodes; i++) { | |
987 | if (numa_info[i].initiator == MAX_NODES) { | |
988 | error_report("The initiator of NUMA node %d is missing, use " | |
989 | "'-numa node,initiator' option to declare it", i); | |
990 | exit(1); | |
991 | } | |
992 | ||
993 | if (!numa_info[numa_info[i].initiator].present) { | |
994 | error_report("NUMA node %" PRIu16 " is missing, use " | |
995 | "'-numa node' option to declare it first", | |
996 | numa_info[i].initiator); | |
997 | exit(1); | |
998 | } | |
999 | ||
1000 | if (!numa_info[numa_info[i].initiator].has_cpu) { | |
1001 | error_report("The initiator of NUMA node %d is invalid", i); | |
1002 | exit(1); | |
1003 | } | |
1004 | } | |
1005 | } | |
1006 | ||
7a3099fc | 1007 | static void machine_numa_finish_cpu_init(MachineState *machine) |
ec78f811 IM |
1008 | { |
1009 | int i; | |
60bed6a3 | 1010 | bool default_mapping; |
ec78f811 IM |
1011 | GString *s = g_string_new(NULL); |
1012 | MachineClass *mc = MACHINE_GET_CLASS(machine); | |
1013 | const CPUArchIdList *possible_cpus = mc->possible_cpu_arch_ids(machine); | |
1014 | ||
aa570207 | 1015 | assert(machine->numa_state->num_nodes); |
60bed6a3 IM |
1016 | for (i = 0; i < possible_cpus->len; i++) { |
1017 | if (possible_cpus->cpus[i].props.has_node_id) { | |
1018 | break; | |
1019 | } | |
1020 | } | |
1021 | default_mapping = (i == possible_cpus->len); | |
1022 | ||
ec78f811 IM |
1023 | for (i = 0; i < possible_cpus->len; i++) { |
1024 | const CPUArchId *cpu_slot = &possible_cpus->cpus[i]; | |
1025 | ||
ec78f811 | 1026 | if (!cpu_slot->props.has_node_id) { |
d41f3e75 IM |
1027 | /* fetch default mapping from board and enable it */ |
1028 | CpuInstanceProperties props = cpu_slot->props; | |
1029 | ||
79e07936 | 1030 | props.node_id = mc->get_default_cpu_node_id(machine, i); |
d41f3e75 | 1031 | if (!default_mapping) { |
60bed6a3 IM |
1032 | /* record slots with not set mapping, |
1033 | * TODO: make it hard error in future */ | |
1034 | char *cpu_str = cpu_slot_to_string(cpu_slot); | |
1035 | g_string_append_printf(s, "%sCPU %d [%s]", | |
1036 | s->len ? ", " : "", i, cpu_str); | |
1037 | g_free(cpu_str); | |
d41f3e75 IM |
1038 | |
1039 | /* non mapped cpus used to fallback to node 0 */ | |
1040 | props.node_id = 0; | |
60bed6a3 | 1041 | } |
d41f3e75 IM |
1042 | |
1043 | props.has_node_id = true; | |
1044 | machine_set_cpu_numa_node(machine, &props, &error_fatal); | |
ec78f811 IM |
1045 | } |
1046 | } | |
244b3f44 TX |
1047 | |
1048 | if (machine->numa_state->hmat_enabled) { | |
1049 | numa_validate_initiator(machine->numa_state); | |
1050 | } | |
1051 | ||
c6ff347c | 1052 | if (s->len && !qtest_enabled()) { |
3dc6f869 AF |
1053 | warn_report("CPU(s) not present in any NUMA nodes: %s", |
1054 | s->str); | |
1055 | warn_report("All CPU(s) up to maxcpus should be described " | |
1056 | "in NUMA config, ability to start up with partial NUMA " | |
1057 | "mappings is obsoleted and will be removed in future"); | |
ec78f811 IM |
1058 | } |
1059 | g_string_free(s, true); | |
1060 | } | |
1061 | ||
82b911aa IM |
1062 | MemoryRegion *machine_consume_memdev(MachineState *machine, |
1063 | HostMemoryBackend *backend) | |
1064 | { | |
1065 | MemoryRegion *ret = host_memory_backend_get_memory(backend); | |
1066 | ||
1067 | if (memory_region_is_mapped(ret)) { | |
7a309cc9 MA |
1068 | error_report("memory backend %s can't be used multiple times.", |
1069 | object_get_canonical_path_component(OBJECT(backend))); | |
82b911aa IM |
1070 | exit(EXIT_FAILURE); |
1071 | } | |
1072 | host_memory_backend_set_mapped(backend, true); | |
1073 | vmstate_register_ram_global(ret); | |
1074 | return ret; | |
1075 | } | |
1076 | ||
482dfe9a IM |
1077 | void machine_run_board_init(MachineState *machine) |
1078 | { | |
1079 | MachineClass *machine_class = MACHINE_GET_CLASS(machine); | |
61ad65d0 RH |
1080 | ObjectClass *oc = object_class_by_name(machine->cpu_type); |
1081 | CPUClass *cc; | |
ec78f811 | 1082 | |
82b911aa IM |
1083 | if (machine->ram_memdev_id) { |
1084 | Object *o; | |
1085 | o = object_resolve_path_type(machine->ram_memdev_id, | |
1086 | TYPE_MEMORY_BACKEND, NULL); | |
1087 | machine->ram = machine_consume_memdev(machine, MEMORY_BACKEND(o)); | |
1088 | } | |
1089 | ||
fcd3f2cc | 1090 | if (machine->numa_state) { |
aa570207 TX |
1091 | numa_complete_configuration(machine); |
1092 | if (machine->numa_state->num_nodes) { | |
1093 | machine_numa_finish_cpu_init(machine); | |
1094 | } | |
3aeaac8f | 1095 | } |
c9cf636d AF |
1096 | |
1097 | /* If the machine supports the valid_cpu_types check and the user | |
1098 | * specified a CPU with -cpu check here that the user CPU is supported. | |
1099 | */ | |
1100 | if (machine_class->valid_cpu_types && machine->cpu_type) { | |
c9cf636d AF |
1101 | int i; |
1102 | ||
1103 | for (i = 0; machine_class->valid_cpu_types[i]; i++) { | |
61ad65d0 | 1104 | if (object_class_dynamic_cast(oc, |
c9cf636d AF |
1105 | machine_class->valid_cpu_types[i])) { |
1106 | /* The user specificed CPU is in the valid field, we are | |
1107 | * good to go. | |
1108 | */ | |
1109 | break; | |
1110 | } | |
1111 | } | |
1112 | ||
1113 | if (!machine_class->valid_cpu_types[i]) { | |
1114 | /* The user specified CPU is not valid */ | |
1115 | error_report("Invalid CPU type: %s", machine->cpu_type); | |
1116 | error_printf("The valid types are: %s", | |
1117 | machine_class->valid_cpu_types[0]); | |
1118 | for (i = 1; machine_class->valid_cpu_types[i]; i++) { | |
1119 | error_printf(", %s", machine_class->valid_cpu_types[i]); | |
1120 | } | |
1121 | error_printf("\n"); | |
1122 | ||
1123 | exit(1); | |
1124 | } | |
1125 | } | |
1126 | ||
61ad65d0 RH |
1127 | /* Check if CPU type is deprecated and warn if so */ |
1128 | cc = CPU_CLASS(oc); | |
1129 | if (cc && cc->deprecation_note) { | |
1130 | warn_report("CPU model %s is deprecated -- %s", machine->cpu_type, | |
1131 | cc->deprecation_note); | |
1132 | } | |
1133 | ||
482dfe9a IM |
1134 | machine_class->init(machine); |
1135 | } | |
1136 | ||
36d20cb2 MA |
1137 | static const TypeInfo machine_info = { |
1138 | .name = TYPE_MACHINE, | |
1139 | .parent = TYPE_OBJECT, | |
1140 | .abstract = true, | |
1141 | .class_size = sizeof(MachineClass), | |
076b35b5 | 1142 | .class_init = machine_class_init, |
dcb3d601 | 1143 | .class_base_init = machine_class_base_init, |
36d20cb2 | 1144 | .instance_size = sizeof(MachineState), |
6b1b1440 MA |
1145 | .instance_init = machine_initfn, |
1146 | .instance_finalize = machine_finalize, | |
36d20cb2 MA |
1147 | }; |
1148 | ||
1149 | static void machine_register_types(void) | |
1150 | { | |
1151 | type_register_static(&machine_info); | |
1152 | } | |
1153 | ||
1154 | type_init(machine_register_types) |