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Commit | Line | Data |
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36d20cb2 MA |
1 | /* |
2 | * QEMU Machine | |
3 | * | |
4 | * Copyright (C) 2014 Red Hat Inc | |
5 | * | |
6 | * Authors: | |
7 | * Marcel Apfelbaum <marcel.a@redhat.com> | |
8 | * | |
9 | * This work is licensed under the terms of the GNU GPL, version 2 or later. | |
10 | * See the COPYING file in the top-level directory. | |
11 | */ | |
12 | ||
18c86e2b | 13 | #include "qemu/osdep.h" |
6f479566 LX |
14 | #include "qemu/option.h" |
15 | #include "qapi/qmp/qerror.h" | |
16 | #include "sysemu/replay.h" | |
fc6b3cf9 | 17 | #include "qemu/units.h" |
36d20cb2 | 18 | #include "hw/boards.h" |
da34e65c | 19 | #include "qapi/error.h" |
9af23989 | 20 | #include "qapi/qapi-visit-common.h" |
6b1b1440 | 21 | #include "qapi/visitor.h" |
33cd52b5 AG |
22 | #include "hw/sysbus.h" |
23 | #include "sysemu/sysemu.h" | |
3bfe5716 | 24 | #include "sysemu/numa.h" |
33cd52b5 | 25 | #include "qemu/error-report.h" |
c6ff347c | 26 | #include "sysemu/qtest.h" |
edc24ccd | 27 | #include "hw/pci/pci.h" |
f6a0d06b | 28 | #include "hw/mem/nvdimm.h" |
82b911aa | 29 | #include "migration/vmstate.h" |
6b1b1440 | 30 | |
6a558822 SH |
31 | GlobalProperty hw_compat_5_1[] = { |
32 | { "vhost-scsi", "num_queues", "1"}, | |
a4eef071 | 33 | { "vhost-user-blk", "num-queues", "1"}, |
6a558822 | 34 | { "vhost-user-scsi", "num_queues", "1"}, |
9445e1e1 | 35 | { "virtio-blk-device", "num-queues", "1"}, |
6a558822 SH |
36 | { "virtio-scsi-device", "num_queues", "1"}, |
37 | }; | |
3ff3c5d3 CH |
38 | const size_t hw_compat_5_1_len = G_N_ELEMENTS(hw_compat_5_1); |
39 | ||
7483cbba | 40 | GlobalProperty hw_compat_5_0[] = { |
2ebc2121 | 41 | { "pci-host-bridge", "x-config-reg-migration-enabled", "off" }, |
7483cbba | 42 | { "virtio-balloon-device", "page-poison", "false" }, |
f983ff95 PB |
43 | { "vmport", "x-read-set-eax", "off" }, |
44 | { "vmport", "x-signal-unsupported-cmd", "off" }, | |
45 | { "vmport", "x-report-vmx-type", "off" }, | |
46 | { "vmport", "x-cmds-v2", "off" }, | |
d55f5182 | 47 | { "virtio-device", "x-disable-legacy-check", "true" }, |
7483cbba | 48 | }; |
541aaa1d CH |
49 | const size_t hw_compat_5_0_len = G_N_ELEMENTS(hw_compat_5_0); |
50 | ||
5f258577 | 51 | GlobalProperty hw_compat_4_2[] = { |
c9b7d9ec DP |
52 | { "virtio-blk-device", "queue-size", "128"}, |
53 | { "virtio-scsi-device", "virtqueue_size", "128"}, | |
5f258577 | 54 | { "virtio-blk-device", "x-enable-wce-if-config-wce", "off" }, |
1bf8a989 DP |
55 | { "virtio-blk-device", "seg-max-adjust", "off"}, |
56 | { "virtio-scsi-device", "seg_max_adjust", "off"}, | |
57 | { "vhost-blk-device", "seg_max_adjust", "off"}, | |
7bacaf5f | 58 | { "usb-host", "suppress-remote-wake", "off" }, |
32187f3d | 59 | { "usb-redir", "suppress-remote-wake", "off" }, |
ed71c09f GH |
60 | { "qxl", "revision", "4" }, |
61 | { "qxl-vga", "revision", "4" }, | |
394f0f72 | 62 | { "fw_cfg", "acpi-mr-restore", "false" }, |
5f258577 EY |
63 | }; |
64 | const size_t hw_compat_4_2_len = G_N_ELEMENTS(hw_compat_4_2); | |
65 | ||
eb1556c4 JS |
66 | GlobalProperty hw_compat_4_1[] = { |
67 | { "virtio-pci", "x-pcie-flr-init", "off" }, | |
9d7bd082 | 68 | { "virtio-device", "use-disabled-flag", "false" }, |
eb1556c4 | 69 | }; |
9aec2e52 CH |
70 | const size_t hw_compat_4_1_len = G_N_ELEMENTS(hw_compat_4_1); |
71 | ||
8e8cbed0 | 72 | GlobalProperty hw_compat_4_0[] = { |
0a719662 GH |
73 | { "VGA", "edid", "false" }, |
74 | { "secondary-vga", "edid", "false" }, | |
75 | { "bochs-display", "edid", "false" }, | |
76 | { "virtio-vga", "edid", "false" }, | |
02501fc3 | 77 | { "virtio-gpu-device", "edid", "false" }, |
e57f2c31 | 78 | { "virtio-device", "use-started", "false" }, |
2bbadb08 | 79 | { "virtio-balloon-device", "qemu-4-0-config-size", "true" }, |
032cfe6a | 80 | { "pl031", "migrate-tick-offset", "false" }, |
0a719662 | 81 | }; |
9bf2650b CH |
82 | const size_t hw_compat_4_0_len = G_N_ELEMENTS(hw_compat_4_0); |
83 | ||
abd93cc7 | 84 | GlobalProperty hw_compat_3_1[] = { |
6c36bddf EH |
85 | { "pcie-root-port", "x-speed", "2_5" }, |
86 | { "pcie-root-port", "x-width", "1" }, | |
87 | { "memory-backend-file", "x-use-canonical-path-for-ramblock-id", "true" }, | |
88 | { "memory-backend-memfd", "x-use-canonical-path-for-ramblock-id", "true" }, | |
b6148757 MAL |
89 | { "tpm-crb", "ppi", "false" }, |
90 | { "tpm-tis", "ppi", "false" }, | |
b63e1050 GH |
91 | { "usb-kbd", "serial", "42" }, |
92 | { "usb-mouse", "serial", "42" }, | |
442bac16 | 93 | { "usb-tablet", "serial", "42" }, |
5c81161f SG |
94 | { "virtio-blk-device", "discard", "false" }, |
95 | { "virtio-blk-device", "write-zeroes", "false" }, | |
2bbadb08 | 96 | { "virtio-balloon-device", "qemu-4-0-config-size", "false" }, |
c8557f1b | 97 | { "pcie-root-port-base", "disable-acs", "true" }, /* Added in 4.1 */ |
abd93cc7 MAL |
98 | }; |
99 | const size_t hw_compat_3_1_len = G_N_ELEMENTS(hw_compat_3_1); | |
100 | ||
ddb3235d MAL |
101 | GlobalProperty hw_compat_3_0[] = {}; |
102 | const size_t hw_compat_3_0_len = G_N_ELEMENTS(hw_compat_3_0); | |
103 | ||
0d47310b | 104 | GlobalProperty hw_compat_2_12[] = { |
6c36bddf EH |
105 | { "migration", "decompress-error-check", "off" }, |
106 | { "hda-audio", "use-timer", "false" }, | |
107 | { "cirrus-vga", "global-vmstate", "true" }, | |
108 | { "VGA", "global-vmstate", "true" }, | |
109 | { "vmware-svga", "global-vmstate", "true" }, | |
110 | { "qxl-vga", "global-vmstate", "true" }, | |
0d47310b MAL |
111 | }; |
112 | const size_t hw_compat_2_12_len = G_N_ELEMENTS(hw_compat_2_12); | |
113 | ||
43df70a9 | 114 | GlobalProperty hw_compat_2_11[] = { |
6c36bddf EH |
115 | { "hpet", "hpet-offset-saved", "false" }, |
116 | { "virtio-blk-pci", "vectors", "2" }, | |
117 | { "vhost-user-blk-pci", "vectors", "2" }, | |
118 | { "e1000", "migrate_tso_props", "off" }, | |
43df70a9 MAL |
119 | }; |
120 | const size_t hw_compat_2_11_len = G_N_ELEMENTS(hw_compat_2_11); | |
121 | ||
503224f4 | 122 | GlobalProperty hw_compat_2_10[] = { |
6c36bddf EH |
123 | { "virtio-mouse-device", "wheel-axis", "false" }, |
124 | { "virtio-tablet-device", "wheel-axis", "false" }, | |
503224f4 MAL |
125 | }; |
126 | const size_t hw_compat_2_10_len = G_N_ELEMENTS(hw_compat_2_10); | |
127 | ||
3e803152 | 128 | GlobalProperty hw_compat_2_9[] = { |
6c36bddf EH |
129 | { "pci-bridge", "shpc", "off" }, |
130 | { "intel-iommu", "pt", "off" }, | |
131 | { "virtio-net-device", "x-mtu-bypass-backend", "off" }, | |
132 | { "pcie-root-port", "x-migrate-msix", "false" }, | |
3e803152 MAL |
133 | }; |
134 | const size_t hw_compat_2_9_len = G_N_ELEMENTS(hw_compat_2_9); | |
135 | ||
edc24ccd | 136 | GlobalProperty hw_compat_2_8[] = { |
6c36bddf EH |
137 | { "fw_cfg_mem", "x-file-slots", "0x10" }, |
138 | { "fw_cfg_io", "x-file-slots", "0x10" }, | |
139 | { "pflash_cfi01", "old-multiple-chip-handling", "on" }, | |
140 | { "pci-bridge", "shpc", "on" }, | |
141 | { TYPE_PCI_DEVICE, "x-pcie-extcap-init", "off" }, | |
142 | { "virtio-pci", "x-pcie-deverr-init", "off" }, | |
143 | { "virtio-pci", "x-pcie-lnkctl-init", "off" }, | |
144 | { "virtio-pci", "x-pcie-pm-init", "off" }, | |
145 | { "cirrus-vga", "vgamem_mb", "8" }, | |
146 | { "isa-cirrus-vga", "vgamem_mb", "8" }, | |
edc24ccd MAL |
147 | }; |
148 | const size_t hw_compat_2_8_len = G_N_ELEMENTS(hw_compat_2_8); | |
149 | ||
5a995064 | 150 | GlobalProperty hw_compat_2_7[] = { |
6c36bddf EH |
151 | { "virtio-pci", "page-per-vq", "on" }, |
152 | { "virtio-serial-device", "emergency-write", "off" }, | |
153 | { "ioapic", "version", "0x11" }, | |
154 | { "intel-iommu", "x-buggy-eim", "true" }, | |
155 | { "virtio-pci", "x-ignore-backend-features", "on" }, | |
5a995064 MAL |
156 | }; |
157 | const size_t hw_compat_2_7_len = G_N_ELEMENTS(hw_compat_2_7); | |
158 | ||
ff8f261f | 159 | GlobalProperty hw_compat_2_6[] = { |
6c36bddf | 160 | { "virtio-mmio", "format_transport_address", "off" }, |
dd56040d DDAG |
161 | /* Optional because not all virtio-pci devices support legacy mode */ |
162 | { "virtio-pci", "disable-modern", "on", .optional = true }, | |
163 | { "virtio-pci", "disable-legacy", "off", .optional = true }, | |
ff8f261f MAL |
164 | }; |
165 | const size_t hw_compat_2_6_len = G_N_ELEMENTS(hw_compat_2_6); | |
166 | ||
fe759610 | 167 | GlobalProperty hw_compat_2_5[] = { |
6c36bddf EH |
168 | { "isa-fdc", "fallback", "144" }, |
169 | { "pvscsi", "x-old-pci-configuration", "on" }, | |
170 | { "pvscsi", "x-disable-pcie", "on" }, | |
171 | { "vmxnet3", "x-old-msi-offsets", "on" }, | |
172 | { "vmxnet3", "x-disable-pcie", "on" }, | |
fe759610 MAL |
173 | }; |
174 | const size_t hw_compat_2_5_len = G_N_ELEMENTS(hw_compat_2_5); | |
175 | ||
2f99b9c2 | 176 | GlobalProperty hw_compat_2_4[] = { |
11a18c84 PMD |
177 | /* Optional because the 'scsi' property is Linux-only */ |
178 | { "virtio-blk-device", "scsi", "true", .optional = true }, | |
6c36bddf EH |
179 | { "e1000", "extra_mac_registers", "off" }, |
180 | { "virtio-pci", "x-disable-pcie", "on" }, | |
181 | { "virtio-pci", "migrate-extra", "off" }, | |
182 | { "fw_cfg_mem", "dma_enabled", "off" }, | |
183 | { "fw_cfg_io", "dma_enabled", "off" } | |
2f99b9c2 MAL |
184 | }; |
185 | const size_t hw_compat_2_4_len = G_N_ELEMENTS(hw_compat_2_4); | |
186 | ||
8995dd90 | 187 | GlobalProperty hw_compat_2_3[] = { |
6c36bddf EH |
188 | { "virtio-blk-pci", "any_layout", "off" }, |
189 | { "virtio-balloon-pci", "any_layout", "off" }, | |
190 | { "virtio-serial-pci", "any_layout", "off" }, | |
191 | { "virtio-9p-pci", "any_layout", "off" }, | |
192 | { "virtio-rng-pci", "any_layout", "off" }, | |
193 | { TYPE_PCI_DEVICE, "x-pcie-lnksta-dllla", "off" }, | |
194 | { "migration", "send-configuration", "off" }, | |
195 | { "migration", "send-section-footer", "off" }, | |
196 | { "migration", "store-global-state", "off" }, | |
8995dd90 MAL |
197 | }; |
198 | const size_t hw_compat_2_3_len = G_N_ELEMENTS(hw_compat_2_3); | |
199 | ||
1c30044e MAL |
200 | GlobalProperty hw_compat_2_2[] = {}; |
201 | const size_t hw_compat_2_2_len = G_N_ELEMENTS(hw_compat_2_2); | |
202 | ||
c4fc5695 | 203 | GlobalProperty hw_compat_2_1[] = { |
6c36bddf EH |
204 | { "intel-hda", "old_msi_addr", "on" }, |
205 | { "VGA", "qemu-extended-regs", "off" }, | |
206 | { "secondary-vga", "qemu-extended-regs", "off" }, | |
207 | { "virtio-scsi-pci", "any_layout", "off" }, | |
208 | { "usb-mouse", "usb_version", "1" }, | |
209 | { "usb-kbd", "usb_version", "1" }, | |
210 | { "virtio-pci", "virtio-pci-bus-master-bug-migration", "on" }, | |
c4fc5695 MAL |
211 | }; |
212 | const size_t hw_compat_2_1_len = G_N_ELEMENTS(hw_compat_2_1); | |
213 | ||
6b1b1440 MA |
214 | static char *machine_get_kernel(Object *obj, Error **errp) |
215 | { | |
216 | MachineState *ms = MACHINE(obj); | |
217 | ||
218 | return g_strdup(ms->kernel_filename); | |
219 | } | |
220 | ||
221 | static void machine_set_kernel(Object *obj, const char *value, Error **errp) | |
222 | { | |
223 | MachineState *ms = MACHINE(obj); | |
224 | ||
556068ee | 225 | g_free(ms->kernel_filename); |
6b1b1440 MA |
226 | ms->kernel_filename = g_strdup(value); |
227 | } | |
228 | ||
229 | static char *machine_get_initrd(Object *obj, Error **errp) | |
230 | { | |
231 | MachineState *ms = MACHINE(obj); | |
232 | ||
233 | return g_strdup(ms->initrd_filename); | |
234 | } | |
235 | ||
236 | static void machine_set_initrd(Object *obj, const char *value, Error **errp) | |
237 | { | |
238 | MachineState *ms = MACHINE(obj); | |
239 | ||
556068ee | 240 | g_free(ms->initrd_filename); |
6b1b1440 MA |
241 | ms->initrd_filename = g_strdup(value); |
242 | } | |
243 | ||
244 | static char *machine_get_append(Object *obj, Error **errp) | |
245 | { | |
246 | MachineState *ms = MACHINE(obj); | |
247 | ||
248 | return g_strdup(ms->kernel_cmdline); | |
249 | } | |
250 | ||
251 | static void machine_set_append(Object *obj, const char *value, Error **errp) | |
252 | { | |
253 | MachineState *ms = MACHINE(obj); | |
254 | ||
556068ee | 255 | g_free(ms->kernel_cmdline); |
6b1b1440 MA |
256 | ms->kernel_cmdline = g_strdup(value); |
257 | } | |
258 | ||
259 | static char *machine_get_dtb(Object *obj, Error **errp) | |
260 | { | |
261 | MachineState *ms = MACHINE(obj); | |
262 | ||
263 | return g_strdup(ms->dtb); | |
264 | } | |
265 | ||
266 | static void machine_set_dtb(Object *obj, const char *value, Error **errp) | |
267 | { | |
268 | MachineState *ms = MACHINE(obj); | |
269 | ||
556068ee | 270 | g_free(ms->dtb); |
6b1b1440 MA |
271 | ms->dtb = g_strdup(value); |
272 | } | |
273 | ||
274 | static char *machine_get_dumpdtb(Object *obj, Error **errp) | |
275 | { | |
276 | MachineState *ms = MACHINE(obj); | |
277 | ||
278 | return g_strdup(ms->dumpdtb); | |
279 | } | |
280 | ||
281 | static void machine_set_dumpdtb(Object *obj, const char *value, Error **errp) | |
282 | { | |
283 | MachineState *ms = MACHINE(obj); | |
284 | ||
556068ee | 285 | g_free(ms->dumpdtb); |
6b1b1440 MA |
286 | ms->dumpdtb = g_strdup(value); |
287 | } | |
288 | ||
289 | static void machine_get_phandle_start(Object *obj, Visitor *v, | |
d7bce999 EB |
290 | const char *name, void *opaque, |
291 | Error **errp) | |
6b1b1440 MA |
292 | { |
293 | MachineState *ms = MACHINE(obj); | |
294 | int64_t value = ms->phandle_start; | |
295 | ||
51e72bc1 | 296 | visit_type_int(v, name, &value, errp); |
6b1b1440 MA |
297 | } |
298 | ||
299 | static void machine_set_phandle_start(Object *obj, Visitor *v, | |
d7bce999 EB |
300 | const char *name, void *opaque, |
301 | Error **errp) | |
6b1b1440 MA |
302 | { |
303 | MachineState *ms = MACHINE(obj); | |
6b1b1440 MA |
304 | int64_t value; |
305 | ||
668f62ec | 306 | if (!visit_type_int(v, name, &value, errp)) { |
6b1b1440 MA |
307 | return; |
308 | } | |
309 | ||
310 | ms->phandle_start = value; | |
311 | } | |
312 | ||
313 | static char *machine_get_dt_compatible(Object *obj, Error **errp) | |
314 | { | |
315 | MachineState *ms = MACHINE(obj); | |
316 | ||
317 | return g_strdup(ms->dt_compatible); | |
318 | } | |
319 | ||
320 | static void machine_set_dt_compatible(Object *obj, const char *value, Error **errp) | |
321 | { | |
322 | MachineState *ms = MACHINE(obj); | |
323 | ||
556068ee | 324 | g_free(ms->dt_compatible); |
6b1b1440 MA |
325 | ms->dt_compatible = g_strdup(value); |
326 | } | |
327 | ||
328 | static bool machine_get_dump_guest_core(Object *obj, Error **errp) | |
329 | { | |
330 | MachineState *ms = MACHINE(obj); | |
331 | ||
332 | return ms->dump_guest_core; | |
333 | } | |
334 | ||
335 | static void machine_set_dump_guest_core(Object *obj, bool value, Error **errp) | |
336 | { | |
337 | MachineState *ms = MACHINE(obj); | |
338 | ||
339 | ms->dump_guest_core = value; | |
340 | } | |
341 | ||
342 | static bool machine_get_mem_merge(Object *obj, Error **errp) | |
343 | { | |
344 | MachineState *ms = MACHINE(obj); | |
345 | ||
346 | return ms->mem_merge; | |
347 | } | |
348 | ||
349 | static void machine_set_mem_merge(Object *obj, bool value, Error **errp) | |
350 | { | |
351 | MachineState *ms = MACHINE(obj); | |
352 | ||
353 | ms->mem_merge = value; | |
354 | } | |
355 | ||
356 | static bool machine_get_usb(Object *obj, Error **errp) | |
357 | { | |
358 | MachineState *ms = MACHINE(obj); | |
359 | ||
360 | return ms->usb; | |
361 | } | |
362 | ||
363 | static void machine_set_usb(Object *obj, bool value, Error **errp) | |
364 | { | |
365 | MachineState *ms = MACHINE(obj); | |
366 | ||
367 | ms->usb = value; | |
c6e76503 | 368 | ms->usb_disabled = !value; |
6b1b1440 MA |
369 | } |
370 | ||
cfc58cf3 EH |
371 | static bool machine_get_graphics(Object *obj, Error **errp) |
372 | { | |
373 | MachineState *ms = MACHINE(obj); | |
374 | ||
375 | return ms->enable_graphics; | |
376 | } | |
377 | ||
378 | static void machine_set_graphics(Object *obj, bool value, Error **errp) | |
379 | { | |
380 | MachineState *ms = MACHINE(obj); | |
381 | ||
382 | ms->enable_graphics = value; | |
383 | } | |
384 | ||
6b1b1440 MA |
385 | static char *machine_get_firmware(Object *obj, Error **errp) |
386 | { | |
387 | MachineState *ms = MACHINE(obj); | |
388 | ||
389 | return g_strdup(ms->firmware); | |
390 | } | |
391 | ||
392 | static void machine_set_firmware(Object *obj, const char *value, Error **errp) | |
393 | { | |
394 | MachineState *ms = MACHINE(obj); | |
395 | ||
556068ee | 396 | g_free(ms->firmware); |
6b1b1440 MA |
397 | ms->firmware = g_strdup(value); |
398 | } | |
399 | ||
9850c604 AG |
400 | static void machine_set_suppress_vmdesc(Object *obj, bool value, Error **errp) |
401 | { | |
402 | MachineState *ms = MACHINE(obj); | |
403 | ||
404 | ms->suppress_vmdesc = value; | |
405 | } | |
406 | ||
407 | static bool machine_get_suppress_vmdesc(Object *obj, Error **errp) | |
408 | { | |
409 | MachineState *ms = MACHINE(obj); | |
410 | ||
411 | return ms->suppress_vmdesc; | |
412 | } | |
413 | ||
db588194 BS |
414 | static char *machine_get_memory_encryption(Object *obj, Error **errp) |
415 | { | |
416 | MachineState *ms = MACHINE(obj); | |
417 | ||
418 | return g_strdup(ms->memory_encryption); | |
419 | } | |
420 | ||
421 | static void machine_set_memory_encryption(Object *obj, const char *value, | |
422 | Error **errp) | |
423 | { | |
424 | MachineState *ms = MACHINE(obj); | |
425 | ||
426 | g_free(ms->memory_encryption); | |
427 | ms->memory_encryption = g_strdup(value); | |
4ba59be1 DDAG |
428 | |
429 | /* | |
430 | * With memory encryption, the host can't see the real contents of RAM, | |
431 | * so there's no point in it trying to merge areas. | |
432 | */ | |
433 | if (value) { | |
434 | machine_set_mem_merge(obj, false, errp); | |
435 | } | |
db588194 BS |
436 | } |
437 | ||
f6a0d06b EA |
438 | static bool machine_get_nvdimm(Object *obj, Error **errp) |
439 | { | |
440 | MachineState *ms = MACHINE(obj); | |
441 | ||
442 | return ms->nvdimms_state->is_enabled; | |
443 | } | |
444 | ||
445 | static void machine_set_nvdimm(Object *obj, bool value, Error **errp) | |
446 | { | |
447 | MachineState *ms = MACHINE(obj); | |
448 | ||
449 | ms->nvdimms_state->is_enabled = value; | |
450 | } | |
451 | ||
244b3f44 TX |
452 | static bool machine_get_hmat(Object *obj, Error **errp) |
453 | { | |
454 | MachineState *ms = MACHINE(obj); | |
455 | ||
456 | return ms->numa_state->hmat_enabled; | |
457 | } | |
458 | ||
459 | static void machine_set_hmat(Object *obj, bool value, Error **errp) | |
460 | { | |
461 | MachineState *ms = MACHINE(obj); | |
462 | ||
463 | ms->numa_state->hmat_enabled = value; | |
464 | } | |
465 | ||
f6a0d06b EA |
466 | static char *machine_get_nvdimm_persistence(Object *obj, Error **errp) |
467 | { | |
468 | MachineState *ms = MACHINE(obj); | |
469 | ||
470 | return g_strdup(ms->nvdimms_state->persistence_string); | |
471 | } | |
472 | ||
473 | static void machine_set_nvdimm_persistence(Object *obj, const char *value, | |
474 | Error **errp) | |
475 | { | |
476 | MachineState *ms = MACHINE(obj); | |
477 | NVDIMMState *nvdimms_state = ms->nvdimms_state; | |
478 | ||
479 | if (strcmp(value, "cpu") == 0) { | |
480 | nvdimms_state->persistence = 3; | |
481 | } else if (strcmp(value, "mem-ctrl") == 0) { | |
482 | nvdimms_state->persistence = 2; | |
483 | } else { | |
484 | error_setg(errp, "-machine nvdimm-persistence=%s: unsupported option", | |
485 | value); | |
486 | return; | |
487 | } | |
488 | ||
489 | g_free(nvdimms_state->persistence_string); | |
490 | nvdimms_state->persistence_string = g_strdup(value); | |
491 | } | |
492 | ||
0bd1909d | 493 | void machine_class_allow_dynamic_sysbus_dev(MachineClass *mc, const char *type) |
33cd52b5 | 494 | { |
0bd1909d EH |
495 | strList *item = g_new0(strList, 1); |
496 | ||
497 | item->value = g_strdup(type); | |
498 | item->next = mc->allowed_dynamic_sysbus_devices; | |
499 | mc->allowed_dynamic_sysbus_devices = item; | |
33cd52b5 AG |
500 | } |
501 | ||
0bd1909d | 502 | static void validate_sysbus_device(SysBusDevice *sbdev, void *opaque) |
33cd52b5 | 503 | { |
0bd1909d EH |
504 | MachineState *machine = opaque; |
505 | MachineClass *mc = MACHINE_GET_CLASS(machine); | |
506 | bool allowed = false; | |
507 | strList *wl; | |
33cd52b5 | 508 | |
0bd1909d EH |
509 | for (wl = mc->allowed_dynamic_sysbus_devices; |
510 | !allowed && wl; | |
511 | wl = wl->next) { | |
512 | allowed |= !!object_dynamic_cast(OBJECT(sbdev), wl->value); | |
513 | } | |
514 | ||
515 | if (!allowed) { | |
516 | error_report("Option '-device %s' cannot be handled by this machine", | |
517 | object_class_get_name(object_get_class(OBJECT(sbdev)))); | |
518 | exit(1); | |
33cd52b5 | 519 | } |
0bd1909d EH |
520 | } |
521 | ||
aa8b1839 IM |
522 | static char *machine_get_memdev(Object *obj, Error **errp) |
523 | { | |
524 | MachineState *ms = MACHINE(obj); | |
525 | ||
526 | return g_strdup(ms->ram_memdev_id); | |
527 | } | |
528 | ||
529 | static void machine_set_memdev(Object *obj, const char *value, Error **errp) | |
530 | { | |
531 | MachineState *ms = MACHINE(obj); | |
532 | ||
533 | g_free(ms->ram_memdev_id); | |
534 | ms->ram_memdev_id = g_strdup(value); | |
535 | } | |
536 | ||
537 | ||
0bd1909d EH |
538 | static void machine_init_notify(Notifier *notifier, void *data) |
539 | { | |
540 | MachineState *machine = MACHINE(qdev_get_machine()); | |
33cd52b5 AG |
541 | |
542 | /* | |
0bd1909d EH |
543 | * Loop through all dynamically created sysbus devices and check if they are |
544 | * all allowed. If a device is not allowed, error out. | |
33cd52b5 | 545 | */ |
0bd1909d | 546 | foreach_dynamic_sysbus_device(validate_sysbus_device, machine); |
33cd52b5 AG |
547 | } |
548 | ||
f2d672c2 IM |
549 | HotpluggableCPUList *machine_query_hotpluggable_cpus(MachineState *machine) |
550 | { | |
551 | int i; | |
f2d672c2 | 552 | HotpluggableCPUList *head = NULL; |
d342eb76 IM |
553 | MachineClass *mc = MACHINE_GET_CLASS(machine); |
554 | ||
555 | /* force board to initialize possible_cpus if it hasn't been done yet */ | |
556 | mc->possible_cpu_arch_ids(machine); | |
f2d672c2 | 557 | |
f2d672c2 | 558 | for (i = 0; i < machine->possible_cpus->len; i++) { |
d342eb76 | 559 | Object *cpu; |
f2d672c2 IM |
560 | HotpluggableCPUList *list_item = g_new0(typeof(*list_item), 1); |
561 | HotpluggableCPU *cpu_item = g_new0(typeof(*cpu_item), 1); | |
562 | ||
d342eb76 | 563 | cpu_item->type = g_strdup(machine->possible_cpus->cpus[i].type); |
f2d672c2 IM |
564 | cpu_item->vcpus_count = machine->possible_cpus->cpus[i].vcpus_count; |
565 | cpu_item->props = g_memdup(&machine->possible_cpus->cpus[i].props, | |
566 | sizeof(*cpu_item->props)); | |
567 | ||
568 | cpu = machine->possible_cpus->cpus[i].cpu; | |
569 | if (cpu) { | |
570 | cpu_item->has_qom_path = true; | |
571 | cpu_item->qom_path = object_get_canonical_path(cpu); | |
572 | } | |
573 | list_item->value = cpu_item; | |
574 | list_item->next = head; | |
575 | head = list_item; | |
576 | } | |
577 | return head; | |
578 | } | |
579 | ||
7c88e65d IM |
580 | /** |
581 | * machine_set_cpu_numa_node: | |
582 | * @machine: machine object to modify | |
583 | * @props: specifies which cpu objects to assign to | |
584 | * numa node specified by @props.node_id | |
585 | * @errp: if an error occurs, a pointer to an area to store the error | |
586 | * | |
587 | * Associate NUMA node specified by @props.node_id with cpu slots that | |
588 | * match socket/core/thread-ids specified by @props. It's recommended to use | |
589 | * query-hotpluggable-cpus.props values to specify affected cpu slots, | |
590 | * which would lead to exact 1:1 mapping of cpu slots to NUMA node. | |
591 | * | |
592 | * However for CLI convenience it's possible to pass in subset of properties, | |
593 | * which would affect all cpu slots that match it. | |
594 | * Ex for pc machine: | |
595 | * -smp 4,cores=2,sockets=2 -numa node,nodeid=0 -numa node,nodeid=1 \ | |
596 | * -numa cpu,node-id=0,socket_id=0 \ | |
597 | * -numa cpu,node-id=1,socket_id=1 | |
598 | * will assign all child cores of socket 0 to node 0 and | |
599 | * of socket 1 to node 1. | |
600 | * | |
601 | * On attempt of reassigning (already assigned) cpu slot to another NUMA node, | |
602 | * return error. | |
603 | * Empty subset is disallowed and function will return with error in this case. | |
604 | */ | |
605 | void machine_set_cpu_numa_node(MachineState *machine, | |
606 | const CpuInstanceProperties *props, Error **errp) | |
607 | { | |
608 | MachineClass *mc = MACHINE_GET_CLASS(machine); | |
244b3f44 | 609 | NodeInfo *numa_info = machine->numa_state->nodes; |
7c88e65d IM |
610 | bool match = false; |
611 | int i; | |
612 | ||
613 | if (!mc->possible_cpu_arch_ids) { | |
614 | error_setg(errp, "mapping of CPUs to NUMA node is not supported"); | |
615 | return; | |
616 | } | |
617 | ||
618 | /* disabling node mapping is not supported, forbid it */ | |
619 | assert(props->has_node_id); | |
620 | ||
621 | /* force board to initialize possible_cpus if it hasn't been done yet */ | |
622 | mc->possible_cpu_arch_ids(machine); | |
623 | ||
624 | for (i = 0; i < machine->possible_cpus->len; i++) { | |
625 | CPUArchId *slot = &machine->possible_cpus->cpus[i]; | |
626 | ||
627 | /* reject unsupported by board properties */ | |
628 | if (props->has_thread_id && !slot->props.has_thread_id) { | |
629 | error_setg(errp, "thread-id is not supported"); | |
630 | return; | |
631 | } | |
632 | ||
633 | if (props->has_core_id && !slot->props.has_core_id) { | |
634 | error_setg(errp, "core-id is not supported"); | |
635 | return; | |
636 | } | |
637 | ||
638 | if (props->has_socket_id && !slot->props.has_socket_id) { | |
639 | error_setg(errp, "socket-id is not supported"); | |
640 | return; | |
641 | } | |
642 | ||
176d2cda LX |
643 | if (props->has_die_id && !slot->props.has_die_id) { |
644 | error_setg(errp, "die-id is not supported"); | |
645 | return; | |
646 | } | |
647 | ||
7c88e65d IM |
648 | /* skip slots with explicit mismatch */ |
649 | if (props->has_thread_id && props->thread_id != slot->props.thread_id) { | |
650 | continue; | |
651 | } | |
652 | ||
653 | if (props->has_core_id && props->core_id != slot->props.core_id) { | |
654 | continue; | |
655 | } | |
656 | ||
176d2cda LX |
657 | if (props->has_die_id && props->die_id != slot->props.die_id) { |
658 | continue; | |
659 | } | |
660 | ||
7c88e65d IM |
661 | if (props->has_socket_id && props->socket_id != slot->props.socket_id) { |
662 | continue; | |
663 | } | |
664 | ||
665 | /* reject assignment if slot is already assigned, for compatibility | |
666 | * of legacy cpu_index mapping with SPAPR core based mapping do not | |
667 | * error out if cpu thread and matched core have the same node-id */ | |
668 | if (slot->props.has_node_id && | |
669 | slot->props.node_id != props->node_id) { | |
670 | error_setg(errp, "CPU is already assigned to node-id: %" PRId64, | |
671 | slot->props.node_id); | |
672 | return; | |
673 | } | |
674 | ||
675 | /* assign slot to node as it's matched '-numa cpu' key */ | |
676 | match = true; | |
677 | slot->props.node_id = props->node_id; | |
678 | slot->props.has_node_id = props->has_node_id; | |
244b3f44 TX |
679 | |
680 | if (machine->numa_state->hmat_enabled) { | |
681 | if ((numa_info[props->node_id].initiator < MAX_NODES) && | |
682 | (props->node_id != numa_info[props->node_id].initiator)) { | |
683 | error_setg(errp, "The initiator of CPU NUMA node %" PRId64 | |
684 | " should be itself", props->node_id); | |
685 | return; | |
686 | } | |
687 | numa_info[props->node_id].has_cpu = true; | |
688 | numa_info[props->node_id].initiator = props->node_id; | |
689 | } | |
7c88e65d IM |
690 | } |
691 | ||
692 | if (!match) { | |
693 | error_setg(errp, "no match found"); | |
694 | } | |
695 | } | |
696 | ||
6f479566 LX |
697 | static void smp_parse(MachineState *ms, QemuOpts *opts) |
698 | { | |
699 | if (opts) { | |
700 | unsigned cpus = qemu_opt_get_number(opts, "cpus", 0); | |
701 | unsigned sockets = qemu_opt_get_number(opts, "sockets", 0); | |
702 | unsigned cores = qemu_opt_get_number(opts, "cores", 0); | |
703 | unsigned threads = qemu_opt_get_number(opts, "threads", 0); | |
704 | ||
705 | /* compute missing values, prefer sockets over cores over threads */ | |
706 | if (cpus == 0 || sockets == 0) { | |
707 | cores = cores > 0 ? cores : 1; | |
708 | threads = threads > 0 ? threads : 1; | |
709 | if (cpus == 0) { | |
710 | sockets = sockets > 0 ? sockets : 1; | |
711 | cpus = cores * threads * sockets; | |
712 | } else { | |
713 | ms->smp.max_cpus = | |
714 | qemu_opt_get_number(opts, "maxcpus", cpus); | |
715 | sockets = ms->smp.max_cpus / (cores * threads); | |
716 | } | |
717 | } else if (cores == 0) { | |
718 | threads = threads > 0 ? threads : 1; | |
719 | cores = cpus / (sockets * threads); | |
720 | cores = cores > 0 ? cores : 1; | |
721 | } else if (threads == 0) { | |
722 | threads = cpus / (cores * sockets); | |
723 | threads = threads > 0 ? threads : 1; | |
724 | } else if (sockets * cores * threads < cpus) { | |
725 | error_report("cpu topology: " | |
726 | "sockets (%u) * cores (%u) * threads (%u) < " | |
727 | "smp_cpus (%u)", | |
728 | sockets, cores, threads, cpus); | |
729 | exit(1); | |
730 | } | |
731 | ||
732 | ms->smp.max_cpus = | |
733 | qemu_opt_get_number(opts, "maxcpus", cpus); | |
734 | ||
735 | if (ms->smp.max_cpus < cpus) { | |
736 | error_report("maxcpus must be equal to or greater than smp"); | |
737 | exit(1); | |
738 | } | |
739 | ||
c4332cd1 IM |
740 | if (sockets * cores * threads != ms->smp.max_cpus) { |
741 | error_report("Invalid CPU topology: " | |
742 | "sockets (%u) * cores (%u) * threads (%u) " | |
743 | "!= maxcpus (%u)", | |
6f479566 LX |
744 | sockets, cores, threads, |
745 | ms->smp.max_cpus); | |
746 | exit(1); | |
747 | } | |
748 | ||
6f479566 LX |
749 | ms->smp.cpus = cpus; |
750 | ms->smp.cores = cores; | |
751 | ms->smp.threads = threads; | |
8cb30e3a | 752 | ms->smp.sockets = sockets; |
6f479566 LX |
753 | } |
754 | ||
755 | if (ms->smp.cpus > 1) { | |
756 | Error *blocker = NULL; | |
757 | error_setg(&blocker, QERR_REPLAY_NOT_SUPPORTED, "smp"); | |
758 | replay_add_blocker(blocker); | |
759 | } | |
760 | } | |
761 | ||
076b35b5 ND |
762 | static void machine_class_init(ObjectClass *oc, void *data) |
763 | { | |
764 | MachineClass *mc = MACHINE_CLASS(oc); | |
765 | ||
766 | /* Default 128 MB as guest ram size */ | |
d23b6caa | 767 | mc->default_ram_size = 128 * MiB; |
71ae9e94 | 768 | mc->rom_file_has_mr = true; |
6f479566 | 769 | mc->smp_parse = smp_parse; |
26b81df4 | 770 | |
55641213 LV |
771 | /* numa node memory size aligned on 8MB by default. |
772 | * On Linux, each node's border has to be 8MB aligned | |
773 | */ | |
774 | mc->numa_mem_align_shift = 23; | |
775 | ||
26b81df4 | 776 | object_class_property_add_str(oc, "kernel", |
d2623129 | 777 | machine_get_kernel, machine_set_kernel); |
26b81df4 | 778 | object_class_property_set_description(oc, "kernel", |
7eecec7d | 779 | "Linux kernel image file"); |
26b81df4 EH |
780 | |
781 | object_class_property_add_str(oc, "initrd", | |
d2623129 | 782 | machine_get_initrd, machine_set_initrd); |
26b81df4 | 783 | object_class_property_set_description(oc, "initrd", |
7eecec7d | 784 | "Linux initial ramdisk file"); |
26b81df4 EH |
785 | |
786 | object_class_property_add_str(oc, "append", | |
d2623129 | 787 | machine_get_append, machine_set_append); |
26b81df4 | 788 | object_class_property_set_description(oc, "append", |
7eecec7d | 789 | "Linux kernel command line"); |
26b81df4 EH |
790 | |
791 | object_class_property_add_str(oc, "dtb", | |
d2623129 | 792 | machine_get_dtb, machine_set_dtb); |
26b81df4 | 793 | object_class_property_set_description(oc, "dtb", |
7eecec7d | 794 | "Linux kernel device tree file"); |
26b81df4 EH |
795 | |
796 | object_class_property_add_str(oc, "dumpdtb", | |
d2623129 | 797 | machine_get_dumpdtb, machine_set_dumpdtb); |
26b81df4 | 798 | object_class_property_set_description(oc, "dumpdtb", |
7eecec7d | 799 | "Dump current dtb to a file and quit"); |
26b81df4 EH |
800 | |
801 | object_class_property_add(oc, "phandle-start", "int", | |
802 | machine_get_phandle_start, machine_set_phandle_start, | |
d2623129 | 803 | NULL, NULL); |
26b81df4 | 804 | object_class_property_set_description(oc, "phandle-start", |
7eecec7d | 805 | "The first phandle ID we may generate dynamically"); |
26b81df4 EH |
806 | |
807 | object_class_property_add_str(oc, "dt-compatible", | |
d2623129 | 808 | machine_get_dt_compatible, machine_set_dt_compatible); |
26b81df4 | 809 | object_class_property_set_description(oc, "dt-compatible", |
7eecec7d | 810 | "Overrides the \"compatible\" property of the dt root node"); |
26b81df4 EH |
811 | |
812 | object_class_property_add_bool(oc, "dump-guest-core", | |
d2623129 | 813 | machine_get_dump_guest_core, machine_set_dump_guest_core); |
26b81df4 | 814 | object_class_property_set_description(oc, "dump-guest-core", |
7eecec7d | 815 | "Include guest memory in a core dump"); |
26b81df4 EH |
816 | |
817 | object_class_property_add_bool(oc, "mem-merge", | |
d2623129 | 818 | machine_get_mem_merge, machine_set_mem_merge); |
26b81df4 | 819 | object_class_property_set_description(oc, "mem-merge", |
7eecec7d | 820 | "Enable/disable memory merge support"); |
26b81df4 EH |
821 | |
822 | object_class_property_add_bool(oc, "usb", | |
d2623129 | 823 | machine_get_usb, machine_set_usb); |
26b81df4 | 824 | object_class_property_set_description(oc, "usb", |
7eecec7d | 825 | "Set on/off to enable/disable usb"); |
26b81df4 EH |
826 | |
827 | object_class_property_add_bool(oc, "graphics", | |
d2623129 | 828 | machine_get_graphics, machine_set_graphics); |
26b81df4 | 829 | object_class_property_set_description(oc, "graphics", |
7eecec7d | 830 | "Set on/off to enable/disable graphics emulation"); |
26b81df4 | 831 | |
26b81df4 | 832 | object_class_property_add_str(oc, "firmware", |
d2623129 | 833 | machine_get_firmware, machine_set_firmware); |
26b81df4 | 834 | object_class_property_set_description(oc, "firmware", |
7eecec7d | 835 | "Firmware image"); |
26b81df4 EH |
836 | |
837 | object_class_property_add_bool(oc, "suppress-vmdesc", | |
d2623129 | 838 | machine_get_suppress_vmdesc, machine_set_suppress_vmdesc); |
26b81df4 | 839 | object_class_property_set_description(oc, "suppress-vmdesc", |
7eecec7d | 840 | "Set on to disable self-describing migration"); |
26b81df4 | 841 | |
db588194 | 842 | object_class_property_add_str(oc, "memory-encryption", |
d2623129 | 843 | machine_get_memory_encryption, machine_set_memory_encryption); |
db588194 | 844 | object_class_property_set_description(oc, "memory-encryption", |
7eecec7d | 845 | "Set memory encryption object to use"); |
acd5b054 EH |
846 | |
847 | object_class_property_add_str(oc, "memory-backend", | |
848 | machine_get_memdev, machine_set_memdev); | |
849 | object_class_property_set_description(oc, "memory-backend", | |
850 | "Set RAM backend" | |
851 | "Valid value is ID of hostmem based backend"); | |
076b35b5 ND |
852 | } |
853 | ||
dcb3d601 EH |
854 | static void machine_class_base_init(ObjectClass *oc, void *data) |
855 | { | |
2c920e45 PB |
856 | MachineClass *mc = MACHINE_CLASS(oc); |
857 | mc->max_cpus = mc->max_cpus ?: 1; | |
858 | mc->min_cpus = mc->min_cpus ?: 1; | |
859 | mc->default_cpus = mc->default_cpus ?: 1; | |
860 | ||
dcb3d601 EH |
861 | if (!object_class_is_abstract(oc)) { |
862 | const char *cname = object_class_get_name(oc); | |
863 | assert(g_str_has_suffix(cname, TYPE_MACHINE_SUFFIX)); | |
98cec76a EH |
864 | mc->name = g_strndup(cname, |
865 | strlen(cname) - strlen(TYPE_MACHINE_SUFFIX)); | |
b66bbee3 | 866 | mc->compat_props = g_ptr_array_new(); |
dcb3d601 EH |
867 | } |
868 | } | |
869 | ||
6b1b1440 MA |
870 | static void machine_initfn(Object *obj) |
871 | { | |
33cd52b5 | 872 | MachineState *ms = MACHINE(obj); |
b2fc91db | 873 | MachineClass *mc = MACHINE_GET_CLASS(obj); |
33cd52b5 | 874 | |
47c8ca53 | 875 | ms->dump_guest_core = true; |
75cc7f01 | 876 | ms->mem_merge = true; |
cfc58cf3 | 877 | ms->enable_graphics = true; |
d8870d02 | 878 | |
f6a0d06b EA |
879 | if (mc->nvdimm_supported) { |
880 | Object *obj = OBJECT(ms); | |
881 | ||
882 | ms->nvdimms_state = g_new0(NVDIMMState, 1); | |
883 | object_property_add_bool(obj, "nvdimm", | |
d2623129 | 884 | machine_get_nvdimm, machine_set_nvdimm); |
f6a0d06b EA |
885 | object_property_set_description(obj, "nvdimm", |
886 | "Set on/off to enable/disable " | |
7eecec7d | 887 | "NVDIMM instantiation"); |
f6a0d06b EA |
888 | |
889 | object_property_add_str(obj, "nvdimm-persistence", | |
890 | machine_get_nvdimm_persistence, | |
d2623129 | 891 | machine_set_nvdimm_persistence); |
f6a0d06b EA |
892 | object_property_set_description(obj, "nvdimm-persistence", |
893 | "Set NVDIMM persistence" | |
7eecec7d | 894 | "Valid values are cpu, mem-ctrl"); |
f6a0d06b EA |
895 | } |
896 | ||
fcd3f2cc | 897 | if (mc->cpu_index_to_instance_props && mc->get_default_cpu_node_id) { |
aa570207 | 898 | ms->numa_state = g_new0(NumaState, 1); |
244b3f44 | 899 | object_property_add_bool(obj, "hmat", |
d2623129 | 900 | machine_get_hmat, machine_set_hmat); |
244b3f44 TX |
901 | object_property_set_description(obj, "hmat", |
902 | "Set on/off to enable/disable " | |
903 | "ACPI Heterogeneous Memory Attribute " | |
7eecec7d | 904 | "Table (HMAT)"); |
aa570207 | 905 | } |
f6a0d06b | 906 | |
33cd52b5 AG |
907 | /* Register notifier when init is done for sysbus sanity checks */ |
908 | ms->sysbus_notifier.notify = machine_init_notify; | |
909 | qemu_add_machine_init_done_notifier(&ms->sysbus_notifier); | |
6b1b1440 MA |
910 | } |
911 | ||
912 | static void machine_finalize(Object *obj) | |
913 | { | |
914 | MachineState *ms = MACHINE(obj); | |
915 | ||
6b1b1440 MA |
916 | g_free(ms->kernel_filename); |
917 | g_free(ms->initrd_filename); | |
918 | g_free(ms->kernel_cmdline); | |
919 | g_free(ms->dtb); | |
920 | g_free(ms->dumpdtb); | |
921 | g_free(ms->dt_compatible); | |
922 | g_free(ms->firmware); | |
2ff4f67c | 923 | g_free(ms->device_memory); |
f6a0d06b | 924 | g_free(ms->nvdimms_state); |
aa570207 | 925 | g_free(ms->numa_state); |
6b1b1440 | 926 | } |
36d20cb2 | 927 | |
5e97b623 MA |
928 | bool machine_usb(MachineState *machine) |
929 | { | |
930 | return machine->usb; | |
931 | } | |
932 | ||
6cabe7fa MA |
933 | int machine_phandle_start(MachineState *machine) |
934 | { | |
935 | return machine->phandle_start; | |
936 | } | |
937 | ||
47c8ca53 MA |
938 | bool machine_dump_guest_core(MachineState *machine) |
939 | { | |
940 | return machine->dump_guest_core; | |
941 | } | |
942 | ||
75cc7f01 MA |
943 | bool machine_mem_merge(MachineState *machine) |
944 | { | |
945 | return machine->mem_merge; | |
946 | } | |
947 | ||
ec78f811 IM |
948 | static char *cpu_slot_to_string(const CPUArchId *cpu) |
949 | { | |
950 | GString *s = g_string_new(NULL); | |
951 | if (cpu->props.has_socket_id) { | |
952 | g_string_append_printf(s, "socket-id: %"PRId64, cpu->props.socket_id); | |
953 | } | |
176d2cda LX |
954 | if (cpu->props.has_die_id) { |
955 | g_string_append_printf(s, "die-id: %"PRId64, cpu->props.die_id); | |
956 | } | |
ec78f811 IM |
957 | if (cpu->props.has_core_id) { |
958 | if (s->len) { | |
959 | g_string_append_printf(s, ", "); | |
960 | } | |
961 | g_string_append_printf(s, "core-id: %"PRId64, cpu->props.core_id); | |
962 | } | |
963 | if (cpu->props.has_thread_id) { | |
964 | if (s->len) { | |
965 | g_string_append_printf(s, ", "); | |
966 | } | |
967 | g_string_append_printf(s, "thread-id: %"PRId64, cpu->props.thread_id); | |
968 | } | |
969 | return g_string_free(s, false); | |
970 | } | |
971 | ||
244b3f44 TX |
972 | static void numa_validate_initiator(NumaState *numa_state) |
973 | { | |
974 | int i; | |
975 | NodeInfo *numa_info = numa_state->nodes; | |
976 | ||
977 | for (i = 0; i < numa_state->num_nodes; i++) { | |
978 | if (numa_info[i].initiator == MAX_NODES) { | |
979 | error_report("The initiator of NUMA node %d is missing, use " | |
980 | "'-numa node,initiator' option to declare it", i); | |
981 | exit(1); | |
982 | } | |
983 | ||
984 | if (!numa_info[numa_info[i].initiator].present) { | |
985 | error_report("NUMA node %" PRIu16 " is missing, use " | |
986 | "'-numa node' option to declare it first", | |
987 | numa_info[i].initiator); | |
988 | exit(1); | |
989 | } | |
990 | ||
991 | if (!numa_info[numa_info[i].initiator].has_cpu) { | |
992 | error_report("The initiator of NUMA node %d is invalid", i); | |
993 | exit(1); | |
994 | } | |
995 | } | |
996 | } | |
997 | ||
7a3099fc | 998 | static void machine_numa_finish_cpu_init(MachineState *machine) |
ec78f811 IM |
999 | { |
1000 | int i; | |
60bed6a3 | 1001 | bool default_mapping; |
ec78f811 IM |
1002 | GString *s = g_string_new(NULL); |
1003 | MachineClass *mc = MACHINE_GET_CLASS(machine); | |
1004 | const CPUArchIdList *possible_cpus = mc->possible_cpu_arch_ids(machine); | |
1005 | ||
aa570207 | 1006 | assert(machine->numa_state->num_nodes); |
60bed6a3 IM |
1007 | for (i = 0; i < possible_cpus->len; i++) { |
1008 | if (possible_cpus->cpus[i].props.has_node_id) { | |
1009 | break; | |
1010 | } | |
1011 | } | |
1012 | default_mapping = (i == possible_cpus->len); | |
1013 | ||
ec78f811 IM |
1014 | for (i = 0; i < possible_cpus->len; i++) { |
1015 | const CPUArchId *cpu_slot = &possible_cpus->cpus[i]; | |
1016 | ||
ec78f811 | 1017 | if (!cpu_slot->props.has_node_id) { |
d41f3e75 IM |
1018 | /* fetch default mapping from board and enable it */ |
1019 | CpuInstanceProperties props = cpu_slot->props; | |
1020 | ||
79e07936 | 1021 | props.node_id = mc->get_default_cpu_node_id(machine, i); |
d41f3e75 | 1022 | if (!default_mapping) { |
60bed6a3 IM |
1023 | /* record slots with not set mapping, |
1024 | * TODO: make it hard error in future */ | |
1025 | char *cpu_str = cpu_slot_to_string(cpu_slot); | |
1026 | g_string_append_printf(s, "%sCPU %d [%s]", | |
1027 | s->len ? ", " : "", i, cpu_str); | |
1028 | g_free(cpu_str); | |
d41f3e75 IM |
1029 | |
1030 | /* non mapped cpus used to fallback to node 0 */ | |
1031 | props.node_id = 0; | |
60bed6a3 | 1032 | } |
d41f3e75 IM |
1033 | |
1034 | props.has_node_id = true; | |
1035 | machine_set_cpu_numa_node(machine, &props, &error_fatal); | |
ec78f811 IM |
1036 | } |
1037 | } | |
244b3f44 TX |
1038 | |
1039 | if (machine->numa_state->hmat_enabled) { | |
1040 | numa_validate_initiator(machine->numa_state); | |
1041 | } | |
1042 | ||
c6ff347c | 1043 | if (s->len && !qtest_enabled()) { |
3dc6f869 AF |
1044 | warn_report("CPU(s) not present in any NUMA nodes: %s", |
1045 | s->str); | |
1046 | warn_report("All CPU(s) up to maxcpus should be described " | |
1047 | "in NUMA config, ability to start up with partial NUMA " | |
1048 | "mappings is obsoleted and will be removed in future"); | |
ec78f811 IM |
1049 | } |
1050 | g_string_free(s, true); | |
1051 | } | |
1052 | ||
82b911aa IM |
1053 | MemoryRegion *machine_consume_memdev(MachineState *machine, |
1054 | HostMemoryBackend *backend) | |
1055 | { | |
1056 | MemoryRegion *ret = host_memory_backend_get_memory(backend); | |
1057 | ||
1058 | if (memory_region_is_mapped(ret)) { | |
7a309cc9 MA |
1059 | error_report("memory backend %s can't be used multiple times.", |
1060 | object_get_canonical_path_component(OBJECT(backend))); | |
82b911aa IM |
1061 | exit(EXIT_FAILURE); |
1062 | } | |
1063 | host_memory_backend_set_mapped(backend, true); | |
1064 | vmstate_register_ram_global(ret); | |
1065 | return ret; | |
1066 | } | |
1067 | ||
482dfe9a IM |
1068 | void machine_run_board_init(MachineState *machine) |
1069 | { | |
1070 | MachineClass *machine_class = MACHINE_GET_CLASS(machine); | |
61ad65d0 RH |
1071 | ObjectClass *oc = object_class_by_name(machine->cpu_type); |
1072 | CPUClass *cc; | |
ec78f811 | 1073 | |
82b911aa IM |
1074 | if (machine->ram_memdev_id) { |
1075 | Object *o; | |
1076 | o = object_resolve_path_type(machine->ram_memdev_id, | |
1077 | TYPE_MEMORY_BACKEND, NULL); | |
1078 | machine->ram = machine_consume_memdev(machine, MEMORY_BACKEND(o)); | |
1079 | } | |
1080 | ||
fcd3f2cc | 1081 | if (machine->numa_state) { |
aa570207 TX |
1082 | numa_complete_configuration(machine); |
1083 | if (machine->numa_state->num_nodes) { | |
1084 | machine_numa_finish_cpu_init(machine); | |
1085 | } | |
3aeaac8f | 1086 | } |
c9cf636d AF |
1087 | |
1088 | /* If the machine supports the valid_cpu_types check and the user | |
1089 | * specified a CPU with -cpu check here that the user CPU is supported. | |
1090 | */ | |
1091 | if (machine_class->valid_cpu_types && machine->cpu_type) { | |
c9cf636d AF |
1092 | int i; |
1093 | ||
1094 | for (i = 0; machine_class->valid_cpu_types[i]; i++) { | |
61ad65d0 | 1095 | if (object_class_dynamic_cast(oc, |
c9cf636d AF |
1096 | machine_class->valid_cpu_types[i])) { |
1097 | /* The user specificed CPU is in the valid field, we are | |
1098 | * good to go. | |
1099 | */ | |
1100 | break; | |
1101 | } | |
1102 | } | |
1103 | ||
1104 | if (!machine_class->valid_cpu_types[i]) { | |
1105 | /* The user specified CPU is not valid */ | |
1106 | error_report("Invalid CPU type: %s", machine->cpu_type); | |
1107 | error_printf("The valid types are: %s", | |
1108 | machine_class->valid_cpu_types[0]); | |
1109 | for (i = 1; machine_class->valid_cpu_types[i]; i++) { | |
1110 | error_printf(", %s", machine_class->valid_cpu_types[i]); | |
1111 | } | |
1112 | error_printf("\n"); | |
1113 | ||
1114 | exit(1); | |
1115 | } | |
1116 | } | |
1117 | ||
61ad65d0 RH |
1118 | /* Check if CPU type is deprecated and warn if so */ |
1119 | cc = CPU_CLASS(oc); | |
1120 | if (cc && cc->deprecation_note) { | |
1121 | warn_report("CPU model %s is deprecated -- %s", machine->cpu_type, | |
1122 | cc->deprecation_note); | |
1123 | } | |
1124 | ||
482dfe9a IM |
1125 | machine_class->init(machine); |
1126 | } | |
1127 | ||
36d20cb2 MA |
1128 | static const TypeInfo machine_info = { |
1129 | .name = TYPE_MACHINE, | |
1130 | .parent = TYPE_OBJECT, | |
1131 | .abstract = true, | |
1132 | .class_size = sizeof(MachineClass), | |
076b35b5 | 1133 | .class_init = machine_class_init, |
dcb3d601 | 1134 | .class_base_init = machine_class_base_init, |
36d20cb2 | 1135 | .instance_size = sizeof(MachineState), |
6b1b1440 MA |
1136 | .instance_init = machine_initfn, |
1137 | .instance_finalize = machine_finalize, | |
36d20cb2 MA |
1138 | }; |
1139 | ||
1140 | static void machine_register_types(void) | |
1141 | { | |
1142 | type_register_static(&machine_info); | |
1143 | } | |
1144 | ||
1145 | type_init(machine_register_types) |