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Commit | Line | Data |
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36d20cb2 MA |
1 | /* |
2 | * QEMU Machine | |
3 | * | |
4 | * Copyright (C) 2014 Red Hat Inc | |
5 | * | |
6 | * Authors: | |
7 | * Marcel Apfelbaum <marcel.a@redhat.com> | |
8 | * | |
9 | * This work is licensed under the terms of the GNU GPL, version 2 or later. | |
10 | * See the COPYING file in the top-level directory. | |
11 | */ | |
12 | ||
18c86e2b | 13 | #include "qemu/osdep.h" |
6f479566 LX |
14 | #include "qemu/option.h" |
15 | #include "qapi/qmp/qerror.h" | |
16 | #include "sysemu/replay.h" | |
fc6b3cf9 | 17 | #include "qemu/units.h" |
36d20cb2 | 18 | #include "hw/boards.h" |
da34e65c | 19 | #include "qapi/error.h" |
9af23989 | 20 | #include "qapi/qapi-visit-common.h" |
6b1b1440 | 21 | #include "qapi/visitor.h" |
33cd52b5 AG |
22 | #include "hw/sysbus.h" |
23 | #include "sysemu/sysemu.h" | |
3bfe5716 | 24 | #include "sysemu/numa.h" |
33cd52b5 | 25 | #include "qemu/error-report.h" |
c6ff347c | 26 | #include "sysemu/qtest.h" |
edc24ccd | 27 | #include "hw/pci/pci.h" |
f6a0d06b | 28 | #include "hw/mem/nvdimm.h" |
82b911aa | 29 | #include "migration/vmstate.h" |
6b1b1440 | 30 | |
6a558822 SH |
31 | GlobalProperty hw_compat_5_1[] = { |
32 | { "vhost-scsi", "num_queues", "1"}, | |
a4eef071 | 33 | { "vhost-user-blk", "num-queues", "1"}, |
6a558822 | 34 | { "vhost-user-scsi", "num_queues", "1"}, |
9445e1e1 | 35 | { "virtio-blk-device", "num-queues", "1"}, |
6a558822 SH |
36 | { "virtio-scsi-device", "num_queues", "1"}, |
37 | }; | |
3ff3c5d3 CH |
38 | const size_t hw_compat_5_1_len = G_N_ELEMENTS(hw_compat_5_1); |
39 | ||
7483cbba | 40 | GlobalProperty hw_compat_5_0[] = { |
2ebc2121 | 41 | { "pci-host-bridge", "x-config-reg-migration-enabled", "off" }, |
7483cbba | 42 | { "virtio-balloon-device", "page-poison", "false" }, |
f983ff95 PB |
43 | { "vmport", "x-read-set-eax", "off" }, |
44 | { "vmport", "x-signal-unsupported-cmd", "off" }, | |
45 | { "vmport", "x-report-vmx-type", "off" }, | |
46 | { "vmport", "x-cmds-v2", "off" }, | |
7483cbba | 47 | }; |
541aaa1d CH |
48 | const size_t hw_compat_5_0_len = G_N_ELEMENTS(hw_compat_5_0); |
49 | ||
5f258577 | 50 | GlobalProperty hw_compat_4_2[] = { |
c9b7d9ec DP |
51 | { "virtio-blk-device", "queue-size", "128"}, |
52 | { "virtio-scsi-device", "virtqueue_size", "128"}, | |
5f258577 | 53 | { "virtio-blk-device", "x-enable-wce-if-config-wce", "off" }, |
1bf8a989 DP |
54 | { "virtio-blk-device", "seg-max-adjust", "off"}, |
55 | { "virtio-scsi-device", "seg_max_adjust", "off"}, | |
56 | { "vhost-blk-device", "seg_max_adjust", "off"}, | |
7bacaf5f | 57 | { "usb-host", "suppress-remote-wake", "off" }, |
32187f3d | 58 | { "usb-redir", "suppress-remote-wake", "off" }, |
ed71c09f GH |
59 | { "qxl", "revision", "4" }, |
60 | { "qxl-vga", "revision", "4" }, | |
394f0f72 | 61 | { "fw_cfg", "acpi-mr-restore", "false" }, |
5f258577 EY |
62 | }; |
63 | const size_t hw_compat_4_2_len = G_N_ELEMENTS(hw_compat_4_2); | |
64 | ||
eb1556c4 JS |
65 | GlobalProperty hw_compat_4_1[] = { |
66 | { "virtio-pci", "x-pcie-flr-init", "off" }, | |
9d7bd082 | 67 | { "virtio-device", "use-disabled-flag", "false" }, |
eb1556c4 | 68 | }; |
9aec2e52 CH |
69 | const size_t hw_compat_4_1_len = G_N_ELEMENTS(hw_compat_4_1); |
70 | ||
8e8cbed0 | 71 | GlobalProperty hw_compat_4_0[] = { |
0a719662 GH |
72 | { "VGA", "edid", "false" }, |
73 | { "secondary-vga", "edid", "false" }, | |
74 | { "bochs-display", "edid", "false" }, | |
75 | { "virtio-vga", "edid", "false" }, | |
02501fc3 | 76 | { "virtio-gpu-device", "edid", "false" }, |
e57f2c31 | 77 | { "virtio-device", "use-started", "false" }, |
2bbadb08 | 78 | { "virtio-balloon-device", "qemu-4-0-config-size", "true" }, |
032cfe6a | 79 | { "pl031", "migrate-tick-offset", "false" }, |
0a719662 | 80 | }; |
9bf2650b CH |
81 | const size_t hw_compat_4_0_len = G_N_ELEMENTS(hw_compat_4_0); |
82 | ||
abd93cc7 | 83 | GlobalProperty hw_compat_3_1[] = { |
6c36bddf EH |
84 | { "pcie-root-port", "x-speed", "2_5" }, |
85 | { "pcie-root-port", "x-width", "1" }, | |
86 | { "memory-backend-file", "x-use-canonical-path-for-ramblock-id", "true" }, | |
87 | { "memory-backend-memfd", "x-use-canonical-path-for-ramblock-id", "true" }, | |
b6148757 MAL |
88 | { "tpm-crb", "ppi", "false" }, |
89 | { "tpm-tis", "ppi", "false" }, | |
b63e1050 GH |
90 | { "usb-kbd", "serial", "42" }, |
91 | { "usb-mouse", "serial", "42" }, | |
442bac16 | 92 | { "usb-tablet", "serial", "42" }, |
5c81161f SG |
93 | { "virtio-blk-device", "discard", "false" }, |
94 | { "virtio-blk-device", "write-zeroes", "false" }, | |
2bbadb08 | 95 | { "virtio-balloon-device", "qemu-4-0-config-size", "false" }, |
c8557f1b | 96 | { "pcie-root-port-base", "disable-acs", "true" }, /* Added in 4.1 */ |
abd93cc7 MAL |
97 | }; |
98 | const size_t hw_compat_3_1_len = G_N_ELEMENTS(hw_compat_3_1); | |
99 | ||
ddb3235d MAL |
100 | GlobalProperty hw_compat_3_0[] = {}; |
101 | const size_t hw_compat_3_0_len = G_N_ELEMENTS(hw_compat_3_0); | |
102 | ||
0d47310b | 103 | GlobalProperty hw_compat_2_12[] = { |
6c36bddf EH |
104 | { "migration", "decompress-error-check", "off" }, |
105 | { "hda-audio", "use-timer", "false" }, | |
106 | { "cirrus-vga", "global-vmstate", "true" }, | |
107 | { "VGA", "global-vmstate", "true" }, | |
108 | { "vmware-svga", "global-vmstate", "true" }, | |
109 | { "qxl-vga", "global-vmstate", "true" }, | |
0d47310b MAL |
110 | }; |
111 | const size_t hw_compat_2_12_len = G_N_ELEMENTS(hw_compat_2_12); | |
112 | ||
43df70a9 | 113 | GlobalProperty hw_compat_2_11[] = { |
6c36bddf EH |
114 | { "hpet", "hpet-offset-saved", "false" }, |
115 | { "virtio-blk-pci", "vectors", "2" }, | |
116 | { "vhost-user-blk-pci", "vectors", "2" }, | |
117 | { "e1000", "migrate_tso_props", "off" }, | |
43df70a9 MAL |
118 | }; |
119 | const size_t hw_compat_2_11_len = G_N_ELEMENTS(hw_compat_2_11); | |
120 | ||
503224f4 | 121 | GlobalProperty hw_compat_2_10[] = { |
6c36bddf EH |
122 | { "virtio-mouse-device", "wheel-axis", "false" }, |
123 | { "virtio-tablet-device", "wheel-axis", "false" }, | |
503224f4 MAL |
124 | }; |
125 | const size_t hw_compat_2_10_len = G_N_ELEMENTS(hw_compat_2_10); | |
126 | ||
3e803152 | 127 | GlobalProperty hw_compat_2_9[] = { |
6c36bddf EH |
128 | { "pci-bridge", "shpc", "off" }, |
129 | { "intel-iommu", "pt", "off" }, | |
130 | { "virtio-net-device", "x-mtu-bypass-backend", "off" }, | |
131 | { "pcie-root-port", "x-migrate-msix", "false" }, | |
3e803152 MAL |
132 | }; |
133 | const size_t hw_compat_2_9_len = G_N_ELEMENTS(hw_compat_2_9); | |
134 | ||
edc24ccd | 135 | GlobalProperty hw_compat_2_8[] = { |
6c36bddf EH |
136 | { "fw_cfg_mem", "x-file-slots", "0x10" }, |
137 | { "fw_cfg_io", "x-file-slots", "0x10" }, | |
138 | { "pflash_cfi01", "old-multiple-chip-handling", "on" }, | |
139 | { "pci-bridge", "shpc", "on" }, | |
140 | { TYPE_PCI_DEVICE, "x-pcie-extcap-init", "off" }, | |
141 | { "virtio-pci", "x-pcie-deverr-init", "off" }, | |
142 | { "virtio-pci", "x-pcie-lnkctl-init", "off" }, | |
143 | { "virtio-pci", "x-pcie-pm-init", "off" }, | |
144 | { "cirrus-vga", "vgamem_mb", "8" }, | |
145 | { "isa-cirrus-vga", "vgamem_mb", "8" }, | |
edc24ccd MAL |
146 | }; |
147 | const size_t hw_compat_2_8_len = G_N_ELEMENTS(hw_compat_2_8); | |
148 | ||
5a995064 | 149 | GlobalProperty hw_compat_2_7[] = { |
6c36bddf EH |
150 | { "virtio-pci", "page-per-vq", "on" }, |
151 | { "virtio-serial-device", "emergency-write", "off" }, | |
152 | { "ioapic", "version", "0x11" }, | |
153 | { "intel-iommu", "x-buggy-eim", "true" }, | |
154 | { "virtio-pci", "x-ignore-backend-features", "on" }, | |
5a995064 MAL |
155 | }; |
156 | const size_t hw_compat_2_7_len = G_N_ELEMENTS(hw_compat_2_7); | |
157 | ||
ff8f261f | 158 | GlobalProperty hw_compat_2_6[] = { |
6c36bddf | 159 | { "virtio-mmio", "format_transport_address", "off" }, |
dd56040d DDAG |
160 | /* Optional because not all virtio-pci devices support legacy mode */ |
161 | { "virtio-pci", "disable-modern", "on", .optional = true }, | |
162 | { "virtio-pci", "disable-legacy", "off", .optional = true }, | |
ff8f261f MAL |
163 | }; |
164 | const size_t hw_compat_2_6_len = G_N_ELEMENTS(hw_compat_2_6); | |
165 | ||
fe759610 | 166 | GlobalProperty hw_compat_2_5[] = { |
6c36bddf EH |
167 | { "isa-fdc", "fallback", "144" }, |
168 | { "pvscsi", "x-old-pci-configuration", "on" }, | |
169 | { "pvscsi", "x-disable-pcie", "on" }, | |
170 | { "vmxnet3", "x-old-msi-offsets", "on" }, | |
171 | { "vmxnet3", "x-disable-pcie", "on" }, | |
fe759610 MAL |
172 | }; |
173 | const size_t hw_compat_2_5_len = G_N_ELEMENTS(hw_compat_2_5); | |
174 | ||
2f99b9c2 | 175 | GlobalProperty hw_compat_2_4[] = { |
11a18c84 PMD |
176 | /* Optional because the 'scsi' property is Linux-only */ |
177 | { "virtio-blk-device", "scsi", "true", .optional = true }, | |
6c36bddf EH |
178 | { "e1000", "extra_mac_registers", "off" }, |
179 | { "virtio-pci", "x-disable-pcie", "on" }, | |
180 | { "virtio-pci", "migrate-extra", "off" }, | |
181 | { "fw_cfg_mem", "dma_enabled", "off" }, | |
182 | { "fw_cfg_io", "dma_enabled", "off" } | |
2f99b9c2 MAL |
183 | }; |
184 | const size_t hw_compat_2_4_len = G_N_ELEMENTS(hw_compat_2_4); | |
185 | ||
8995dd90 | 186 | GlobalProperty hw_compat_2_3[] = { |
6c36bddf EH |
187 | { "virtio-blk-pci", "any_layout", "off" }, |
188 | { "virtio-balloon-pci", "any_layout", "off" }, | |
189 | { "virtio-serial-pci", "any_layout", "off" }, | |
190 | { "virtio-9p-pci", "any_layout", "off" }, | |
191 | { "virtio-rng-pci", "any_layout", "off" }, | |
192 | { TYPE_PCI_DEVICE, "x-pcie-lnksta-dllla", "off" }, | |
193 | { "migration", "send-configuration", "off" }, | |
194 | { "migration", "send-section-footer", "off" }, | |
195 | { "migration", "store-global-state", "off" }, | |
8995dd90 MAL |
196 | }; |
197 | const size_t hw_compat_2_3_len = G_N_ELEMENTS(hw_compat_2_3); | |
198 | ||
1c30044e MAL |
199 | GlobalProperty hw_compat_2_2[] = {}; |
200 | const size_t hw_compat_2_2_len = G_N_ELEMENTS(hw_compat_2_2); | |
201 | ||
c4fc5695 | 202 | GlobalProperty hw_compat_2_1[] = { |
6c36bddf EH |
203 | { "intel-hda", "old_msi_addr", "on" }, |
204 | { "VGA", "qemu-extended-regs", "off" }, | |
205 | { "secondary-vga", "qemu-extended-regs", "off" }, | |
206 | { "virtio-scsi-pci", "any_layout", "off" }, | |
207 | { "usb-mouse", "usb_version", "1" }, | |
208 | { "usb-kbd", "usb_version", "1" }, | |
209 | { "virtio-pci", "virtio-pci-bus-master-bug-migration", "on" }, | |
c4fc5695 MAL |
210 | }; |
211 | const size_t hw_compat_2_1_len = G_N_ELEMENTS(hw_compat_2_1); | |
212 | ||
6b1b1440 MA |
213 | static char *machine_get_kernel(Object *obj, Error **errp) |
214 | { | |
215 | MachineState *ms = MACHINE(obj); | |
216 | ||
217 | return g_strdup(ms->kernel_filename); | |
218 | } | |
219 | ||
220 | static void machine_set_kernel(Object *obj, const char *value, Error **errp) | |
221 | { | |
222 | MachineState *ms = MACHINE(obj); | |
223 | ||
556068ee | 224 | g_free(ms->kernel_filename); |
6b1b1440 MA |
225 | ms->kernel_filename = g_strdup(value); |
226 | } | |
227 | ||
228 | static char *machine_get_initrd(Object *obj, Error **errp) | |
229 | { | |
230 | MachineState *ms = MACHINE(obj); | |
231 | ||
232 | return g_strdup(ms->initrd_filename); | |
233 | } | |
234 | ||
235 | static void machine_set_initrd(Object *obj, const char *value, Error **errp) | |
236 | { | |
237 | MachineState *ms = MACHINE(obj); | |
238 | ||
556068ee | 239 | g_free(ms->initrd_filename); |
6b1b1440 MA |
240 | ms->initrd_filename = g_strdup(value); |
241 | } | |
242 | ||
243 | static char *machine_get_append(Object *obj, Error **errp) | |
244 | { | |
245 | MachineState *ms = MACHINE(obj); | |
246 | ||
247 | return g_strdup(ms->kernel_cmdline); | |
248 | } | |
249 | ||
250 | static void machine_set_append(Object *obj, const char *value, Error **errp) | |
251 | { | |
252 | MachineState *ms = MACHINE(obj); | |
253 | ||
556068ee | 254 | g_free(ms->kernel_cmdline); |
6b1b1440 MA |
255 | ms->kernel_cmdline = g_strdup(value); |
256 | } | |
257 | ||
258 | static char *machine_get_dtb(Object *obj, Error **errp) | |
259 | { | |
260 | MachineState *ms = MACHINE(obj); | |
261 | ||
262 | return g_strdup(ms->dtb); | |
263 | } | |
264 | ||
265 | static void machine_set_dtb(Object *obj, const char *value, Error **errp) | |
266 | { | |
267 | MachineState *ms = MACHINE(obj); | |
268 | ||
556068ee | 269 | g_free(ms->dtb); |
6b1b1440 MA |
270 | ms->dtb = g_strdup(value); |
271 | } | |
272 | ||
273 | static char *machine_get_dumpdtb(Object *obj, Error **errp) | |
274 | { | |
275 | MachineState *ms = MACHINE(obj); | |
276 | ||
277 | return g_strdup(ms->dumpdtb); | |
278 | } | |
279 | ||
280 | static void machine_set_dumpdtb(Object *obj, const char *value, Error **errp) | |
281 | { | |
282 | MachineState *ms = MACHINE(obj); | |
283 | ||
556068ee | 284 | g_free(ms->dumpdtb); |
6b1b1440 MA |
285 | ms->dumpdtb = g_strdup(value); |
286 | } | |
287 | ||
288 | static void machine_get_phandle_start(Object *obj, Visitor *v, | |
d7bce999 EB |
289 | const char *name, void *opaque, |
290 | Error **errp) | |
6b1b1440 MA |
291 | { |
292 | MachineState *ms = MACHINE(obj); | |
293 | int64_t value = ms->phandle_start; | |
294 | ||
51e72bc1 | 295 | visit_type_int(v, name, &value, errp); |
6b1b1440 MA |
296 | } |
297 | ||
298 | static void machine_set_phandle_start(Object *obj, Visitor *v, | |
d7bce999 EB |
299 | const char *name, void *opaque, |
300 | Error **errp) | |
6b1b1440 MA |
301 | { |
302 | MachineState *ms = MACHINE(obj); | |
6b1b1440 MA |
303 | int64_t value; |
304 | ||
668f62ec | 305 | if (!visit_type_int(v, name, &value, errp)) { |
6b1b1440 MA |
306 | return; |
307 | } | |
308 | ||
309 | ms->phandle_start = value; | |
310 | } | |
311 | ||
312 | static char *machine_get_dt_compatible(Object *obj, Error **errp) | |
313 | { | |
314 | MachineState *ms = MACHINE(obj); | |
315 | ||
316 | return g_strdup(ms->dt_compatible); | |
317 | } | |
318 | ||
319 | static void machine_set_dt_compatible(Object *obj, const char *value, Error **errp) | |
320 | { | |
321 | MachineState *ms = MACHINE(obj); | |
322 | ||
556068ee | 323 | g_free(ms->dt_compatible); |
6b1b1440 MA |
324 | ms->dt_compatible = g_strdup(value); |
325 | } | |
326 | ||
327 | static bool machine_get_dump_guest_core(Object *obj, Error **errp) | |
328 | { | |
329 | MachineState *ms = MACHINE(obj); | |
330 | ||
331 | return ms->dump_guest_core; | |
332 | } | |
333 | ||
334 | static void machine_set_dump_guest_core(Object *obj, bool value, Error **errp) | |
335 | { | |
336 | MachineState *ms = MACHINE(obj); | |
337 | ||
338 | ms->dump_guest_core = value; | |
339 | } | |
340 | ||
341 | static bool machine_get_mem_merge(Object *obj, Error **errp) | |
342 | { | |
343 | MachineState *ms = MACHINE(obj); | |
344 | ||
345 | return ms->mem_merge; | |
346 | } | |
347 | ||
348 | static void machine_set_mem_merge(Object *obj, bool value, Error **errp) | |
349 | { | |
350 | MachineState *ms = MACHINE(obj); | |
351 | ||
352 | ms->mem_merge = value; | |
353 | } | |
354 | ||
355 | static bool machine_get_usb(Object *obj, Error **errp) | |
356 | { | |
357 | MachineState *ms = MACHINE(obj); | |
358 | ||
359 | return ms->usb; | |
360 | } | |
361 | ||
362 | static void machine_set_usb(Object *obj, bool value, Error **errp) | |
363 | { | |
364 | MachineState *ms = MACHINE(obj); | |
365 | ||
366 | ms->usb = value; | |
c6e76503 | 367 | ms->usb_disabled = !value; |
6b1b1440 MA |
368 | } |
369 | ||
cfc58cf3 EH |
370 | static bool machine_get_graphics(Object *obj, Error **errp) |
371 | { | |
372 | MachineState *ms = MACHINE(obj); | |
373 | ||
374 | return ms->enable_graphics; | |
375 | } | |
376 | ||
377 | static void machine_set_graphics(Object *obj, bool value, Error **errp) | |
378 | { | |
379 | MachineState *ms = MACHINE(obj); | |
380 | ||
381 | ms->enable_graphics = value; | |
382 | } | |
383 | ||
6b1b1440 MA |
384 | static char *machine_get_firmware(Object *obj, Error **errp) |
385 | { | |
386 | MachineState *ms = MACHINE(obj); | |
387 | ||
388 | return g_strdup(ms->firmware); | |
389 | } | |
390 | ||
391 | static void machine_set_firmware(Object *obj, const char *value, Error **errp) | |
392 | { | |
393 | MachineState *ms = MACHINE(obj); | |
394 | ||
556068ee | 395 | g_free(ms->firmware); |
6b1b1440 MA |
396 | ms->firmware = g_strdup(value); |
397 | } | |
398 | ||
9850c604 AG |
399 | static void machine_set_suppress_vmdesc(Object *obj, bool value, Error **errp) |
400 | { | |
401 | MachineState *ms = MACHINE(obj); | |
402 | ||
403 | ms->suppress_vmdesc = value; | |
404 | } | |
405 | ||
406 | static bool machine_get_suppress_vmdesc(Object *obj, Error **errp) | |
407 | { | |
408 | MachineState *ms = MACHINE(obj); | |
409 | ||
410 | return ms->suppress_vmdesc; | |
411 | } | |
412 | ||
902c053d GK |
413 | static void machine_set_enforce_config_section(Object *obj, bool value, |
414 | Error **errp) | |
415 | { | |
416 | MachineState *ms = MACHINE(obj); | |
417 | ||
91c082ad TH |
418 | warn_report("enforce-config-section is deprecated, please use " |
419 | "-global migration.send-configuration=on|off instead"); | |
420 | ||
902c053d GK |
421 | ms->enforce_config_section = value; |
422 | } | |
423 | ||
424 | static bool machine_get_enforce_config_section(Object *obj, Error **errp) | |
425 | { | |
426 | MachineState *ms = MACHINE(obj); | |
427 | ||
428 | return ms->enforce_config_section; | |
429 | } | |
430 | ||
db588194 BS |
431 | static char *machine_get_memory_encryption(Object *obj, Error **errp) |
432 | { | |
433 | MachineState *ms = MACHINE(obj); | |
434 | ||
435 | return g_strdup(ms->memory_encryption); | |
436 | } | |
437 | ||
438 | static void machine_set_memory_encryption(Object *obj, const char *value, | |
439 | Error **errp) | |
440 | { | |
441 | MachineState *ms = MACHINE(obj); | |
442 | ||
443 | g_free(ms->memory_encryption); | |
444 | ms->memory_encryption = g_strdup(value); | |
4ba59be1 DDAG |
445 | |
446 | /* | |
447 | * With memory encryption, the host can't see the real contents of RAM, | |
448 | * so there's no point in it trying to merge areas. | |
449 | */ | |
450 | if (value) { | |
451 | machine_set_mem_merge(obj, false, errp); | |
452 | } | |
db588194 BS |
453 | } |
454 | ||
f6a0d06b EA |
455 | static bool machine_get_nvdimm(Object *obj, Error **errp) |
456 | { | |
457 | MachineState *ms = MACHINE(obj); | |
458 | ||
459 | return ms->nvdimms_state->is_enabled; | |
460 | } | |
461 | ||
462 | static void machine_set_nvdimm(Object *obj, bool value, Error **errp) | |
463 | { | |
464 | MachineState *ms = MACHINE(obj); | |
465 | ||
466 | ms->nvdimms_state->is_enabled = value; | |
467 | } | |
468 | ||
244b3f44 TX |
469 | static bool machine_get_hmat(Object *obj, Error **errp) |
470 | { | |
471 | MachineState *ms = MACHINE(obj); | |
472 | ||
473 | return ms->numa_state->hmat_enabled; | |
474 | } | |
475 | ||
476 | static void machine_set_hmat(Object *obj, bool value, Error **errp) | |
477 | { | |
478 | MachineState *ms = MACHINE(obj); | |
479 | ||
480 | ms->numa_state->hmat_enabled = value; | |
481 | } | |
482 | ||
f6a0d06b EA |
483 | static char *machine_get_nvdimm_persistence(Object *obj, Error **errp) |
484 | { | |
485 | MachineState *ms = MACHINE(obj); | |
486 | ||
487 | return g_strdup(ms->nvdimms_state->persistence_string); | |
488 | } | |
489 | ||
490 | static void machine_set_nvdimm_persistence(Object *obj, const char *value, | |
491 | Error **errp) | |
492 | { | |
493 | MachineState *ms = MACHINE(obj); | |
494 | NVDIMMState *nvdimms_state = ms->nvdimms_state; | |
495 | ||
496 | if (strcmp(value, "cpu") == 0) { | |
497 | nvdimms_state->persistence = 3; | |
498 | } else if (strcmp(value, "mem-ctrl") == 0) { | |
499 | nvdimms_state->persistence = 2; | |
500 | } else { | |
501 | error_setg(errp, "-machine nvdimm-persistence=%s: unsupported option", | |
502 | value); | |
503 | return; | |
504 | } | |
505 | ||
506 | g_free(nvdimms_state->persistence_string); | |
507 | nvdimms_state->persistence_string = g_strdup(value); | |
508 | } | |
509 | ||
0bd1909d | 510 | void machine_class_allow_dynamic_sysbus_dev(MachineClass *mc, const char *type) |
33cd52b5 | 511 | { |
0bd1909d EH |
512 | strList *item = g_new0(strList, 1); |
513 | ||
514 | item->value = g_strdup(type); | |
515 | item->next = mc->allowed_dynamic_sysbus_devices; | |
516 | mc->allowed_dynamic_sysbus_devices = item; | |
33cd52b5 AG |
517 | } |
518 | ||
0bd1909d | 519 | static void validate_sysbus_device(SysBusDevice *sbdev, void *opaque) |
33cd52b5 | 520 | { |
0bd1909d EH |
521 | MachineState *machine = opaque; |
522 | MachineClass *mc = MACHINE_GET_CLASS(machine); | |
523 | bool allowed = false; | |
524 | strList *wl; | |
33cd52b5 | 525 | |
0bd1909d EH |
526 | for (wl = mc->allowed_dynamic_sysbus_devices; |
527 | !allowed && wl; | |
528 | wl = wl->next) { | |
529 | allowed |= !!object_dynamic_cast(OBJECT(sbdev), wl->value); | |
530 | } | |
531 | ||
532 | if (!allowed) { | |
533 | error_report("Option '-device %s' cannot be handled by this machine", | |
534 | object_class_get_name(object_get_class(OBJECT(sbdev)))); | |
535 | exit(1); | |
33cd52b5 | 536 | } |
0bd1909d EH |
537 | } |
538 | ||
aa8b1839 IM |
539 | static char *machine_get_memdev(Object *obj, Error **errp) |
540 | { | |
541 | MachineState *ms = MACHINE(obj); | |
542 | ||
543 | return g_strdup(ms->ram_memdev_id); | |
544 | } | |
545 | ||
546 | static void machine_set_memdev(Object *obj, const char *value, Error **errp) | |
547 | { | |
548 | MachineState *ms = MACHINE(obj); | |
549 | ||
550 | g_free(ms->ram_memdev_id); | |
551 | ms->ram_memdev_id = g_strdup(value); | |
552 | } | |
553 | ||
554 | ||
0bd1909d EH |
555 | static void machine_init_notify(Notifier *notifier, void *data) |
556 | { | |
557 | MachineState *machine = MACHINE(qdev_get_machine()); | |
33cd52b5 AG |
558 | |
559 | /* | |
0bd1909d EH |
560 | * Loop through all dynamically created sysbus devices and check if they are |
561 | * all allowed. If a device is not allowed, error out. | |
33cd52b5 | 562 | */ |
0bd1909d | 563 | foreach_dynamic_sysbus_device(validate_sysbus_device, machine); |
33cd52b5 AG |
564 | } |
565 | ||
f2d672c2 IM |
566 | HotpluggableCPUList *machine_query_hotpluggable_cpus(MachineState *machine) |
567 | { | |
568 | int i; | |
f2d672c2 | 569 | HotpluggableCPUList *head = NULL; |
d342eb76 IM |
570 | MachineClass *mc = MACHINE_GET_CLASS(machine); |
571 | ||
572 | /* force board to initialize possible_cpus if it hasn't been done yet */ | |
573 | mc->possible_cpu_arch_ids(machine); | |
f2d672c2 | 574 | |
f2d672c2 | 575 | for (i = 0; i < machine->possible_cpus->len; i++) { |
d342eb76 | 576 | Object *cpu; |
f2d672c2 IM |
577 | HotpluggableCPUList *list_item = g_new0(typeof(*list_item), 1); |
578 | HotpluggableCPU *cpu_item = g_new0(typeof(*cpu_item), 1); | |
579 | ||
d342eb76 | 580 | cpu_item->type = g_strdup(machine->possible_cpus->cpus[i].type); |
f2d672c2 IM |
581 | cpu_item->vcpus_count = machine->possible_cpus->cpus[i].vcpus_count; |
582 | cpu_item->props = g_memdup(&machine->possible_cpus->cpus[i].props, | |
583 | sizeof(*cpu_item->props)); | |
584 | ||
585 | cpu = machine->possible_cpus->cpus[i].cpu; | |
586 | if (cpu) { | |
587 | cpu_item->has_qom_path = true; | |
588 | cpu_item->qom_path = object_get_canonical_path(cpu); | |
589 | } | |
590 | list_item->value = cpu_item; | |
591 | list_item->next = head; | |
592 | head = list_item; | |
593 | } | |
594 | return head; | |
595 | } | |
596 | ||
7c88e65d IM |
597 | /** |
598 | * machine_set_cpu_numa_node: | |
599 | * @machine: machine object to modify | |
600 | * @props: specifies which cpu objects to assign to | |
601 | * numa node specified by @props.node_id | |
602 | * @errp: if an error occurs, a pointer to an area to store the error | |
603 | * | |
604 | * Associate NUMA node specified by @props.node_id with cpu slots that | |
605 | * match socket/core/thread-ids specified by @props. It's recommended to use | |
606 | * query-hotpluggable-cpus.props values to specify affected cpu slots, | |
607 | * which would lead to exact 1:1 mapping of cpu slots to NUMA node. | |
608 | * | |
609 | * However for CLI convenience it's possible to pass in subset of properties, | |
610 | * which would affect all cpu slots that match it. | |
611 | * Ex for pc machine: | |
612 | * -smp 4,cores=2,sockets=2 -numa node,nodeid=0 -numa node,nodeid=1 \ | |
613 | * -numa cpu,node-id=0,socket_id=0 \ | |
614 | * -numa cpu,node-id=1,socket_id=1 | |
615 | * will assign all child cores of socket 0 to node 0 and | |
616 | * of socket 1 to node 1. | |
617 | * | |
618 | * On attempt of reassigning (already assigned) cpu slot to another NUMA node, | |
619 | * return error. | |
620 | * Empty subset is disallowed and function will return with error in this case. | |
621 | */ | |
622 | void machine_set_cpu_numa_node(MachineState *machine, | |
623 | const CpuInstanceProperties *props, Error **errp) | |
624 | { | |
625 | MachineClass *mc = MACHINE_GET_CLASS(machine); | |
244b3f44 | 626 | NodeInfo *numa_info = machine->numa_state->nodes; |
7c88e65d IM |
627 | bool match = false; |
628 | int i; | |
629 | ||
630 | if (!mc->possible_cpu_arch_ids) { | |
631 | error_setg(errp, "mapping of CPUs to NUMA node is not supported"); | |
632 | return; | |
633 | } | |
634 | ||
635 | /* disabling node mapping is not supported, forbid it */ | |
636 | assert(props->has_node_id); | |
637 | ||
638 | /* force board to initialize possible_cpus if it hasn't been done yet */ | |
639 | mc->possible_cpu_arch_ids(machine); | |
640 | ||
641 | for (i = 0; i < machine->possible_cpus->len; i++) { | |
642 | CPUArchId *slot = &machine->possible_cpus->cpus[i]; | |
643 | ||
644 | /* reject unsupported by board properties */ | |
645 | if (props->has_thread_id && !slot->props.has_thread_id) { | |
646 | error_setg(errp, "thread-id is not supported"); | |
647 | return; | |
648 | } | |
649 | ||
650 | if (props->has_core_id && !slot->props.has_core_id) { | |
651 | error_setg(errp, "core-id is not supported"); | |
652 | return; | |
653 | } | |
654 | ||
655 | if (props->has_socket_id && !slot->props.has_socket_id) { | |
656 | error_setg(errp, "socket-id is not supported"); | |
657 | return; | |
658 | } | |
659 | ||
176d2cda LX |
660 | if (props->has_die_id && !slot->props.has_die_id) { |
661 | error_setg(errp, "die-id is not supported"); | |
662 | return; | |
663 | } | |
664 | ||
7c88e65d IM |
665 | /* skip slots with explicit mismatch */ |
666 | if (props->has_thread_id && props->thread_id != slot->props.thread_id) { | |
667 | continue; | |
668 | } | |
669 | ||
670 | if (props->has_core_id && props->core_id != slot->props.core_id) { | |
671 | continue; | |
672 | } | |
673 | ||
176d2cda LX |
674 | if (props->has_die_id && props->die_id != slot->props.die_id) { |
675 | continue; | |
676 | } | |
677 | ||
7c88e65d IM |
678 | if (props->has_socket_id && props->socket_id != slot->props.socket_id) { |
679 | continue; | |
680 | } | |
681 | ||
682 | /* reject assignment if slot is already assigned, for compatibility | |
683 | * of legacy cpu_index mapping with SPAPR core based mapping do not | |
684 | * error out if cpu thread and matched core have the same node-id */ | |
685 | if (slot->props.has_node_id && | |
686 | slot->props.node_id != props->node_id) { | |
687 | error_setg(errp, "CPU is already assigned to node-id: %" PRId64, | |
688 | slot->props.node_id); | |
689 | return; | |
690 | } | |
691 | ||
692 | /* assign slot to node as it's matched '-numa cpu' key */ | |
693 | match = true; | |
694 | slot->props.node_id = props->node_id; | |
695 | slot->props.has_node_id = props->has_node_id; | |
244b3f44 TX |
696 | |
697 | if (machine->numa_state->hmat_enabled) { | |
698 | if ((numa_info[props->node_id].initiator < MAX_NODES) && | |
699 | (props->node_id != numa_info[props->node_id].initiator)) { | |
700 | error_setg(errp, "The initiator of CPU NUMA node %" PRId64 | |
701 | " should be itself", props->node_id); | |
702 | return; | |
703 | } | |
704 | numa_info[props->node_id].has_cpu = true; | |
705 | numa_info[props->node_id].initiator = props->node_id; | |
706 | } | |
7c88e65d IM |
707 | } |
708 | ||
709 | if (!match) { | |
710 | error_setg(errp, "no match found"); | |
711 | } | |
712 | } | |
713 | ||
6f479566 LX |
714 | static void smp_parse(MachineState *ms, QemuOpts *opts) |
715 | { | |
716 | if (opts) { | |
717 | unsigned cpus = qemu_opt_get_number(opts, "cpus", 0); | |
718 | unsigned sockets = qemu_opt_get_number(opts, "sockets", 0); | |
719 | unsigned cores = qemu_opt_get_number(opts, "cores", 0); | |
720 | unsigned threads = qemu_opt_get_number(opts, "threads", 0); | |
721 | ||
722 | /* compute missing values, prefer sockets over cores over threads */ | |
723 | if (cpus == 0 || sockets == 0) { | |
724 | cores = cores > 0 ? cores : 1; | |
725 | threads = threads > 0 ? threads : 1; | |
726 | if (cpus == 0) { | |
727 | sockets = sockets > 0 ? sockets : 1; | |
728 | cpus = cores * threads * sockets; | |
729 | } else { | |
730 | ms->smp.max_cpus = | |
731 | qemu_opt_get_number(opts, "maxcpus", cpus); | |
732 | sockets = ms->smp.max_cpus / (cores * threads); | |
733 | } | |
734 | } else if (cores == 0) { | |
735 | threads = threads > 0 ? threads : 1; | |
736 | cores = cpus / (sockets * threads); | |
737 | cores = cores > 0 ? cores : 1; | |
738 | } else if (threads == 0) { | |
739 | threads = cpus / (cores * sockets); | |
740 | threads = threads > 0 ? threads : 1; | |
741 | } else if (sockets * cores * threads < cpus) { | |
742 | error_report("cpu topology: " | |
743 | "sockets (%u) * cores (%u) * threads (%u) < " | |
744 | "smp_cpus (%u)", | |
745 | sockets, cores, threads, cpus); | |
746 | exit(1); | |
747 | } | |
748 | ||
749 | ms->smp.max_cpus = | |
750 | qemu_opt_get_number(opts, "maxcpus", cpus); | |
751 | ||
752 | if (ms->smp.max_cpus < cpus) { | |
753 | error_report("maxcpus must be equal to or greater than smp"); | |
754 | exit(1); | |
755 | } | |
756 | ||
c4332cd1 IM |
757 | if (sockets * cores * threads != ms->smp.max_cpus) { |
758 | error_report("Invalid CPU topology: " | |
759 | "sockets (%u) * cores (%u) * threads (%u) " | |
760 | "!= maxcpus (%u)", | |
6f479566 LX |
761 | sockets, cores, threads, |
762 | ms->smp.max_cpus); | |
763 | exit(1); | |
764 | } | |
765 | ||
6f479566 LX |
766 | ms->smp.cpus = cpus; |
767 | ms->smp.cores = cores; | |
768 | ms->smp.threads = threads; | |
8cb30e3a | 769 | ms->smp.sockets = sockets; |
6f479566 LX |
770 | } |
771 | ||
772 | if (ms->smp.cpus > 1) { | |
773 | Error *blocker = NULL; | |
774 | error_setg(&blocker, QERR_REPLAY_NOT_SUPPORTED, "smp"); | |
775 | replay_add_blocker(blocker); | |
776 | } | |
777 | } | |
778 | ||
076b35b5 ND |
779 | static void machine_class_init(ObjectClass *oc, void *data) |
780 | { | |
781 | MachineClass *mc = MACHINE_CLASS(oc); | |
782 | ||
783 | /* Default 128 MB as guest ram size */ | |
d23b6caa | 784 | mc->default_ram_size = 128 * MiB; |
71ae9e94 | 785 | mc->rom_file_has_mr = true; |
6f479566 | 786 | mc->smp_parse = smp_parse; |
26b81df4 | 787 | |
55641213 LV |
788 | /* numa node memory size aligned on 8MB by default. |
789 | * On Linux, each node's border has to be 8MB aligned | |
790 | */ | |
791 | mc->numa_mem_align_shift = 23; | |
3bfe5716 | 792 | mc->numa_auto_assign_ram = numa_default_auto_assign_ram; |
55641213 | 793 | |
26b81df4 | 794 | object_class_property_add_str(oc, "kernel", |
d2623129 | 795 | machine_get_kernel, machine_set_kernel); |
26b81df4 | 796 | object_class_property_set_description(oc, "kernel", |
7eecec7d | 797 | "Linux kernel image file"); |
26b81df4 EH |
798 | |
799 | object_class_property_add_str(oc, "initrd", | |
d2623129 | 800 | machine_get_initrd, machine_set_initrd); |
26b81df4 | 801 | object_class_property_set_description(oc, "initrd", |
7eecec7d | 802 | "Linux initial ramdisk file"); |
26b81df4 EH |
803 | |
804 | object_class_property_add_str(oc, "append", | |
d2623129 | 805 | machine_get_append, machine_set_append); |
26b81df4 | 806 | object_class_property_set_description(oc, "append", |
7eecec7d | 807 | "Linux kernel command line"); |
26b81df4 EH |
808 | |
809 | object_class_property_add_str(oc, "dtb", | |
d2623129 | 810 | machine_get_dtb, machine_set_dtb); |
26b81df4 | 811 | object_class_property_set_description(oc, "dtb", |
7eecec7d | 812 | "Linux kernel device tree file"); |
26b81df4 EH |
813 | |
814 | object_class_property_add_str(oc, "dumpdtb", | |
d2623129 | 815 | machine_get_dumpdtb, machine_set_dumpdtb); |
26b81df4 | 816 | object_class_property_set_description(oc, "dumpdtb", |
7eecec7d | 817 | "Dump current dtb to a file and quit"); |
26b81df4 EH |
818 | |
819 | object_class_property_add(oc, "phandle-start", "int", | |
820 | machine_get_phandle_start, machine_set_phandle_start, | |
d2623129 | 821 | NULL, NULL); |
26b81df4 | 822 | object_class_property_set_description(oc, "phandle-start", |
7eecec7d | 823 | "The first phandle ID we may generate dynamically"); |
26b81df4 EH |
824 | |
825 | object_class_property_add_str(oc, "dt-compatible", | |
d2623129 | 826 | machine_get_dt_compatible, machine_set_dt_compatible); |
26b81df4 | 827 | object_class_property_set_description(oc, "dt-compatible", |
7eecec7d | 828 | "Overrides the \"compatible\" property of the dt root node"); |
26b81df4 EH |
829 | |
830 | object_class_property_add_bool(oc, "dump-guest-core", | |
d2623129 | 831 | machine_get_dump_guest_core, machine_set_dump_guest_core); |
26b81df4 | 832 | object_class_property_set_description(oc, "dump-guest-core", |
7eecec7d | 833 | "Include guest memory in a core dump"); |
26b81df4 EH |
834 | |
835 | object_class_property_add_bool(oc, "mem-merge", | |
d2623129 | 836 | machine_get_mem_merge, machine_set_mem_merge); |
26b81df4 | 837 | object_class_property_set_description(oc, "mem-merge", |
7eecec7d | 838 | "Enable/disable memory merge support"); |
26b81df4 EH |
839 | |
840 | object_class_property_add_bool(oc, "usb", | |
d2623129 | 841 | machine_get_usb, machine_set_usb); |
26b81df4 | 842 | object_class_property_set_description(oc, "usb", |
7eecec7d | 843 | "Set on/off to enable/disable usb"); |
26b81df4 EH |
844 | |
845 | object_class_property_add_bool(oc, "graphics", | |
d2623129 | 846 | machine_get_graphics, machine_set_graphics); |
26b81df4 | 847 | object_class_property_set_description(oc, "graphics", |
7eecec7d | 848 | "Set on/off to enable/disable graphics emulation"); |
26b81df4 | 849 | |
26b81df4 | 850 | object_class_property_add_str(oc, "firmware", |
d2623129 | 851 | machine_get_firmware, machine_set_firmware); |
26b81df4 | 852 | object_class_property_set_description(oc, "firmware", |
7eecec7d | 853 | "Firmware image"); |
26b81df4 EH |
854 | |
855 | object_class_property_add_bool(oc, "suppress-vmdesc", | |
d2623129 | 856 | machine_get_suppress_vmdesc, machine_set_suppress_vmdesc); |
26b81df4 | 857 | object_class_property_set_description(oc, "suppress-vmdesc", |
7eecec7d | 858 | "Set on to disable self-describing migration"); |
26b81df4 EH |
859 | |
860 | object_class_property_add_bool(oc, "enforce-config-section", | |
d2623129 | 861 | machine_get_enforce_config_section, machine_set_enforce_config_section); |
26b81df4 | 862 | object_class_property_set_description(oc, "enforce-config-section", |
7eecec7d | 863 | "Set on to enforce configuration section migration"); |
db588194 BS |
864 | |
865 | object_class_property_add_str(oc, "memory-encryption", | |
d2623129 | 866 | machine_get_memory_encryption, machine_set_memory_encryption); |
db588194 | 867 | object_class_property_set_description(oc, "memory-encryption", |
7eecec7d | 868 | "Set memory encryption object to use"); |
076b35b5 ND |
869 | } |
870 | ||
dcb3d601 EH |
871 | static void machine_class_base_init(ObjectClass *oc, void *data) |
872 | { | |
873 | if (!object_class_is_abstract(oc)) { | |
98cec76a | 874 | MachineClass *mc = MACHINE_CLASS(oc); |
dcb3d601 EH |
875 | const char *cname = object_class_get_name(oc); |
876 | assert(g_str_has_suffix(cname, TYPE_MACHINE_SUFFIX)); | |
98cec76a EH |
877 | mc->name = g_strndup(cname, |
878 | strlen(cname) - strlen(TYPE_MACHINE_SUFFIX)); | |
b66bbee3 | 879 | mc->compat_props = g_ptr_array_new(); |
dcb3d601 EH |
880 | } |
881 | } | |
882 | ||
6b1b1440 MA |
883 | static void machine_initfn(Object *obj) |
884 | { | |
33cd52b5 | 885 | MachineState *ms = MACHINE(obj); |
b2fc91db | 886 | MachineClass *mc = MACHINE_GET_CLASS(obj); |
33cd52b5 | 887 | |
47c8ca53 | 888 | ms->dump_guest_core = true; |
75cc7f01 | 889 | ms->mem_merge = true; |
cfc58cf3 | 890 | ms->enable_graphics = true; |
d8870d02 | 891 | |
f6a0d06b EA |
892 | if (mc->nvdimm_supported) { |
893 | Object *obj = OBJECT(ms); | |
894 | ||
895 | ms->nvdimms_state = g_new0(NVDIMMState, 1); | |
896 | object_property_add_bool(obj, "nvdimm", | |
d2623129 | 897 | machine_get_nvdimm, machine_set_nvdimm); |
f6a0d06b EA |
898 | object_property_set_description(obj, "nvdimm", |
899 | "Set on/off to enable/disable " | |
7eecec7d | 900 | "NVDIMM instantiation"); |
f6a0d06b EA |
901 | |
902 | object_property_add_str(obj, "nvdimm-persistence", | |
903 | machine_get_nvdimm_persistence, | |
d2623129 | 904 | machine_set_nvdimm_persistence); |
f6a0d06b EA |
905 | object_property_set_description(obj, "nvdimm-persistence", |
906 | "Set NVDIMM persistence" | |
7eecec7d | 907 | "Valid values are cpu, mem-ctrl"); |
f6a0d06b EA |
908 | } |
909 | ||
fcd3f2cc | 910 | if (mc->cpu_index_to_instance_props && mc->get_default_cpu_node_id) { |
aa570207 | 911 | ms->numa_state = g_new0(NumaState, 1); |
244b3f44 | 912 | object_property_add_bool(obj, "hmat", |
d2623129 | 913 | machine_get_hmat, machine_set_hmat); |
244b3f44 TX |
914 | object_property_set_description(obj, "hmat", |
915 | "Set on/off to enable/disable " | |
916 | "ACPI Heterogeneous Memory Attribute " | |
7eecec7d | 917 | "Table (HMAT)"); |
aa570207 | 918 | } |
f6a0d06b | 919 | |
aa8b1839 | 920 | object_property_add_str(obj, "memory-backend", |
d2623129 | 921 | machine_get_memdev, machine_set_memdev); |
aa8b1839 IM |
922 | object_property_set_description(obj, "memory-backend", |
923 | "Set RAM backend" | |
7eecec7d | 924 | "Valid value is ID of hostmem based backend"); |
aa8b1839 | 925 | |
33cd52b5 AG |
926 | /* Register notifier when init is done for sysbus sanity checks */ |
927 | ms->sysbus_notifier.notify = machine_init_notify; | |
928 | qemu_add_machine_init_done_notifier(&ms->sysbus_notifier); | |
6b1b1440 MA |
929 | } |
930 | ||
931 | static void machine_finalize(Object *obj) | |
932 | { | |
933 | MachineState *ms = MACHINE(obj); | |
934 | ||
6b1b1440 MA |
935 | g_free(ms->kernel_filename); |
936 | g_free(ms->initrd_filename); | |
937 | g_free(ms->kernel_cmdline); | |
938 | g_free(ms->dtb); | |
939 | g_free(ms->dumpdtb); | |
940 | g_free(ms->dt_compatible); | |
941 | g_free(ms->firmware); | |
2ff4f67c | 942 | g_free(ms->device_memory); |
f6a0d06b | 943 | g_free(ms->nvdimms_state); |
aa570207 | 944 | g_free(ms->numa_state); |
6b1b1440 | 945 | } |
36d20cb2 | 946 | |
5e97b623 MA |
947 | bool machine_usb(MachineState *machine) |
948 | { | |
949 | return machine->usb; | |
950 | } | |
951 | ||
6cabe7fa MA |
952 | int machine_phandle_start(MachineState *machine) |
953 | { | |
954 | return machine->phandle_start; | |
955 | } | |
956 | ||
47c8ca53 MA |
957 | bool machine_dump_guest_core(MachineState *machine) |
958 | { | |
959 | return machine->dump_guest_core; | |
960 | } | |
961 | ||
75cc7f01 MA |
962 | bool machine_mem_merge(MachineState *machine) |
963 | { | |
964 | return machine->mem_merge; | |
965 | } | |
966 | ||
ec78f811 IM |
967 | static char *cpu_slot_to_string(const CPUArchId *cpu) |
968 | { | |
969 | GString *s = g_string_new(NULL); | |
970 | if (cpu->props.has_socket_id) { | |
971 | g_string_append_printf(s, "socket-id: %"PRId64, cpu->props.socket_id); | |
972 | } | |
176d2cda LX |
973 | if (cpu->props.has_die_id) { |
974 | g_string_append_printf(s, "die-id: %"PRId64, cpu->props.die_id); | |
975 | } | |
ec78f811 IM |
976 | if (cpu->props.has_core_id) { |
977 | if (s->len) { | |
978 | g_string_append_printf(s, ", "); | |
979 | } | |
980 | g_string_append_printf(s, "core-id: %"PRId64, cpu->props.core_id); | |
981 | } | |
982 | if (cpu->props.has_thread_id) { | |
983 | if (s->len) { | |
984 | g_string_append_printf(s, ", "); | |
985 | } | |
986 | g_string_append_printf(s, "thread-id: %"PRId64, cpu->props.thread_id); | |
987 | } | |
988 | return g_string_free(s, false); | |
989 | } | |
990 | ||
244b3f44 TX |
991 | static void numa_validate_initiator(NumaState *numa_state) |
992 | { | |
993 | int i; | |
994 | NodeInfo *numa_info = numa_state->nodes; | |
995 | ||
996 | for (i = 0; i < numa_state->num_nodes; i++) { | |
997 | if (numa_info[i].initiator == MAX_NODES) { | |
998 | error_report("The initiator of NUMA node %d is missing, use " | |
999 | "'-numa node,initiator' option to declare it", i); | |
1000 | exit(1); | |
1001 | } | |
1002 | ||
1003 | if (!numa_info[numa_info[i].initiator].present) { | |
1004 | error_report("NUMA node %" PRIu16 " is missing, use " | |
1005 | "'-numa node' option to declare it first", | |
1006 | numa_info[i].initiator); | |
1007 | exit(1); | |
1008 | } | |
1009 | ||
1010 | if (!numa_info[numa_info[i].initiator].has_cpu) { | |
1011 | error_report("The initiator of NUMA node %d is invalid", i); | |
1012 | exit(1); | |
1013 | } | |
1014 | } | |
1015 | } | |
1016 | ||
7a3099fc | 1017 | static void machine_numa_finish_cpu_init(MachineState *machine) |
ec78f811 IM |
1018 | { |
1019 | int i; | |
60bed6a3 | 1020 | bool default_mapping; |
ec78f811 IM |
1021 | GString *s = g_string_new(NULL); |
1022 | MachineClass *mc = MACHINE_GET_CLASS(machine); | |
1023 | const CPUArchIdList *possible_cpus = mc->possible_cpu_arch_ids(machine); | |
1024 | ||
aa570207 | 1025 | assert(machine->numa_state->num_nodes); |
60bed6a3 IM |
1026 | for (i = 0; i < possible_cpus->len; i++) { |
1027 | if (possible_cpus->cpus[i].props.has_node_id) { | |
1028 | break; | |
1029 | } | |
1030 | } | |
1031 | default_mapping = (i == possible_cpus->len); | |
1032 | ||
ec78f811 IM |
1033 | for (i = 0; i < possible_cpus->len; i++) { |
1034 | const CPUArchId *cpu_slot = &possible_cpus->cpus[i]; | |
1035 | ||
ec78f811 | 1036 | if (!cpu_slot->props.has_node_id) { |
d41f3e75 IM |
1037 | /* fetch default mapping from board and enable it */ |
1038 | CpuInstanceProperties props = cpu_slot->props; | |
1039 | ||
79e07936 | 1040 | props.node_id = mc->get_default_cpu_node_id(machine, i); |
d41f3e75 | 1041 | if (!default_mapping) { |
60bed6a3 IM |
1042 | /* record slots with not set mapping, |
1043 | * TODO: make it hard error in future */ | |
1044 | char *cpu_str = cpu_slot_to_string(cpu_slot); | |
1045 | g_string_append_printf(s, "%sCPU %d [%s]", | |
1046 | s->len ? ", " : "", i, cpu_str); | |
1047 | g_free(cpu_str); | |
d41f3e75 IM |
1048 | |
1049 | /* non mapped cpus used to fallback to node 0 */ | |
1050 | props.node_id = 0; | |
60bed6a3 | 1051 | } |
d41f3e75 IM |
1052 | |
1053 | props.has_node_id = true; | |
1054 | machine_set_cpu_numa_node(machine, &props, &error_fatal); | |
ec78f811 IM |
1055 | } |
1056 | } | |
244b3f44 TX |
1057 | |
1058 | if (machine->numa_state->hmat_enabled) { | |
1059 | numa_validate_initiator(machine->numa_state); | |
1060 | } | |
1061 | ||
c6ff347c | 1062 | if (s->len && !qtest_enabled()) { |
3dc6f869 AF |
1063 | warn_report("CPU(s) not present in any NUMA nodes: %s", |
1064 | s->str); | |
1065 | warn_report("All CPU(s) up to maxcpus should be described " | |
1066 | "in NUMA config, ability to start up with partial NUMA " | |
1067 | "mappings is obsoleted and will be removed in future"); | |
ec78f811 IM |
1068 | } |
1069 | g_string_free(s, true); | |
1070 | } | |
1071 | ||
82b911aa IM |
1072 | MemoryRegion *machine_consume_memdev(MachineState *machine, |
1073 | HostMemoryBackend *backend) | |
1074 | { | |
1075 | MemoryRegion *ret = host_memory_backend_get_memory(backend); | |
1076 | ||
1077 | if (memory_region_is_mapped(ret)) { | |
7a309cc9 MA |
1078 | error_report("memory backend %s can't be used multiple times.", |
1079 | object_get_canonical_path_component(OBJECT(backend))); | |
82b911aa IM |
1080 | exit(EXIT_FAILURE); |
1081 | } | |
1082 | host_memory_backend_set_mapped(backend, true); | |
1083 | vmstate_register_ram_global(ret); | |
1084 | return ret; | |
1085 | } | |
1086 | ||
482dfe9a IM |
1087 | void machine_run_board_init(MachineState *machine) |
1088 | { | |
1089 | MachineClass *machine_class = MACHINE_GET_CLASS(machine); | |
ec78f811 | 1090 | |
82b911aa IM |
1091 | if (machine->ram_memdev_id) { |
1092 | Object *o; | |
1093 | o = object_resolve_path_type(machine->ram_memdev_id, | |
1094 | TYPE_MEMORY_BACKEND, NULL); | |
1095 | machine->ram = machine_consume_memdev(machine, MEMORY_BACKEND(o)); | |
1096 | } | |
1097 | ||
fcd3f2cc | 1098 | if (machine->numa_state) { |
aa570207 TX |
1099 | numa_complete_configuration(machine); |
1100 | if (machine->numa_state->num_nodes) { | |
1101 | machine_numa_finish_cpu_init(machine); | |
1102 | } | |
3aeaac8f | 1103 | } |
c9cf636d AF |
1104 | |
1105 | /* If the machine supports the valid_cpu_types check and the user | |
1106 | * specified a CPU with -cpu check here that the user CPU is supported. | |
1107 | */ | |
1108 | if (machine_class->valid_cpu_types && machine->cpu_type) { | |
1109 | ObjectClass *class = object_class_by_name(machine->cpu_type); | |
1110 | int i; | |
1111 | ||
1112 | for (i = 0; machine_class->valid_cpu_types[i]; i++) { | |
1113 | if (object_class_dynamic_cast(class, | |
1114 | machine_class->valid_cpu_types[i])) { | |
1115 | /* The user specificed CPU is in the valid field, we are | |
1116 | * good to go. | |
1117 | */ | |
1118 | break; | |
1119 | } | |
1120 | } | |
1121 | ||
1122 | if (!machine_class->valid_cpu_types[i]) { | |
1123 | /* The user specified CPU is not valid */ | |
1124 | error_report("Invalid CPU type: %s", machine->cpu_type); | |
1125 | error_printf("The valid types are: %s", | |
1126 | machine_class->valid_cpu_types[0]); | |
1127 | for (i = 1; machine_class->valid_cpu_types[i]; i++) { | |
1128 | error_printf(", %s", machine_class->valid_cpu_types[i]); | |
1129 | } | |
1130 | error_printf("\n"); | |
1131 | ||
1132 | exit(1); | |
1133 | } | |
1134 | } | |
1135 | ||
482dfe9a IM |
1136 | machine_class->init(machine); |
1137 | } | |
1138 | ||
36d20cb2 MA |
1139 | static const TypeInfo machine_info = { |
1140 | .name = TYPE_MACHINE, | |
1141 | .parent = TYPE_OBJECT, | |
1142 | .abstract = true, | |
1143 | .class_size = sizeof(MachineClass), | |
076b35b5 | 1144 | .class_init = machine_class_init, |
dcb3d601 | 1145 | .class_base_init = machine_class_base_init, |
36d20cb2 | 1146 | .instance_size = sizeof(MachineState), |
6b1b1440 MA |
1147 | .instance_init = machine_initfn, |
1148 | .instance_finalize = machine_finalize, | |
36d20cb2 MA |
1149 | }; |
1150 | ||
1151 | static void machine_register_types(void) | |
1152 | { | |
1153 | type_register_static(&machine_info); | |
1154 | } | |
1155 | ||
1156 | type_init(machine_register_types) |