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3ead03bd AZ |
1 | /* |
2 | * Bit-Bang i2c emulation extracted from | |
3 | * Marvell MV88W8618 / Freecom MusicPal emulation. | |
4 | * | |
5 | * Copyright (c) 2008 Jan Kiszka | |
6 | * | |
8e31bf38 | 7 | * This code is licensed under the GNU GPL v2. |
6b620ca3 PB |
8 | * |
9 | * Contributions after 2012-01-13 are licensed under the terms of the | |
10 | * GNU GPL, version 2 or (at your option) any later version. | |
3ead03bd | 11 | */ |
0b8fa32f | 12 | |
0430891c | 13 | #include "qemu/osdep.h" |
64552b6b | 14 | #include "hw/irq.h" |
d718b747 | 15 | #include "hw/i2c/bitbang_i2c.h" |
83c9f4ca | 16 | #include "hw/sysbus.h" |
0b8fa32f | 17 | #include "qemu/module.h" |
db1015e9 | 18 | #include "qom/object.h" |
3ead03bd | 19 | |
3cd035d8 PB |
20 | //#define DEBUG_BITBANG_I2C |
21 | ||
22 | #ifdef DEBUG_BITBANG_I2C | |
23 | #define DPRINTF(fmt, ...) \ | |
24 | do { printf("bitbang_i2c: " fmt , ## __VA_ARGS__); } while (0) | |
25 | #else | |
26 | #define DPRINTF(fmt, ...) do {} while(0) | |
27 | #endif | |
28 | ||
3ead03bd AZ |
29 | static void bitbang_i2c_enter_stop(bitbang_i2c_interface *i2c) |
30 | { | |
3cd035d8 | 31 | DPRINTF("STOP\n"); |
3ead03bd AZ |
32 | if (i2c->current_addr >= 0) |
33 | i2c_end_transfer(i2c->bus); | |
34 | i2c->current_addr = -1; | |
35 | i2c->state = STOPPED; | |
36 | } | |
37 | ||
3cd035d8 PB |
38 | /* Set device data pin. */ |
39 | static int bitbang_i2c_ret(bitbang_i2c_interface *i2c, int level) | |
40 | { | |
41 | i2c->device_out = level; | |
42 | //DPRINTF("%d %d %d\n", i2c->last_clock, i2c->last_data, i2c->device_out); | |
43 | return level & i2c->last_data; | |
44 | } | |
45 | ||
46 | /* Leave device data pin unodified. */ | |
47 | static int bitbang_i2c_nop(bitbang_i2c_interface *i2c) | |
48 | { | |
49 | return bitbang_i2c_ret(i2c, i2c->device_out); | |
50 | } | |
51 | ||
52 | /* Returns data line level. */ | |
53 | int bitbang_i2c_set(bitbang_i2c_interface *i2c, int line, int level) | |
3ead03bd | 54 | { |
3ead03bd | 55 | int data; |
3ead03bd | 56 | |
3cd035d8 PB |
57 | if (level != 0 && level != 1) { |
58 | abort(); | |
59 | } | |
3ead03bd | 60 | |
3cd035d8 PB |
61 | if (line == BITBANG_I2C_SDA) { |
62 | if (level == i2c->last_data) { | |
63 | return bitbang_i2c_nop(i2c); | |
64 | } | |
65 | i2c->last_data = level; | |
66 | if (i2c->last_clock == 0) { | |
67 | return bitbang_i2c_nop(i2c); | |
68 | } | |
69 | if (level == 0) { | |
70 | DPRINTF("START\n"); | |
71 | /* START condition. */ | |
3ead03bd | 72 | i2c->state = SENDING_BIT7; |
3cd035d8 PB |
73 | i2c->current_addr = -1; |
74 | } else { | |
75 | /* STOP condition. */ | |
3ead03bd | 76 | bitbang_i2c_enter_stop(i2c); |
3cd035d8 PB |
77 | } |
78 | return bitbang_i2c_ret(i2c, 1); | |
79 | } | |
80 | ||
81 | data = i2c->last_data; | |
82 | if (i2c->last_clock == level) { | |
83 | return bitbang_i2c_nop(i2c); | |
84 | } | |
85 | i2c->last_clock = level; | |
86 | if (level == 0) { | |
87 | /* State is set/read at the start of the clock pulse. | |
88 | release the data line at the end. */ | |
89 | return bitbang_i2c_ret(i2c, 1); | |
90 | } | |
91 | switch (i2c->state) { | |
92 | case STOPPED: | |
2eb9f241 | 93 | case SENT_NACK: |
3cd035d8 | 94 | return bitbang_i2c_ret(i2c, 1); |
3ead03bd AZ |
95 | |
96 | case SENDING_BIT7 ... SENDING_BIT0: | |
3cd035d8 PB |
97 | i2c->buffer = (i2c->buffer << 1) | data; |
98 | /* will end up in WAITING_FOR_ACK */ | |
99 | i2c->state++; | |
100 | return bitbang_i2c_ret(i2c, 1); | |
3ead03bd AZ |
101 | |
102 | case WAITING_FOR_ACK: | |
9706e016 PM |
103 | { |
104 | int ret; | |
105 | ||
3cd035d8 PB |
106 | if (i2c->current_addr < 0) { |
107 | i2c->current_addr = i2c->buffer; | |
108 | DPRINTF("Address 0x%02x\n", i2c->current_addr); | |
9706e016 PM |
109 | ret = i2c_start_transfer(i2c->bus, i2c->current_addr >> 1, |
110 | i2c->current_addr & 1); | |
3cd035d8 PB |
111 | } else { |
112 | DPRINTF("Sent 0x%02x\n", i2c->buffer); | |
9706e016 PM |
113 | ret = i2c_send(i2c->bus, i2c->buffer); |
114 | } | |
115 | if (ret) { | |
116 | /* NACK (either addressing a nonexistent device, or the | |
117 | * device we were sending to decided to NACK us). | |
118 | */ | |
119 | DPRINTF("Got NACK\n"); | |
120 | bitbang_i2c_enter_stop(i2c); | |
121 | return bitbang_i2c_ret(i2c, 1); | |
3cd035d8 PB |
122 | } |
123 | if (i2c->current_addr & 1) { | |
124 | i2c->state = RECEIVING_BIT7; | |
125 | } else { | |
126 | i2c->state = SENDING_BIT7; | |
127 | } | |
128 | return bitbang_i2c_ret(i2c, 0); | |
9706e016 | 129 | } |
3cd035d8 PB |
130 | case RECEIVING_BIT7: |
131 | i2c->buffer = i2c_recv(i2c->bus); | |
132 | DPRINTF("RX byte 0x%02x\n", i2c->buffer); | |
133 | /* Fall through... */ | |
134 | case RECEIVING_BIT6 ... RECEIVING_BIT0: | |
135 | data = i2c->buffer >> 7; | |
136 | /* will end up in SENDING_ACK */ | |
137 | i2c->state++; | |
138 | i2c->buffer <<= 1; | |
139 | return bitbang_i2c_ret(i2c, data); | |
3ead03bd AZ |
140 | |
141 | case SENDING_ACK: | |
3cd035d8 PB |
142 | i2c->state = RECEIVING_BIT7; |
143 | if (data != 0) { | |
144 | DPRINTF("NACKED\n"); | |
2eb9f241 | 145 | i2c->state = SENT_NACK; |
3cd035d8 PB |
146 | i2c_nack(i2c->bus); |
147 | } else { | |
148 | DPRINTF("ACKED\n"); | |
149 | } | |
150 | return bitbang_i2c_ret(i2c, 1); | |
3ead03bd | 151 | } |
3cd035d8 PB |
152 | abort(); |
153 | } | |
154 | ||
41742927 | 155 | void bitbang_i2c_init(bitbang_i2c_interface *s, I2CBus *bus) |
3cd035d8 | 156 | { |
3cd035d8 PB |
157 | s->bus = bus; |
158 | s->last_data = 1; | |
159 | s->last_clock = 1; | |
160 | s->device_out = 1; | |
3cd035d8 | 161 | } |
3ead03bd | 162 | |
3cd035d8 | 163 | /* GPIO interface. */ |
cc3c3b8a AF |
164 | |
165 | #define TYPE_GPIO_I2C "gpio_i2c" | |
db1015e9 | 166 | typedef struct GPIOI2CState GPIOI2CState; |
8110fa1d EH |
167 | DECLARE_INSTANCE_CHECKER(GPIOI2CState, GPIO_I2C, |
168 | TYPE_GPIO_I2C) | |
cc3c3b8a | 169 | |
db1015e9 | 170 | struct GPIOI2CState { |
cc3c3b8a AF |
171 | SysBusDevice parent_obj; |
172 | ||
cffac71b | 173 | MemoryRegion dummy_iomem; |
41742927 | 174 | bitbang_i2c_interface bitbang; |
3cd035d8 PB |
175 | int last_level; |
176 | qemu_irq out; | |
db1015e9 | 177 | }; |
3cd035d8 PB |
178 | |
179 | static void bitbang_i2c_gpio_set(void *opaque, int irq, int level) | |
180 | { | |
181 | GPIOI2CState *s = opaque; | |
182 | ||
41742927 | 183 | level = bitbang_i2c_set(&s->bitbang, irq, level); |
3cd035d8 PB |
184 | if (level != s->last_level) { |
185 | s->last_level = level; | |
186 | qemu_set_irq(s->out, level); | |
187 | } | |
3ead03bd AZ |
188 | } |
189 | ||
00b2f758 | 190 | static void gpio_i2c_init(Object *obj) |
3ead03bd | 191 | { |
00b2f758 XZ |
192 | DeviceState *dev = DEVICE(obj); |
193 | GPIOI2CState *s = GPIO_I2C(obj); | |
194 | SysBusDevice *sbd = SYS_BUS_DEVICE(obj); | |
a5c82852 | 195 | I2CBus *bus; |
3ead03bd | 196 | |
00b2f758 | 197 | memory_region_init(&s->dummy_iomem, obj, "gpio_i2c", 0); |
cc3c3b8a | 198 | sysbus_init_mmio(sbd, &s->dummy_iomem); |
3ead03bd | 199 | |
cc3c3b8a | 200 | bus = i2c_init_bus(dev, "i2c"); |
41742927 | 201 | bitbang_i2c_init(&s->bitbang, bus); |
3ead03bd | 202 | |
cc3c3b8a AF |
203 | qdev_init_gpio_in(dev, bitbang_i2c_gpio_set, 2); |
204 | qdev_init_gpio_out(dev, &s->out, 1); | |
3ead03bd AZ |
205 | } |
206 | ||
999e12bb AL |
207 | static void gpio_i2c_class_init(ObjectClass *klass, void *data) |
208 | { | |
39bffca2 | 209 | DeviceClass *dc = DEVICE_CLASS(klass); |
999e12bb | 210 | |
125ee0ed | 211 | set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories); |
39bffca2 | 212 | dc->desc = "Virtual GPIO to I2C bridge"; |
999e12bb AL |
213 | } |
214 | ||
8c43a6f0 | 215 | static const TypeInfo gpio_i2c_info = { |
cc3c3b8a | 216 | .name = TYPE_GPIO_I2C, |
39bffca2 AL |
217 | .parent = TYPE_SYS_BUS_DEVICE, |
218 | .instance_size = sizeof(GPIOI2CState), | |
00b2f758 | 219 | .instance_init = gpio_i2c_init, |
39bffca2 | 220 | .class_init = gpio_i2c_class_init, |
3cd035d8 PB |
221 | }; |
222 | ||
83f7d43a | 223 | static void bitbang_i2c_register_types(void) |
3ead03bd | 224 | { |
39bffca2 | 225 | type_register_static(&gpio_i2c_info); |
3ead03bd AZ |
226 | } |
227 | ||
83f7d43a | 228 | type_init(bitbang_i2c_register_types) |