]> git.proxmox.com Git - mirror_qemu.git/blame - hw/isa/i82378.c
Merge tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu into...
[mirror_qemu.git] / hw / isa / i82378.c
CommitLineData
a04ff940
AF
1/*
2 * QEMU Intel i82378 emulation (PCI to ISA bridge)
3 *
4 * Copyright (c) 2010-2011 Hervé Poussineau
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
c30f2622 9 * version 2.1 of the License, or (at your option) any later version.
a04ff940
AF
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, see <http://www.gnu.org/licenses/>.
18 */
19
0430891c 20#include "qemu/osdep.h"
edf5ca5d 21#include "hw/pci/pci_device.h"
64552b6b 22#include "hw/irq.h"
852c27e2 23#include "hw/intc/i8259.h"
0d09e41a 24#include "hw/timer/i8254.h"
d6454270 25#include "migration/vmstate.h"
0d09e41a 26#include "hw/audio/pcspk.h"
db1015e9 27#include "qom/object.h"
a04ff940 28
5c973678 29#define TYPE_I82378 "i82378"
8063396b 30OBJECT_DECLARE_SIMPLE_TYPE(I82378State, I82378)
a04ff940 31
db1015e9 32struct I82378State {
5c973678
HP
33 PCIDevice parent_obj;
34
08d8bf4f 35 qemu_irq cpu_intr;
cef2e714 36 qemu_irq *isa_irqs_in;
a04ff940 37 MemoryRegion io;
db1015e9 38};
a04ff940 39
5c973678 40static const VMStateDescription vmstate_i82378 = {
a04ff940
AF
41 .name = "pci-i82378",
42 .version_id = 0,
43 .minimum_version_id = 0,
44 .fields = (VMStateField[]) {
5c973678 45 VMSTATE_PCI_DEVICE(parent_obj, I82378State),
a04ff940
AF
46 VMSTATE_END_OF_LIST()
47 },
48};
49
d1396cc7
PMD
50static void i82378_request_out0_irq(void *opaque, int irq, int level)
51{
52 I82378State *s = opaque;
53 qemu_set_irq(s->cpu_intr, level);
54}
55
a04ff940
AF
56static void i82378_request_pic_irq(void *opaque, int irq, int level)
57{
58 DeviceState *dev = opaque;
5c973678 59 I82378State *s = I82378(dev);
a04ff940 60
cef2e714 61 qemu_set_irq(s->isa_irqs_in[irq], level);
a04ff940
AF
62}
63
9af21dbe 64static void i82378_realize(PCIDevice *pci, Error **errp)
a04ff940 65{
5c973678
HP
66 DeviceState *dev = DEVICE(pci);
67 I82378State *s = I82378(dev);
68 uint8_t *pci_conf;
69 ISABus *isabus;
2c8ed55f 70 ISADevice *pit;
a04ff940 71
5c973678
HP
72 pci_conf = pci->config;
73 pci_set_word(pci_conf + PCI_COMMAND,
74 PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER);
75 pci_set_word(pci_conf + PCI_STATUS,
76 PCI_STATUS_DEVSEL_MEDIUM);
77
78 pci_config_set_interrupt_pin(pci_conf, 1); /* interrupt pin 0 */
79
bb2ed009 80 isabus = isa_bus_new(dev, get_system_memory(),
d10e5432
MA
81 pci_address_space_io(pci), errp);
82 if (!isabus) {
83 return;
84 }
5c973678 85
a04ff940
AF
86 /* This device has:
87 2 82C59 (irq)
88 1 82C54 (pit)
89 2 82C37 (dma)
90 NMI
91 Utility Bus Support Registers
92
93 All devices accept byte access only, except timer
94 */
95
a04ff940 96 /* 2 82C59 (irq) */
d1396cc7
PMD
97 s->isa_irqs_in = i8259_init(isabus,
98 qemu_allocate_irq(i82378_request_out0_irq,
99 s, 0));
7067887e 100 isa_bus_register_input_irqs(isabus, s->isa_irqs_in);
a04ff940
AF
101
102 /* 1 82C54 (pit) */
2c8ed55f 103 pit = i8254_pit_init(isabus, 0x40, 0, NULL);
a04ff940
AF
104
105 /* speaker */
525d654d 106 pcspk_init(isa_new(TYPE_PC_SPEAKER), isabus, pit);
a04ff940
AF
107
108 /* 2 82C37 (dma) */
2c8ed55f 109 isa_create_simple(isabus, "i82374");
a04ff940
AF
110}
111
5c973678 112static void i82378_init(Object *obj)
a04ff940 113{
5c973678
HP
114 DeviceState *dev = DEVICE(obj);
115 I82378State *s = I82378(obj);
a04ff940 116
08d8bf4f 117 qdev_init_gpio_out(dev, &s->cpu_intr, 1);
5c973678 118 qdev_init_gpio_in(dev, i82378_request_pic_irq, 16);
a04ff940
AF
119}
120
5c973678 121static void i82378_class_init(ObjectClass *klass, void *data)
40021f08
AL
122{
123 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
39bffca2 124 DeviceClass *dc = DEVICE_CLASS(klass);
40021f08 125
9af21dbe 126 k->realize = i82378_realize;
40021f08
AL
127 k->vendor_id = PCI_VENDOR_ID_INTEL;
128 k->device_id = PCI_DEVICE_ID_INTEL_82378;
129 k->revision = 0x03;
130 k->class_id = PCI_CLASS_BRIDGE_ISA;
5c973678 131 dc->vmsd = &vmstate_i82378;
125ee0ed 132 set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
40021f08
AL
133}
134
5c973678
HP
135static const TypeInfo i82378_type_info = {
136 .name = TYPE_I82378,
39bffca2 137 .parent = TYPE_PCI_DEVICE,
5c973678
HP
138 .instance_size = sizeof(I82378State),
139 .instance_init = i82378_init,
140 .class_init = i82378_class_init,
fd3b02c8
EH
141 .interfaces = (InterfaceInfo[]) {
142 { INTERFACE_CONVENTIONAL_PCI_DEVICE },
143 { },
144 },
a04ff940
AF
145};
146
83f7d43a 147static void i82378_register_types(void)
a04ff940 148{
5c973678 149 type_register_static(&i82378_type_info);
a04ff940
AF
150}
151
83f7d43a 152type_init(i82378_register_types)