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3cbee15b
JM
1/*
2 * PowerMac MacIO device emulation
3 *
4 * Copyright (c) 2005-2007 Fabrice Bellard
5 * Copyright (c) 2007 Jocelyn Mayer
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23 * THE SOFTWARE.
24 */
0b8fa32f 25
0d75590d 26#include "qemu/osdep.h"
da34e65c 27#include "qapi/error.h"
0b8fa32f 28#include "qemu/module.h"
83c9f4ca 29#include "hw/ppc/mac.h"
7092e84d 30#include "hw/misc/macio/cuda.h"
83c9f4ca 31#include "hw/pci/pci.h"
0d09e41a 32#include "hw/ppc/mac_dbdma.h"
a27bd6c7 33#include "hw/qdev-properties.h"
d6454270 34#include "migration/vmstate.h"
0d09e41a 35#include "hw/char/escc.h"
e1218e48 36#include "hw/misc/macio/macio.h"
017812df 37#include "hw/intc/heathrow_pic.h"
56e7404b 38#include "trace.h"
07a7484e 39
b6712ea3
MCA
40/* Note: this code is strongly inspirated from the corresponding code
41 * in PearPC */
42
0d54a502
AG
43/*
44 * The mac-io has two interfaces to the ESCC. One is called "escc-legacy",
45 * while the other one is the normal, current ESCC interface.
46 *
47 * The magic below creates memory aliases to spawn the escc-legacy device
48 * purely by rerouting the respective registers to our escc region. This
49 * works because the only difference between the two memory regions is the
50 * register layout, not their semantics.
51 *
52 * Reference: ftp://ftp.software.ibm.com/rs6000/technology/spec/chrp/inwork/CHRP_IORef_1.0.pdf
53 */
343bd85a 54static void macio_escc_legacy_setup(MacIOState *s)
0d54a502 55{
343bd85a
MCA
56 ESCCState *escc = ESCC(&s->escc);
57 SysBusDevice *sbd = SYS_BUS_DEVICE(escc);
0d54a502 58 MemoryRegion *escc_legacy = g_new(MemoryRegion, 1);
343bd85a 59 MemoryRegion *bar = &s->bar;
0d54a502
AG
60 int i;
61 static const int maps[] = {
dd2fa4f7
BH
62 0x00, 0x00, /* Command B */
63 0x02, 0x20, /* Command A */
64 0x04, 0x10, /* Data B */
65 0x06, 0x30, /* Data A */
66 0x08, 0x40, /* Enhancement B */
67 0x0A, 0x50, /* Enhancement A */
68 0x80, 0x80, /* Recovery count */
69 0x90, 0x90, /* Start A */
70 0xa0, 0xa0, /* Start B */
71 0xb0, 0xb0, /* Detect AB */
0d54a502
AG
72 };
73
343bd85a 74 memory_region_init(escc_legacy, OBJECT(s), "escc-legacy", 256);
0d54a502
AG
75 for (i = 0; i < ARRAY_SIZE(maps); i += 2) {
76 MemoryRegion *port = g_new(MemoryRegion, 1);
343bd85a
MCA
77 memory_region_init_alias(port, OBJECT(s), "escc-legacy-port",
78 sysbus_mmio_get_region(sbd, 0),
79 maps[i + 1], 0x2);
0d54a502
AG
80 memory_region_add_subregion(escc_legacy, maps[i], port);
81 }
82
83 memory_region_add_subregion(bar, 0x12000, escc_legacy);
84}
85
343bd85a 86static void macio_bar_setup(MacIOState *s)
3cbee15b 87{
343bd85a
MCA
88 ESCCState *escc = ESCC(&s->escc);
89 SysBusDevice *sbd = SYS_BUS_DEVICE(escc);
90 MemoryRegion *bar = &s->bar;
3cbee15b 91
343bd85a
MCA
92 memory_region_add_subregion(bar, 0x13000, sysbus_mmio_get_region(sbd, 0));
93 macio_escc_legacy_setup(s);
3cbee15b
JM
94}
95
bf31c56f
MCA
96static void macio_init_child_obj(MacIOState *s, const char *childname,
97 void *child, size_t childsize,
98 const char *childtype)
99{
100 object_initialize_child(OBJECT(s), childname, child, childsize, childtype,
101 &error_abort, NULL);
102 qdev_set_parent_bus(DEVICE(child), BUS(&s->macio_bus));
103}
104
62e9cd77 105static void macio_common_realize(PCIDevice *d, Error **errp)
d8c51b05 106{
7b925079 107 MacIOState *s = MACIO(d);
45fa67fb 108 SysBusDevice *sysbus_dev;
62e9cd77 109 Error *err = NULL;
c7104402 110
a504b9b9 111 object_property_set_bool(OBJECT(&s->dbdma), true, "realized", &err);
ecba28db
MCA
112 if (err) {
113 error_propagate(errp, err);
114 return;
115 }
a504b9b9 116 sysbus_dev = SYS_BUS_DEVICE(&s->dbdma);
ecba28db
MCA
117 memory_region_add_subregion(&s->bar, 0x08000,
118 sysbus_mmio_get_region(sysbus_dev, 0));
7b925079 119
ddd835f3
TH
120 qdev_prop_set_uint32(DEVICE(&s->escc), "disabled", 0);
121 qdev_prop_set_uint32(DEVICE(&s->escc), "frequency", ESCC_CLOCK);
122 qdev_prop_set_uint32(DEVICE(&s->escc), "it_shift", 4);
9bca0edb
PM
123 qdev_prop_set_chr(DEVICE(&s->escc), "chrA", serial_hd(0));
124 qdev_prop_set_chr(DEVICE(&s->escc), "chrB", serial_hd(1));
ddd835f3
TH
125 qdev_prop_set_uint32(DEVICE(&s->escc), "chnBtype", escc_serial);
126 qdev_prop_set_uint32(DEVICE(&s->escc), "chnAtype", escc_serial);
343bd85a
MCA
127 object_property_set_bool(OBJECT(&s->escc), true, "realized", &err);
128 if (err) {
129 error_propagate(errp, err);
130 return;
131 }
132
7b925079
AF
133 macio_bar_setup(s);
134 pci_register_bar(d, 0, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->bar);
d8c51b05
AL
135}
136
62e9cd77
MA
137static void macio_realize_ide(MacIOState *s, MACIOIDEState *ide,
138 qemu_irq irq0, qemu_irq irq1, int dmaid,
139 Error **errp)
14eefd0e
AG
140{
141 SysBusDevice *sysbus_dev;
142
143 sysbus_dev = SYS_BUS_DEVICE(ide);
144 sysbus_connect_irq(sysbus_dev, 0, irq0);
145 sysbus_connect_irq(sysbus_dev, 1, irq1);
0fc84331 146 qdev_prop_set_uint32(DEVICE(ide), "channel", dmaid);
a504b9b9 147 object_property_set_link(OBJECT(ide), OBJECT(&s->dbdma), "dbdma", errp);
e451b85f 148 macio_ide_register_dma(ide);
0fc84331 149
62e9cd77 150 object_property_set_bool(OBJECT(ide), true, "realized", errp);
14eefd0e
AG
151}
152
62e9cd77 153static void macio_oldworld_realize(PCIDevice *d, Error **errp)
d037834a
AF
154{
155 MacIOState *s = MACIO(d);
95ed3b7c 156 OldWorldMacIOState *os = OLDWORLD_MACIO(d);
20d2514a 157 DeviceState *pic_dev = DEVICE(os->pic);
62e9cd77 158 Error *err = NULL;
95ed3b7c 159 SysBusDevice *sysbus_dev;
62e9cd77
MA
160
161 macio_common_realize(d, &err);
162 if (err) {
163 error_propagate(errp, err);
164 return;
d037834a
AF
165 }
166
d811d61f
MCA
167 qdev_prop_set_uint64(DEVICE(&s->cuda), "timebase-frequency",
168 s->frequency);
169 object_property_set_bool(OBJECT(&s->cuda), true, "realized", &err);
170 if (err) {
171 error_propagate(errp, err);
172 return;
173 }
45fa67fb 174 sysbus_dev = SYS_BUS_DEVICE(&s->cuda);
d811d61f
MCA
175 memory_region_add_subregion(&s->bar, 0x16000,
176 sysbus_mmio_get_region(sysbus_dev, 0));
20d2514a
MCA
177 sysbus_connect_irq(sysbus_dev, 0, qdev_get_gpio_in(pic_dev,
178 OLDWORLD_CUDA_IRQ));
45fa67fb 179
343bd85a 180 sysbus_dev = SYS_BUS_DEVICE(&s->escc);
20d2514a
MCA
181 sysbus_connect_irq(sysbus_dev, 0, qdev_get_gpio_in(pic_dev,
182 OLDWORLD_ESCCB_IRQ));
183 sysbus_connect_irq(sysbus_dev, 1, qdev_get_gpio_in(pic_dev,
184 OLDWORLD_ESCCA_IRQ));
343bd85a 185
62e9cd77
MA
186 object_property_set_bool(OBJECT(&os->nvram), true, "realized", &err);
187 if (err) {
188 error_propagate(errp, err);
189 return;
95ed3b7c
AF
190 }
191 sysbus_dev = SYS_BUS_DEVICE(&os->nvram);
192 memory_region_add_subregion(&s->bar, 0x60000,
193 sysbus_mmio_get_region(sysbus_dev, 0));
194 pmac_format_nvram_partition(&os->nvram, os->nvram.size);
195
017812df
MCA
196 /* Heathrow PIC */
197 sysbus_dev = SYS_BUS_DEVICE(os->pic);
198 memory_region_add_subregion(&s->bar, 0x0,
199 sysbus_mmio_get_region(sysbus_dev, 0));
d037834a 200
14eefd0e 201 /* IDE buses */
20d2514a
MCA
202 macio_realize_ide(s, &os->ide[0],
203 qdev_get_gpio_in(pic_dev, OLDWORLD_IDE0_IRQ),
204 qdev_get_gpio_in(pic_dev, OLDWORLD_IDE0_DMA_IRQ),
205 0x16, &err);
206 if (err) {
207 error_propagate(errp, err);
208 return;
209 }
210
211 macio_realize_ide(s, &os->ide[1],
212 qdev_get_gpio_in(pic_dev, OLDWORLD_IDE1_IRQ),
213 qdev_get_gpio_in(pic_dev, OLDWORLD_IDE1_DMA_IRQ),
214 0x1a, &err);
215 if (err) {
216 error_propagate(errp, err);
217 return;
07a7484e 218 }
d037834a
AF
219}
220
213f0c4f
AF
221static void macio_init_ide(MacIOState *s, MACIOIDEState *ide, size_t ide_size,
222 int index)
14eefd0e 223{
1069a3c6 224 gchar *name = g_strdup_printf("ide[%i]", index);
5c8e3d17 225 uint32_t addr = 0x1f000 + ((index + 1) * 0x1000);
14eefd0e 226
bf31c56f 227 macio_init_child_obj(s, name, ide, ide_size, TYPE_MACIO_IDE);
5c8e3d17
MCA
228 qdev_prop_set_uint32(DEVICE(ide), "addr", addr);
229 memory_region_add_subregion(&s->bar, addr, &ide->mem);
14eefd0e
AG
230 g_free(name);
231}
232
95ed3b7c
AF
233static void macio_oldworld_init(Object *obj)
234{
07a7484e 235 MacIOState *s = MACIO(obj);
95ed3b7c
AF
236 OldWorldMacIOState *os = OLDWORLD_MACIO(obj);
237 DeviceState *dev;
14eefd0e 238 int i;
95ed3b7c 239
017812df
MCA
240 object_property_add_link(obj, "pic", TYPE_HEATHROW,
241 (Object **) &os->pic,
242 qdev_prop_allow_set_link_before_realize,
243 0, NULL);
244
bf31c56f 245 macio_init_child_obj(s, "cuda", &s->cuda, sizeof(s->cuda), TYPE_CUDA);
d811d61f 246
213f0c4f 247 object_initialize(&os->nvram, sizeof(os->nvram), TYPE_MACIO_NVRAM);
95ed3b7c
AF
248 dev = DEVICE(&os->nvram);
249 qdev_prop_set_uint32(dev, "size", 0x2000);
250 qdev_prop_set_uint32(dev, "it_shift", 4);
07a7484e 251
14eefd0e 252 for (i = 0; i < 2; i++) {
213f0c4f 253 macio_init_ide(s, &os->ide[i], sizeof(os->ide[i]), i);
14eefd0e 254 }
95ed3b7c
AF
255}
256
a0f9fdfd
AG
257static void timer_write(void *opaque, hwaddr addr, uint64_t value,
258 unsigned size)
259{
56e7404b 260 trace_macio_timer_write(addr, size, value);
a0f9fdfd
AG
261}
262
263static uint64_t timer_read(void *opaque, hwaddr addr, unsigned size)
264{
265 uint32_t value = 0;
d696760b
AG
266 uint64_t systime = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
267 uint64_t kltime;
268
73bcb24d 269 kltime = muldiv64(systime, 4194300, NANOSECONDS_PER_SECOND * 4);
d696760b 270 kltime = muldiv64(kltime, 18432000, 1048575);
a0f9fdfd
AG
271
272 switch (addr) {
273 case 0x38:
d696760b 274 value = kltime;
a0f9fdfd
AG
275 break;
276 case 0x3c:
d696760b 277 value = kltime >> 32;
a0f9fdfd
AG
278 break;
279 }
280
56e7404b 281 trace_macio_timer_read(addr, size, value);
a0f9fdfd
AG
282 return value;
283}
284
285static const MemoryRegionOps timer_ops = {
286 .read = timer_read,
287 .write = timer_write,
9397a7c8 288 .endianness = DEVICE_LITTLE_ENDIAN,
a0f9fdfd
AG
289};
290
62e9cd77 291static void macio_newworld_realize(PCIDevice *d, Error **errp)
d037834a
AF
292{
293 MacIOState *s = MACIO(d);
07a7484e 294 NewWorldMacIOState *ns = NEWWORLD_MACIO(d);
0fcd2a81 295 DeviceState *pic_dev = DEVICE(ns->pic);
62e9cd77 296 Error *err = NULL;
07a7484e 297 SysBusDevice *sysbus_dev;
6c5819c4 298 MemoryRegion *timer_memory = NULL;
62e9cd77
MA
299
300 macio_common_realize(d, &err);
301 if (err) {
302 error_propagate(errp, err);
303 return;
d037834a
AF
304 }
305
343bd85a 306 sysbus_dev = SYS_BUS_DEVICE(&s->escc);
0fcd2a81
MCA
307 sysbus_connect_irq(sysbus_dev, 0, qdev_get_gpio_in(pic_dev,
308 NEWWORLD_ESCCB_IRQ));
309 sysbus_connect_irq(sysbus_dev, 1, qdev_get_gpio_in(pic_dev,
310 NEWWORLD_ESCCA_IRQ));
343bd85a 311
dda12e9a
MCA
312 /* OpenPIC */
313 sysbus_dev = SYS_BUS_DEVICE(ns->pic);
314 memory_region_add_subregion(&s->bar, 0x40000,
315 sysbus_mmio_get_region(sysbus_dev, 0));
d037834a 316
14eefd0e 317 /* IDE buses */
0fcd2a81
MCA
318 macio_realize_ide(s, &ns->ide[0],
319 qdev_get_gpio_in(pic_dev, NEWWORLD_IDE0_IRQ),
320 qdev_get_gpio_in(pic_dev, NEWWORLD_IDE0_DMA_IRQ),
321 0x16, &err);
322 if (err) {
323 error_propagate(errp, err);
324 return;
325 }
326
327 macio_realize_ide(s, &ns->ide[1],
328 qdev_get_gpio_in(pic_dev, NEWWORLD_IDE1_IRQ),
329 qdev_get_gpio_in(pic_dev, NEWWORLD_IDE1_DMA_IRQ),
330 0x1a, &err);
331 if (err) {
332 error_propagate(errp, err);
333 return;
07a7484e
AF
334 }
335
a0f9fdfd 336 /* Timer */
6c5819c4 337 timer_memory = g_new(MemoryRegion, 1);
a0f9fdfd
AG
338 memory_region_init_io(timer_memory, OBJECT(s), &timer_ops, NULL, "timer",
339 0x1000);
340 memory_region_add_subregion(&s->bar, 0x15000, timer_memory);
7c4166a9
MCA
341
342 if (ns->has_pmu) {
343 /* GPIOs */
344 sysbus_dev = SYS_BUS_DEVICE(&ns->gpio);
345 object_property_set_link(OBJECT(&ns->gpio), OBJECT(pic_dev), "pic",
346 &error_abort);
347 memory_region_add_subregion(&s->bar, 0x50,
348 sysbus_mmio_get_region(sysbus_dev, 0));
349 object_property_set_bool(OBJECT(&ns->gpio), true, "realized", &err);
d811d61f
MCA
350
351 /* PMU */
954d9767
PMD
352 object_initialize_child(OBJECT(s), "pmu", &s->pmu, sizeof(s->pmu),
353 TYPE_VIA_PMU, &error_abort, NULL);
d811d61f
MCA
354 object_property_set_link(OBJECT(&s->pmu), OBJECT(sysbus_dev), "gpio",
355 &error_abort);
356 qdev_prop_set_bit(DEVICE(&s->pmu), "has-adb", ns->has_adb);
bf31c56f 357 qdev_set_parent_bus(DEVICE(&s->pmu), BUS(&s->macio_bus));
d811d61f
MCA
358
359 object_property_set_bool(OBJECT(&s->pmu), true, "realized", &err);
360 if (err) {
361 error_propagate(errp, err);
362 return;
363 }
364 sysbus_dev = SYS_BUS_DEVICE(&s->pmu);
365 sysbus_connect_irq(sysbus_dev, 0, qdev_get_gpio_in(pic_dev,
366 NEWWORLD_PMU_IRQ));
367 memory_region_add_subregion(&s->bar, 0x16000,
368 sysbus_mmio_get_region(sysbus_dev, 0));
369 } else {
370 /* CUDA */
954d9767
PMD
371 object_initialize_child(OBJECT(s), "cuda", &s->cuda, sizeof(s->cuda),
372 TYPE_CUDA, &error_abort, NULL);
bf31c56f 373 qdev_set_parent_bus(DEVICE(&s->cuda), BUS(&s->macio_bus));
d811d61f
MCA
374 qdev_prop_set_uint64(DEVICE(&s->cuda), "timebase-frequency",
375 s->frequency);
376
377 object_property_set_bool(OBJECT(&s->cuda), true, "realized", &err);
378 if (err) {
379 error_propagate(errp, err);
380 return;
381 }
382 sysbus_dev = SYS_BUS_DEVICE(&s->cuda);
383 sysbus_connect_irq(sysbus_dev, 0, qdev_get_gpio_in(pic_dev,
384 NEWWORLD_CUDA_IRQ));
385 memory_region_add_subregion(&s->bar, 0x16000,
386 sysbus_mmio_get_region(sysbus_dev, 0));
7c4166a9 387 }
d037834a
AF
388}
389
07a7484e
AF
390static void macio_newworld_init(Object *obj)
391{
392 MacIOState *s = MACIO(obj);
393 NewWorldMacIOState *ns = NEWWORLD_MACIO(obj);
394 int i;
07a7484e 395
dda12e9a
MCA
396 object_property_add_link(obj, "pic", TYPE_OPENPIC,
397 (Object **) &ns->pic,
398 qdev_prop_allow_set_link_before_realize,
399 0, NULL);
400
bf31c56f
MCA
401 macio_init_child_obj(s, "gpio", &ns->gpio, sizeof(ns->gpio),
402 TYPE_MACIO_GPIO);
7c4166a9 403
07a7484e 404 for (i = 0; i < 2; i++) {
213f0c4f 405 macio_init_ide(s, &ns->ide[i], sizeof(ns->ide[i]), i);
07a7484e
AF
406 }
407}
408
fcf1bbab
AF
409static void macio_instance_init(Object *obj)
410{
411 MacIOState *s = MACIO(obj);
412
81e0ab48 413 memory_region_init(&s->bar, obj, "macio", 0x80000);
07a7484e 414
bf31c56f
MCA
415 qbus_create_inplace(&s->macio_bus, sizeof(s->macio_bus), TYPE_MACIO_BUS,
416 DEVICE(obj), "macio.0");
343bd85a 417
bf31c56f
MCA
418 macio_init_child_obj(s, "dbdma", &s->dbdma, sizeof(s->dbdma),
419 TYPE_MAC_DBDMA);
420
421 macio_init_child_obj(s, "escc", &s->escc, sizeof(s->escc), TYPE_ESCC);
fcf1bbab
AF
422}
423
02635923
MCA
424static const VMStateDescription vmstate_macio_oldworld = {
425 .name = "macio-oldworld",
426 .version_id = 0,
427 .minimum_version_id = 0,
428 .fields = (VMStateField[]) {
429 VMSTATE_PCI_DEVICE(parent_obj.parent, OldWorldMacIOState),
430 VMSTATE_END_OF_LIST()
431 }
432};
433
d037834a
AF
434static void macio_oldworld_class_init(ObjectClass *oc, void *data)
435{
436 PCIDeviceClass *pdc = PCI_DEVICE_CLASS(oc);
02635923 437 DeviceClass *dc = DEVICE_CLASS(oc);
d037834a 438
62e9cd77 439 pdc->realize = macio_oldworld_realize;
d037834a 440 pdc->device_id = PCI_DEVICE_ID_APPLE_343S1201;
02635923 441 dc->vmsd = &vmstate_macio_oldworld;
d037834a
AF
442}
443
02635923
MCA
444static const VMStateDescription vmstate_macio_newworld = {
445 .name = "macio-newworld",
446 .version_id = 0,
447 .minimum_version_id = 0,
448 .fields = (VMStateField[]) {
449 VMSTATE_PCI_DEVICE(parent_obj.parent, NewWorldMacIOState),
450 VMSTATE_END_OF_LIST()
451 }
452};
453
f1114c17
MCA
454static Property macio_newworld_properties[] = {
455 DEFINE_PROP_BOOL("has-pmu", NewWorldMacIOState, has_pmu, false),
456 DEFINE_PROP_BOOL("has-adb", NewWorldMacIOState, has_adb, false),
457 DEFINE_PROP_END_OF_LIST()
458};
459
d037834a
AF
460static void macio_newworld_class_init(ObjectClass *oc, void *data)
461{
462 PCIDeviceClass *pdc = PCI_DEVICE_CLASS(oc);
02635923 463 DeviceClass *dc = DEVICE_CLASS(oc);
d037834a 464
62e9cd77 465 pdc->realize = macio_newworld_realize;
d037834a 466 pdc->device_id = PCI_DEVICE_ID_APPLE_UNI_N_KEYL;
02635923 467 dc->vmsd = &vmstate_macio_newworld;
f1114c17 468 dc->props = macio_newworld_properties;
d037834a
AF
469}
470
b981289c
AG
471static Property macio_properties[] = {
472 DEFINE_PROP_UINT64("frequency", MacIOState, frequency, 0),
473 DEFINE_PROP_END_OF_LIST()
474};
475
40021f08
AL
476static void macio_class_init(ObjectClass *klass, void *data)
477{
478 PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
b981289c 479 DeviceClass *dc = DEVICE_CLASS(klass);
40021f08 480
40021f08
AL
481 k->vendor_id = PCI_VENDOR_ID_APPLE;
482 k->class_id = PCI_CLASS_OTHERS << 8;
b981289c 483 dc->props = macio_properties;
f9f2a9f2 484 set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
1ca15d85
TH
485 /* Reason: Uses serial_hds in macio_instance_init */
486 dc->user_creatable = false;
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AL
487}
488
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MCA
489static const TypeInfo macio_bus_info = {
490 .name = TYPE_MACIO_BUS,
491 .parent = TYPE_BUS,
492 .instance_size = sizeof(MacIOBusState),
493};
494
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AF
495static const TypeInfo macio_oldworld_type_info = {
496 .name = TYPE_OLDWORLD_MACIO,
497 .parent = TYPE_MACIO,
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AF
498 .instance_size = sizeof(OldWorldMacIOState),
499 .instance_init = macio_oldworld_init,
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AF
500 .class_init = macio_oldworld_class_init,
501};
502
503static const TypeInfo macio_newworld_type_info = {
504 .name = TYPE_NEWWORLD_MACIO,
505 .parent = TYPE_MACIO,
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AF
506 .instance_size = sizeof(NewWorldMacIOState),
507 .instance_init = macio_newworld_init,
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508 .class_init = macio_newworld_class_init,
509};
510
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AF
511static const TypeInfo macio_type_info = {
512 .name = TYPE_MACIO,
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513 .parent = TYPE_PCI_DEVICE,
514 .instance_size = sizeof(MacIOState),
fcf1bbab 515 .instance_init = macio_instance_init,
d037834a 516 .abstract = true,
39bffca2 517 .class_init = macio_class_init,
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EH
518 .interfaces = (InterfaceInfo[]) {
519 { INTERFACE_CONVENTIONAL_PCI_DEVICE },
520 { },
521 },
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522};
523
83f7d43a 524static void macio_register_types(void)
d8c51b05 525{
bf31c56f 526 type_register_static(&macio_bus_info);
fcf1bbab 527 type_register_static(&macio_type_info);
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AF
528 type_register_static(&macio_oldworld_type_info);
529 type_register_static(&macio_newworld_type_info);
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AL
530}
531
83f7d43a 532type_init(macio_register_types)