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CommitLineData
39ac8455
DG
1/*
2 * QEMU PowerPC pSeries Logical Partition (aka sPAPR) hardware System Emulator
3 *
4 * Hypercall based emulated RTAS
5 *
6 * Copyright (c) 2010-2011 David Gibson, IBM Corporation.
7 *
8 * Permission is hereby granted, free of charge, to any person obtaining a copy
9 * of this software and associated documentation files (the "Software"), to deal
10 * in the Software without restriction, including without limitation the rights
11 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
12 * copies of the Software, and to permit persons to whom the Software is
13 * furnished to do so, subject to the following conditions:
14 *
15 * The above copyright notice and this permission notice shall be included in
16 * all copies or substantial portions of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
23 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
24 * THE SOFTWARE.
25 *
26 */
0d75590d 27#include "qemu/osdep.h"
39ac8455 28#include "cpu.h"
03dd024f 29#include "qemu/log.h"
ce9863b7 30#include "qemu/error-report.h"
9c17d615 31#include "sysemu/sysemu.h"
dccfcd0e 32#include "sysemu/char.h"
39ac8455 33#include "hw/qdev.h"
9c17d615 34#include "sysemu/device_tree.h"
db4ef288 35#include "sysemu/cpus.h"
77ac58dd 36#include "sysemu/kvm.h"
39ac8455 37
0d09e41a
PB
38#include "hw/ppc/spapr.h"
39#include "hw/ppc/spapr_vio.h"
eeddd59f 40#include "hw/ppc/spapr_rtas.h"
af81cf32 41#include "hw/ppc/ppc.h"
e010ad8f 42#include "qapi-event.h"
e3943228 43#include "hw/boards.h"
39ac8455
DG
44
45#include <libfdt.h>
8c8639df 46#include "hw/ppc/spapr_drc.h"
f348b6d1 47#include "qemu/cutils.h"
028ec3ce 48#include "trace.h"
8c8639df 49
28e02042 50static sPAPRConfigureConnectorState *spapr_ccs_find(sPAPRMachineState *spapr,
46503c2b
MR
51 uint32_t drc_index)
52{
53 sPAPRConfigureConnectorState *ccs = NULL;
54
55 QTAILQ_FOREACH(ccs, &spapr->ccs_list, next) {
56 if (ccs->drc_index == drc_index) {
57 break;
58 }
59 }
60
61 return ccs;
62}
63
28e02042 64static void spapr_ccs_add(sPAPRMachineState *spapr,
46503c2b
MR
65 sPAPRConfigureConnectorState *ccs)
66{
67 g_assert(!spapr_ccs_find(spapr, ccs->drc_index));
68 QTAILQ_INSERT_HEAD(&spapr->ccs_list, ccs, next);
69}
70
28e02042 71static void spapr_ccs_remove(sPAPRMachineState *spapr,
46503c2b
MR
72 sPAPRConfigureConnectorState *ccs)
73{
74 QTAILQ_REMOVE(&spapr->ccs_list, ccs, next);
75 g_free(ccs);
76}
77
78void spapr_ccs_reset_hook(void *opaque)
79{
28e02042 80 sPAPRMachineState *spapr = opaque;
46503c2b
MR
81 sPAPRConfigureConnectorState *ccs, *ccs_tmp;
82
83 QTAILQ_FOREACH_SAFE(ccs, &spapr->ccs_list, next, ccs_tmp) {
84 spapr_ccs_remove(spapr, ccs);
85 }
86}
39ac8455 87
28e02042 88static void rtas_display_character(PowerPCCPU *cpu, sPAPRMachineState *spapr,
821303f5
DG
89 uint32_t token, uint32_t nargs,
90 target_ulong args,
91 uint32_t nret, target_ulong rets)
92{
93 uint8_t c = rtas_ld(args, 0);
5f2e2ba2 94 VIOsPAPRDevice *sdev = vty_lookup(spapr, 0);
821303f5
DG
95
96 if (!sdev) {
a64d325d 97 rtas_st(rets, 0, RTAS_OUT_HW_ERROR);
821303f5
DG
98 } else {
99 vty_putchars(sdev, &c, sizeof(c));
a64d325d 100 rtas_st(rets, 0, RTAS_OUT_SUCCESS);
821303f5
DG
101 }
102}
103
28e02042 104static void rtas_power_off(PowerPCCPU *cpu, sPAPRMachineState *spapr,
821303f5
DG
105 uint32_t token, uint32_t nargs, target_ulong args,
106 uint32_t nret, target_ulong rets)
107{
108 if (nargs != 2 || nret != 1) {
a64d325d 109 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
821303f5
DG
110 return;
111 }
112 qemu_system_shutdown_request();
8a9c1b77 113 cpu_stop_current();
a64d325d 114 rtas_st(rets, 0, RTAS_OUT_SUCCESS);
821303f5
DG
115}
116
28e02042 117static void rtas_system_reboot(PowerPCCPU *cpu, sPAPRMachineState *spapr,
c821a43c
DG
118 uint32_t token, uint32_t nargs,
119 target_ulong args,
120 uint32_t nret, target_ulong rets)
121{
122 if (nargs != 0 || nret != 1) {
a64d325d 123 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
c821a43c
DG
124 return;
125 }
126 qemu_system_reset_request();
a64d325d 127 rtas_st(rets, 0, RTAS_OUT_SUCCESS);
c821a43c
DG
128}
129
210b580b 130static void rtas_query_cpu_stopped_state(PowerPCCPU *cpu_,
28e02042 131 sPAPRMachineState *spapr,
a9f8ad8f
DG
132 uint32_t token, uint32_t nargs,
133 target_ulong args,
134 uint32_t nret, target_ulong rets)
135{
136 target_ulong id;
0f20ba62 137 PowerPCCPU *cpu;
a9f8ad8f
DG
138
139 if (nargs != 1 || nret != 2) {
a64d325d 140 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
a9f8ad8f
DG
141 return;
142 }
143
144 id = rtas_ld(args, 0);
0f20ba62 145 cpu = ppc_get_vcpu_by_dt_id(id);
05318a85 146 if (cpu != NULL) {
0f20ba62 147 if (CPU(cpu)->halted) {
a9f8ad8f
DG
148 rtas_st(rets, 1, 0);
149 } else {
150 rtas_st(rets, 1, 2);
151 }
152
a64d325d 153 rtas_st(rets, 0, RTAS_OUT_SUCCESS);
a9f8ad8f
DG
154 return;
155 }
156
157 /* Didn't find a matching cpu */
a64d325d 158 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
a9f8ad8f
DG
159}
160
af81cf32
BR
161/*
162 * Set the timebase offset of the CPU to that of first CPU.
163 * This helps hotplugged CPU to have the correct timebase offset.
164 */
165static void spapr_cpu_update_tb_offset(PowerPCCPU *cpu)
166{
167 PowerPCCPU *fcpu = POWERPC_CPU(first_cpu);
168
169 cpu->env.tb_env->tb_offset = fcpu->env.tb_env->tb_offset;
170}
171
172static void spapr_cpu_set_endianness(PowerPCCPU *cpu)
173{
174 PowerPCCPU *fcpu = POWERPC_CPU(first_cpu);
175 PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(fcpu);
176
177 if (!pcc->interrupts_big_endian(fcpu)) {
178 cpu->env.spr[SPR_LPCR] |= LPCR_ILE;
179 }
180}
181
28e02042 182static void rtas_start_cpu(PowerPCCPU *cpu_, sPAPRMachineState *spapr,
a9f8ad8f
DG
183 uint32_t token, uint32_t nargs,
184 target_ulong args,
185 uint32_t nret, target_ulong rets)
186{
187 target_ulong id, start, r3;
0f20ba62 188 PowerPCCPU *cpu;
a9f8ad8f
DG
189
190 if (nargs != 3 || nret != 1) {
a64d325d 191 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
a9f8ad8f
DG
192 return;
193 }
194
195 id = rtas_ld(args, 0);
196 start = rtas_ld(args, 1);
197 r3 = rtas_ld(args, 2);
198
0f20ba62
AK
199 cpu = ppc_get_vcpu_by_dt_id(id);
200 if (cpu != NULL) {
201 CPUState *cs = CPU(cpu);
c67e216b 202 CPUPPCState *env = &cpu->env;
a9f8ad8f 203
c67e216b 204 if (!cs->halted) {
a64d325d 205 rtas_st(rets, 0, RTAS_OUT_HW_ERROR);
a9f8ad8f
DG
206 return;
207 }
208
048706d9
DG
209 /* This will make sure qemu state is up to date with kvm, and
210 * mark it dirty so our changes get flushed back before the
211 * new cpu enters */
dd1750d7 212 kvm_cpu_synchronize_state(cs);
048706d9 213
a9f8ad8f
DG
214 env->msr = (1ULL << MSR_SF) | (1ULL << MSR_ME);
215 env->nip = start;
216 env->gpr[3] = r3;
c67e216b 217 cs->halted = 0;
af81cf32
BR
218 spapr_cpu_set_endianness(cpu);
219 spapr_cpu_update_tb_offset(cpu);
a9f8ad8f 220
c67e216b 221 qemu_cpu_kick(cs);
a9f8ad8f 222
a64d325d 223 rtas_st(rets, 0, RTAS_OUT_SUCCESS);
a9f8ad8f
DG
224 return;
225 }
226
227 /* Didn't find a matching cpu */
a64d325d 228 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
a9f8ad8f
DG
229}
230
28e02042 231static void rtas_stop_self(PowerPCCPU *cpu, sPAPRMachineState *spapr,
59760f2d
AK
232 uint32_t token, uint32_t nargs,
233 target_ulong args,
234 uint32_t nret, target_ulong rets)
235{
236 CPUState *cs = CPU(cpu);
237 CPUPPCState *env = &cpu->env;
238
239 cs->halted = 1;
9102deda 240 qemu_cpu_kick(cs);
59760f2d
AK
241 /*
242 * While stopping a CPU, the guest calls H_CPPR which
243 * effectively disables interrupts on XICS level.
244 * However decrementer interrupts in TCG can still
245 * wake the CPU up so here we disable interrupts in MSR
246 * as well.
247 * As rtas_start_cpu() resets the whole MSR anyway, there is
248 * no need to bother with specific bits, we just clear it.
249 */
250 env->msr = 0;
251}
252
c920f7b4
DG
253static inline int sysparm_st(target_ulong addr, target_ulong len,
254 const void *val, uint16_t vallen)
255{
256 hwaddr phys = ppc64_phys_to_real(addr);
257
258 if (len < 2) {
259 return RTAS_OUT_SYSPARM_PARAM_ERROR;
260 }
261 stw_be_phys(&address_space_memory, phys, vallen);
262 cpu_physical_memory_write(phys + 2, val, MIN(len - 2, vallen));
263 return RTAS_OUT_SUCCESS;
264}
265
3ada6b11 266static void rtas_ibm_get_system_parameter(PowerPCCPU *cpu,
28e02042 267 sPAPRMachineState *spapr,
3ada6b11
AK
268 uint32_t token, uint32_t nargs,
269 target_ulong args,
270 uint32_t nret, target_ulong rets)
271{
272 target_ulong parameter = rtas_ld(args, 0);
273 target_ulong buffer = rtas_ld(args, 1);
274 target_ulong length = rtas_ld(args, 2);
c920f7b4 275 target_ulong ret;
3ada6b11
AK
276
277 switch (parameter) {
3b50d897 278 case RTAS_SYSPARM_SPLPAR_CHARACTERISTICS: {
e3943228
SB
279 char *param_val = g_strdup_printf("MaxEntCap=%d,"
280 "DesMem=%llu,"
281 "DesProcs=%d,"
282 "MaxPlatProcs=%d",
283 max_cpus,
284 current_machine->ram_size / M_BYTE,
285 smp_cpus,
286 max_cpus);
c920f7b4 287 ret = sysparm_st(buffer, length, param_val, strlen(param_val) + 1);
3b50d897
S
288 g_free(param_val);
289 break;
290 }
3052d951
S
291 case RTAS_SYSPARM_DIAGNOSTICS_RUN_MODE: {
292 uint8_t param_val = DIAGNOSTICS_RUN_MODE_DISABLED;
293
c920f7b4 294 ret = sysparm_st(buffer, length, &param_val, sizeof(param_val));
3ada6b11
AK
295 break;
296 }
b907d7b0 297 case RTAS_SYSPARM_UUID:
9c5ce8db
FZ
298 ret = sysparm_st(buffer, length, (unsigned char *)&qemu_uuid,
299 (qemu_uuid_set ? 16 : 0));
b907d7b0 300 break;
3052d951
S
301 default:
302 ret = RTAS_OUT_NOT_SUPPORTED;
303 }
3ada6b11
AK
304
305 rtas_st(rets, 0, ret);
306}
307
308static void rtas_ibm_set_system_parameter(PowerPCCPU *cpu,
28e02042 309 sPAPRMachineState *spapr,
3ada6b11
AK
310 uint32_t token, uint32_t nargs,
311 target_ulong args,
312 uint32_t nret, target_ulong rets)
313{
314 target_ulong parameter = rtas_ld(args, 0);
315 target_ulong ret = RTAS_OUT_NOT_SUPPORTED;
316
317 switch (parameter) {
3b50d897 318 case RTAS_SYSPARM_SPLPAR_CHARACTERISTICS:
3052d951 319 case RTAS_SYSPARM_DIAGNOSTICS_RUN_MODE:
b907d7b0 320 case RTAS_SYSPARM_UUID:
3ada6b11
AK
321 ret = RTAS_OUT_NOT_AUTHORIZED;
322 break;
323 }
324
325 rtas_st(rets, 0, ret);
326}
327
2e14072f 328static void rtas_ibm_os_term(PowerPCCPU *cpu,
28e02042 329 sPAPRMachineState *spapr,
2e14072f
ND
330 uint32_t token, uint32_t nargs,
331 target_ulong args,
332 uint32_t nret, target_ulong rets)
333{
334 target_ulong ret = 0;
335
336 qapi_event_send_guest_panicked(GUEST_PANIC_ACTION_PAUSE, &error_abort);
337
338 rtas_st(rets, 0, ret);
339}
340
28e02042 341static void rtas_set_power_level(PowerPCCPU *cpu, sPAPRMachineState *spapr,
094d2058
NF
342 uint32_t token, uint32_t nargs,
343 target_ulong args, uint32_t nret,
344 target_ulong rets)
345{
346 int32_t power_domain;
347
348 if (nargs != 2 || nret != 2) {
349 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
350 return;
351 }
352
353 /* we currently only use a single, "live insert" powerdomain for
354 * hotplugged/dlpar'd resources, so the power is always live/full (100)
355 */
356 power_domain = rtas_ld(args, 0);
357 if (power_domain != -1) {
358 rtas_st(rets, 0, RTAS_OUT_NOT_SUPPORTED);
359 return;
360 }
361
362 rtas_st(rets, 0, RTAS_OUT_SUCCESS);
363 rtas_st(rets, 1, 100);
364}
365
28e02042 366static void rtas_get_power_level(PowerPCCPU *cpu, sPAPRMachineState *spapr,
094d2058
NF
367 uint32_t token, uint32_t nargs,
368 target_ulong args, uint32_t nret,
369 target_ulong rets)
370{
371 int32_t power_domain;
372
373 if (nargs != 1 || nret != 2) {
374 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
375 return;
376 }
377
378 /* we currently only use a single, "live insert" powerdomain for
379 * hotplugged/dlpar'd resources, so the power is always live/full (100)
380 */
381 power_domain = rtas_ld(args, 0);
382 if (power_domain != -1) {
383 rtas_st(rets, 0, RTAS_OUT_NOT_SUPPORTED);
384 return;
385 }
386
387 rtas_st(rets, 0, RTAS_OUT_SUCCESS);
388 rtas_st(rets, 1, 100);
389}
390
8c8639df
MD
391static bool sensor_type_is_dr(uint32_t sensor_type)
392{
393 switch (sensor_type) {
394 case RTAS_SENSOR_TYPE_ISOLATION_STATE:
395 case RTAS_SENSOR_TYPE_DR:
396 case RTAS_SENSOR_TYPE_ALLOCATION_STATE:
397 return true;
398 }
399
400 return false;
401}
402
28e02042 403static void rtas_set_indicator(PowerPCCPU *cpu, sPAPRMachineState *spapr,
8c8639df
MD
404 uint32_t token, uint32_t nargs,
405 target_ulong args, uint32_t nret,
406 target_ulong rets)
407{
408 uint32_t sensor_type;
409 uint32_t sensor_index;
410 uint32_t sensor_state;
0cb688d2 411 uint32_t ret = RTAS_OUT_SUCCESS;
8c8639df
MD
412 sPAPRDRConnector *drc;
413 sPAPRDRConnectorClass *drck;
414
415 if (nargs != 3 || nret != 1) {
0cb688d2
MR
416 ret = RTAS_OUT_PARAM_ERROR;
417 goto out;
8c8639df
MD
418 }
419
420 sensor_type = rtas_ld(args, 0);
421 sensor_index = rtas_ld(args, 1);
422 sensor_state = rtas_ld(args, 2);
423
424 if (!sensor_type_is_dr(sensor_type)) {
425 goto out_unimplemented;
426 }
427
428 /* if this is a DR sensor we can assume sensor_index == drc_index */
429 drc = spapr_dr_connector_by_index(sensor_index);
430 if (!drc) {
028ec3ce 431 trace_spapr_rtas_set_indicator_invalid(sensor_index);
0cb688d2
MR
432 ret = RTAS_OUT_PARAM_ERROR;
433 goto out;
8c8639df
MD
434 }
435 drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc);
436
437 switch (sensor_type) {
438 case RTAS_SENSOR_TYPE_ISOLATION_STATE:
46503c2b
MR
439 /* if the guest is configuring a device attached to this
440 * DRC, we should reset the configuration state at this
441 * point since it may no longer be reliable (guest released
442 * device and needs to start over, or unplug occurred so
443 * the FDT is no longer valid)
444 */
445 if (sensor_state == SPAPR_DR_ISOLATION_STATE_ISOLATED) {
446 sPAPRConfigureConnectorState *ccs = spapr_ccs_find(spapr,
447 sensor_index);
448 if (ccs) {
449 spapr_ccs_remove(spapr, ccs);
450 }
451 }
0cb688d2 452 ret = drck->set_isolation_state(drc, sensor_state);
8c8639df
MD
453 break;
454 case RTAS_SENSOR_TYPE_DR:
0cb688d2 455 ret = drck->set_indicator_state(drc, sensor_state);
8c8639df
MD
456 break;
457 case RTAS_SENSOR_TYPE_ALLOCATION_STATE:
0cb688d2 458 ret = drck->set_allocation_state(drc, sensor_state);
8c8639df
MD
459 break;
460 default:
461 goto out_unimplemented;
462 }
463
0cb688d2
MR
464out:
465 rtas_st(rets, 0, ret);
8c8639df
MD
466 return;
467
468out_unimplemented:
469 /* currently only DR-related sensors are implemented */
028ec3ce 470 trace_spapr_rtas_set_indicator_not_supported(sensor_index, sensor_type);
8c8639df
MD
471 rtas_st(rets, 0, RTAS_OUT_NOT_SUPPORTED);
472}
473
28e02042 474static void rtas_get_sensor_state(PowerPCCPU *cpu, sPAPRMachineState *spapr,
886445a6
MD
475 uint32_t token, uint32_t nargs,
476 target_ulong args, uint32_t nret,
477 target_ulong rets)
478{
479 uint32_t sensor_type;
480 uint32_t sensor_index;
0cb688d2 481 uint32_t sensor_state = 0;
886445a6
MD
482 sPAPRDRConnector *drc;
483 sPAPRDRConnectorClass *drck;
0cb688d2 484 uint32_t ret = RTAS_OUT_SUCCESS;
886445a6
MD
485
486 if (nargs != 2 || nret != 2) {
0cb688d2
MR
487 ret = RTAS_OUT_PARAM_ERROR;
488 goto out;
886445a6
MD
489 }
490
491 sensor_type = rtas_ld(args, 0);
492 sensor_index = rtas_ld(args, 1);
493
494 if (sensor_type != RTAS_SENSOR_TYPE_ENTITY_SENSE) {
495 /* currently only DR-related sensors are implemented */
028ec3ce
LV
496 trace_spapr_rtas_get_sensor_state_not_supported(sensor_index,
497 sensor_type);
0cb688d2
MR
498 ret = RTAS_OUT_NOT_SUPPORTED;
499 goto out;
886445a6
MD
500 }
501
502 drc = spapr_dr_connector_by_index(sensor_index);
503 if (!drc) {
028ec3ce 504 trace_spapr_rtas_get_sensor_state_invalid(sensor_index);
0cb688d2
MR
505 ret = RTAS_OUT_PARAM_ERROR;
506 goto out;
886445a6
MD
507 }
508 drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc);
0cb688d2 509 ret = drck->entity_sense(drc, &sensor_state);
886445a6 510
0cb688d2
MR
511out:
512 rtas_st(rets, 0, ret);
513 rtas_st(rets, 1, sensor_state);
886445a6
MD
514}
515
46503c2b
MR
516/* configure-connector work area offsets, int32_t units for field
517 * indexes, bytes for field offset/len values.
518 *
519 * as documented by PAPR+ v2.7, 13.5.3.5
520 */
521#define CC_IDX_NODE_NAME_OFFSET 2
522#define CC_IDX_PROP_NAME_OFFSET 2
523#define CC_IDX_PROP_LEN 3
524#define CC_IDX_PROP_DATA_OFFSET 4
525#define CC_VAL_DATA_OFFSET ((CC_IDX_PROP_DATA_OFFSET + 1) * 4)
526#define CC_WA_LEN 4096
527
f201987b
DG
528static void configure_connector_st(target_ulong addr, target_ulong offset,
529 const void *buf, size_t len)
530{
531 cpu_physical_memory_write(ppc64_phys_to_real(addr + offset),
532 buf, MIN(len, CC_WA_LEN - offset));
533}
534
46503c2b 535static void rtas_ibm_configure_connector(PowerPCCPU *cpu,
28e02042 536 sPAPRMachineState *spapr,
46503c2b
MR
537 uint32_t token, uint32_t nargs,
538 target_ulong args, uint32_t nret,
539 target_ulong rets)
540{
541 uint64_t wa_addr;
542 uint64_t wa_offset;
543 uint32_t drc_index;
544 sPAPRDRConnector *drc;
545 sPAPRDRConnectorClass *drck;
546 sPAPRConfigureConnectorState *ccs;
547 sPAPRDRCCResponse resp = SPAPR_DR_CC_RESPONSE_CONTINUE;
548 int rc;
549 const void *fdt;
550
551 if (nargs != 2 || nret != 1) {
552 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
553 return;
554 }
555
556 wa_addr = ((uint64_t)rtas_ld(args, 1) << 32) | rtas_ld(args, 0);
557
558 drc_index = rtas_ld(wa_addr, 0);
559 drc = spapr_dr_connector_by_index(drc_index);
560 if (!drc) {
028ec3ce 561 trace_spapr_rtas_ibm_configure_connector_invalid(drc_index);
46503c2b
MR
562 rc = RTAS_OUT_PARAM_ERROR;
563 goto out;
564 }
565
566 drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc);
567 fdt = drck->get_fdt(drc, NULL);
e6fc9568 568 if (!fdt) {
028ec3ce 569 trace_spapr_rtas_ibm_configure_connector_missing_fdt(drc_index);
e6fc9568
BR
570 rc = SPAPR_DR_CC_RESPONSE_NOT_CONFIGURABLE;
571 goto out;
572 }
46503c2b
MR
573
574 ccs = spapr_ccs_find(spapr, drc_index);
575 if (!ccs) {
576 ccs = g_new0(sPAPRConfigureConnectorState, 1);
577 (void)drck->get_fdt(drc, &ccs->fdt_offset);
578 ccs->drc_index = drc_index;
579 spapr_ccs_add(spapr, ccs);
580 }
581
582 do {
583 uint32_t tag;
584 const char *name;
585 const struct fdt_property *prop;
586 int fdt_offset_next, prop_len;
587
588 tag = fdt_next_tag(fdt, ccs->fdt_offset, &fdt_offset_next);
589
590 switch (tag) {
591 case FDT_BEGIN_NODE:
592 ccs->fdt_depth++;
593 name = fdt_get_name(fdt, ccs->fdt_offset, NULL);
594
595 /* provide the name of the next OF node */
596 wa_offset = CC_VAL_DATA_OFFSET;
597 rtas_st(wa_addr, CC_IDX_NODE_NAME_OFFSET, wa_offset);
f201987b 598 configure_connector_st(wa_addr, wa_offset, name, strlen(name) + 1);
46503c2b
MR
599 resp = SPAPR_DR_CC_RESPONSE_NEXT_CHILD;
600 break;
601 case FDT_END_NODE:
602 ccs->fdt_depth--;
603 if (ccs->fdt_depth == 0) {
604 /* done sending the device tree, don't need to track
605 * the state anymore
606 */
607 drck->set_configured(drc);
608 spapr_ccs_remove(spapr, ccs);
609 ccs = NULL;
610 resp = SPAPR_DR_CC_RESPONSE_SUCCESS;
611 } else {
612 resp = SPAPR_DR_CC_RESPONSE_PREV_PARENT;
613 }
614 break;
615 case FDT_PROP:
616 prop = fdt_get_property_by_offset(fdt, ccs->fdt_offset,
617 &prop_len);
618 name = fdt_string(fdt, fdt32_to_cpu(prop->nameoff));
619
620 /* provide the name of the next OF property */
621 wa_offset = CC_VAL_DATA_OFFSET;
622 rtas_st(wa_addr, CC_IDX_PROP_NAME_OFFSET, wa_offset);
f201987b 623 configure_connector_st(wa_addr, wa_offset, name, strlen(name) + 1);
46503c2b
MR
624
625 /* provide the length and value of the OF property. data gets
626 * placed immediately after NULL terminator of the OF property's
627 * name string
628 */
629 wa_offset += strlen(name) + 1,
630 rtas_st(wa_addr, CC_IDX_PROP_LEN, prop_len);
631 rtas_st(wa_addr, CC_IDX_PROP_DATA_OFFSET, wa_offset);
f201987b 632 configure_connector_st(wa_addr, wa_offset, prop->data, prop_len);
46503c2b
MR
633 resp = SPAPR_DR_CC_RESPONSE_NEXT_PROPERTY;
634 break;
635 case FDT_END:
636 resp = SPAPR_DR_CC_RESPONSE_ERROR;
637 default:
638 /* keep seeking for an actionable tag */
639 break;
640 }
641 if (ccs) {
642 ccs->fdt_offset = fdt_offset_next;
643 }
644 } while (resp == SPAPR_DR_CC_RESPONSE_CONTINUE);
645
646 rc = resp;
647out:
648 rtas_st(rets, 0, rc);
649}
650
39ac8455
DG
651static struct rtas_call {
652 const char *name;
653 spapr_rtas_fn fn;
3a3b8502 654} rtas_table[RTAS_TOKEN_MAX - RTAS_TOKEN_BASE];
39ac8455 655
28e02042 656target_ulong spapr_rtas_call(PowerPCCPU *cpu, sPAPRMachineState *spapr,
39ac8455
DG
657 uint32_t token, uint32_t nargs, target_ulong args,
658 uint32_t nret, target_ulong rets)
659{
3a3b8502
AK
660 if ((token >= RTAS_TOKEN_BASE) && (token < RTAS_TOKEN_MAX)) {
661 struct rtas_call *call = rtas_table + (token - RTAS_TOKEN_BASE);
39ac8455
DG
662
663 if (call->fn) {
210b580b 664 call->fn(cpu, spapr, token, nargs, args, nret, rets);
39ac8455
DG
665 return H_SUCCESS;
666 }
667 }
668
821303f5
DG
669 /* HACK: Some Linux early debug code uses RTAS display-character,
670 * but assumes the token value is 0xa (which it is on some real
671 * machines) without looking it up in the device tree. This
672 * special case makes this work */
673 if (token == 0xa) {
210b580b 674 rtas_display_character(cpu, spapr, 0xa, nargs, args, nret, rets);
821303f5
DG
675 return H_SUCCESS;
676 }
677
39ac8455 678 hcall_dprintf("Unknown RTAS token 0x%x\n", token);
a64d325d 679 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
39ac8455
DG
680 return H_PARAMETER;
681}
682
eeddd59f
LV
683uint64_t qtest_rtas_call(char *cmd, uint32_t nargs, uint64_t args,
684 uint32_t nret, uint64_t rets)
685{
686 int token;
687
688 for (token = 0; token < RTAS_TOKEN_MAX - RTAS_TOKEN_BASE; token++) {
689 if (strcmp(cmd, rtas_table[token].name) == 0) {
690 sPAPRMachineState *spapr = SPAPR_MACHINE(qdev_get_machine());
691 PowerPCCPU *cpu = POWERPC_CPU(first_cpu);
692
693 rtas_table[token].fn(cpu, spapr, token + RTAS_TOKEN_BASE,
694 nargs, args, nret, rets);
695 return H_SUCCESS;
696 }
697 }
698 return H_PARAMETER;
699}
700
3a3b8502 701void spapr_rtas_register(int token, const char *name, spapr_rtas_fn fn)
39ac8455 702{
adf9ac50 703 assert((token >= RTAS_TOKEN_BASE) && (token < RTAS_TOKEN_MAX));
c89d5299 704
3a3b8502 705 token -= RTAS_TOKEN_BASE;
adf9ac50
DG
706
707 assert(!rtas_table[token].name);
39ac8455 708
3a3b8502
AK
709 rtas_table[token].name = name;
710 rtas_table[token].fn = fn;
39ac8455
DG
711}
712
a8170e5e
AK
713int spapr_rtas_device_tree_setup(void *fdt, hwaddr rtas_addr,
714 hwaddr rtas_size)
39ac8455
DG
715{
716 int ret;
717 int i;
db4ef288
BR
718 uint32_t lrdr_capacity[5];
719 MachineState *machine = MACHINE(qdev_get_machine());
a110655a
BR
720 sPAPRMachineState *spapr = SPAPR_MACHINE(machine);
721 uint64_t max_hotplug_addr = spapr->hotplug_memory.base +
722 memory_region_size(&spapr->hotplug_memory.mr);
39ac8455 723
3a3b8502 724 for (i = 0; i < RTAS_TOKEN_MAX - RTAS_TOKEN_BASE; i++) {
39ac8455
DG
725 struct rtas_call *call = &rtas_table[i];
726
d36b66f7 727 if (!call->name) {
39ac8455
DG
728 continue;
729 }
730
5a4348d1 731 ret = qemu_fdt_setprop_cell(fdt, "/rtas", call->name,
3a3b8502 732 i + RTAS_TOKEN_BASE);
39ac8455 733 if (ret < 0) {
ce9863b7 734 error_report("Couldn't add rtas token for %s: %s",
39ac8455
DG
735 call->name, fdt_strerror(ret));
736 return ret;
737 }
738
739 }
db4ef288 740
a110655a
BR
741 lrdr_capacity[0] = cpu_to_be32(max_hotplug_addr >> 32);
742 lrdr_capacity[1] = cpu_to_be32(max_hotplug_addr & 0xffffffff);
db4ef288
BR
743 lrdr_capacity[2] = 0;
744 lrdr_capacity[3] = cpu_to_be32(SPAPR_MEMORY_BLOCK_SIZE);
745 lrdr_capacity[4] = cpu_to_be32(max_cpus/smp_threads);
746 ret = qemu_fdt_setprop(fdt, "/rtas", "ibm,lrdr-capacity", lrdr_capacity,
747 sizeof(lrdr_capacity));
748 if (ret < 0) {
ce9863b7 749 error_report("Couldn't add ibm,lrdr-capacity rtas property");
db4ef288
BR
750 return ret;
751 }
752
39ac8455
DG
753 return 0;
754}
821303f5 755
2cac78c1
DG
756void spapr_load_rtas(sPAPRMachineState *spapr, void *fdt, hwaddr addr)
757{
758 int rtas_node;
759 int ret;
760
761 /* Copy RTAS blob into guest RAM */
762 cpu_physical_memory_write(addr, spapr->rtas_blob, spapr->rtas_size);
763
764 ret = fdt_add_mem_rsv(fdt, addr, spapr->rtas_size);
765 if (ret < 0) {
766 error_report("Couldn't add RTAS reserve entry: %s",
767 fdt_strerror(ret));
768 exit(1);
769 }
770
771 /* Update the device tree with the blob's location */
772 rtas_node = fdt_path_offset(fdt, "/rtas");
773 assert(rtas_node >= 0);
774
775 ret = fdt_setprop_cell(fdt, rtas_node, "linux,rtas-base", addr);
776 if (ret < 0) {
777 error_report("Couldn't add linux,rtas-base property: %s",
778 fdt_strerror(ret));
779 exit(1);
780 }
781
782 ret = fdt_setprop_cell(fdt, rtas_node, "linux,rtas-entry", addr);
783 if (ret < 0) {
784 error_report("Couldn't add linux,rtas-entry property: %s",
785 fdt_strerror(ret));
786 exit(1);
787 }
788
789 ret = fdt_setprop_cell(fdt, rtas_node, "rtas-size", spapr->rtas_size);
790 if (ret < 0) {
791 error_report("Couldn't add rtas-size property: %s",
792 fdt_strerror(ret));
793 exit(1);
794 }
795}
796
83f7d43a 797static void core_rtas_register_types(void)
821303f5 798{
3a3b8502
AK
799 spapr_rtas_register(RTAS_DISPLAY_CHARACTER, "display-character",
800 rtas_display_character);
3a3b8502
AK
801 spapr_rtas_register(RTAS_POWER_OFF, "power-off", rtas_power_off);
802 spapr_rtas_register(RTAS_SYSTEM_REBOOT, "system-reboot",
803 rtas_system_reboot);
804 spapr_rtas_register(RTAS_QUERY_CPU_STOPPED_STATE, "query-cpu-stopped-state",
a9f8ad8f 805 rtas_query_cpu_stopped_state);
3a3b8502
AK
806 spapr_rtas_register(RTAS_START_CPU, "start-cpu", rtas_start_cpu);
807 spapr_rtas_register(RTAS_STOP_SELF, "stop-self", rtas_stop_self);
808 spapr_rtas_register(RTAS_IBM_GET_SYSTEM_PARAMETER,
809 "ibm,get-system-parameter",
3ada6b11 810 rtas_ibm_get_system_parameter);
3a3b8502
AK
811 spapr_rtas_register(RTAS_IBM_SET_SYSTEM_PARAMETER,
812 "ibm,set-system-parameter",
3ada6b11 813 rtas_ibm_set_system_parameter);
2e14072f
ND
814 spapr_rtas_register(RTAS_IBM_OS_TERM, "ibm,os-term",
815 rtas_ibm_os_term);
094d2058
NF
816 spapr_rtas_register(RTAS_SET_POWER_LEVEL, "set-power-level",
817 rtas_set_power_level);
818 spapr_rtas_register(RTAS_GET_POWER_LEVEL, "get-power-level",
819 rtas_get_power_level);
8c8639df
MD
820 spapr_rtas_register(RTAS_SET_INDICATOR, "set-indicator",
821 rtas_set_indicator);
886445a6
MD
822 spapr_rtas_register(RTAS_GET_SENSOR_STATE, "get-sensor-state",
823 rtas_get_sensor_state);
46503c2b
MR
824 spapr_rtas_register(RTAS_IBM_CONFIGURE_CONNECTOR, "ibm,configure-connector",
825 rtas_ibm_configure_connector);
821303f5 826}
83f7d43a
AF
827
828type_init(core_rtas_register_types)