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CommitLineData
39ac8455
DG
1/*
2 * QEMU PowerPC pSeries Logical Partition (aka sPAPR) hardware System Emulator
3 *
4 * Hypercall based emulated RTAS
5 *
6 * Copyright (c) 2010-2011 David Gibson, IBM Corporation.
7 *
8 * Permission is hereby granted, free of charge, to any person obtaining a copy
9 * of this software and associated documentation files (the "Software"), to deal
10 * in the Software without restriction, including without limitation the rights
11 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
12 * copies of the Software, and to permit persons to whom the Software is
13 * furnished to do so, subject to the following conditions:
14 *
15 * The above copyright notice and this permission notice shall be included in
16 * all copies or substantial portions of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
23 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
24 * THE SOFTWARE.
25 *
26 */
27#include "cpu.h"
9c17d615 28#include "sysemu/sysemu.h"
dccfcd0e 29#include "sysemu/char.h"
39ac8455 30#include "hw/qdev.h"
9c17d615 31#include "sysemu/device_tree.h"
db4ef288 32#include "sysemu/cpus.h"
39ac8455 33
0d09e41a
PB
34#include "hw/ppc/spapr.h"
35#include "hw/ppc/spapr_vio.h"
e010ad8f 36#include "qapi-event.h"
39ac8455
DG
37
38#include <libfdt.h>
8c8639df
MD
39#include "hw/ppc/spapr_drc.h"
40
41/* #define DEBUG_SPAPR */
42
43#ifdef DEBUG_SPAPR
44#define DPRINTF(fmt, ...) \
45 do { fprintf(stderr, fmt, ## __VA_ARGS__); } while (0)
46#else
47#define DPRINTF(fmt, ...) \
48 do { } while (0)
49#endif
50
28e02042 51static sPAPRConfigureConnectorState *spapr_ccs_find(sPAPRMachineState *spapr,
46503c2b
MR
52 uint32_t drc_index)
53{
54 sPAPRConfigureConnectorState *ccs = NULL;
55
56 QTAILQ_FOREACH(ccs, &spapr->ccs_list, next) {
57 if (ccs->drc_index == drc_index) {
58 break;
59 }
60 }
61
62 return ccs;
63}
64
28e02042 65static void spapr_ccs_add(sPAPRMachineState *spapr,
46503c2b
MR
66 sPAPRConfigureConnectorState *ccs)
67{
68 g_assert(!spapr_ccs_find(spapr, ccs->drc_index));
69 QTAILQ_INSERT_HEAD(&spapr->ccs_list, ccs, next);
70}
71
28e02042 72static void spapr_ccs_remove(sPAPRMachineState *spapr,
46503c2b
MR
73 sPAPRConfigureConnectorState *ccs)
74{
75 QTAILQ_REMOVE(&spapr->ccs_list, ccs, next);
76 g_free(ccs);
77}
78
79void spapr_ccs_reset_hook(void *opaque)
80{
28e02042 81 sPAPRMachineState *spapr = opaque;
46503c2b
MR
82 sPAPRConfigureConnectorState *ccs, *ccs_tmp;
83
84 QTAILQ_FOREACH_SAFE(ccs, &spapr->ccs_list, next, ccs_tmp) {
85 spapr_ccs_remove(spapr, ccs);
86 }
87}
39ac8455 88
28e02042 89static void rtas_display_character(PowerPCCPU *cpu, sPAPRMachineState *spapr,
821303f5
DG
90 uint32_t token, uint32_t nargs,
91 target_ulong args,
92 uint32_t nret, target_ulong rets)
93{
94 uint8_t c = rtas_ld(args, 0);
5f2e2ba2 95 VIOsPAPRDevice *sdev = vty_lookup(spapr, 0);
821303f5
DG
96
97 if (!sdev) {
a64d325d 98 rtas_st(rets, 0, RTAS_OUT_HW_ERROR);
821303f5
DG
99 } else {
100 vty_putchars(sdev, &c, sizeof(c));
a64d325d 101 rtas_st(rets, 0, RTAS_OUT_SUCCESS);
821303f5
DG
102 }
103}
104
28e02042 105static void rtas_power_off(PowerPCCPU *cpu, sPAPRMachineState *spapr,
821303f5
DG
106 uint32_t token, uint32_t nargs, target_ulong args,
107 uint32_t nret, target_ulong rets)
108{
109 if (nargs != 2 || nret != 1) {
a64d325d 110 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
821303f5
DG
111 return;
112 }
113 qemu_system_shutdown_request();
a64d325d 114 rtas_st(rets, 0, RTAS_OUT_SUCCESS);
821303f5
DG
115}
116
28e02042 117static void rtas_system_reboot(PowerPCCPU *cpu, sPAPRMachineState *spapr,
c821a43c
DG
118 uint32_t token, uint32_t nargs,
119 target_ulong args,
120 uint32_t nret, target_ulong rets)
121{
122 if (nargs != 0 || nret != 1) {
a64d325d 123 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
c821a43c
DG
124 return;
125 }
126 qemu_system_reset_request();
a64d325d 127 rtas_st(rets, 0, RTAS_OUT_SUCCESS);
c821a43c
DG
128}
129
210b580b 130static void rtas_query_cpu_stopped_state(PowerPCCPU *cpu_,
28e02042 131 sPAPRMachineState *spapr,
a9f8ad8f
DG
132 uint32_t token, uint32_t nargs,
133 target_ulong args,
134 uint32_t nret, target_ulong rets)
135{
136 target_ulong id;
0f20ba62 137 PowerPCCPU *cpu;
a9f8ad8f
DG
138
139 if (nargs != 1 || nret != 2) {
a64d325d 140 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
a9f8ad8f
DG
141 return;
142 }
143
144 id = rtas_ld(args, 0);
0f20ba62 145 cpu = ppc_get_vcpu_by_dt_id(id);
05318a85 146 if (cpu != NULL) {
0f20ba62 147 if (CPU(cpu)->halted) {
a9f8ad8f
DG
148 rtas_st(rets, 1, 0);
149 } else {
150 rtas_st(rets, 1, 2);
151 }
152
a64d325d 153 rtas_st(rets, 0, RTAS_OUT_SUCCESS);
a9f8ad8f
DG
154 return;
155 }
156
157 /* Didn't find a matching cpu */
a64d325d 158 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
a9f8ad8f
DG
159}
160
28e02042 161static void rtas_start_cpu(PowerPCCPU *cpu_, sPAPRMachineState *spapr,
a9f8ad8f
DG
162 uint32_t token, uint32_t nargs,
163 target_ulong args,
164 uint32_t nret, target_ulong rets)
165{
166 target_ulong id, start, r3;
0f20ba62 167 PowerPCCPU *cpu;
a9f8ad8f
DG
168
169 if (nargs != 3 || nret != 1) {
a64d325d 170 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
a9f8ad8f
DG
171 return;
172 }
173
174 id = rtas_ld(args, 0);
175 start = rtas_ld(args, 1);
176 r3 = rtas_ld(args, 2);
177
0f20ba62
AK
178 cpu = ppc_get_vcpu_by_dt_id(id);
179 if (cpu != NULL) {
180 CPUState *cs = CPU(cpu);
c67e216b 181 CPUPPCState *env = &cpu->env;
a9f8ad8f 182
c67e216b 183 if (!cs->halted) {
a64d325d 184 rtas_st(rets, 0, RTAS_OUT_HW_ERROR);
a9f8ad8f
DG
185 return;
186 }
187
048706d9
DG
188 /* This will make sure qemu state is up to date with kvm, and
189 * mark it dirty so our changes get flushed back before the
190 * new cpu enters */
dd1750d7 191 kvm_cpu_synchronize_state(cs);
048706d9 192
a9f8ad8f
DG
193 env->msr = (1ULL << MSR_SF) | (1ULL << MSR_ME);
194 env->nip = start;
195 env->gpr[3] = r3;
c67e216b 196 cs->halted = 0;
a9f8ad8f 197
c67e216b 198 qemu_cpu_kick(cs);
a9f8ad8f 199
a64d325d 200 rtas_st(rets, 0, RTAS_OUT_SUCCESS);
a9f8ad8f
DG
201 return;
202 }
203
204 /* Didn't find a matching cpu */
a64d325d 205 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
a9f8ad8f
DG
206}
207
28e02042 208static void rtas_stop_self(PowerPCCPU *cpu, sPAPRMachineState *spapr,
59760f2d
AK
209 uint32_t token, uint32_t nargs,
210 target_ulong args,
211 uint32_t nret, target_ulong rets)
212{
213 CPUState *cs = CPU(cpu);
214 CPUPPCState *env = &cpu->env;
215
216 cs->halted = 1;
9102deda 217 qemu_cpu_kick(cs);
59760f2d
AK
218 /*
219 * While stopping a CPU, the guest calls H_CPPR which
220 * effectively disables interrupts on XICS level.
221 * However decrementer interrupts in TCG can still
222 * wake the CPU up so here we disable interrupts in MSR
223 * as well.
224 * As rtas_start_cpu() resets the whole MSR anyway, there is
225 * no need to bother with specific bits, we just clear it.
226 */
227 env->msr = 0;
228}
229
3ada6b11 230static void rtas_ibm_get_system_parameter(PowerPCCPU *cpu,
28e02042 231 sPAPRMachineState *spapr,
3ada6b11
AK
232 uint32_t token, uint32_t nargs,
233 target_ulong args,
234 uint32_t nret, target_ulong rets)
235{
236 target_ulong parameter = rtas_ld(args, 0);
237 target_ulong buffer = rtas_ld(args, 1);
238 target_ulong length = rtas_ld(args, 2);
3052d951 239 target_ulong ret = RTAS_OUT_SUCCESS;
3ada6b11
AK
240
241 switch (parameter) {
3b50d897
S
242 case RTAS_SYSPARM_SPLPAR_CHARACTERISTICS: {
243 char *param_val = g_strdup_printf("MaxEntCap=%d,MaxPlatProcs=%d",
244 max_cpus, smp_cpus);
245 rtas_st_buffer(buffer, length, (uint8_t *)param_val, strlen(param_val));
246 g_free(param_val);
247 break;
248 }
3052d951
S
249 case RTAS_SYSPARM_DIAGNOSTICS_RUN_MODE: {
250 uint8_t param_val = DIAGNOSTICS_RUN_MODE_DISABLED;
251
252 rtas_st_buffer(buffer, length, &param_val, sizeof(param_val));
3ada6b11
AK
253 break;
254 }
b907d7b0
S
255 case RTAS_SYSPARM_UUID:
256 rtas_st_buffer(buffer, length, qemu_uuid, (qemu_uuid_set ? 16 : 0));
257 break;
3052d951
S
258 default:
259 ret = RTAS_OUT_NOT_SUPPORTED;
260 }
3ada6b11
AK
261
262 rtas_st(rets, 0, ret);
263}
264
265static void rtas_ibm_set_system_parameter(PowerPCCPU *cpu,
28e02042 266 sPAPRMachineState *spapr,
3ada6b11
AK
267 uint32_t token, uint32_t nargs,
268 target_ulong args,
269 uint32_t nret, target_ulong rets)
270{
271 target_ulong parameter = rtas_ld(args, 0);
272 target_ulong ret = RTAS_OUT_NOT_SUPPORTED;
273
274 switch (parameter) {
3b50d897 275 case RTAS_SYSPARM_SPLPAR_CHARACTERISTICS:
3052d951 276 case RTAS_SYSPARM_DIAGNOSTICS_RUN_MODE:
b907d7b0 277 case RTAS_SYSPARM_UUID:
3ada6b11
AK
278 ret = RTAS_OUT_NOT_AUTHORIZED;
279 break;
280 }
281
282 rtas_st(rets, 0, ret);
283}
284
2e14072f 285static void rtas_ibm_os_term(PowerPCCPU *cpu,
28e02042 286 sPAPRMachineState *spapr,
2e14072f
ND
287 uint32_t token, uint32_t nargs,
288 target_ulong args,
289 uint32_t nret, target_ulong rets)
290{
291 target_ulong ret = 0;
292
293 qapi_event_send_guest_panicked(GUEST_PANIC_ACTION_PAUSE, &error_abort);
294
295 rtas_st(rets, 0, ret);
296}
297
28e02042 298static void rtas_set_power_level(PowerPCCPU *cpu, sPAPRMachineState *spapr,
094d2058
NF
299 uint32_t token, uint32_t nargs,
300 target_ulong args, uint32_t nret,
301 target_ulong rets)
302{
303 int32_t power_domain;
304
305 if (nargs != 2 || nret != 2) {
306 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
307 return;
308 }
309
310 /* we currently only use a single, "live insert" powerdomain for
311 * hotplugged/dlpar'd resources, so the power is always live/full (100)
312 */
313 power_domain = rtas_ld(args, 0);
314 if (power_domain != -1) {
315 rtas_st(rets, 0, RTAS_OUT_NOT_SUPPORTED);
316 return;
317 }
318
319 rtas_st(rets, 0, RTAS_OUT_SUCCESS);
320 rtas_st(rets, 1, 100);
321}
322
28e02042 323static void rtas_get_power_level(PowerPCCPU *cpu, sPAPRMachineState *spapr,
094d2058
NF
324 uint32_t token, uint32_t nargs,
325 target_ulong args, uint32_t nret,
326 target_ulong rets)
327{
328 int32_t power_domain;
329
330 if (nargs != 1 || nret != 2) {
331 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
332 return;
333 }
334
335 /* we currently only use a single, "live insert" powerdomain for
336 * hotplugged/dlpar'd resources, so the power is always live/full (100)
337 */
338 power_domain = rtas_ld(args, 0);
339 if (power_domain != -1) {
340 rtas_st(rets, 0, RTAS_OUT_NOT_SUPPORTED);
341 return;
342 }
343
344 rtas_st(rets, 0, RTAS_OUT_SUCCESS);
345 rtas_st(rets, 1, 100);
346}
347
8c8639df
MD
348static bool sensor_type_is_dr(uint32_t sensor_type)
349{
350 switch (sensor_type) {
351 case RTAS_SENSOR_TYPE_ISOLATION_STATE:
352 case RTAS_SENSOR_TYPE_DR:
353 case RTAS_SENSOR_TYPE_ALLOCATION_STATE:
354 return true;
355 }
356
357 return false;
358}
359
28e02042 360static void rtas_set_indicator(PowerPCCPU *cpu, sPAPRMachineState *spapr,
8c8639df
MD
361 uint32_t token, uint32_t nargs,
362 target_ulong args, uint32_t nret,
363 target_ulong rets)
364{
365 uint32_t sensor_type;
366 uint32_t sensor_index;
367 uint32_t sensor_state;
368 sPAPRDRConnector *drc;
369 sPAPRDRConnectorClass *drck;
370
371 if (nargs != 3 || nret != 1) {
372 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
373 return;
374 }
375
376 sensor_type = rtas_ld(args, 0);
377 sensor_index = rtas_ld(args, 1);
378 sensor_state = rtas_ld(args, 2);
379
380 if (!sensor_type_is_dr(sensor_type)) {
381 goto out_unimplemented;
382 }
383
384 /* if this is a DR sensor we can assume sensor_index == drc_index */
385 drc = spapr_dr_connector_by_index(sensor_index);
386 if (!drc) {
387 DPRINTF("rtas_set_indicator: invalid sensor/DRC index: %xh\n",
388 sensor_index);
389 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
390 return;
391 }
392 drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc);
393
394 switch (sensor_type) {
395 case RTAS_SENSOR_TYPE_ISOLATION_STATE:
46503c2b
MR
396 /* if the guest is configuring a device attached to this
397 * DRC, we should reset the configuration state at this
398 * point since it may no longer be reliable (guest released
399 * device and needs to start over, or unplug occurred so
400 * the FDT is no longer valid)
401 */
402 if (sensor_state == SPAPR_DR_ISOLATION_STATE_ISOLATED) {
403 sPAPRConfigureConnectorState *ccs = spapr_ccs_find(spapr,
404 sensor_index);
405 if (ccs) {
406 spapr_ccs_remove(spapr, ccs);
407 }
408 }
8c8639df
MD
409 drck->set_isolation_state(drc, sensor_state);
410 break;
411 case RTAS_SENSOR_TYPE_DR:
412 drck->set_indicator_state(drc, sensor_state);
413 break;
414 case RTAS_SENSOR_TYPE_ALLOCATION_STATE:
415 drck->set_allocation_state(drc, sensor_state);
416 break;
417 default:
418 goto out_unimplemented;
419 }
420
421 rtas_st(rets, 0, RTAS_OUT_SUCCESS);
422 return;
423
424out_unimplemented:
425 /* currently only DR-related sensors are implemented */
426 DPRINTF("rtas_set_indicator: sensor/indicator not implemented: %d\n",
427 sensor_type);
428 rtas_st(rets, 0, RTAS_OUT_NOT_SUPPORTED);
429}
430
28e02042 431static void rtas_get_sensor_state(PowerPCCPU *cpu, sPAPRMachineState *spapr,
886445a6
MD
432 uint32_t token, uint32_t nargs,
433 target_ulong args, uint32_t nret,
434 target_ulong rets)
435{
436 uint32_t sensor_type;
437 uint32_t sensor_index;
438 sPAPRDRConnector *drc;
439 sPAPRDRConnectorClass *drck;
440 uint32_t entity_sense;
441
442 if (nargs != 2 || nret != 2) {
443 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
444 return;
445 }
446
447 sensor_type = rtas_ld(args, 0);
448 sensor_index = rtas_ld(args, 1);
449
450 if (sensor_type != RTAS_SENSOR_TYPE_ENTITY_SENSE) {
451 /* currently only DR-related sensors are implemented */
452 DPRINTF("rtas_get_sensor_state: sensor/indicator not implemented: %d\n",
453 sensor_type);
454 rtas_st(rets, 0, RTAS_OUT_NOT_SUPPORTED);
455 return;
456 }
457
458 drc = spapr_dr_connector_by_index(sensor_index);
459 if (!drc) {
460 DPRINTF("rtas_get_sensor_state: invalid sensor/DRC index: %xh\n",
461 sensor_index);
462 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
463 return;
464 }
465 drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc);
466 entity_sense = drck->entity_sense(drc);
467
468 rtas_st(rets, 0, RTAS_OUT_SUCCESS);
469 rtas_st(rets, 1, entity_sense);
470}
471
46503c2b
MR
472/* configure-connector work area offsets, int32_t units for field
473 * indexes, bytes for field offset/len values.
474 *
475 * as documented by PAPR+ v2.7, 13.5.3.5
476 */
477#define CC_IDX_NODE_NAME_OFFSET 2
478#define CC_IDX_PROP_NAME_OFFSET 2
479#define CC_IDX_PROP_LEN 3
480#define CC_IDX_PROP_DATA_OFFSET 4
481#define CC_VAL_DATA_OFFSET ((CC_IDX_PROP_DATA_OFFSET + 1) * 4)
482#define CC_WA_LEN 4096
483
484static void rtas_ibm_configure_connector(PowerPCCPU *cpu,
28e02042 485 sPAPRMachineState *spapr,
46503c2b
MR
486 uint32_t token, uint32_t nargs,
487 target_ulong args, uint32_t nret,
488 target_ulong rets)
489{
490 uint64_t wa_addr;
491 uint64_t wa_offset;
492 uint32_t drc_index;
493 sPAPRDRConnector *drc;
494 sPAPRDRConnectorClass *drck;
495 sPAPRConfigureConnectorState *ccs;
496 sPAPRDRCCResponse resp = SPAPR_DR_CC_RESPONSE_CONTINUE;
497 int rc;
498 const void *fdt;
499
500 if (nargs != 2 || nret != 1) {
501 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
502 return;
503 }
504
505 wa_addr = ((uint64_t)rtas_ld(args, 1) << 32) | rtas_ld(args, 0);
506
507 drc_index = rtas_ld(wa_addr, 0);
508 drc = spapr_dr_connector_by_index(drc_index);
509 if (!drc) {
510 DPRINTF("rtas_ibm_configure_connector: invalid DRC index: %xh\n",
511 drc_index);
512 rc = RTAS_OUT_PARAM_ERROR;
513 goto out;
514 }
515
516 drck = SPAPR_DR_CONNECTOR_GET_CLASS(drc);
517 fdt = drck->get_fdt(drc, NULL);
518
519 ccs = spapr_ccs_find(spapr, drc_index);
520 if (!ccs) {
521 ccs = g_new0(sPAPRConfigureConnectorState, 1);
522 (void)drck->get_fdt(drc, &ccs->fdt_offset);
523 ccs->drc_index = drc_index;
524 spapr_ccs_add(spapr, ccs);
525 }
526
527 do {
528 uint32_t tag;
529 const char *name;
530 const struct fdt_property *prop;
531 int fdt_offset_next, prop_len;
532
533 tag = fdt_next_tag(fdt, ccs->fdt_offset, &fdt_offset_next);
534
535 switch (tag) {
536 case FDT_BEGIN_NODE:
537 ccs->fdt_depth++;
538 name = fdt_get_name(fdt, ccs->fdt_offset, NULL);
539
540 /* provide the name of the next OF node */
541 wa_offset = CC_VAL_DATA_OFFSET;
542 rtas_st(wa_addr, CC_IDX_NODE_NAME_OFFSET, wa_offset);
543 rtas_st_buffer_direct(wa_addr + wa_offset, CC_WA_LEN - wa_offset,
544 (uint8_t *)name, strlen(name) + 1);
545 resp = SPAPR_DR_CC_RESPONSE_NEXT_CHILD;
546 break;
547 case FDT_END_NODE:
548 ccs->fdt_depth--;
549 if (ccs->fdt_depth == 0) {
550 /* done sending the device tree, don't need to track
551 * the state anymore
552 */
553 drck->set_configured(drc);
554 spapr_ccs_remove(spapr, ccs);
555 ccs = NULL;
556 resp = SPAPR_DR_CC_RESPONSE_SUCCESS;
557 } else {
558 resp = SPAPR_DR_CC_RESPONSE_PREV_PARENT;
559 }
560 break;
561 case FDT_PROP:
562 prop = fdt_get_property_by_offset(fdt, ccs->fdt_offset,
563 &prop_len);
564 name = fdt_string(fdt, fdt32_to_cpu(prop->nameoff));
565
566 /* provide the name of the next OF property */
567 wa_offset = CC_VAL_DATA_OFFSET;
568 rtas_st(wa_addr, CC_IDX_PROP_NAME_OFFSET, wa_offset);
569 rtas_st_buffer_direct(wa_addr + wa_offset, CC_WA_LEN - wa_offset,
570 (uint8_t *)name, strlen(name) + 1);
571
572 /* provide the length and value of the OF property. data gets
573 * placed immediately after NULL terminator of the OF property's
574 * name string
575 */
576 wa_offset += strlen(name) + 1,
577 rtas_st(wa_addr, CC_IDX_PROP_LEN, prop_len);
578 rtas_st(wa_addr, CC_IDX_PROP_DATA_OFFSET, wa_offset);
579 rtas_st_buffer_direct(wa_addr + wa_offset, CC_WA_LEN - wa_offset,
580 (uint8_t *)((struct fdt_property *)prop)->data,
581 prop_len);
582 resp = SPAPR_DR_CC_RESPONSE_NEXT_PROPERTY;
583 break;
584 case FDT_END:
585 resp = SPAPR_DR_CC_RESPONSE_ERROR;
586 default:
587 /* keep seeking for an actionable tag */
588 break;
589 }
590 if (ccs) {
591 ccs->fdt_offset = fdt_offset_next;
592 }
593 } while (resp == SPAPR_DR_CC_RESPONSE_CONTINUE);
594
595 rc = resp;
596out:
597 rtas_st(rets, 0, rc);
598}
599
39ac8455
DG
600static struct rtas_call {
601 const char *name;
602 spapr_rtas_fn fn;
3a3b8502 603} rtas_table[RTAS_TOKEN_MAX - RTAS_TOKEN_BASE];
39ac8455 604
28e02042 605target_ulong spapr_rtas_call(PowerPCCPU *cpu, sPAPRMachineState *spapr,
39ac8455
DG
606 uint32_t token, uint32_t nargs, target_ulong args,
607 uint32_t nret, target_ulong rets)
608{
3a3b8502
AK
609 if ((token >= RTAS_TOKEN_BASE) && (token < RTAS_TOKEN_MAX)) {
610 struct rtas_call *call = rtas_table + (token - RTAS_TOKEN_BASE);
39ac8455
DG
611
612 if (call->fn) {
210b580b 613 call->fn(cpu, spapr, token, nargs, args, nret, rets);
39ac8455
DG
614 return H_SUCCESS;
615 }
616 }
617
821303f5
DG
618 /* HACK: Some Linux early debug code uses RTAS display-character,
619 * but assumes the token value is 0xa (which it is on some real
620 * machines) without looking it up in the device tree. This
621 * special case makes this work */
622 if (token == 0xa) {
210b580b 623 rtas_display_character(cpu, spapr, 0xa, nargs, args, nret, rets);
821303f5
DG
624 return H_SUCCESS;
625 }
626
39ac8455 627 hcall_dprintf("Unknown RTAS token 0x%x\n", token);
a64d325d 628 rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
39ac8455
DG
629 return H_PARAMETER;
630}
631
3a3b8502 632void spapr_rtas_register(int token, const char *name, spapr_rtas_fn fn)
39ac8455 633{
3a3b8502
AK
634 if (!((token >= RTAS_TOKEN_BASE) && (token < RTAS_TOKEN_MAX))) {
635 fprintf(stderr, "RTAS invalid token 0x%x\n", token);
636 exit(1);
c89d5299
DG
637 }
638
3a3b8502
AK
639 token -= RTAS_TOKEN_BASE;
640 if (rtas_table[token].name) {
641 fprintf(stderr, "RTAS call \"%s\" is registered already as 0x%x\n",
642 rtas_table[token].name, token);
643 exit(1);
644 }
39ac8455 645
3a3b8502
AK
646 rtas_table[token].name = name;
647 rtas_table[token].fn = fn;
39ac8455
DG
648}
649
a8170e5e
AK
650int spapr_rtas_device_tree_setup(void *fdt, hwaddr rtas_addr,
651 hwaddr rtas_size)
39ac8455
DG
652{
653 int ret;
654 int i;
db4ef288
BR
655 uint32_t lrdr_capacity[5];
656 MachineState *machine = MACHINE(qdev_get_machine());
39ac8455
DG
657
658 ret = fdt_add_mem_rsv(fdt, rtas_addr, rtas_size);
659 if (ret < 0) {
660 fprintf(stderr, "Couldn't add RTAS reserve entry: %s\n",
661 fdt_strerror(ret));
662 return ret;
663 }
664
5a4348d1
PC
665 ret = qemu_fdt_setprop_cell(fdt, "/rtas", "linux,rtas-base",
666 rtas_addr);
39ac8455
DG
667 if (ret < 0) {
668 fprintf(stderr, "Couldn't add linux,rtas-base property: %s\n",
669 fdt_strerror(ret));
670 return ret;
671 }
672
5a4348d1
PC
673 ret = qemu_fdt_setprop_cell(fdt, "/rtas", "linux,rtas-entry",
674 rtas_addr);
39ac8455
DG
675 if (ret < 0) {
676 fprintf(stderr, "Couldn't add linux,rtas-entry property: %s\n",
677 fdt_strerror(ret));
678 return ret;
679 }
680
5a4348d1
PC
681 ret = qemu_fdt_setprop_cell(fdt, "/rtas", "rtas-size",
682 rtas_size);
39ac8455
DG
683 if (ret < 0) {
684 fprintf(stderr, "Couldn't add rtas-size property: %s\n",
685 fdt_strerror(ret));
686 return ret;
687 }
688
3a3b8502 689 for (i = 0; i < RTAS_TOKEN_MAX - RTAS_TOKEN_BASE; i++) {
39ac8455
DG
690 struct rtas_call *call = &rtas_table[i];
691
d36b66f7 692 if (!call->name) {
39ac8455
DG
693 continue;
694 }
695
5a4348d1 696 ret = qemu_fdt_setprop_cell(fdt, "/rtas", call->name,
3a3b8502 697 i + RTAS_TOKEN_BASE);
39ac8455
DG
698 if (ret < 0) {
699 fprintf(stderr, "Couldn't add rtas token for %s: %s\n",
700 call->name, fdt_strerror(ret));
701 return ret;
702 }
703
704 }
db4ef288
BR
705
706 lrdr_capacity[0] = cpu_to_be32(((uint64_t)machine->maxram_size) >> 32);
707 lrdr_capacity[1] = cpu_to_be32(machine->maxram_size & 0xffffffff);
708 lrdr_capacity[2] = 0;
709 lrdr_capacity[3] = cpu_to_be32(SPAPR_MEMORY_BLOCK_SIZE);
710 lrdr_capacity[4] = cpu_to_be32(max_cpus/smp_threads);
711 ret = qemu_fdt_setprop(fdt, "/rtas", "ibm,lrdr-capacity", lrdr_capacity,
712 sizeof(lrdr_capacity));
713 if (ret < 0) {
714 fprintf(stderr, "Couldn't add ibm,lrdr-capacity rtas property\n");
715 return ret;
716 }
717
39ac8455
DG
718 return 0;
719}
821303f5 720
83f7d43a 721static void core_rtas_register_types(void)
821303f5 722{
3a3b8502
AK
723 spapr_rtas_register(RTAS_DISPLAY_CHARACTER, "display-character",
724 rtas_display_character);
3a3b8502
AK
725 spapr_rtas_register(RTAS_POWER_OFF, "power-off", rtas_power_off);
726 spapr_rtas_register(RTAS_SYSTEM_REBOOT, "system-reboot",
727 rtas_system_reboot);
728 spapr_rtas_register(RTAS_QUERY_CPU_STOPPED_STATE, "query-cpu-stopped-state",
a9f8ad8f 729 rtas_query_cpu_stopped_state);
3a3b8502
AK
730 spapr_rtas_register(RTAS_START_CPU, "start-cpu", rtas_start_cpu);
731 spapr_rtas_register(RTAS_STOP_SELF, "stop-self", rtas_stop_self);
732 spapr_rtas_register(RTAS_IBM_GET_SYSTEM_PARAMETER,
733 "ibm,get-system-parameter",
3ada6b11 734 rtas_ibm_get_system_parameter);
3a3b8502
AK
735 spapr_rtas_register(RTAS_IBM_SET_SYSTEM_PARAMETER,
736 "ibm,set-system-parameter",
3ada6b11 737 rtas_ibm_set_system_parameter);
2e14072f
ND
738 spapr_rtas_register(RTAS_IBM_OS_TERM, "ibm,os-term",
739 rtas_ibm_os_term);
094d2058
NF
740 spapr_rtas_register(RTAS_SET_POWER_LEVEL, "set-power-level",
741 rtas_set_power_level);
742 spapr_rtas_register(RTAS_GET_POWER_LEVEL, "get-power-level",
743 rtas_get_power_level);
8c8639df
MD
744 spapr_rtas_register(RTAS_SET_INDICATOR, "set-indicator",
745 rtas_set_indicator);
886445a6
MD
746 spapr_rtas_register(RTAS_GET_SENSOR_STATE, "get-sensor-state",
747 rtas_get_sensor_state);
46503c2b
MR
748 spapr_rtas_register(RTAS_IBM_CONFIGURE_CONNECTOR, "ibm,configure-connector",
749 rtas_ibm_configure_connector);
821303f5 750}
83f7d43a
AF
751
752type_init(core_rtas_register_types)