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75dd595b AJ |
1 | /* |
2 | * Qemu PowerPC 440 chip emulation | |
3 | * | |
4 | * Copyright 2007 IBM Corporation. | |
5 | * Authors: | |
6 | * Jerone Young <jyoung5@us.ibm.com> | |
7 | * Christian Ehrhardt <ehrhardt@linux.vnet.ibm.com> | |
8 | * Hollis Blanchard <hollisb@us.ibm.com> | |
9 | * | |
10 | * This work is licensed under the GNU GPL license version 2 or later. | |
11 | * | |
12 | */ | |
13 | ||
14 | #include "hw.h" | |
802670e6 | 15 | #include "pc.h" |
75dd595b AJ |
16 | #include "isa.h" |
17 | #include "ppc.h" | |
18 | #include "ppc4xx.h" | |
19 | #include "ppc440.h" | |
20 | #include "ppc405.h" | |
21 | #include "sysemu.h" | |
22 | #include "kvm.h" | |
23 | ||
24 | #define PPC440EP_PCI_CONFIG 0xeec00000 | |
25 | #define PPC440EP_PCI_INTACK 0xeed00000 | |
26 | #define PPC440EP_PCI_SPECIAL 0xeed00000 | |
27 | #define PPC440EP_PCI_REGS 0xef400000 | |
28 | #define PPC440EP_PCI_IO 0xe8000000 | |
29 | #define PPC440EP_PCI_IOLEN 0x00010000 | |
30 | ||
31 | #define PPC440EP_SDRAM_NR_BANKS 4 | |
32 | ||
33 | static const unsigned int ppc440ep_sdram_bank_sizes[] = { | |
34 | 256<<20, 128<<20, 64<<20, 32<<20, 16<<20, 8<<20, 0 | |
35 | }; | |
36 | ||
3e9f0113 RH |
37 | CPUState *ppc440ep_init(MemoryRegion *address_space_mem, ram_addr_t *ram_size, |
38 | PCIBus **pcip, const unsigned int pci_irq_nrs[4], | |
39 | int do_init, const char *cpu_model) | |
75dd595b | 40 | { |
b6dcbe08 AK |
41 | MemoryRegion *ram_memories |
42 | = g_malloc(PPC440EP_SDRAM_NR_BANKS * sizeof(*ram_memories)); | |
c227f099 AL |
43 | target_phys_addr_t ram_bases[PPC440EP_SDRAM_NR_BANKS]; |
44 | target_phys_addr_t ram_sizes[PPC440EP_SDRAM_NR_BANKS]; | |
75dd595b | 45 | CPUState *env; |
75dd595b AJ |
46 | qemu_irq *pic; |
47 | qemu_irq *irqs; | |
48 | qemu_irq *pci_irqs; | |
49 | ||
0dd4bc7d | 50 | if (cpu_model == NULL) { |
e5ba83c5 | 51 | cpu_model = "440EP"; |
0dd4bc7d | 52 | } |
727170b6 | 53 | env = cpu_init(cpu_model); |
75dd595b AJ |
54 | if (!env) { |
55 | fprintf(stderr, "Unable to initialize CPU!\n"); | |
56 | exit(1); | |
57 | } | |
58 | ||
d29d3404 | 59 | ppc_booke_timers_init(env, 400000000, 0); |
75dd595b AJ |
60 | ppc_dcr_init(env, NULL, NULL); |
61 | ||
62 | /* interrupt controller */ | |
7267c094 | 63 | irqs = g_malloc0(sizeof(qemu_irq) * PPCUIC_OUTPUT_NB); |
75dd595b AJ |
64 | irqs[PPCUIC_OUTPUT_INT] = ((qemu_irq *)env->irq_inputs)[PPC40x_INPUT_INT]; |
65 | irqs[PPCUIC_OUTPUT_CINT] = ((qemu_irq *)env->irq_inputs)[PPC40x_INPUT_CINT]; | |
66 | pic = ppcuic_init(env, irqs, 0x0C0, 0, 1); | |
67 | ||
68 | /* SDRAM controller */ | |
69 | memset(ram_bases, 0, sizeof(ram_bases)); | |
70 | memset(ram_sizes, 0, sizeof(ram_sizes)); | |
71 | *ram_size = ppc4xx_sdram_adjust(*ram_size, PPC440EP_SDRAM_NR_BANKS, | |
b6dcbe08 | 72 | ram_memories, |
75dd595b AJ |
73 | ram_bases, ram_sizes, |
74 | ppc440ep_sdram_bank_sizes); | |
75 | /* XXX 440EP's ECC interrupts are on UIC1, but we've only created UIC0. */ | |
b6dcbe08 AK |
76 | ppc4xx_sdram_init(env, pic[14], PPC440EP_SDRAM_NR_BANKS, ram_memories, |
77 | ram_bases, ram_sizes, do_init); | |
75dd595b AJ |
78 | |
79 | /* PCI */ | |
7267c094 | 80 | pci_irqs = g_malloc(sizeof(qemu_irq) * 4); |
75dd595b AJ |
81 | pci_irqs[0] = pic[pci_irq_nrs[0]]; |
82 | pci_irqs[1] = pic[pci_irq_nrs[1]]; | |
83 | pci_irqs[2] = pic[pci_irq_nrs[2]]; | |
84 | pci_irqs[3] = pic[pci_irq_nrs[3]]; | |
85 | *pcip = ppc4xx_pci_init(env, pci_irqs, | |
86 | PPC440EP_PCI_CONFIG, | |
87 | PPC440EP_PCI_INTACK, | |
88 | PPC440EP_PCI_SPECIAL, | |
89 | PPC440EP_PCI_REGS); | |
90 | if (!*pcip) | |
91 | printf("couldn't create PCI controller!\n"); | |
92 | ||
968d683c | 93 | isa_mmio_init(PPC440EP_PCI_IO, PPC440EP_PCI_IOLEN); |
75dd595b | 94 | |
802670e6 | 95 | if (serial_hds[0] != NULL) { |
3e9f0113 | 96 | serial_mm_init(address_space_mem, 0xef600300, 0, pic[0], |
39186d8a RH |
97 | PPC_SERIAL_MM_BAUDBASE, serial_hds[0], |
98 | DEVICE_BIG_ENDIAN); | |
802670e6 BS |
99 | } |
100 | if (serial_hds[1] != NULL) { | |
3e9f0113 | 101 | serial_mm_init(address_space_mem, 0xef600400, 0, pic[1], |
39186d8a RH |
102 | PPC_SERIAL_MM_BAUDBASE, serial_hds[1], |
103 | DEVICE_BIG_ENDIAN); | |
802670e6 | 104 | } |
75dd595b AJ |
105 | |
106 | return env; | |
107 | } |