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CommitLineData
53c25cea
PB
1/*
2 * Virtio PCI Bindings
3 *
4 * Copyright IBM, Corp. 2007
5 * Copyright (c) 2009 CodeSourcery
6 *
7 * Authors:
8 * Anthony Liguori <aliguori@us.ibm.com>
9 * Paul Brook <paul@codesourcery.com>
10 *
11 * This work is licensed under the terms of the GNU GPL, version 2. See
12 * the COPYING file in the top-level directory.
13 *
14 */
15
16#include <inttypes.h>
17
18#include "virtio.h"
8172539d
MT
19#include "virtio-blk.h"
20#include "virtio-net.h"
53c25cea 21#include "pci.h"
2f792016 22#include "qemu-error.h"
aba800a3 23#include "msix.h"
a1e0fea5 24#include "net.h"
97b15621 25#include "loader.h"
ade80dc8 26#include "kvm.h"
53c25cea
PB
27
28/* from Linux's linux/virtio_pci.h */
29
30/* A 32-bit r/o bitmask of the features supported by the host */
31#define VIRTIO_PCI_HOST_FEATURES 0
32
33/* A 32-bit r/w bitmask of features activated by the guest */
34#define VIRTIO_PCI_GUEST_FEATURES 4
35
36/* A 32-bit r/w PFN for the currently selected queue */
37#define VIRTIO_PCI_QUEUE_PFN 8
38
39/* A 16-bit r/o queue size for the currently selected queue */
40#define VIRTIO_PCI_QUEUE_NUM 12
41
42/* A 16-bit r/w queue selector */
43#define VIRTIO_PCI_QUEUE_SEL 14
44
45/* A 16-bit r/w queue notifier */
46#define VIRTIO_PCI_QUEUE_NOTIFY 16
47
48/* An 8-bit device status register. */
49#define VIRTIO_PCI_STATUS 18
50
51/* An 8-bit r/o interrupt status register. Reading the value will return the
52 * current contents of the ISR and will also clear it. This is effectively
53 * a read-and-acknowledge. */
54#define VIRTIO_PCI_ISR 19
55
aba800a3
MT
56/* MSI-X registers: only enabled if MSI-X is enabled. */
57/* A 16-bit vector for configuration changes. */
58#define VIRTIO_MSI_CONFIG_VECTOR 20
59/* A 16-bit vector for selected queue notifications. */
60#define VIRTIO_MSI_QUEUE_VECTOR 22
61
62/* Config space size */
63#define VIRTIO_PCI_CONFIG_NOMSI 20
64#define VIRTIO_PCI_CONFIG_MSI 24
65#define VIRTIO_PCI_REGION_SIZE(dev) (msix_present(dev) ? \
66 VIRTIO_PCI_CONFIG_MSI : \
67 VIRTIO_PCI_CONFIG_NOMSI)
68
69/* The remaining space is defined by each driver as the per-driver
70 * configuration space */
71#define VIRTIO_PCI_CONFIG(dev) (msix_enabled(dev) ? \
72 VIRTIO_PCI_CONFIG_MSI : \
73 VIRTIO_PCI_CONFIG_NOMSI)
53c25cea
PB
74
75/* Virtio ABI version, if we increment this, we break the guest driver. */
76#define VIRTIO_PCI_ABI_VERSION 0
77
78/* How many bits to shift physical queue address written to QUEUE_PFN.
79 * 12 is historical, and due to x86 page size. */
80#define VIRTIO_PCI_QUEUE_ADDR_SHIFT 12
81
c81131db
AG
82/* We can catch some guest bugs inside here so we continue supporting older
83 guests. */
84#define VIRTIO_PCI_BUG_BUS_MASTER (1 << 0)
85
53c25cea
PB
86/* QEMU doesn't strictly need write barriers since everything runs in
87 * lock-step. We'll leave the calls to wmb() in though to make it obvious for
88 * KVM or if kqemu gets SMP support.
89 */
90#define wmb() do { } while (0)
91
92/* PCI bindings. */
93
94typedef struct {
95 PCIDevice pci_dev;
96 VirtIODevice *vdev;
c81131db 97 uint32_t bugs;
53c25cea 98 uint32_t addr;
ab73ff29 99 uint32_t class_code;
a1e0fea5 100 uint32_t nvectors;
428c149b 101 BlockConf block;
97b15621 102 NICConf nic;
8172539d 103 uint32_t host_features;
9f107513
AL
104#ifdef CONFIG_LINUX
105 V9fsConf fsconf;
106#endif
98b19252
AS
107 /* Max. number of ports we can have for a the virtio-serial device */
108 uint32_t max_virtserial_ports;
53c25cea
PB
109} VirtIOPCIProxy;
110
111/* virtio device */
112
7055e687 113static void virtio_pci_notify(void *opaque, uint16_t vector)
53c25cea
PB
114{
115 VirtIOPCIProxy *proxy = opaque;
aba800a3
MT
116 if (msix_enabled(&proxy->pci_dev))
117 msix_notify(&proxy->pci_dev, vector);
118 else
119 qemu_set_irq(proxy->pci_dev.irq[0], proxy->vdev->isr & 1);
53c25cea
PB
120}
121
ff24bd58
MT
122static void virtio_pci_save_config(void * opaque, QEMUFile *f)
123{
124 VirtIOPCIProxy *proxy = opaque;
125 pci_device_save(&proxy->pci_dev, f);
126 msix_save(&proxy->pci_dev, f);
127 if (msix_present(&proxy->pci_dev))
128 qemu_put_be16(f, proxy->vdev->config_vector);
129}
130
131static void virtio_pci_save_queue(void * opaque, int n, QEMUFile *f)
132{
133 VirtIOPCIProxy *proxy = opaque;
134 if (msix_present(&proxy->pci_dev))
135 qemu_put_be16(f, virtio_queue_vector(proxy->vdev, n));
136}
137
138static int virtio_pci_load_config(void * opaque, QEMUFile *f)
139{
140 VirtIOPCIProxy *proxy = opaque;
141 int ret;
142 ret = pci_device_load(&proxy->pci_dev, f);
e6da7680 143 if (ret) {
ff24bd58 144 return ret;
e6da7680 145 }
ff24bd58 146 msix_load(&proxy->pci_dev, f);
e6da7680 147 if (msix_present(&proxy->pci_dev)) {
ff24bd58 148 qemu_get_be16s(f, &proxy->vdev->config_vector);
e6da7680
MT
149 } else {
150 proxy->vdev->config_vector = VIRTIO_NO_VECTOR;
151 }
152 if (proxy->vdev->config_vector != VIRTIO_NO_VECTOR) {
153 return msix_vector_use(&proxy->pci_dev, proxy->vdev->config_vector);
154 }
c81131db
AG
155
156 /* Try to find out if the guest has bus master disabled, but is
157 in ready state. Then we have a buggy guest OS. */
8a911107 158 if ((proxy->vdev->status & VIRTIO_CONFIG_S_DRIVER_OK) &&
c81131db
AG
159 !(proxy->pci_dev.config[PCI_COMMAND] & PCI_COMMAND_MASTER)) {
160 proxy->bugs |= VIRTIO_PCI_BUG_BUS_MASTER;
161 }
ff24bd58
MT
162 return 0;
163}
164
165static int virtio_pci_load_queue(void * opaque, int n, QEMUFile *f)
166{
167 VirtIOPCIProxy *proxy = opaque;
168 uint16_t vector;
e6da7680
MT
169 if (msix_present(&proxy->pci_dev)) {
170 qemu_get_be16s(f, &vector);
171 } else {
172 vector = VIRTIO_NO_VECTOR;
173 }
ff24bd58 174 virtio_queue_set_vector(proxy->vdev, n, vector);
e6da7680
MT
175 if (vector != VIRTIO_NO_VECTOR) {
176 return msix_vector_use(&proxy->pci_dev, vector);
177 }
ff24bd58
MT
178 return 0;
179}
180
e489030d 181static void virtio_pci_reset(DeviceState *d)
7055e687 182{
e489030d 183 VirtIOPCIProxy *proxy = container_of(d, VirtIOPCIProxy, pci_dev.qdev);
7055e687 184 virtio_reset(proxy->vdev);
aba800a3 185 msix_reset(&proxy->pci_dev);
c81131db 186 proxy->bugs = 0;
7055e687
MT
187}
188
53c25cea
PB
189static void virtio_ioport_write(void *opaque, uint32_t addr, uint32_t val)
190{
191 VirtIOPCIProxy *proxy = opaque;
192 VirtIODevice *vdev = proxy->vdev;
c227f099 193 target_phys_addr_t pa;
53c25cea 194
53c25cea
PB
195 switch (addr) {
196 case VIRTIO_PCI_GUEST_FEATURES:
197 /* Guest does not negotiate properly? We have to assume nothing. */
198 if (val & (1 << VIRTIO_F_BAD_FEATURE)) {
199 if (vdev->bad_features)
8172539d 200 val = proxy->host_features & vdev->bad_features(vdev);
53c25cea
PB
201 else
202 val = 0;
203 }
204 if (vdev->set_features)
205 vdev->set_features(vdev, val);
704a76fc 206 vdev->guest_features = val;
53c25cea
PB
207 break;
208 case VIRTIO_PCI_QUEUE_PFN:
c227f099 209 pa = (target_phys_addr_t)val << VIRTIO_PCI_QUEUE_ADDR_SHIFT;
1b8e9b27
MT
210 if (pa == 0) {
211 virtio_reset(proxy->vdev);
212 msix_unuse_all_vectors(&proxy->pci_dev);
213 }
7055e687
MT
214 else
215 virtio_queue_set_addr(vdev, vdev->queue_sel, pa);
53c25cea
PB
216 break;
217 case VIRTIO_PCI_QUEUE_SEL:
218 if (val < VIRTIO_PCI_QUEUE_MAX)
219 vdev->queue_sel = val;
220 break;
221 case VIRTIO_PCI_QUEUE_NOTIFY:
222 virtio_queue_notify(vdev, val);
223 break;
224 case VIRTIO_PCI_STATUS:
3e607cb5 225 virtio_set_status(vdev, val & 0xFF);
1b8e9b27
MT
226 if (vdev->status == 0) {
227 virtio_reset(proxy->vdev);
228 msix_unuse_all_vectors(&proxy->pci_dev);
229 }
c81131db
AG
230
231 /* Linux before 2.6.34 sets the device as OK without enabling
232 the PCI device bus master bit. In this case we need to disable
233 some safety checks. */
234 if ((val & VIRTIO_CONFIG_S_DRIVER_OK) &&
235 !(proxy->pci_dev.config[PCI_COMMAND] & PCI_COMMAND_MASTER)) {
236 proxy->bugs |= VIRTIO_PCI_BUG_BUS_MASTER;
237 }
53c25cea 238 break;
aba800a3
MT
239 case VIRTIO_MSI_CONFIG_VECTOR:
240 msix_vector_unuse(&proxy->pci_dev, vdev->config_vector);
241 /* Make it possible for guest to discover an error took place. */
242 if (msix_vector_use(&proxy->pci_dev, val) < 0)
243 val = VIRTIO_NO_VECTOR;
244 vdev->config_vector = val;
245 break;
246 case VIRTIO_MSI_QUEUE_VECTOR:
247 msix_vector_unuse(&proxy->pci_dev,
248 virtio_queue_vector(vdev, vdev->queue_sel));
249 /* Make it possible for guest to discover an error took place. */
250 if (msix_vector_use(&proxy->pci_dev, val) < 0)
251 val = VIRTIO_NO_VECTOR;
252 virtio_queue_set_vector(vdev, vdev->queue_sel, val);
253 break;
254 default:
255 fprintf(stderr, "%s: unexpected address 0x%x value 0x%x\n",
256 __func__, addr, val);
257 break;
53c25cea
PB
258 }
259}
260
aba800a3 261static uint32_t virtio_ioport_read(VirtIOPCIProxy *proxy, uint32_t addr)
53c25cea 262{
53c25cea
PB
263 VirtIODevice *vdev = proxy->vdev;
264 uint32_t ret = 0xFFFFFFFF;
265
53c25cea
PB
266 switch (addr) {
267 case VIRTIO_PCI_HOST_FEATURES:
8172539d 268 ret = proxy->host_features;
53c25cea
PB
269 break;
270 case VIRTIO_PCI_GUEST_FEATURES:
704a76fc 271 ret = vdev->guest_features;
53c25cea
PB
272 break;
273 case VIRTIO_PCI_QUEUE_PFN:
274 ret = virtio_queue_get_addr(vdev, vdev->queue_sel)
275 >> VIRTIO_PCI_QUEUE_ADDR_SHIFT;
276 break;
277 case VIRTIO_PCI_QUEUE_NUM:
278 ret = virtio_queue_get_num(vdev, vdev->queue_sel);
279 break;
280 case VIRTIO_PCI_QUEUE_SEL:
281 ret = vdev->queue_sel;
282 break;
283 case VIRTIO_PCI_STATUS:
284 ret = vdev->status;
285 break;
286 case VIRTIO_PCI_ISR:
287 /* reading from the ISR also clears it. */
288 ret = vdev->isr;
289 vdev->isr = 0;
7055e687 290 qemu_set_irq(proxy->pci_dev.irq[0], 0);
53c25cea 291 break;
aba800a3
MT
292 case VIRTIO_MSI_CONFIG_VECTOR:
293 ret = vdev->config_vector;
294 break;
295 case VIRTIO_MSI_QUEUE_VECTOR:
296 ret = virtio_queue_vector(vdev, vdev->queue_sel);
297 break;
53c25cea
PB
298 default:
299 break;
300 }
301
302 return ret;
303}
304
305static uint32_t virtio_pci_config_readb(void *opaque, uint32_t addr)
306{
307 VirtIOPCIProxy *proxy = opaque;
aba800a3
MT
308 uint32_t config = VIRTIO_PCI_CONFIG(&proxy->pci_dev);
309 addr -= proxy->addr;
310 if (addr < config)
311 return virtio_ioport_read(proxy, addr);
312 addr -= config;
53c25cea
PB
313 return virtio_config_readb(proxy->vdev, addr);
314}
315
316static uint32_t virtio_pci_config_readw(void *opaque, uint32_t addr)
317{
318 VirtIOPCIProxy *proxy = opaque;
aba800a3
MT
319 uint32_t config = VIRTIO_PCI_CONFIG(&proxy->pci_dev);
320 addr -= proxy->addr;
321 if (addr < config)
322 return virtio_ioport_read(proxy, addr);
323 addr -= config;
53c25cea
PB
324 return virtio_config_readw(proxy->vdev, addr);
325}
326
327static uint32_t virtio_pci_config_readl(void *opaque, uint32_t addr)
328{
329 VirtIOPCIProxy *proxy = opaque;
aba800a3
MT
330 uint32_t config = VIRTIO_PCI_CONFIG(&proxy->pci_dev);
331 addr -= proxy->addr;
332 if (addr < config)
333 return virtio_ioport_read(proxy, addr);
334 addr -= config;
53c25cea
PB
335 return virtio_config_readl(proxy->vdev, addr);
336}
337
338static void virtio_pci_config_writeb(void *opaque, uint32_t addr, uint32_t val)
339{
340 VirtIOPCIProxy *proxy = opaque;
aba800a3
MT
341 uint32_t config = VIRTIO_PCI_CONFIG(&proxy->pci_dev);
342 addr -= proxy->addr;
343 if (addr < config) {
344 virtio_ioport_write(proxy, addr, val);
345 return;
346 }
347 addr -= config;
53c25cea
PB
348 virtio_config_writeb(proxy->vdev, addr, val);
349}
350
351static void virtio_pci_config_writew(void *opaque, uint32_t addr, uint32_t val)
352{
353 VirtIOPCIProxy *proxy = opaque;
aba800a3
MT
354 uint32_t config = VIRTIO_PCI_CONFIG(&proxy->pci_dev);
355 addr -= proxy->addr;
356 if (addr < config) {
357 virtio_ioport_write(proxy, addr, val);
358 return;
359 }
360 addr -= config;
53c25cea
PB
361 virtio_config_writew(proxy->vdev, addr, val);
362}
363
364static void virtio_pci_config_writel(void *opaque, uint32_t addr, uint32_t val)
365{
366 VirtIOPCIProxy *proxy = opaque;
aba800a3
MT
367 uint32_t config = VIRTIO_PCI_CONFIG(&proxy->pci_dev);
368 addr -= proxy->addr;
369 if (addr < config) {
370 virtio_ioport_write(proxy, addr, val);
371 return;
372 }
373 addr -= config;
53c25cea
PB
374 virtio_config_writel(proxy->vdev, addr, val);
375}
376
377static void virtio_map(PCIDevice *pci_dev, int region_num,
6e355d90 378 pcibus_t addr, pcibus_t size, int type)
53c25cea
PB
379{
380 VirtIOPCIProxy *proxy = container_of(pci_dev, VirtIOPCIProxy, pci_dev);
381 VirtIODevice *vdev = proxy->vdev;
aba800a3 382 unsigned config_len = VIRTIO_PCI_REGION_SIZE(pci_dev) + vdev->config_len;
53c25cea
PB
383
384 proxy->addr = addr;
53c25cea 385
aba800a3
MT
386 register_ioport_write(addr, config_len, 1, virtio_pci_config_writeb, proxy);
387 register_ioport_write(addr, config_len, 2, virtio_pci_config_writew, proxy);
388 register_ioport_write(addr, config_len, 4, virtio_pci_config_writel, proxy);
389 register_ioport_read(addr, config_len, 1, virtio_pci_config_readb, proxy);
390 register_ioport_read(addr, config_len, 2, virtio_pci_config_readw, proxy);
391 register_ioport_read(addr, config_len, 4, virtio_pci_config_readl, proxy);
53c25cea 392
aba800a3 393 if (vdev->config_len)
53c25cea 394 vdev->get_config(vdev, vdev->config);
aba800a3
MT
395}
396
397static void virtio_write_config(PCIDevice *pci_dev, uint32_t address,
398 uint32_t val, int len)
399{
ed757e14
YV
400 VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
401
402 if (PCI_COMMAND == address) {
403 if (!(val & PCI_COMMAND_MASTER)) {
c81131db 404 if (!(proxy->bugs & VIRTIO_PCI_BUG_BUS_MASTER)) {
3e607cb5
MT
405 virtio_set_status(proxy->vdev,
406 proxy->vdev->status & ~VIRTIO_CONFIG_S_DRIVER_OK);
c81131db 407 }
ed757e14
YV
408 }
409 }
410
aba800a3 411 pci_default_write_config(pci_dev, address, val, len);
85352471 412 msix_write_config(pci_dev, address, val, len);
53c25cea
PB
413}
414
6d74ca5a
MT
415static unsigned virtio_pci_get_features(void *opaque)
416{
8172539d
MT
417 VirtIOPCIProxy *proxy = opaque;
418 return proxy->host_features;
6d74ca5a
MT
419}
420
ade80dc8
MT
421static void virtio_pci_guest_notifier_read(void *opaque)
422{
423 VirtQueue *vq = opaque;
424 EventNotifier *n = virtio_queue_get_guest_notifier(vq);
425 if (event_notifier_test_and_clear(n)) {
426 virtio_irq(vq);
427 }
428}
429
430static int virtio_pci_set_guest_notifier(void *opaque, int n, bool assign)
431{
432 VirtIOPCIProxy *proxy = opaque;
433 VirtQueue *vq = virtio_get_queue(proxy->vdev, n);
434 EventNotifier *notifier = virtio_queue_get_guest_notifier(vq);
435
436 if (assign) {
437 int r = event_notifier_init(notifier, 0);
438 if (r < 0) {
439 return r;
440 }
441 qemu_set_fd_handler(event_notifier_get_fd(notifier),
442 virtio_pci_guest_notifier_read, NULL, vq);
443 } else {
444 qemu_set_fd_handler(event_notifier_get_fd(notifier),
445 NULL, NULL, NULL);
446 event_notifier_cleanup(notifier);
447 }
448
449 return 0;
450}
451
452static int virtio_pci_set_host_notifier(void *opaque, int n, bool assign)
453{
454 VirtIOPCIProxy *proxy = opaque;
455 VirtQueue *vq = virtio_get_queue(proxy->vdev, n);
456 EventNotifier *notifier = virtio_queue_get_host_notifier(vq);
457 int r;
458 if (assign) {
459 r = event_notifier_init(notifier, 1);
460 if (r < 0) {
461 return r;
462 }
463 r = kvm_set_ioeventfd_pio_word(event_notifier_get_fd(notifier),
464 proxy->addr + VIRTIO_PCI_QUEUE_NOTIFY,
465 n, assign);
466 if (r < 0) {
467 event_notifier_cleanup(notifier);
468 }
469 } else {
470 r = kvm_set_ioeventfd_pio_word(event_notifier_get_fd(notifier),
471 proxy->addr + VIRTIO_PCI_QUEUE_NOTIFY,
472 n, assign);
473 if (r < 0) {
474 return r;
475 }
476 event_notifier_cleanup(notifier);
477 }
478 return r;
479}
480
53c25cea 481static const VirtIOBindings virtio_pci_bindings = {
ff24bd58
MT
482 .notify = virtio_pci_notify,
483 .save_config = virtio_pci_save_config,
484 .load_config = virtio_pci_load_config,
485 .save_queue = virtio_pci_save_queue,
486 .load_queue = virtio_pci_load_queue,
6d74ca5a 487 .get_features = virtio_pci_get_features,
ade80dc8
MT
488 .set_host_notifier = virtio_pci_set_host_notifier,
489 .set_guest_notifier = virtio_pci_set_guest_notifier,
53c25cea
PB
490};
491
492static void virtio_init_pci(VirtIOPCIProxy *proxy, VirtIODevice *vdev,
493 uint16_t vendor, uint16_t device,
494 uint16_t class_code, uint8_t pif)
495{
496 uint8_t *config;
497 uint32_t size;
498
499 proxy->vdev = vdev;
500
501 config = proxy->pci_dev.config;
502 pci_config_set_vendor_id(config, vendor);
503 pci_config_set_device_id(config, device);
504
505 config[0x08] = VIRTIO_PCI_ABI_VERSION;
506
507 config[0x09] = pif;
508 pci_config_set_class(config, class_code);
53c25cea
PB
509
510 config[0x2c] = vendor & 0xFF;
511 config[0x2d] = (vendor >> 8) & 0xFF;
512 config[0x2e] = vdev->device_id & 0xFF;
513 config[0x2f] = (vdev->device_id >> 8) & 0xFF;
514
515 config[0x3d] = 1;
516
5a1fc5e8 517 if (vdev->nvectors && !msix_init(&proxy->pci_dev, vdev->nvectors, 1, 0)) {
aba800a3
MT
518 pci_register_bar(&proxy->pci_dev, 1,
519 msix_bar_size(&proxy->pci_dev),
0392a017 520 PCI_BASE_ADDRESS_SPACE_MEMORY,
aba800a3 521 msix_mmio_map);
aba800a3
MT
522 } else
523 vdev->nvectors = 0;
524
ed757e14
YV
525 proxy->pci_dev.config_write = virtio_write_config;
526
aba800a3 527 size = VIRTIO_PCI_REGION_SIZE(&proxy->pci_dev) + vdev->config_len;
53c25cea
PB
528 if (size & (size-1))
529 size = 1 << qemu_fls(size);
530
0392a017 531 pci_register_bar(&proxy->pci_dev, 0, size, PCI_BASE_ADDRESS_SPACE_IO,
53c25cea
PB
532 virtio_map);
533
534 virtio_bind_device(vdev, &virtio_pci_bindings, proxy);
8172539d
MT
535 proxy->host_features |= 0x1 << VIRTIO_F_NOTIFY_ON_EMPTY;
536 proxy->host_features |= 0x1 << VIRTIO_F_BAD_FEATURE;
537 proxy->host_features = vdev->get_features(vdev, proxy->host_features);
53c25cea
PB
538}
539
81a322d4 540static int virtio_blk_init_pci(PCIDevice *pci_dev)
53c25cea
PB
541{
542 VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
543 VirtIODevice *vdev;
544
ab73ff29
GH
545 if (proxy->class_code != PCI_CLASS_STORAGE_SCSI &&
546 proxy->class_code != PCI_CLASS_STORAGE_OTHER)
547 proxy->class_code = PCI_CLASS_STORAGE_SCSI;
53c25cea 548
428c149b 549 vdev = virtio_blk_init(&pci_dev->qdev, &proxy->block);
ac0c14d7
MA
550 if (!vdev) {
551 return -1;
552 }
177539e0 553 vdev->nvectors = proxy->nvectors;
53c25cea
PB
554 virtio_init_pci(proxy, vdev,
555 PCI_VENDOR_ID_REDHAT_QUMRANET,
85c2c735
MM
556 PCI_DEVICE_ID_VIRTIO_BLOCK,
557 proxy->class_code, 0x00);
177539e0
GH
558 /* make the actual value visible */
559 proxy->nvectors = vdev->nvectors;
81a322d4 560 return 0;
21d58b57
MM
561}
562
0f457d91
MT
563static int virtio_exit_pci(PCIDevice *pci_dev)
564{
565 return msix_uninit(pci_dev);
566}
567
56a14938
GH
568static int virtio_blk_exit_pci(PCIDevice *pci_dev)
569{
570 VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
571
f8b6cc00 572 blockdev_mark_auto_del(proxy->block.bs);
0f457d91 573 return virtio_exit_pci(pci_dev);
56a14938
GH
574}
575
98b19252 576static int virtio_serial_init_pci(PCIDevice *pci_dev)
21d58b57 577{
d6beee99 578 VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
85c2c735
MM
579 VirtIODevice *vdev;
580
d6beee99
GH
581 if (proxy->class_code != PCI_CLASS_COMMUNICATION_OTHER &&
582 proxy->class_code != PCI_CLASS_DISPLAY_OTHER && /* qemu 0.10 */
583 proxy->class_code != PCI_CLASS_OTHERS) /* qemu-kvm */
584 proxy->class_code = PCI_CLASS_COMMUNICATION_OTHER;
585
98b19252 586 vdev = virtio_serial_init(&pci_dev->qdev, proxy->max_virtserial_ports);
25fe3654
AS
587 if (!vdev) {
588 return -1;
589 }
573fb60c
AS
590 vdev->nvectors = proxy->nvectors == DEV_NVECTORS_UNSPECIFIED
591 ? proxy->max_virtserial_ports + 1
592 : proxy->nvectors;
85c2c735
MM
593 virtio_init_pci(proxy, vdev,
594 PCI_VENDOR_ID_REDHAT_QUMRANET,
595 PCI_DEVICE_ID_VIRTIO_CONSOLE,
596 proxy->class_code, 0x00);
a1829205 597 proxy->nvectors = vdev->nvectors;
81a322d4 598 return 0;
53c25cea
PB
599}
600
81a322d4 601static int virtio_net_init_pci(PCIDevice *pci_dev)
53c25cea
PB
602{
603 VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
604 VirtIODevice *vdev;
605
97b15621 606 vdev = virtio_net_init(&pci_dev->qdev, &proxy->nic);
a1e0fea5 607
97b15621 608 vdev->nvectors = proxy->nvectors;
53c25cea
PB
609 virtio_init_pci(proxy, vdev,
610 PCI_VENDOR_ID_REDHAT_QUMRANET,
611 PCI_DEVICE_ID_VIRTIO_NET,
612 PCI_CLASS_NETWORK_ETHERNET,
613 0x00);
a1e0fea5
GH
614
615 /* make the actual value visible */
616 proxy->nvectors = vdev->nvectors;
81a322d4 617 return 0;
53c25cea
PB
618}
619
97b15621
GH
620static int virtio_net_exit_pci(PCIDevice *pci_dev)
621{
622 VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
623
624 virtio_net_exit(proxy->vdev);
625 return virtio_exit_pci(pci_dev);
626}
627
81a322d4 628static int virtio_balloon_init_pci(PCIDevice *pci_dev)
53c25cea
PB
629{
630 VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
631 VirtIODevice *vdev;
632
633 vdev = virtio_balloon_init(&pci_dev->qdev);
634 virtio_init_pci(proxy, vdev,
635 PCI_VENDOR_ID_REDHAT_QUMRANET,
636 PCI_DEVICE_ID_VIRTIO_BALLOON,
637 PCI_CLASS_MEMORY_RAM,
638 0x00);
81a322d4 639 return 0;
53c25cea
PB
640}
641
758e8e38 642#ifdef CONFIG_VIRTFS
9f107513
AL
643static int virtio_9p_init_pci(PCIDevice *pci_dev)
644{
645 VirtIOPCIProxy *proxy = DO_UPCAST(VirtIOPCIProxy, pci_dev, pci_dev);
646 VirtIODevice *vdev;
647
648 vdev = virtio_9p_init(&pci_dev->qdev, &proxy->fsconf);
649 virtio_init_pci(proxy, vdev,
650 PCI_VENDOR_ID_REDHAT_QUMRANET,
651 0x1009,
652 0x2,
653 0x00);
654
655 return 0;
656}
657#endif
658
0aab0d3a
GH
659static PCIDeviceInfo virtio_info[] = {
660 {
661 .qdev.name = "virtio-blk-pci",
662 .qdev.size = sizeof(VirtIOPCIProxy),
663 .init = virtio_blk_init_pci,
56a14938 664 .exit = virtio_blk_exit_pci,
ab73ff29 665 .qdev.props = (Property[]) {
72c61d0b 666 DEFINE_PROP_HEX32("class", VirtIOPCIProxy, class_code, 0),
428c149b 667 DEFINE_BLOCK_PROPERTIES(VirtIOPCIProxy, block),
177539e0 668 DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors, 2),
8172539d 669 DEFINE_VIRTIO_BLK_FEATURES(VirtIOPCIProxy, host_features),
72c61d0b 670 DEFINE_PROP_END_OF_LIST(),
ab73ff29 671 },
e489030d 672 .qdev.reset = virtio_pci_reset,
0aab0d3a 673 },{
a1e0fea5
GH
674 .qdev.name = "virtio-net-pci",
675 .qdev.size = sizeof(VirtIOPCIProxy),
676 .init = virtio_net_init_pci,
97b15621 677 .exit = virtio_net_exit_pci,
8c52c8f3 678 .romfile = "pxe-virtio.bin",
a1e0fea5 679 .qdev.props = (Property[]) {
97b15621 680 DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors, 3),
8172539d 681 DEFINE_VIRTIO_NET_FEATURES(VirtIOPCIProxy, host_features),
97b15621 682 DEFINE_NIC_PROPERTIES(VirtIOPCIProxy, nic),
72c61d0b 683 DEFINE_PROP_END_OF_LIST(),
a1e0fea5 684 },
e489030d 685 .qdev.reset = virtio_pci_reset,
0aab0d3a 686 },{
98b19252
AS
687 .qdev.name = "virtio-serial-pci",
688 .qdev.alias = "virtio-serial",
0aab0d3a 689 .qdev.size = sizeof(VirtIOPCIProxy),
98b19252 690 .init = virtio_serial_init_pci,
0f457d91 691 .exit = virtio_exit_pci,
d6beee99 692 .qdev.props = (Property[]) {
573fb60c
AS
693 DEFINE_PROP_UINT32("vectors", VirtIOPCIProxy, nvectors,
694 DEV_NVECTORS_UNSPECIFIED),
72c61d0b 695 DEFINE_PROP_HEX32("class", VirtIOPCIProxy, class_code, 0),
8172539d 696 DEFINE_VIRTIO_COMMON_FEATURES(VirtIOPCIProxy, host_features),
98b19252
AS
697 DEFINE_PROP_UINT32("max_ports", VirtIOPCIProxy, max_virtserial_ports,
698 31),
72c61d0b 699 DEFINE_PROP_END_OF_LIST(),
d6beee99 700 },
e489030d 701 .qdev.reset = virtio_pci_reset,
0aab0d3a
GH
702 },{
703 .qdev.name = "virtio-balloon-pci",
704 .qdev.size = sizeof(VirtIOPCIProxy),
705 .init = virtio_balloon_init_pci,
0f457d91 706 .exit = virtio_exit_pci,
8172539d
MT
707 .qdev.props = (Property[]) {
708 DEFINE_VIRTIO_COMMON_FEATURES(VirtIOPCIProxy, host_features),
709 DEFINE_PROP_END_OF_LIST(),
710 },
e489030d 711 .qdev.reset = virtio_pci_reset,
0aab0d3a 712 },{
758e8e38 713#ifdef CONFIG_VIRTFS
9f107513
AL
714 .qdev.name = "virtio-9p-pci",
715 .qdev.size = sizeof(VirtIOPCIProxy),
716 .init = virtio_9p_init_pci,
717 .qdev.props = (Property[]) {
718 DEFINE_VIRTIO_COMMON_FEATURES(VirtIOPCIProxy, host_features),
719 DEFINE_PROP_STRING("mount_tag", VirtIOPCIProxy, fsconf.tag),
720 DEFINE_PROP_STRING("fsdev", VirtIOPCIProxy, fsconf.fsdev_id),
721 DEFINE_PROP_END_OF_LIST(),
722 },
723 }, {
724#endif
0aab0d3a
GH
725 /* end of list */
726 }
727};
728
53c25cea
PB
729static void virtio_pci_register_devices(void)
730{
0aab0d3a 731 pci_qdev_register_many(virtio_info);
53c25cea
PB
732}
733
734device_init(virtio_pci_register_devices)