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a656c8ef 1/*
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2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * This header defines architecture specific interfaces, x86 version
5 *
6 * This work is licensed under the terms of the GNU GPL, version 2. See
7 * the COPYING file in the top-level directory.
8 *
9 */
10
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11#ifndef ASM_X86__KVM_HOST_H
12#define ASM_X86__KVM_HOST_H
043405e1 13
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14#include <linux/types.h>
15#include <linux/mm.h>
e930bffe 16#include <linux/mmu_notifier.h>
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17
18#include <linux/kvm.h>
19#include <linux/kvm_para.h>
edf88417 20#include <linux/kvm_types.h>
34c16eec 21
50d0a0f9 22#include <asm/pvclock-abi.h>
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23#include <asm/desc.h>
24
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25#define KVM_MAX_VCPUS 16
26#define KVM_MEMORY_SLOTS 32
27/* memory slots that does not exposed to userspace */
28#define KVM_PRIVATE_MEM_SLOTS 4
29
30#define KVM_PIO_PAGE_OFFSET 1
542472b5 31#define KVM_COALESCED_MMIO_PAGE_OFFSET 2
69a9f69b 32
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33#define CR3_PAE_RESERVED_BITS ((X86_CR3_PWT | X86_CR3_PCD) - 1)
34#define CR3_NONPAE_RESERVED_BITS ((PAGE_SIZE-1) & ~(X86_CR3_PWT | X86_CR3_PCD))
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35#define CR3_L_MODE_RESERVED_BITS (CR3_NONPAE_RESERVED_BITS | \
36 0xFFFFFF0000000000ULL)
cd6e8f87 37
7d76b4d3 38#define KVM_GUEST_CR0_MASK \
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39 (X86_CR0_PG | X86_CR0_PE | X86_CR0_WP | X86_CR0_NE \
40 | X86_CR0_NW | X86_CR0_CD)
7d76b4d3 41#define KVM_VM_CR0_ALWAYS_ON \
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42 (X86_CR0_PG | X86_CR0_PE | X86_CR0_WP | X86_CR0_NE | X86_CR0_TS \
43 | X86_CR0_MP)
7d76b4d3 44#define KVM_GUEST_CR4_MASK \
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45 (X86_CR4_VME | X86_CR4_PSE | X86_CR4_PAE | X86_CR4_PGE | X86_CR4_VMXE)
46#define KVM_PMODE_VM_CR4_ALWAYS_ON (X86_CR4_PAE | X86_CR4_VMXE)
47#define KVM_RMODE_VM_CR4_ALWAYS_ON (X86_CR4_VME | X86_CR4_PAE | X86_CR4_VMXE)
48
49#define INVALID_PAGE (~(hpa_t)0)
50#define UNMAPPED_GVA (~(gpa_t)0)
51
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52/* shadow tables are PAE even on non-PAE hosts */
53#define KVM_HPAGE_SHIFT 21
54#define KVM_HPAGE_SIZE (1UL << KVM_HPAGE_SHIFT)
55#define KVM_HPAGE_MASK (~(KVM_HPAGE_SIZE - 1))
56
57#define KVM_PAGES_PER_HPAGE (KVM_HPAGE_SIZE / PAGE_SIZE)
58
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59#define DE_VECTOR 0
60#define UD_VECTOR 6
61#define NM_VECTOR 7
62#define DF_VECTOR 8
63#define TS_VECTOR 10
64#define NP_VECTOR 11
65#define SS_VECTOR 12
66#define GP_VECTOR 13
67#define PF_VECTOR 14
53371b50 68#define MC_VECTOR 18
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69
70#define SELECTOR_TI_MASK (1 << 2)
71#define SELECTOR_RPL_MASK 0x03
72
73#define IOPL_SHIFT 12
74
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75#define KVM_ALIAS_SLOTS 4
76
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77#define KVM_PERMILLE_MMU_PAGES 20
78#define KVM_MIN_ALLOC_MMU_PAGES 64
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79#define KVM_MMU_HASH_SHIFT 10
80#define KVM_NUM_MMU_PAGES (1 << KVM_MMU_HASH_SHIFT)
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81#define KVM_MIN_FREE_MMU_PAGES 5
82#define KVM_REFILL_PAGES 25
83#define KVM_MAX_CPUID_ENTRIES 40
9ba075a6 84#define KVM_NR_VAR_MTRR 8
d657a98e 85
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86extern spinlock_t kvm_lock;
87extern struct list_head vm_list;
88
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89struct kvm_vcpu;
90struct kvm;
91
5fdbf976 92enum kvm_reg {
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93 VCPU_REGS_RAX = 0,
94 VCPU_REGS_RCX = 1,
95 VCPU_REGS_RDX = 2,
96 VCPU_REGS_RBX = 3,
97 VCPU_REGS_RSP = 4,
98 VCPU_REGS_RBP = 5,
99 VCPU_REGS_RSI = 6,
100 VCPU_REGS_RDI = 7,
101#ifdef CONFIG_X86_64
102 VCPU_REGS_R8 = 8,
103 VCPU_REGS_R9 = 9,
104 VCPU_REGS_R10 = 10,
105 VCPU_REGS_R11 = 11,
106 VCPU_REGS_R12 = 12,
107 VCPU_REGS_R13 = 13,
108 VCPU_REGS_R14 = 14,
109 VCPU_REGS_R15 = 15,
110#endif
5fdbf976 111 VCPU_REGS_RIP,
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112 NR_VCPU_REGS
113};
114
115enum {
81609e3e 116 VCPU_SREG_ES,
2b3ccfa0 117 VCPU_SREG_CS,
81609e3e 118 VCPU_SREG_SS,
2b3ccfa0 119 VCPU_SREG_DS,
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120 VCPU_SREG_FS,
121 VCPU_SREG_GS,
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122 VCPU_SREG_TR,
123 VCPU_SREG_LDTR,
124};
125
edf88417 126#include <asm/kvm_x86_emulate.h>
2b3ccfa0 127
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128#define KVM_NR_MEM_OBJS 40
129
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130struct kvm_guest_debug {
131 int enabled;
132 unsigned long bp[4];
133 int singlestep;
134};
135
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136/*
137 * We don't want allocation failures within the mmu code, so we preallocate
138 * enough memory for a single page fault in a cache.
139 */
140struct kvm_mmu_memory_cache {
141 int nobjs;
142 void *objects[KVM_NR_MEM_OBJS];
143};
144
145#define NR_PTE_CHAIN_ENTRIES 5
146
147struct kvm_pte_chain {
148 u64 *parent_ptes[NR_PTE_CHAIN_ENTRIES];
149 struct hlist_node link;
150};
151
152/*
153 * kvm_mmu_page_role, below, is defined as:
154 *
155 * bits 0:3 - total guest paging levels (2-4, or zero for real mode)
156 * bits 4:7 - page table level for this shadow (1-4)
157 * bits 8:9 - page table quadrant for 2-level guests
158 * bit 16 - "metaphysical" - gfn is not a real page (huge page/real mode)
159 * bits 17:19 - common access permissions for all ptes in this shadow page
160 */
161union kvm_mmu_page_role {
162 unsigned word;
163 struct {
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164 unsigned glevels:4;
165 unsigned level:4;
166 unsigned quadrant:2;
167 unsigned pad_for_nice_hex_output:6;
168 unsigned metaphysical:1;
169 unsigned access:3;
2e53d63a 170 unsigned invalid:1;
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171 };
172};
173
174struct kvm_mmu_page {
175 struct list_head link;
176 struct hlist_node hash_link;
177
178 /*
179 * The following two entries are used to key the shadow page in the
180 * hash table.
181 */
182 gfn_t gfn;
183 union kvm_mmu_page_role role;
184
185 u64 *spt;
186 /* hold the gfn of each spte inside spt */
187 gfn_t *gfns;
188 unsigned long slot_bitmap; /* One bit set per slot which has memory
189 * in this shadow page.
190 */
191 int multimapped; /* More than one parent_pte? */
192 int root_count; /* Currently serving as active root */
193 union {
194 u64 *parent_pte; /* !multimapped */
195 struct hlist_head parent_ptes; /* multimapped, kvm_pte_chain */
196 };
197};
198
199/*
200 * x86 supports 3 paging modes (4-level 64-bit, 3-level 64-bit, and 2-level
201 * 32-bit). The kvm_mmu structure abstracts the details of the current mmu
202 * mode.
203 */
204struct kvm_mmu {
205 void (*new_cr3)(struct kvm_vcpu *vcpu);
206 int (*page_fault)(struct kvm_vcpu *vcpu, gva_t gva, u32 err);
207 void (*free)(struct kvm_vcpu *vcpu);
208 gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t gva);
209 void (*prefetch_page)(struct kvm_vcpu *vcpu,
210 struct kvm_mmu_page *page);
211 hpa_t root_hpa;
212 int root_level;
213 int shadow_root_level;
214
215 u64 *pae_root;
216};
217
ad312c7c 218struct kvm_vcpu_arch {
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219 u64 host_tsc;
220 int interrupt_window_open;
221 unsigned long irq_summary; /* bit vector: 1 per word in irq_pending */
222 DECLARE_BITMAP(irq_pending, KVM_NR_INTERRUPTS);
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223 /*
224 * rip and regs accesses must go through
225 * kvm_{register,rip}_{read,write} functions.
226 */
227 unsigned long regs[NR_VCPU_REGS];
228 u32 regs_avail;
229 u32 regs_dirty;
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230
231 unsigned long cr0;
232 unsigned long cr2;
233 unsigned long cr3;
234 unsigned long cr4;
235 unsigned long cr8;
236 u64 pdptrs[4]; /* pae */
237 u64 shadow_efer;
238 u64 apic_base;
239 struct kvm_lapic *apic; /* kernel irqchip context */
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240 int mp_state;
241 int sipi_vector;
242 u64 ia32_misc_enable_msr;
b209749f 243 bool tpr_access_reporting;
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244
245 struct kvm_mmu mmu;
246
247 struct kvm_mmu_memory_cache mmu_pte_chain_cache;
248 struct kvm_mmu_memory_cache mmu_rmap_desc_cache;
249 struct kvm_mmu_memory_cache mmu_page_cache;
250 struct kvm_mmu_memory_cache mmu_page_header_cache;
251
252 gfn_t last_pt_write_gfn;
253 int last_pt_write_count;
254 u64 *last_pte_updated;
1b7fcd32 255 gfn_t last_pte_gfn;
34c16eec 256
d7824fff 257 struct {
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258 gfn_t gfn; /* presumed gfn during guest pte update */
259 pfn_t pfn; /* pfn corresponding to that gfn */
05da4558 260 int largepage;
e930bffe 261 unsigned long mmu_seq;
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262 } update_pte;
263
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264 struct i387_fxsave_struct host_fx_image;
265 struct i387_fxsave_struct guest_fx_image;
266
267 gva_t mmio_fault_cr2;
268 struct kvm_pio_request pio;
269 void *pio_data;
270
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271 struct kvm_queued_exception {
272 bool pending;
273 bool has_error_code;
274 u8 nr;
275 u32 error_code;
276 } exception;
277
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278 struct {
279 int active;
280 u8 save_iopl;
281 struct kvm_save_segment {
282 u16 selector;
283 unsigned long base;
284 u32 limit;
285 u32 ar;
286 } tr, es, ds, fs, gs;
287 } rmode;
288 int halt_request; /* real mode on Intel only */
289
290 int cpuid_nent;
07716717 291 struct kvm_cpuid_entry2 cpuid_entries[KVM_MAX_CPUID_ENTRIES];
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292 /* emulate context */
293
294 struct x86_emulate_ctxt emulate_ctxt;
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295
296 gpa_t time;
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297 struct pvclock_vcpu_time_info hv_clock;
298 unsigned int hv_clock_tsc_khz;
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299 unsigned int time_offset;
300 struct page *time_page;
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301
302 bool nmi_pending;
668f612f 303 bool nmi_injected;
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304
305 u64 mtrr[0x100];
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306};
307
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308struct kvm_mem_alias {
309 gfn_t base_gfn;
310 unsigned long npages;
311 gfn_t target_gfn;
312};
313
314struct kvm_arch{
315 int naliases;
316 struct kvm_mem_alias aliases[KVM_ALIAS_SLOTS];
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317
318 unsigned int n_free_mmu_pages;
319 unsigned int n_requested_mmu_pages;
320 unsigned int n_alloc_mmu_pages;
321 struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES];
322 /*
323 * Hash table of struct kvm_mmu_page.
324 */
325 struct list_head active_mmu_pages;
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326 struct kvm_pic *vpic;
327 struct kvm_ioapic *vioapic;
7837699f 328 struct kvm_pit *vpit;
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329
330 int round_robin_prev_vcpu;
331 unsigned int tss_addr;
332 struct page *apic_access_page;
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333
334 gpa_t wall_clock;
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335
336 struct page *ept_identity_pagetable;
337 bool ept_identity_pagetable_done;
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338};
339
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340struct kvm_vm_stat {
341 u32 mmu_shadow_zapped;
342 u32 mmu_pte_write;
343 u32 mmu_pte_updated;
344 u32 mmu_pde_zapped;
345 u32 mmu_flooded;
346 u32 mmu_recycled;
dfc5aa00 347 u32 mmu_cache_miss;
0711456c 348 u32 remote_tlb_flush;
05da4558 349 u32 lpages;
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350};
351
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352struct kvm_vcpu_stat {
353 u32 pf_fixed;
354 u32 pf_guest;
355 u32 tlb_flush;
356 u32 invlpg;
357
358 u32 exits;
359 u32 io_exits;
360 u32 mmio_exits;
361 u32 signal_exits;
362 u32 irq_window_exits;
f08864b4 363 u32 nmi_window_exits;
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364 u32 halt_exits;
365 u32 halt_wakeup;
366 u32 request_irq_exits;
367 u32 irq_exits;
368 u32 host_state_reload;
369 u32 efer_reload;
370 u32 fpu_reload;
371 u32 insn_emulation;
372 u32 insn_emulation_fail;
f11c3a8d 373 u32 hypercalls;
77b4c255 374};
ad312c7c 375
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376struct descriptor_table {
377 u16 limit;
378 unsigned long base;
379} __attribute__((packed));
380
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381struct kvm_x86_ops {
382 int (*cpu_has_kvm_support)(void); /* __init */
383 int (*disabled_by_bios)(void); /* __init */
384 void (*hardware_enable)(void *dummy); /* __init */
385 void (*hardware_disable)(void *dummy);
386 void (*check_processor_compatibility)(void *rtn);
387 int (*hardware_setup)(void); /* __init */
388 void (*hardware_unsetup)(void); /* __exit */
774ead3a 389 bool (*cpu_has_accelerated_tpr)(void);
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390
391 /* Create, but do not attach this VCPU */
392 struct kvm_vcpu *(*vcpu_create)(struct kvm *kvm, unsigned id);
393 void (*vcpu_free)(struct kvm_vcpu *vcpu);
394 int (*vcpu_reset)(struct kvm_vcpu *vcpu);
395
396 void (*prepare_guest_switch)(struct kvm_vcpu *vcpu);
397 void (*vcpu_load)(struct kvm_vcpu *vcpu, int cpu);
398 void (*vcpu_put)(struct kvm_vcpu *vcpu);
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399
400 int (*set_guest_debug)(struct kvm_vcpu *vcpu,
401 struct kvm_debug_guest *dbg);
402 void (*guest_debug_pre)(struct kvm_vcpu *vcpu);
403 int (*get_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata);
404 int (*set_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 data);
405 u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg);
406 void (*get_segment)(struct kvm_vcpu *vcpu,
407 struct kvm_segment *var, int seg);
2e4d2653 408 int (*get_cpl)(struct kvm_vcpu *vcpu);
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409 void (*set_segment)(struct kvm_vcpu *vcpu,
410 struct kvm_segment *var, int seg);
411 void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l);
412 void (*decache_cr4_guest_bits)(struct kvm_vcpu *vcpu);
413 void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0);
414 void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3);
415 void (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4);
416 void (*set_efer)(struct kvm_vcpu *vcpu, u64 efer);
417 void (*get_idt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
418 void (*set_idt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
419 void (*get_gdt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
420 void (*set_gdt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
421 unsigned long (*get_dr)(struct kvm_vcpu *vcpu, int dr);
422 void (*set_dr)(struct kvm_vcpu *vcpu, int dr, unsigned long value,
423 int *exception);
5fdbf976 424 void (*cache_reg)(struct kvm_vcpu *vcpu, enum kvm_reg reg);
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425 unsigned long (*get_rflags)(struct kvm_vcpu *vcpu);
426 void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags);
427
428 void (*tlb_flush)(struct kvm_vcpu *vcpu);
ea4a5ff8 429
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430 void (*run)(struct kvm_vcpu *vcpu, struct kvm_run *run);
431 int (*handle_exit)(struct kvm_run *run, struct kvm_vcpu *vcpu);
432 void (*skip_emulated_instruction)(struct kvm_vcpu *vcpu);
433 void (*patch_hypercall)(struct kvm_vcpu *vcpu,
434 unsigned char *hypercall_addr);
435 int (*get_irq)(struct kvm_vcpu *vcpu);
436 void (*set_irq)(struct kvm_vcpu *vcpu, int vec);
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437 void (*queue_exception)(struct kvm_vcpu *vcpu, unsigned nr,
438 bool has_error_code, u32 error_code);
439 bool (*exception_injected)(struct kvm_vcpu *vcpu);
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440 void (*inject_pending_irq)(struct kvm_vcpu *vcpu);
441 void (*inject_pending_vectors)(struct kvm_vcpu *vcpu,
442 struct kvm_run *run);
443
444 int (*set_tss_addr)(struct kvm *kvm, unsigned int addr);
67253af5 445 int (*get_tdp_level)(void);
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446};
447
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448extern struct kvm_x86_ops *kvm_x86_ops;
449
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450int kvm_mmu_module_init(void);
451void kvm_mmu_module_exit(void);
452
453void kvm_mmu_destroy(struct kvm_vcpu *vcpu);
454int kvm_mmu_create(struct kvm_vcpu *vcpu);
455int kvm_mmu_setup(struct kvm_vcpu *vcpu);
456void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte);
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457void kvm_mmu_set_base_ptes(u64 base_pte);
458void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
459 u64 dirty_mask, u64 nx_mask, u64 x_mask);
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460
461int kvm_mmu_reset_context(struct kvm_vcpu *vcpu);
462void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot);
463void kvm_mmu_zap_all(struct kvm *kvm);
3ad82a7e 464unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm);
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465void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages);
466
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467int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3);
468
3200f405 469int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
9f811285 470 const void *val, int bytes);
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471int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
472 gpa_t addr, unsigned long *ret);
473
474extern bool tdp_enabled;
9f811285 475
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476enum emulation_result {
477 EMULATE_DONE, /* no further processing */
478 EMULATE_DO_MMIO, /* kvm_run filled with mmio request */
479 EMULATE_FAIL, /* can't emulate this instruction */
480};
481
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482#define EMULTYPE_NO_DECODE (1 << 0)
483#define EMULTYPE_TRAP_UD (1 << 1)
54f1585a 484int emulate_instruction(struct kvm_vcpu *vcpu, struct kvm_run *run,
571008da 485 unsigned long cr2, u16 error_code, int emulation_type);
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486void kvm_report_emulation_failure(struct kvm_vcpu *cvpu, const char *context);
487void realmode_lgdt(struct kvm_vcpu *vcpu, u16 size, unsigned long address);
488void realmode_lidt(struct kvm_vcpu *vcpu, u16 size, unsigned long address);
489void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw,
490 unsigned long *rflags);
491
492unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr);
493void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long value,
494 unsigned long *rflags);
f2b4b7dd 495void kvm_enable_efer_bits(u64);
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496int kvm_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *data);
497int kvm_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data);
498
499struct x86_emulate_ctxt;
500
501int kvm_emulate_pio(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
502 int size, unsigned port);
503int kvm_emulate_pio_string(struct kvm_vcpu *vcpu, struct kvm_run *run, int in,
504 int size, unsigned long count, int down,
505 gva_t address, int rep, unsigned port);
506void kvm_emulate_cpuid(struct kvm_vcpu *vcpu);
507int kvm_emulate_halt(struct kvm_vcpu *vcpu);
508int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address);
509int emulate_clts(struct kvm_vcpu *vcpu);
510int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
511 unsigned long *dest);
512int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
513 unsigned long value);
514
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515void kvm_get_segment(struct kvm_vcpu *vcpu, struct kvm_segment *var, int seg);
516int kvm_load_segment_descriptor(struct kvm_vcpu *vcpu, u16 selector,
517 int type_bits, int seg);
518
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519int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int reason);
520
2d3ad1f4 521void kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0);
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522void kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3);
523void kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4);
524void kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8);
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525unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu);
526void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw);
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527void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l);
528
529int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata);
530int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data);
531
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532void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr);
533void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code);
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534void kvm_inject_page_fault(struct kvm_vcpu *vcpu, unsigned long cr2,
535 u32 error_code);
298101da 536
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537void kvm_inject_nmi(struct kvm_vcpu *vcpu);
538
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539void fx_init(struct kvm_vcpu *vcpu);
540
541int emulator_read_std(unsigned long addr,
542 void *val,
543 unsigned int bytes,
544 struct kvm_vcpu *vcpu);
545int emulator_write_emulated(unsigned long addr,
546 const void *val,
547 unsigned int bytes,
548 struct kvm_vcpu *vcpu);
549
550unsigned long segment_base(u16 selector);
551
d835dfec 552void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu);
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553void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
554 const u8 *new, int bytes);
555int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva);
556void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu);
557int kvm_mmu_load(struct kvm_vcpu *vcpu);
558void kvm_mmu_unload(struct kvm_vcpu *vcpu);
559
560int kvm_emulate_hypercall(struct kvm_vcpu *vcpu);
561
562int kvm_fix_hypercall(struct kvm_vcpu *vcpu);
563
3067714c 564int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t gva, u32 error_code);
34c16eec 565
18552672 566void kvm_enable_tdp(void);
5f4cb662 567void kvm_disable_tdp(void);
18552672 568
a03490ed 569int load_pdptrs(struct kvm_vcpu *vcpu, unsigned long cr3);
de7d789a 570int complete_pio(struct kvm_vcpu *vcpu);
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571
572static inline struct kvm_mmu_page *page_header(hpa_t shadow_page)
573{
574 struct page *page = pfn_to_page(shadow_page >> PAGE_SHIFT);
575
576 return (struct kvm_mmu_page *)page_private(page);
577}
578
d6e88aec 579static inline u16 kvm_read_fs(void)
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580{
581 u16 seg;
582 asm("mov %%fs, %0" : "=g"(seg));
583 return seg;
584}
585
d6e88aec 586static inline u16 kvm_read_gs(void)
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587{
588 u16 seg;
589 asm("mov %%gs, %0" : "=g"(seg));
590 return seg;
591}
592
d6e88aec 593static inline u16 kvm_read_ldt(void)
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594{
595 u16 ldt;
596 asm("sldt %0" : "=g"(ldt));
597 return ldt;
598}
599
d6e88aec 600static inline void kvm_load_fs(u16 sel)
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601{
602 asm("mov %0, %%fs" : : "rm"(sel));
603}
604
d6e88aec 605static inline void kvm_load_gs(u16 sel)
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606{
607 asm("mov %0, %%gs" : : "rm"(sel));
608}
609
d6e88aec 610static inline void kvm_load_ldt(u16 sel)
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611{
612 asm("lldt %0" : : "rm"(sel));
613}
ec6d273d 614
d6e88aec 615static inline void kvm_get_idt(struct descriptor_table *table)
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616{
617 asm("sidt %0" : "=m"(*table));
618}
619
d6e88aec 620static inline void kvm_get_gdt(struct descriptor_table *table)
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621{
622 asm("sgdt %0" : "=m"(*table));
623}
624
d6e88aec 625static inline unsigned long kvm_read_tr_base(void)
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626{
627 u16 tr;
628 asm("str %0" : "=g"(tr));
629 return segment_base(tr);
630}
631
632#ifdef CONFIG_X86_64
633static inline unsigned long read_msr(unsigned long msr)
634{
635 u64 value;
636
637 rdmsrl(msr, value);
638 return value;
639}
640#endif
641
d6e88aec 642static inline void kvm_fx_save(struct i387_fxsave_struct *image)
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643{
644 asm("fxsave (%0)":: "r" (image));
645}
646
d6e88aec 647static inline void kvm_fx_restore(struct i387_fxsave_struct *image)
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648{
649 asm("fxrstor (%0)":: "r" (image));
650}
651
d6e88aec 652static inline void kvm_fx_finit(void)
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653{
654 asm("finit");
655}
656
657static inline u32 get_rdx_init_val(void)
658{
659 return 0x600; /* P6 family */
660}
661
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662static inline void kvm_inject_gp(struct kvm_vcpu *vcpu, u32 error_code)
663{
664 kvm_queue_exception_e(vcpu, GP_VECTOR, error_code);
665}
666
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667#define ASM_VMX_VMCLEAR_RAX ".byte 0x66, 0x0f, 0xc7, 0x30"
668#define ASM_VMX_VMLAUNCH ".byte 0x0f, 0x01, 0xc2"
669#define ASM_VMX_VMRESUME ".byte 0x0f, 0x01, 0xc3"
670#define ASM_VMX_VMPTRLD_RAX ".byte 0x0f, 0xc7, 0x30"
671#define ASM_VMX_VMREAD_RDX_RAX ".byte 0x0f, 0x78, 0xd0"
672#define ASM_VMX_VMWRITE_RAX_RDX ".byte 0x0f, 0x79, 0xd0"
673#define ASM_VMX_VMWRITE_RSP_RDX ".byte 0x0f, 0x79, 0xd4"
674#define ASM_VMX_VMXOFF ".byte 0x0f, 0x01, 0xc4"
675#define ASM_VMX_VMXON_RAX ".byte 0xf3, 0x0f, 0xc7, 0x30"
1439442c 676#define ASM_VMX_INVEPT ".byte 0x66, 0x0f, 0x38, 0x80, 0x08"
2384d2b3 677#define ASM_VMX_INVVPID ".byte 0x66, 0x0f, 0x38, 0x81, 0x08"
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678
679#define MSR_IA32_TIME_STAMP_COUNTER 0x010
680
681#define TSS_IOPB_BASE_OFFSET 0x66
682#define TSS_BASE_SIZE 0x68
683#define TSS_IOPB_SIZE (65536 / 8)
684#define TSS_REDIRECTION_SIZE (256 / 8)
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685#define RMODE_TSS_SIZE \
686 (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1)
53e0aa7b 687
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688enum {
689 TASK_SWITCH_CALL = 0,
690 TASK_SWITCH_IRET = 1,
691 TASK_SWITCH_JMP = 2,
692 TASK_SWITCH_GATE = 3,
693};
694
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4ecac3fd 696#ifdef CONFIG_64BIT
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697# define KVM_EX_ENTRY ".quad"
698# define KVM_EX_PUSH "pushq"
4ecac3fd 699#else
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700# define KVM_EX_ENTRY ".long"
701# define KVM_EX_PUSH "pushl"
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702#endif
703
704/*
705 * Hardware virtualization extension instructions may fault if a
706 * reboot turns off virtualization while processes are running.
707 * Trap the fault and ignore the instruction if that happens.
708 */
709asmlinkage void kvm_handle_fault_on_reboot(void);
710
711#define __kvm_handle_fault_on_reboot(insn) \
712 "666: " insn "\n\t" \
18b13e54 713 ".pushsection .fixup, \"ax\" \n" \
4ecac3fd 714 "667: \n\t" \
33a37eb4 715 KVM_EX_PUSH " $666b \n\t" \
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716 "jmp kvm_handle_fault_on_reboot \n\t" \
717 ".popsection \n\t" \
718 ".pushsection __ex_table, \"a\" \n\t" \
719 KVM_EX_ENTRY " 666b, 667b \n\t" \
720 ".popsection"
721
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722#define KVM_ARCH_WANT_MMU_NOTIFIER
723int kvm_unmap_hva(struct kvm *kvm, unsigned long hva);
724int kvm_age_hva(struct kvm *kvm, unsigned long hva);
725
77ef50a5 726#endif /* ASM_X86__KVM_HOST_H */