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1da177e4 LT |
1 | #ifndef __irq_h |
2 | #define __irq_h | |
3 | ||
4 | /* | |
5 | * Please do not include this file in generic code. There is currently | |
6 | * no requirement for any architecture to implement anything held | |
7 | * within this file. | |
8 | * | |
9 | * Thanks. --rmk | |
10 | */ | |
11 | ||
12 | #include <linux/config.h> | |
13 | ||
14 | #if !defined(CONFIG_ARCH_S390) | |
15 | ||
16 | #include <linux/linkage.h> | |
17 | #include <linux/cache.h> | |
18 | #include <linux/spinlock.h> | |
19 | #include <linux/cpumask.h> | |
20 | ||
21 | #include <asm/irq.h> | |
22 | #include <asm/ptrace.h> | |
23 | ||
24 | /* | |
25 | * IRQ line status. | |
26 | */ | |
27 | #define IRQ_INPROGRESS 1 /* IRQ handler active - do not enter! */ | |
28 | #define IRQ_DISABLED 2 /* IRQ disabled - do not enter! */ | |
29 | #define IRQ_PENDING 4 /* IRQ pending - replay on enable */ | |
30 | #define IRQ_REPLAY 8 /* IRQ has been replayed but not acked yet */ | |
31 | #define IRQ_AUTODETECT 16 /* IRQ is being autodetected */ | |
32 | #define IRQ_WAITING 32 /* IRQ not yet seen - for autodetection */ | |
33 | #define IRQ_LEVEL 64 /* IRQ level triggered */ | |
34 | #define IRQ_MASKED 128 /* IRQ masked - shouldn't be seen again */ | |
35 | #define IRQ_PER_CPU 256 /* IRQ is per CPU */ | |
36 | ||
37 | /* | |
38 | * Interrupt controller descriptor. This is all we need | |
39 | * to describe about the low-level hardware. | |
40 | */ | |
41 | struct hw_interrupt_type { | |
42 | const char * typename; | |
43 | unsigned int (*startup)(unsigned int irq); | |
44 | void (*shutdown)(unsigned int irq); | |
45 | void (*enable)(unsigned int irq); | |
46 | void (*disable)(unsigned int irq); | |
47 | void (*ack)(unsigned int irq); | |
48 | void (*end)(unsigned int irq); | |
49 | void (*set_affinity)(unsigned int irq, cpumask_t dest); | |
b77d6adc PBG |
50 | /* Currently used only by UML, might disappear one day.*/ |
51 | #ifdef CONFIG_IRQ_RELEASE_METHOD | |
dbce706e | 52 | void (*release)(unsigned int irq, void *dev_id); |
b77d6adc | 53 | #endif |
1da177e4 LT |
54 | }; |
55 | ||
56 | typedef struct hw_interrupt_type hw_irq_controller; | |
57 | ||
58 | /* | |
59 | * This is the "IRQ descriptor", which contains various information | |
60 | * about the irq, including what kind of hardware handling it has, | |
61 | * whether it is disabled etc etc. | |
62 | * | |
63 | * Pad this out to 32 bytes for cache and indexing reasons. | |
64 | */ | |
65 | typedef struct irq_desc { | |
66 | hw_irq_controller *handler; | |
67 | void *handler_data; | |
68 | struct irqaction *action; /* IRQ action list */ | |
69 | unsigned int status; /* IRQ status */ | |
70 | unsigned int depth; /* nested irq disables */ | |
71 | unsigned int irq_count; /* For detecting broken interrupts */ | |
72 | unsigned int irqs_unhandled; | |
73 | spinlock_t lock; | |
74 | } ____cacheline_aligned irq_desc_t; | |
75 | ||
76 | extern irq_desc_t irq_desc [NR_IRQS]; | |
77 | ||
78 | #include <asm/hw_irq.h> /* the arch dependent stuff */ | |
79 | ||
80 | extern int setup_irq(unsigned int irq, struct irqaction * new); | |
81 | ||
82 | #ifdef CONFIG_GENERIC_HARDIRQS | |
83 | extern cpumask_t irq_affinity[NR_IRQS]; | |
84 | extern int no_irq_affinity; | |
85 | extern int noirqdebug_setup(char *str); | |
86 | ||
87 | extern fastcall int handle_IRQ_event(unsigned int irq, struct pt_regs *regs, | |
200803df | 88 | struct irqaction *action); |
1da177e4 | 89 | extern fastcall unsigned int __do_IRQ(unsigned int irq, struct pt_regs *regs); |
200803df AC |
90 | extern void note_interrupt(unsigned int irq, irq_desc_t *desc, |
91 | int action_ret, struct pt_regs *regs); | |
1da177e4 LT |
92 | extern int can_request_irq(unsigned int irq, unsigned long irqflags); |
93 | ||
94 | extern void init_irq_proc(void); | |
95 | #endif | |
96 | ||
97 | extern hw_irq_controller no_irq_type; /* needed in every arch ? */ | |
98 | ||
99 | #endif | |
100 | ||
101 | #endif /* __irq_h */ |