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0793a61d | 1 | /* |
57c0c15b | 2 | * Performance events: |
0793a61d | 3 | * |
a308444c | 4 | * Copyright (C) 2008-2009, Thomas Gleixner <tglx@linutronix.de> |
e7e7ee2e IM |
5 | * Copyright (C) 2008-2011, Red Hat, Inc., Ingo Molnar |
6 | * Copyright (C) 2008-2011, Red Hat, Inc., Peter Zijlstra | |
0793a61d | 7 | * |
57c0c15b | 8 | * Data type definitions, declarations, prototypes. |
0793a61d | 9 | * |
a308444c | 10 | * Started by: Thomas Gleixner and Ingo Molnar |
0793a61d | 11 | * |
57c0c15b | 12 | * For licencing details see kernel-base/COPYING |
0793a61d | 13 | */ |
cdd6c482 IM |
14 | #ifndef _LINUX_PERF_EVENT_H |
15 | #define _LINUX_PERF_EVENT_H | |
0793a61d | 16 | |
f3dfd265 PM |
17 | #include <linux/types.h> |
18 | #include <linux/ioctl.h> | |
9aaa131a | 19 | #include <asm/byteorder.h> |
0793a61d TG |
20 | |
21 | /* | |
9f66a381 IM |
22 | * User-space ABI bits: |
23 | */ | |
24 | ||
25 | /* | |
0d48696f | 26 | * attr.type |
0793a61d | 27 | */ |
1c432d89 | 28 | enum perf_type_id { |
a308444c IM |
29 | PERF_TYPE_HARDWARE = 0, |
30 | PERF_TYPE_SOFTWARE = 1, | |
31 | PERF_TYPE_TRACEPOINT = 2, | |
32 | PERF_TYPE_HW_CACHE = 3, | |
33 | PERF_TYPE_RAW = 4, | |
24f1e32c | 34 | PERF_TYPE_BREAKPOINT = 5, |
b8e83514 | 35 | |
a308444c | 36 | PERF_TYPE_MAX, /* non-ABI */ |
b8e83514 | 37 | }; |
6c594c21 | 38 | |
b8e83514 | 39 | /* |
cdd6c482 IM |
40 | * Generalized performance event event_id types, used by the |
41 | * attr.event_id parameter of the sys_perf_event_open() | |
a308444c | 42 | * syscall: |
b8e83514 | 43 | */ |
1c432d89 | 44 | enum perf_hw_id { |
9f66a381 | 45 | /* |
b8e83514 | 46 | * Common hardware events, generalized by the kernel: |
9f66a381 | 47 | */ |
f4dbfa8f PZ |
48 | PERF_COUNT_HW_CPU_CYCLES = 0, |
49 | PERF_COUNT_HW_INSTRUCTIONS = 1, | |
50 | PERF_COUNT_HW_CACHE_REFERENCES = 2, | |
51 | PERF_COUNT_HW_CACHE_MISSES = 3, | |
52 | PERF_COUNT_HW_BRANCH_INSTRUCTIONS = 4, | |
53 | PERF_COUNT_HW_BRANCH_MISSES = 5, | |
54 | PERF_COUNT_HW_BUS_CYCLES = 6, | |
8f622422 IM |
55 | PERF_COUNT_HW_STALLED_CYCLES_FRONTEND = 7, |
56 | PERF_COUNT_HW_STALLED_CYCLES_BACKEND = 8, | |
c37e1749 | 57 | PERF_COUNT_HW_REF_CPU_CYCLES = 9, |
f4dbfa8f | 58 | |
a308444c | 59 | PERF_COUNT_HW_MAX, /* non-ABI */ |
b8e83514 | 60 | }; |
e077df4f | 61 | |
8326f44d | 62 | /* |
cdd6c482 | 63 | * Generalized hardware cache events: |
8326f44d | 64 | * |
89d6c0b5 | 65 | * { L1-D, L1-I, LLC, ITLB, DTLB, BPU, NODE } x |
8326f44d IM |
66 | * { read, write, prefetch } x |
67 | * { accesses, misses } | |
68 | */ | |
1c432d89 | 69 | enum perf_hw_cache_id { |
a308444c IM |
70 | PERF_COUNT_HW_CACHE_L1D = 0, |
71 | PERF_COUNT_HW_CACHE_L1I = 1, | |
72 | PERF_COUNT_HW_CACHE_LL = 2, | |
73 | PERF_COUNT_HW_CACHE_DTLB = 3, | |
74 | PERF_COUNT_HW_CACHE_ITLB = 4, | |
75 | PERF_COUNT_HW_CACHE_BPU = 5, | |
89d6c0b5 | 76 | PERF_COUNT_HW_CACHE_NODE = 6, |
a308444c IM |
77 | |
78 | PERF_COUNT_HW_CACHE_MAX, /* non-ABI */ | |
8326f44d IM |
79 | }; |
80 | ||
1c432d89 | 81 | enum perf_hw_cache_op_id { |
a308444c IM |
82 | PERF_COUNT_HW_CACHE_OP_READ = 0, |
83 | PERF_COUNT_HW_CACHE_OP_WRITE = 1, | |
84 | PERF_COUNT_HW_CACHE_OP_PREFETCH = 2, | |
8326f44d | 85 | |
a308444c | 86 | PERF_COUNT_HW_CACHE_OP_MAX, /* non-ABI */ |
8326f44d IM |
87 | }; |
88 | ||
1c432d89 PZ |
89 | enum perf_hw_cache_op_result_id { |
90 | PERF_COUNT_HW_CACHE_RESULT_ACCESS = 0, | |
91 | PERF_COUNT_HW_CACHE_RESULT_MISS = 1, | |
8326f44d | 92 | |
a308444c | 93 | PERF_COUNT_HW_CACHE_RESULT_MAX, /* non-ABI */ |
8326f44d IM |
94 | }; |
95 | ||
b8e83514 | 96 | /* |
cdd6c482 IM |
97 | * Special "software" events provided by the kernel, even if the hardware |
98 | * does not support performance events. These events measure various | |
b8e83514 PZ |
99 | * physical and sw events of the kernel (and allow the profiling of them as |
100 | * well): | |
101 | */ | |
1c432d89 | 102 | enum perf_sw_ids { |
a308444c IM |
103 | PERF_COUNT_SW_CPU_CLOCK = 0, |
104 | PERF_COUNT_SW_TASK_CLOCK = 1, | |
105 | PERF_COUNT_SW_PAGE_FAULTS = 2, | |
106 | PERF_COUNT_SW_CONTEXT_SWITCHES = 3, | |
107 | PERF_COUNT_SW_CPU_MIGRATIONS = 4, | |
108 | PERF_COUNT_SW_PAGE_FAULTS_MIN = 5, | |
109 | PERF_COUNT_SW_PAGE_FAULTS_MAJ = 6, | |
f7d79860 AB |
110 | PERF_COUNT_SW_ALIGNMENT_FAULTS = 7, |
111 | PERF_COUNT_SW_EMULATION_FAULTS = 8, | |
a308444c IM |
112 | |
113 | PERF_COUNT_SW_MAX, /* non-ABI */ | |
0793a61d TG |
114 | }; |
115 | ||
8a057d84 | 116 | /* |
0d48696f | 117 | * Bits that can be set in attr.sample_type to request information |
8a057d84 PZ |
118 | * in the overflow packets. |
119 | */ | |
cdd6c482 | 120 | enum perf_event_sample_format { |
a308444c IM |
121 | PERF_SAMPLE_IP = 1U << 0, |
122 | PERF_SAMPLE_TID = 1U << 1, | |
123 | PERF_SAMPLE_TIME = 1U << 2, | |
124 | PERF_SAMPLE_ADDR = 1U << 3, | |
3dab77fb | 125 | PERF_SAMPLE_READ = 1U << 4, |
a308444c IM |
126 | PERF_SAMPLE_CALLCHAIN = 1U << 5, |
127 | PERF_SAMPLE_ID = 1U << 6, | |
128 | PERF_SAMPLE_CPU = 1U << 7, | |
129 | PERF_SAMPLE_PERIOD = 1U << 8, | |
7f453c24 | 130 | PERF_SAMPLE_STREAM_ID = 1U << 9, |
3a43ce68 | 131 | PERF_SAMPLE_RAW = 1U << 10, |
bce38cd5 | 132 | PERF_SAMPLE_BRANCH_STACK = 1U << 11, |
4018994f | 133 | PERF_SAMPLE_REGS_USER = 1U << 12, |
c5ebcedb | 134 | PERF_SAMPLE_STACK_USER = 1U << 13, |
974802ea | 135 | |
c5ebcedb | 136 | PERF_SAMPLE_MAX = 1U << 14, /* non-ABI */ |
8a057d84 PZ |
137 | }; |
138 | ||
bce38cd5 SE |
139 | /* |
140 | * values to program into branch_sample_type when PERF_SAMPLE_BRANCH is set | |
141 | * | |
142 | * If the user does not pass priv level information via branch_sample_type, | |
143 | * the kernel uses the event's priv level. Branch and event priv levels do | |
144 | * not have to match. Branch priv level is checked for permissions. | |
145 | * | |
146 | * The branch types can be combined, however BRANCH_ANY covers all types | |
147 | * of branches and therefore it supersedes all the other types. | |
148 | */ | |
149 | enum perf_branch_sample_type { | |
150 | PERF_SAMPLE_BRANCH_USER = 1U << 0, /* user branches */ | |
151 | PERF_SAMPLE_BRANCH_KERNEL = 1U << 1, /* kernel branches */ | |
152 | PERF_SAMPLE_BRANCH_HV = 1U << 2, /* hypervisor branches */ | |
153 | ||
154 | PERF_SAMPLE_BRANCH_ANY = 1U << 3, /* any branch types */ | |
155 | PERF_SAMPLE_BRANCH_ANY_CALL = 1U << 4, /* any call branch */ | |
156 | PERF_SAMPLE_BRANCH_ANY_RETURN = 1U << 5, /* any return branch */ | |
157 | PERF_SAMPLE_BRANCH_IND_CALL = 1U << 6, /* indirect calls */ | |
158 | ||
159 | PERF_SAMPLE_BRANCH_MAX = 1U << 7, /* non-ABI */ | |
160 | }; | |
161 | ||
162 | #define PERF_SAMPLE_BRANCH_PLM_ALL \ | |
163 | (PERF_SAMPLE_BRANCH_USER|\ | |
164 | PERF_SAMPLE_BRANCH_KERNEL|\ | |
165 | PERF_SAMPLE_BRANCH_HV) | |
166 | ||
4018994f JO |
167 | /* |
168 | * Values to determine ABI of the registers dump. | |
169 | */ | |
170 | enum perf_sample_regs_abi { | |
171 | PERF_SAMPLE_REGS_ABI_NONE = 0, | |
172 | PERF_SAMPLE_REGS_ABI_32 = 1, | |
173 | PERF_SAMPLE_REGS_ABI_64 = 2, | |
174 | }; | |
175 | ||
53cfbf59 | 176 | /* |
cdd6c482 | 177 | * The format of the data returned by read() on a perf event fd, |
3dab77fb PZ |
178 | * as specified by attr.read_format: |
179 | * | |
180 | * struct read_format { | |
57c0c15b | 181 | * { u64 value; |
d7ebe75b VW |
182 | * { u64 time_enabled; } && PERF_FORMAT_TOTAL_TIME_ENABLED |
183 | * { u64 time_running; } && PERF_FORMAT_TOTAL_TIME_RUNNING | |
57c0c15b IM |
184 | * { u64 id; } && PERF_FORMAT_ID |
185 | * } && !PERF_FORMAT_GROUP | |
3dab77fb | 186 | * |
57c0c15b | 187 | * { u64 nr; |
d7ebe75b VW |
188 | * { u64 time_enabled; } && PERF_FORMAT_TOTAL_TIME_ENABLED |
189 | * { u64 time_running; } && PERF_FORMAT_TOTAL_TIME_RUNNING | |
57c0c15b IM |
190 | * { u64 value; |
191 | * { u64 id; } && PERF_FORMAT_ID | |
192 | * } cntr[nr]; | |
193 | * } && PERF_FORMAT_GROUP | |
3dab77fb | 194 | * }; |
53cfbf59 | 195 | */ |
cdd6c482 | 196 | enum perf_event_read_format { |
a308444c IM |
197 | PERF_FORMAT_TOTAL_TIME_ENABLED = 1U << 0, |
198 | PERF_FORMAT_TOTAL_TIME_RUNNING = 1U << 1, | |
199 | PERF_FORMAT_ID = 1U << 2, | |
3dab77fb | 200 | PERF_FORMAT_GROUP = 1U << 3, |
974802ea | 201 | |
57c0c15b | 202 | PERF_FORMAT_MAX = 1U << 4, /* non-ABI */ |
53cfbf59 PM |
203 | }; |
204 | ||
974802ea | 205 | #define PERF_ATTR_SIZE_VER0 64 /* sizeof first published struct */ |
cb5d7699 SE |
206 | #define PERF_ATTR_SIZE_VER1 72 /* add: config2 */ |
207 | #define PERF_ATTR_SIZE_VER2 80 /* add: branch_sample_type */ | |
4018994f | 208 | #define PERF_ATTR_SIZE_VER3 88 /* add: sample_regs_user */ |
c5ebcedb | 209 | #define PERF_ATTR_SIZE_VER4 96 /* add: sample_stack_user */ |
974802ea | 210 | |
9f66a381 | 211 | /* |
cdd6c482 | 212 | * Hardware event_id to monitor via a performance monitoring event: |
9f66a381 | 213 | */ |
cdd6c482 | 214 | struct perf_event_attr { |
974802ea | 215 | |
f4a2deb4 | 216 | /* |
a21ca2ca IM |
217 | * Major type: hardware/software/tracepoint/etc. |
218 | */ | |
219 | __u32 type; | |
974802ea PZ |
220 | |
221 | /* | |
222 | * Size of the attr structure, for fwd/bwd compat. | |
223 | */ | |
224 | __u32 size; | |
a21ca2ca IM |
225 | |
226 | /* | |
227 | * Type specific configuration information. | |
f4a2deb4 PZ |
228 | */ |
229 | __u64 config; | |
9f66a381 | 230 | |
60db5e09 | 231 | union { |
b23f3325 PZ |
232 | __u64 sample_period; |
233 | __u64 sample_freq; | |
60db5e09 PZ |
234 | }; |
235 | ||
b23f3325 PZ |
236 | __u64 sample_type; |
237 | __u64 read_format; | |
9f66a381 | 238 | |
2743a5b0 | 239 | __u64 disabled : 1, /* off by default */ |
0475f9ea PM |
240 | inherit : 1, /* children inherit it */ |
241 | pinned : 1, /* must always be on PMU */ | |
242 | exclusive : 1, /* only group on PMU */ | |
243 | exclude_user : 1, /* don't count user */ | |
244 | exclude_kernel : 1, /* ditto kernel */ | |
245 | exclude_hv : 1, /* ditto hypervisor */ | |
2743a5b0 | 246 | exclude_idle : 1, /* don't count when idle */ |
0a4a9391 | 247 | mmap : 1, /* include mmap data */ |
8d1b2d93 | 248 | comm : 1, /* include comm data */ |
60db5e09 | 249 | freq : 1, /* use freq, not period */ |
bfbd3381 | 250 | inherit_stat : 1, /* per task counts */ |
57e7986e | 251 | enable_on_exec : 1, /* next exec enables */ |
9f498cc5 | 252 | task : 1, /* trace fork/exit */ |
2667de81 | 253 | watermark : 1, /* wakeup_watermark */ |
ab608344 PZ |
254 | /* |
255 | * precise_ip: | |
256 | * | |
257 | * 0 - SAMPLE_IP can have arbitrary skid | |
258 | * 1 - SAMPLE_IP must have constant skid | |
259 | * 2 - SAMPLE_IP requested to have 0 skid | |
260 | * 3 - SAMPLE_IP must have 0 skid | |
261 | * | |
262 | * See also PERF_RECORD_MISC_EXACT_IP | |
263 | */ | |
264 | precise_ip : 2, /* skid constraint */ | |
3af9e859 | 265 | mmap_data : 1, /* non-exec mmap data */ |
c980d109 | 266 | sample_id_all : 1, /* sample_type all events */ |
ab608344 | 267 | |
a240f761 JR |
268 | exclude_host : 1, /* don't count in host */ |
269 | exclude_guest : 1, /* don't count in guest */ | |
270 | ||
d0775264 FW |
271 | exclude_callchain_kernel : 1, /* exclude kernel callchains */ |
272 | exclude_callchain_user : 1, /* exclude user callchains */ | |
273 | ||
274 | __reserved_1 : 41; | |
2743a5b0 | 275 | |
2667de81 PZ |
276 | union { |
277 | __u32 wakeup_events; /* wakeup every n events */ | |
278 | __u32 wakeup_watermark; /* bytes before wakeup */ | |
279 | }; | |
24f1e32c | 280 | |
f13c12c6 | 281 | __u32 bp_type; |
a7e3ed1e AK |
282 | union { |
283 | __u64 bp_addr; | |
284 | __u64 config1; /* extension of config */ | |
285 | }; | |
286 | union { | |
287 | __u64 bp_len; | |
288 | __u64 config2; /* extension of config1 */ | |
289 | }; | |
4018994f JO |
290 | __u64 branch_sample_type; /* enum perf_branch_sample_type */ |
291 | ||
292 | /* | |
293 | * Defines set of user regs to dump on samples. | |
294 | * See asm/perf_regs.h for details. | |
295 | */ | |
296 | __u64 sample_regs_user; | |
c5ebcedb JO |
297 | |
298 | /* | |
299 | * Defines size of the user stack to dump on samples. | |
300 | */ | |
301 | __u32 sample_stack_user; | |
302 | ||
303 | /* Align to u64. */ | |
304 | __u32 __reserved_2; | |
eab656ae TG |
305 | }; |
306 | ||
d859e29f | 307 | /* |
cdd6c482 | 308 | * Ioctls that can be done on a perf event fd: |
d859e29f | 309 | */ |
cdd6c482 | 310 | #define PERF_EVENT_IOC_ENABLE _IO ('$', 0) |
57c0c15b IM |
311 | #define PERF_EVENT_IOC_DISABLE _IO ('$', 1) |
312 | #define PERF_EVENT_IOC_REFRESH _IO ('$', 2) | |
cdd6c482 | 313 | #define PERF_EVENT_IOC_RESET _IO ('$', 3) |
4c49b128 | 314 | #define PERF_EVENT_IOC_PERIOD _IOW('$', 4, __u64) |
cdd6c482 | 315 | #define PERF_EVENT_IOC_SET_OUTPUT _IO ('$', 5) |
6fb2915d | 316 | #define PERF_EVENT_IOC_SET_FILTER _IOW('$', 6, char *) |
cdd6c482 IM |
317 | |
318 | enum perf_event_ioc_flags { | |
3df5edad PZ |
319 | PERF_IOC_FLAG_GROUP = 1U << 0, |
320 | }; | |
d859e29f | 321 | |
37d81828 PM |
322 | /* |
323 | * Structure of the page that can be mapped via mmap | |
324 | */ | |
cdd6c482 | 325 | struct perf_event_mmap_page { |
37d81828 PM |
326 | __u32 version; /* version number of this structure */ |
327 | __u32 compat_version; /* lowest version this is compat with */ | |
38ff667b PZ |
328 | |
329 | /* | |
cdd6c482 | 330 | * Bits needed to read the hw events in user-space. |
38ff667b | 331 | * |
c7206205 PZ |
332 | * u32 seq, time_mult, time_shift, idx, width; |
333 | * u64 count, enabled, running; | |
334 | * u64 cyc, time_offset; | |
335 | * s64 pmc = 0; | |
38ff667b | 336 | * |
a2e87d06 PZ |
337 | * do { |
338 | * seq = pc->lock; | |
a2e87d06 | 339 | * barrier() |
c7206205 PZ |
340 | * |
341 | * enabled = pc->time_enabled; | |
342 | * running = pc->time_running; | |
343 | * | |
344 | * if (pc->cap_usr_time && enabled != running) { | |
345 | * cyc = rdtsc(); | |
346 | * time_offset = pc->time_offset; | |
347 | * time_mult = pc->time_mult; | |
348 | * time_shift = pc->time_shift; | |
349 | * } | |
350 | * | |
351 | * idx = pc->index; | |
352 | * count = pc->offset; | |
353 | * if (pc->cap_usr_rdpmc && idx) { | |
354 | * width = pc->pmc_width; | |
355 | * pmc = rdpmc(idx - 1); | |
356 | * } | |
38ff667b | 357 | * |
a2e87d06 PZ |
358 | * barrier(); |
359 | * } while (pc->lock != seq); | |
38ff667b | 360 | * |
92f22a38 PZ |
361 | * NOTE: for obvious reason this only works on self-monitoring |
362 | * processes. | |
38ff667b | 363 | */ |
37d81828 | 364 | __u32 lock; /* seqlock for synchronization */ |
cdd6c482 IM |
365 | __u32 index; /* hardware event identifier */ |
366 | __s64 offset; /* add to hardware event value */ | |
367 | __u64 time_enabled; /* time event active */ | |
368 | __u64 time_running; /* time event on cpu */ | |
c7206205 PZ |
369 | union { |
370 | __u64 capabilities; | |
371 | __u64 cap_usr_time : 1, | |
372 | cap_usr_rdpmc : 1, | |
373 | cap_____res : 62; | |
374 | }; | |
375 | ||
376 | /* | |
377 | * If cap_usr_rdpmc this field provides the bit-width of the value | |
378 | * read using the rdpmc() or equivalent instruction. This can be used | |
379 | * to sign extend the result like: | |
380 | * | |
381 | * pmc <<= 64 - width; | |
382 | * pmc >>= 64 - width; // signed shift right | |
383 | * count += pmc; | |
384 | */ | |
385 | __u16 pmc_width; | |
386 | ||
387 | /* | |
388 | * If cap_usr_time the below fields can be used to compute the time | |
389 | * delta since time_enabled (in ns) using rdtsc or similar. | |
390 | * | |
391 | * u64 quot, rem; | |
392 | * u64 delta; | |
393 | * | |
394 | * quot = (cyc >> time_shift); | |
395 | * rem = cyc & ((1 << time_shift) - 1); | |
396 | * delta = time_offset + quot * time_mult + | |
397 | * ((rem * time_mult) >> time_shift); | |
398 | * | |
399 | * Where time_offset,time_mult,time_shift and cyc are read in the | |
400 | * seqcount loop described above. This delta can then be added to | |
401 | * enabled and possible running (if idx), improving the scaling: | |
402 | * | |
403 | * enabled += delta; | |
404 | * if (idx) | |
405 | * running += delta; | |
406 | * | |
407 | * quot = count / running; | |
408 | * rem = count % running; | |
409 | * count = quot * enabled + (rem * enabled) / running; | |
410 | */ | |
411 | __u16 time_shift; | |
412 | __u32 time_mult; | |
e3f3541c | 413 | __u64 time_offset; |
7b732a75 | 414 | |
41f95331 PZ |
415 | /* |
416 | * Hole for extension of the self monitor capabilities | |
417 | */ | |
418 | ||
c7206205 | 419 | __u64 __reserved[120]; /* align to 1k */ |
41f95331 | 420 | |
38ff667b PZ |
421 | /* |
422 | * Control data for the mmap() data buffer. | |
423 | * | |
43a21ea8 PZ |
424 | * User-space reading the @data_head value should issue an rmb(), on |
425 | * SMP capable platforms, after reading this value -- see | |
cdd6c482 | 426 | * perf_event_wakeup(). |
43a21ea8 PZ |
427 | * |
428 | * When the mapping is PROT_WRITE the @data_tail value should be | |
429 | * written by userspace to reflect the last read data. In this case | |
430 | * the kernel will not over-write unread data. | |
38ff667b | 431 | */ |
8e3747c1 | 432 | __u64 data_head; /* head in the data section */ |
43a21ea8 | 433 | __u64 data_tail; /* user-space written tail */ |
37d81828 PM |
434 | }; |
435 | ||
39447b38 | 436 | #define PERF_RECORD_MISC_CPUMODE_MASK (7 << 0) |
184f412c | 437 | #define PERF_RECORD_MISC_CPUMODE_UNKNOWN (0 << 0) |
cdd6c482 IM |
438 | #define PERF_RECORD_MISC_KERNEL (1 << 0) |
439 | #define PERF_RECORD_MISC_USER (2 << 0) | |
440 | #define PERF_RECORD_MISC_HYPERVISOR (3 << 0) | |
39447b38 ZY |
441 | #define PERF_RECORD_MISC_GUEST_KERNEL (4 << 0) |
442 | #define PERF_RECORD_MISC_GUEST_USER (5 << 0) | |
6fab0192 | 443 | |
ab608344 PZ |
444 | /* |
445 | * Indicates that the content of PERF_SAMPLE_IP points to | |
446 | * the actual instruction that triggered the event. See also | |
447 | * perf_event_attr::precise_ip. | |
448 | */ | |
449 | #define PERF_RECORD_MISC_EXACT_IP (1 << 14) | |
ef21f683 PZ |
450 | /* |
451 | * Reserve the last bit to indicate some extended misc field | |
452 | */ | |
453 | #define PERF_RECORD_MISC_EXT_RESERVED (1 << 15) | |
454 | ||
5c148194 PZ |
455 | struct perf_event_header { |
456 | __u32 type; | |
6fab0192 PZ |
457 | __u16 misc; |
458 | __u16 size; | |
5c148194 PZ |
459 | }; |
460 | ||
461 | enum perf_event_type { | |
5ed00415 | 462 | |
0c593b34 | 463 | /* |
c980d109 ACM |
464 | * If perf_event_attr.sample_id_all is set then all event types will |
465 | * have the sample_type selected fields related to where/when | |
466 | * (identity) an event took place (TID, TIME, ID, CPU, STREAM_ID) | |
467 | * described in PERF_RECORD_SAMPLE below, it will be stashed just after | |
468 | * the perf_event_header and the fields already present for the existing | |
469 | * fields, i.e. at the end of the payload. That way a newer perf.data | |
470 | * file will be supported by older perf tools, with these new optional | |
471 | * fields being ignored. | |
472 | * | |
0c593b34 PZ |
473 | * The MMAP events record the PROT_EXEC mappings so that we can |
474 | * correlate userspace IPs to code. They have the following structure: | |
475 | * | |
476 | * struct { | |
0127c3ea | 477 | * struct perf_event_header header; |
0c593b34 | 478 | * |
0127c3ea IM |
479 | * u32 pid, tid; |
480 | * u64 addr; | |
481 | * u64 len; | |
482 | * u64 pgoff; | |
483 | * char filename[]; | |
0c593b34 PZ |
484 | * }; |
485 | */ | |
cdd6c482 | 486 | PERF_RECORD_MMAP = 1, |
0a4a9391 | 487 | |
43a21ea8 PZ |
488 | /* |
489 | * struct { | |
57c0c15b IM |
490 | * struct perf_event_header header; |
491 | * u64 id; | |
492 | * u64 lost; | |
43a21ea8 PZ |
493 | * }; |
494 | */ | |
cdd6c482 | 495 | PERF_RECORD_LOST = 2, |
43a21ea8 | 496 | |
8d1b2d93 PZ |
497 | /* |
498 | * struct { | |
0127c3ea | 499 | * struct perf_event_header header; |
8d1b2d93 | 500 | * |
0127c3ea IM |
501 | * u32 pid, tid; |
502 | * char comm[]; | |
8d1b2d93 PZ |
503 | * }; |
504 | */ | |
cdd6c482 | 505 | PERF_RECORD_COMM = 3, |
8d1b2d93 | 506 | |
9f498cc5 PZ |
507 | /* |
508 | * struct { | |
509 | * struct perf_event_header header; | |
510 | * u32 pid, ppid; | |
511 | * u32 tid, ptid; | |
393b2ad8 | 512 | * u64 time; |
9f498cc5 PZ |
513 | * }; |
514 | */ | |
cdd6c482 | 515 | PERF_RECORD_EXIT = 4, |
9f498cc5 | 516 | |
26b119bc PZ |
517 | /* |
518 | * struct { | |
0127c3ea IM |
519 | * struct perf_event_header header; |
520 | * u64 time; | |
689802b2 | 521 | * u64 id; |
7f453c24 | 522 | * u64 stream_id; |
a78ac325 PZ |
523 | * }; |
524 | */ | |
184f412c IM |
525 | PERF_RECORD_THROTTLE = 5, |
526 | PERF_RECORD_UNTHROTTLE = 6, | |
a78ac325 | 527 | |
60313ebe PZ |
528 | /* |
529 | * struct { | |
a21ca2ca IM |
530 | * struct perf_event_header header; |
531 | * u32 pid, ppid; | |
9f498cc5 | 532 | * u32 tid, ptid; |
a6f10a2f | 533 | * u64 time; |
60313ebe PZ |
534 | * }; |
535 | */ | |
cdd6c482 | 536 | PERF_RECORD_FORK = 7, |
60313ebe | 537 | |
38b200d6 PZ |
538 | /* |
539 | * struct { | |
184f412c IM |
540 | * struct perf_event_header header; |
541 | * u32 pid, tid; | |
3dab77fb | 542 | * |
184f412c | 543 | * struct read_format values; |
38b200d6 PZ |
544 | * }; |
545 | */ | |
cdd6c482 | 546 | PERF_RECORD_READ = 8, |
38b200d6 | 547 | |
8a057d84 | 548 | /* |
0c593b34 | 549 | * struct { |
0127c3ea | 550 | * struct perf_event_header header; |
0c593b34 | 551 | * |
43a21ea8 PZ |
552 | * { u64 ip; } && PERF_SAMPLE_IP |
553 | * { u32 pid, tid; } && PERF_SAMPLE_TID | |
554 | * { u64 time; } && PERF_SAMPLE_TIME | |
555 | * { u64 addr; } && PERF_SAMPLE_ADDR | |
e6e18ec7 | 556 | * { u64 id; } && PERF_SAMPLE_ID |
7f453c24 | 557 | * { u64 stream_id;} && PERF_SAMPLE_STREAM_ID |
43a21ea8 | 558 | * { u32 cpu, res; } && PERF_SAMPLE_CPU |
57c0c15b | 559 | * { u64 period; } && PERF_SAMPLE_PERIOD |
0c593b34 | 560 | * |
3dab77fb | 561 | * { struct read_format values; } && PERF_SAMPLE_READ |
0c593b34 | 562 | * |
f9188e02 | 563 | * { u64 nr, |
43a21ea8 | 564 | * u64 ips[nr]; } && PERF_SAMPLE_CALLCHAIN |
3dab77fb | 565 | * |
57c0c15b IM |
566 | * # |
567 | * # The RAW record below is opaque data wrt the ABI | |
568 | * # | |
569 | * # That is, the ABI doesn't make any promises wrt to | |
570 | * # the stability of its content, it may vary depending | |
571 | * # on event, hardware, kernel version and phase of | |
572 | * # the moon. | |
573 | * # | |
574 | * # In other words, PERF_SAMPLE_RAW contents are not an ABI. | |
575 | * # | |
3dab77fb | 576 | * |
a044560c PZ |
577 | * { u32 size; |
578 | * char data[size];}&& PERF_SAMPLE_RAW | |
bce38cd5 SE |
579 | * |
580 | * { u64 from, to, flags } lbr[nr];} && PERF_SAMPLE_BRANCH_STACK | |
4018994f JO |
581 | * |
582 | * { u64 abi; # enum perf_sample_regs_abi | |
583 | * u64 regs[weight(mask)]; } && PERF_SAMPLE_REGS_USER | |
c5ebcedb JO |
584 | * |
585 | * { u64 size; | |
586 | * char data[size]; | |
587 | * u64 dyn_size; } && PERF_SAMPLE_STACK_USER | |
0c593b34 | 588 | * }; |
8a057d84 | 589 | */ |
184f412c | 590 | PERF_RECORD_SAMPLE = 9, |
e6e18ec7 | 591 | |
cdd6c482 | 592 | PERF_RECORD_MAX, /* non-ABI */ |
5c148194 PZ |
593 | }; |
594 | ||
0b0d9cf6 | 595 | #define PERF_MAX_STACK_DEPTH 127 |
114067b6 | 596 | |
f9188e02 PZ |
597 | enum perf_callchain_context { |
598 | PERF_CONTEXT_HV = (__u64)-32, | |
599 | PERF_CONTEXT_KERNEL = (__u64)-128, | |
600 | PERF_CONTEXT_USER = (__u64)-512, | |
7522060c | 601 | |
f9188e02 PZ |
602 | PERF_CONTEXT_GUEST = (__u64)-2048, |
603 | PERF_CONTEXT_GUEST_KERNEL = (__u64)-2176, | |
604 | PERF_CONTEXT_GUEST_USER = (__u64)-2560, | |
605 | ||
606 | PERF_CONTEXT_MAX = (__u64)-4095, | |
7522060c IM |
607 | }; |
608 | ||
e7e7ee2e IM |
609 | #define PERF_FLAG_FD_NO_GROUP (1U << 0) |
610 | #define PERF_FLAG_FD_OUTPUT (1U << 1) | |
611 | #define PERF_FLAG_PID_CGROUP (1U << 2) /* pid=cgroup id, per-cpu mode only */ | |
a4be7c27 | 612 | |
f3dfd265 | 613 | #ifdef __KERNEL__ |
9f66a381 | 614 | /* |
f3dfd265 | 615 | * Kernel-internal data types and definitions: |
9f66a381 IM |
616 | */ |
617 | ||
cdd6c482 | 618 | #ifdef CONFIG_PERF_EVENTS |
e5d1367f | 619 | # include <linux/cgroup.h> |
cdd6c482 | 620 | # include <asm/perf_event.h> |
7be79236 | 621 | # include <asm/local64.h> |
f3dfd265 PM |
622 | #endif |
623 | ||
39447b38 | 624 | struct perf_guest_info_callbacks { |
e7e7ee2e IM |
625 | int (*is_in_guest)(void); |
626 | int (*is_user_mode)(void); | |
627 | unsigned long (*get_guest_ip)(void); | |
39447b38 ZY |
628 | }; |
629 | ||
2ff6cfd7 AB |
630 | #ifdef CONFIG_HAVE_HW_BREAKPOINT |
631 | #include <asm/hw_breakpoint.h> | |
632 | #endif | |
633 | ||
f3dfd265 PM |
634 | #include <linux/list.h> |
635 | #include <linux/mutex.h> | |
636 | #include <linux/rculist.h> | |
637 | #include <linux/rcupdate.h> | |
638 | #include <linux/spinlock.h> | |
d6d020e9 | 639 | #include <linux/hrtimer.h> |
3c446b3d | 640 | #include <linux/fs.h> |
709e50cf | 641 | #include <linux/pid_namespace.h> |
906010b2 | 642 | #include <linux/workqueue.h> |
5331d7b8 | 643 | #include <linux/ftrace.h> |
85cfabbc | 644 | #include <linux/cpu.h> |
e360adbe | 645 | #include <linux/irq_work.h> |
c5905afb | 646 | #include <linux/static_key.h> |
60063497 | 647 | #include <linux/atomic.h> |
641cc938 | 648 | #include <linux/sysfs.h> |
4018994f | 649 | #include <linux/perf_regs.h> |
fa588151 | 650 | #include <asm/local.h> |
f3dfd265 | 651 | |
f9188e02 PZ |
652 | struct perf_callchain_entry { |
653 | __u64 nr; | |
654 | __u64 ip[PERF_MAX_STACK_DEPTH]; | |
655 | }; | |
656 | ||
3a43ce68 FW |
657 | struct perf_raw_record { |
658 | u32 size; | |
659 | void *data; | |
f413cdb8 FW |
660 | }; |
661 | ||
bce38cd5 SE |
662 | /* |
663 | * single taken branch record layout: | |
664 | * | |
665 | * from: source instruction (may not always be a branch insn) | |
666 | * to: branch target | |
667 | * mispred: branch target was mispredicted | |
668 | * predicted: branch target was predicted | |
669 | * | |
670 | * support for mispred, predicted is optional. In case it | |
671 | * is not supported mispred = predicted = 0. | |
672 | */ | |
caff2bef | 673 | struct perf_branch_entry { |
bce38cd5 SE |
674 | __u64 from; |
675 | __u64 to; | |
676 | __u64 mispred:1, /* target mispredicted */ | |
677 | predicted:1,/* target predicted */ | |
678 | reserved:62; | |
caff2bef PZ |
679 | }; |
680 | ||
bce38cd5 SE |
681 | /* |
682 | * branch stack layout: | |
683 | * nr: number of taken branches stored in entries[] | |
684 | * | |
685 | * Note that nr can vary from sample to sample | |
686 | * branches (to, from) are stored from most recent | |
687 | * to least recent, i.e., entries[0] contains the most | |
688 | * recent branch. | |
689 | */ | |
caff2bef PZ |
690 | struct perf_branch_stack { |
691 | __u64 nr; | |
692 | struct perf_branch_entry entries[0]; | |
693 | }; | |
694 | ||
4018994f JO |
695 | struct perf_regs_user { |
696 | __u64 abi; | |
697 | struct pt_regs *regs; | |
698 | }; | |
699 | ||
f3dfd265 PM |
700 | struct task_struct; |
701 | ||
efc9f05d SE |
702 | /* |
703 | * extra PMU register associated with an event | |
704 | */ | |
705 | struct hw_perf_event_extra { | |
706 | u64 config; /* register value */ | |
707 | unsigned int reg; /* register address or index */ | |
708 | int alloc; /* extra register already allocated */ | |
709 | int idx; /* index in shared_regs->regs[] */ | |
710 | }; | |
711 | ||
0793a61d | 712 | /** |
cdd6c482 | 713 | * struct hw_perf_event - performance event hardware details: |
0793a61d | 714 | */ |
cdd6c482 IM |
715 | struct hw_perf_event { |
716 | #ifdef CONFIG_PERF_EVENTS | |
d6d020e9 PZ |
717 | union { |
718 | struct { /* hardware */ | |
a308444c | 719 | u64 config; |
447a194b | 720 | u64 last_tag; |
a308444c | 721 | unsigned long config_base; |
cdd6c482 | 722 | unsigned long event_base; |
c48b6053 | 723 | int event_base_rdpmc; |
a308444c | 724 | int idx; |
447a194b | 725 | int last_cpu; |
bce38cd5 | 726 | |
efc9f05d | 727 | struct hw_perf_event_extra extra_reg; |
bce38cd5 | 728 | struct hw_perf_event_extra branch_reg; |
d6d020e9 | 729 | }; |
721a669b | 730 | struct { /* software */ |
a308444c | 731 | struct hrtimer hrtimer; |
d6d020e9 | 732 | }; |
24f1e32c | 733 | #ifdef CONFIG_HAVE_HW_BREAKPOINT |
45a73372 FW |
734 | struct { /* breakpoint */ |
735 | struct arch_hw_breakpoint info; | |
736 | struct list_head bp_list; | |
d580ff86 PZ |
737 | /* |
738 | * Crufty hack to avoid the chicken and egg | |
739 | * problem hw_breakpoint has with context | |
740 | * creation and event initalization. | |
741 | */ | |
742 | struct task_struct *bp_target; | |
45a73372 | 743 | }; |
24f1e32c | 744 | #endif |
d6d020e9 | 745 | }; |
a4eaf7f1 | 746 | int state; |
e7850595 | 747 | local64_t prev_count; |
b23f3325 | 748 | u64 sample_period; |
9e350de3 | 749 | u64 last_period; |
e7850595 | 750 | local64_t period_left; |
e050e3f0 | 751 | u64 interrupts_seq; |
60db5e09 | 752 | u64 interrupts; |
6a24ed6c | 753 | |
abd50713 PZ |
754 | u64 freq_time_stamp; |
755 | u64 freq_count_stamp; | |
ee06094f | 756 | #endif |
0793a61d TG |
757 | }; |
758 | ||
a4eaf7f1 PZ |
759 | /* |
760 | * hw_perf_event::state flags | |
761 | */ | |
762 | #define PERF_HES_STOPPED 0x01 /* the counter is stopped */ | |
763 | #define PERF_HES_UPTODATE 0x02 /* event->count up-to-date */ | |
764 | #define PERF_HES_ARCH 0x04 | |
765 | ||
cdd6c482 | 766 | struct perf_event; |
621a01ea | 767 | |
8d2cacbb PZ |
768 | /* |
769 | * Common implementation detail of pmu::{start,commit,cancel}_txn | |
770 | */ | |
771 | #define PERF_EVENT_TXN 0x1 | |
6bde9b6c | 772 | |
621a01ea | 773 | /** |
4aeb0b42 | 774 | * struct pmu - generic performance monitoring unit |
621a01ea | 775 | */ |
4aeb0b42 | 776 | struct pmu { |
b0a873eb PZ |
777 | struct list_head entry; |
778 | ||
abe43400 | 779 | struct device *dev; |
0c9d42ed | 780 | const struct attribute_group **attr_groups; |
2e80a82a PZ |
781 | char *name; |
782 | int type; | |
783 | ||
108b02cf PZ |
784 | int * __percpu pmu_disable_count; |
785 | struct perf_cpu_context * __percpu pmu_cpu_context; | |
8dc85d54 | 786 | int task_ctx_nr; |
6bde9b6c LM |
787 | |
788 | /* | |
a4eaf7f1 PZ |
789 | * Fully disable/enable this PMU, can be used to protect from the PMI |
790 | * as well as for lazy/batch writing of the MSRs. | |
6bde9b6c | 791 | */ |
ad5133b7 PZ |
792 | void (*pmu_enable) (struct pmu *pmu); /* optional */ |
793 | void (*pmu_disable) (struct pmu *pmu); /* optional */ | |
6bde9b6c | 794 | |
8d2cacbb | 795 | /* |
a4eaf7f1 | 796 | * Try and initialize the event for this PMU. |
24cd7f54 | 797 | * Should return -ENOENT when the @event doesn't match this PMU. |
8d2cacbb | 798 | */ |
b0a873eb PZ |
799 | int (*event_init) (struct perf_event *event); |
800 | ||
a4eaf7f1 PZ |
801 | #define PERF_EF_START 0x01 /* start the counter when adding */ |
802 | #define PERF_EF_RELOAD 0x02 /* reload the counter when starting */ | |
803 | #define PERF_EF_UPDATE 0x04 /* update the counter when stopping */ | |
804 | ||
8d2cacbb | 805 | /* |
a4eaf7f1 PZ |
806 | * Adds/Removes a counter to/from the PMU, can be done inside |
807 | * a transaction, see the ->*_txn() methods. | |
808 | */ | |
809 | int (*add) (struct perf_event *event, int flags); | |
810 | void (*del) (struct perf_event *event, int flags); | |
811 | ||
812 | /* | |
813 | * Starts/Stops a counter present on the PMU. The PMI handler | |
814 | * should stop the counter when perf_event_overflow() returns | |
815 | * !0. ->start() will be used to continue. | |
816 | */ | |
817 | void (*start) (struct perf_event *event, int flags); | |
818 | void (*stop) (struct perf_event *event, int flags); | |
819 | ||
820 | /* | |
821 | * Updates the counter value of the event. | |
822 | */ | |
cdd6c482 | 823 | void (*read) (struct perf_event *event); |
6bde9b6c LM |
824 | |
825 | /* | |
24cd7f54 PZ |
826 | * Group events scheduling is treated as a transaction, add |
827 | * group events as a whole and perform one schedulability test. | |
828 | * If the test fails, roll back the whole group | |
a4eaf7f1 PZ |
829 | * |
830 | * Start the transaction, after this ->add() doesn't need to | |
24cd7f54 | 831 | * do schedulability tests. |
8d2cacbb | 832 | */ |
e7e7ee2e | 833 | void (*start_txn) (struct pmu *pmu); /* optional */ |
8d2cacbb | 834 | /* |
a4eaf7f1 | 835 | * If ->start_txn() disabled the ->add() schedulability test |
8d2cacbb PZ |
836 | * then ->commit_txn() is required to perform one. On success |
837 | * the transaction is closed. On error the transaction is kept | |
838 | * open until ->cancel_txn() is called. | |
839 | */ | |
e7e7ee2e | 840 | int (*commit_txn) (struct pmu *pmu); /* optional */ |
8d2cacbb | 841 | /* |
a4eaf7f1 | 842 | * Will cancel the transaction, assumes ->del() is called |
25985edc | 843 | * for each successful ->add() during the transaction. |
8d2cacbb | 844 | */ |
e7e7ee2e | 845 | void (*cancel_txn) (struct pmu *pmu); /* optional */ |
35edc2a5 PZ |
846 | |
847 | /* | |
848 | * Will return the value for perf_event_mmap_page::index for this event, | |
849 | * if no implementation is provided it will default to: event->hw.idx + 1. | |
850 | */ | |
851 | int (*event_idx) (struct perf_event *event); /*optional */ | |
d010b332 SE |
852 | |
853 | /* | |
854 | * flush branch stack on context-switches (needed in cpu-wide mode) | |
855 | */ | |
856 | void (*flush_branch_stack) (void); | |
621a01ea IM |
857 | }; |
858 | ||
6a930700 | 859 | /** |
cdd6c482 | 860 | * enum perf_event_active_state - the states of a event |
6a930700 | 861 | */ |
cdd6c482 | 862 | enum perf_event_active_state { |
57c0c15b | 863 | PERF_EVENT_STATE_ERROR = -2, |
cdd6c482 IM |
864 | PERF_EVENT_STATE_OFF = -1, |
865 | PERF_EVENT_STATE_INACTIVE = 0, | |
57c0c15b | 866 | PERF_EVENT_STATE_ACTIVE = 1, |
6a930700 IM |
867 | }; |
868 | ||
9b51f66d | 869 | struct file; |
453f19ee PZ |
870 | struct perf_sample_data; |
871 | ||
a8b0ca17 | 872 | typedef void (*perf_overflow_handler_t)(struct perf_event *, |
b326e956 FW |
873 | struct perf_sample_data *, |
874 | struct pt_regs *regs); | |
875 | ||
d6f962b5 | 876 | enum perf_group_flag { |
e7e7ee2e | 877 | PERF_GROUP_SOFTWARE = 0x1, |
d6f962b5 FW |
878 | }; |
879 | ||
e7e7ee2e IM |
880 | #define SWEVENT_HLIST_BITS 8 |
881 | #define SWEVENT_HLIST_SIZE (1 << SWEVENT_HLIST_BITS) | |
76e1d904 FW |
882 | |
883 | struct swevent_hlist { | |
e7e7ee2e IM |
884 | struct hlist_head heads[SWEVENT_HLIST_SIZE]; |
885 | struct rcu_head rcu_head; | |
76e1d904 FW |
886 | }; |
887 | ||
8a49542c PZ |
888 | #define PERF_ATTACH_CONTEXT 0x01 |
889 | #define PERF_ATTACH_GROUP 0x02 | |
d580ff86 | 890 | #define PERF_ATTACH_TASK 0x04 |
8a49542c | 891 | |
e5d1367f SE |
892 | #ifdef CONFIG_CGROUP_PERF |
893 | /* | |
894 | * perf_cgroup_info keeps track of time_enabled for a cgroup. | |
895 | * This is a per-cpu dynamically allocated data structure. | |
896 | */ | |
897 | struct perf_cgroup_info { | |
e7e7ee2e IM |
898 | u64 time; |
899 | u64 timestamp; | |
e5d1367f SE |
900 | }; |
901 | ||
902 | struct perf_cgroup { | |
e7e7ee2e IM |
903 | struct cgroup_subsys_state css; |
904 | struct perf_cgroup_info *info; /* timing info, one per cpu */ | |
e5d1367f SE |
905 | }; |
906 | #endif | |
907 | ||
76369139 FW |
908 | struct ring_buffer; |
909 | ||
0793a61d | 910 | /** |
cdd6c482 | 911 | * struct perf_event - performance event kernel representation: |
0793a61d | 912 | */ |
cdd6c482 IM |
913 | struct perf_event { |
914 | #ifdef CONFIG_PERF_EVENTS | |
65abc865 | 915 | struct list_head group_entry; |
592903cd | 916 | struct list_head event_entry; |
04289bb9 | 917 | struct list_head sibling_list; |
76e1d904 | 918 | struct hlist_node hlist_entry; |
0127c3ea | 919 | int nr_siblings; |
d6f962b5 | 920 | int group_flags; |
cdd6c482 | 921 | struct perf_event *group_leader; |
a4eaf7f1 | 922 | struct pmu *pmu; |
04289bb9 | 923 | |
cdd6c482 | 924 | enum perf_event_active_state state; |
8a49542c | 925 | unsigned int attach_state; |
e7850595 | 926 | local64_t count; |
a6e6dea6 | 927 | atomic64_t child_count; |
ee06094f | 928 | |
53cfbf59 | 929 | /* |
cdd6c482 | 930 | * These are the total time in nanoseconds that the event |
53cfbf59 | 931 | * has been enabled (i.e. eligible to run, and the task has |
cdd6c482 | 932 | * been scheduled in, if this is a per-task event) |
53cfbf59 PM |
933 | * and running (scheduled onto the CPU), respectively. |
934 | * | |
935 | * They are computed from tstamp_enabled, tstamp_running and | |
cdd6c482 | 936 | * tstamp_stopped when the event is in INACTIVE or ACTIVE state. |
53cfbf59 PM |
937 | */ |
938 | u64 total_time_enabled; | |
939 | u64 total_time_running; | |
940 | ||
941 | /* | |
942 | * These are timestamps used for computing total_time_enabled | |
cdd6c482 | 943 | * and total_time_running when the event is in INACTIVE or |
53cfbf59 PM |
944 | * ACTIVE state, measured in nanoseconds from an arbitrary point |
945 | * in time. | |
cdd6c482 IM |
946 | * tstamp_enabled: the notional time when the event was enabled |
947 | * tstamp_running: the notional time when the event was scheduled on | |
53cfbf59 | 948 | * tstamp_stopped: in INACTIVE state, the notional time when the |
cdd6c482 | 949 | * event was scheduled off. |
53cfbf59 PM |
950 | */ |
951 | u64 tstamp_enabled; | |
952 | u64 tstamp_running; | |
953 | u64 tstamp_stopped; | |
954 | ||
eed01528 SE |
955 | /* |
956 | * timestamp shadows the actual context timing but it can | |
957 | * be safely used in NMI interrupt context. It reflects the | |
958 | * context time as it was when the event was last scheduled in. | |
959 | * | |
960 | * ctx_time already accounts for ctx->timestamp. Therefore to | |
961 | * compute ctx_time for a sample, simply add perf_clock(). | |
962 | */ | |
963 | u64 shadow_ctx_time; | |
964 | ||
24f1e32c | 965 | struct perf_event_attr attr; |
c320c7b7 | 966 | u16 header_size; |
6844c09d | 967 | u16 id_header_size; |
c320c7b7 | 968 | u16 read_size; |
cdd6c482 | 969 | struct hw_perf_event hw; |
0793a61d | 970 | |
cdd6c482 | 971 | struct perf_event_context *ctx; |
9b51f66d | 972 | struct file *filp; |
0793a61d | 973 | |
53cfbf59 PM |
974 | /* |
975 | * These accumulate total time (in nanoseconds) that children | |
cdd6c482 | 976 | * events have been enabled and running, respectively. |
53cfbf59 PM |
977 | */ |
978 | atomic64_t child_total_time_enabled; | |
979 | atomic64_t child_total_time_running; | |
980 | ||
0793a61d | 981 | /* |
d859e29f | 982 | * Protect attach/detach and child_list: |
0793a61d | 983 | */ |
fccc714b PZ |
984 | struct mutex child_mutex; |
985 | struct list_head child_list; | |
cdd6c482 | 986 | struct perf_event *parent; |
0793a61d TG |
987 | |
988 | int oncpu; | |
989 | int cpu; | |
990 | ||
082ff5a2 PZ |
991 | struct list_head owner_entry; |
992 | struct task_struct *owner; | |
993 | ||
7b732a75 PZ |
994 | /* mmap bits */ |
995 | struct mutex mmap_mutex; | |
996 | atomic_t mmap_count; | |
ac9721f3 PZ |
997 | int mmap_locked; |
998 | struct user_struct *mmap_user; | |
76369139 | 999 | struct ring_buffer *rb; |
10c6db11 | 1000 | struct list_head rb_entry; |
37d81828 | 1001 | |
7b732a75 | 1002 | /* poll related */ |
0793a61d | 1003 | wait_queue_head_t waitq; |
3c446b3d | 1004 | struct fasync_struct *fasync; |
79f14641 PZ |
1005 | |
1006 | /* delayed work for NMIs and such */ | |
1007 | int pending_wakeup; | |
4c9e2542 | 1008 | int pending_kill; |
79f14641 | 1009 | int pending_disable; |
e360adbe | 1010 | struct irq_work pending; |
592903cd | 1011 | |
79f14641 PZ |
1012 | atomic_t event_limit; |
1013 | ||
cdd6c482 | 1014 | void (*destroy)(struct perf_event *); |
592903cd | 1015 | struct rcu_head rcu_head; |
709e50cf PZ |
1016 | |
1017 | struct pid_namespace *ns; | |
8e5799b1 | 1018 | u64 id; |
6fb2915d | 1019 | |
b326e956 | 1020 | perf_overflow_handler_t overflow_handler; |
4dc0da86 | 1021 | void *overflow_handler_context; |
453f19ee | 1022 | |
07b139c8 | 1023 | #ifdef CONFIG_EVENT_TRACING |
1c024eca | 1024 | struct ftrace_event_call *tp_event; |
6fb2915d | 1025 | struct event_filter *filter; |
ced39002 JO |
1026 | #ifdef CONFIG_FUNCTION_TRACER |
1027 | struct ftrace_ops ftrace_ops; | |
1028 | #endif | |
ee06094f | 1029 | #endif |
6fb2915d | 1030 | |
e5d1367f SE |
1031 | #ifdef CONFIG_CGROUP_PERF |
1032 | struct perf_cgroup *cgrp; /* cgroup event is attach to */ | |
1033 | int cgrp_defer_enabled; | |
1034 | #endif | |
1035 | ||
6fb2915d | 1036 | #endif /* CONFIG_PERF_EVENTS */ |
0793a61d TG |
1037 | }; |
1038 | ||
b04243ef PZ |
1039 | enum perf_event_context_type { |
1040 | task_context, | |
1041 | cpu_context, | |
1042 | }; | |
1043 | ||
0793a61d | 1044 | /** |
cdd6c482 | 1045 | * struct perf_event_context - event context structure |
0793a61d | 1046 | * |
cdd6c482 | 1047 | * Used as a container for task events and CPU events as well: |
0793a61d | 1048 | */ |
cdd6c482 | 1049 | struct perf_event_context { |
108b02cf | 1050 | struct pmu *pmu; |
ee643c41 | 1051 | enum perf_event_context_type type; |
0793a61d | 1052 | /* |
cdd6c482 | 1053 | * Protect the states of the events in the list, |
d859e29f | 1054 | * nr_active, and the list: |
0793a61d | 1055 | */ |
e625cce1 | 1056 | raw_spinlock_t lock; |
d859e29f | 1057 | /* |
cdd6c482 | 1058 | * Protect the list of events. Locking either mutex or lock |
d859e29f PM |
1059 | * is sufficient to ensure the list doesn't change; to change |
1060 | * the list you need to lock both the mutex and the spinlock. | |
1061 | */ | |
a308444c | 1062 | struct mutex mutex; |
04289bb9 | 1063 | |
889ff015 FW |
1064 | struct list_head pinned_groups; |
1065 | struct list_head flexible_groups; | |
a308444c | 1066 | struct list_head event_list; |
cdd6c482 | 1067 | int nr_events; |
a308444c IM |
1068 | int nr_active; |
1069 | int is_active; | |
bfbd3381 | 1070 | int nr_stat; |
0f5a2601 | 1071 | int nr_freq; |
dddd3379 | 1072 | int rotate_disable; |
a308444c IM |
1073 | atomic_t refcount; |
1074 | struct task_struct *task; | |
53cfbf59 PM |
1075 | |
1076 | /* | |
4af4998b | 1077 | * Context clock, runs when context enabled. |
53cfbf59 | 1078 | */ |
a308444c IM |
1079 | u64 time; |
1080 | u64 timestamp; | |
564c2b21 PM |
1081 | |
1082 | /* | |
1083 | * These fields let us detect when two contexts have both | |
1084 | * been cloned (inherited) from a common ancestor. | |
1085 | */ | |
cdd6c482 | 1086 | struct perf_event_context *parent_ctx; |
a308444c IM |
1087 | u64 parent_gen; |
1088 | u64 generation; | |
1089 | int pin_count; | |
d010b332 SE |
1090 | int nr_cgroups; /* cgroup evts */ |
1091 | int nr_branch_stack; /* branch_stack evt */ | |
28009ce4 | 1092 | struct rcu_head rcu_head; |
0793a61d TG |
1093 | }; |
1094 | ||
7ae07ea3 FW |
1095 | /* |
1096 | * Number of contexts where an event can trigger: | |
e7e7ee2e | 1097 | * task, softirq, hardirq, nmi. |
7ae07ea3 FW |
1098 | */ |
1099 | #define PERF_NR_CONTEXTS 4 | |
1100 | ||
0793a61d | 1101 | /** |
cdd6c482 | 1102 | * struct perf_event_cpu_context - per cpu event context structure |
0793a61d TG |
1103 | */ |
1104 | struct perf_cpu_context { | |
cdd6c482 IM |
1105 | struct perf_event_context ctx; |
1106 | struct perf_event_context *task_ctx; | |
0793a61d | 1107 | int active_oncpu; |
3b6f9e5c | 1108 | int exclusive; |
e9d2b064 PZ |
1109 | struct list_head rotation_list; |
1110 | int jiffies_interval; | |
51676957 | 1111 | struct pmu *active_pmu; |
e5d1367f | 1112 | struct perf_cgroup *cgrp; |
0793a61d TG |
1113 | }; |
1114 | ||
5622f295 | 1115 | struct perf_output_handle { |
57c0c15b | 1116 | struct perf_event *event; |
76369139 | 1117 | struct ring_buffer *rb; |
6d1acfd5 | 1118 | unsigned long wakeup; |
5d967a8b PZ |
1119 | unsigned long size; |
1120 | void *addr; | |
1121 | int page; | |
5622f295 MM |
1122 | }; |
1123 | ||
cdd6c482 | 1124 | #ifdef CONFIG_PERF_EVENTS |
829b42dd | 1125 | |
2e80a82a | 1126 | extern int perf_pmu_register(struct pmu *pmu, char *name, int type); |
b0a873eb | 1127 | extern void perf_pmu_unregister(struct pmu *pmu); |
621a01ea | 1128 | |
3bf101ba | 1129 | extern int perf_num_counters(void); |
84c79910 | 1130 | extern const char *perf_pmu_name(void); |
ab0cce56 JO |
1131 | extern void __perf_event_task_sched_in(struct task_struct *prev, |
1132 | struct task_struct *task); | |
1133 | extern void __perf_event_task_sched_out(struct task_struct *prev, | |
1134 | struct task_struct *next); | |
cdd6c482 IM |
1135 | extern int perf_event_init_task(struct task_struct *child); |
1136 | extern void perf_event_exit_task(struct task_struct *child); | |
1137 | extern void perf_event_free_task(struct task_struct *task); | |
4e231c79 | 1138 | extern void perf_event_delayed_put(struct task_struct *task); |
cdd6c482 | 1139 | extern void perf_event_print_debug(void); |
33696fc0 PZ |
1140 | extern void perf_pmu_disable(struct pmu *pmu); |
1141 | extern void perf_pmu_enable(struct pmu *pmu); | |
cdd6c482 IM |
1142 | extern int perf_event_task_disable(void); |
1143 | extern int perf_event_task_enable(void); | |
26ca5c11 | 1144 | extern int perf_event_refresh(struct perf_event *event, int refresh); |
cdd6c482 | 1145 | extern void perf_event_update_userpage(struct perf_event *event); |
fb0459d7 AV |
1146 | extern int perf_event_release_kernel(struct perf_event *event); |
1147 | extern struct perf_event * | |
1148 | perf_event_create_kernel_counter(struct perf_event_attr *attr, | |
1149 | int cpu, | |
38a81da2 | 1150 | struct task_struct *task, |
4dc0da86 AK |
1151 | perf_overflow_handler_t callback, |
1152 | void *context); | |
0cda4c02 YZ |
1153 | extern void perf_pmu_migrate_context(struct pmu *pmu, |
1154 | int src_cpu, int dst_cpu); | |
59ed446f PZ |
1155 | extern u64 perf_event_read_value(struct perf_event *event, |
1156 | u64 *enabled, u64 *running); | |
5c92d124 | 1157 | |
d010b332 | 1158 | |
df1a132b | 1159 | struct perf_sample_data { |
5622f295 MM |
1160 | u64 type; |
1161 | ||
1162 | u64 ip; | |
1163 | struct { | |
1164 | u32 pid; | |
1165 | u32 tid; | |
1166 | } tid_entry; | |
1167 | u64 time; | |
a308444c | 1168 | u64 addr; |
5622f295 MM |
1169 | u64 id; |
1170 | u64 stream_id; | |
1171 | struct { | |
1172 | u32 cpu; | |
1173 | u32 reserved; | |
1174 | } cpu_entry; | |
a308444c | 1175 | u64 period; |
5622f295 | 1176 | struct perf_callchain_entry *callchain; |
3a43ce68 | 1177 | struct perf_raw_record *raw; |
bce38cd5 | 1178 | struct perf_branch_stack *br_stack; |
4018994f | 1179 | struct perf_regs_user regs_user; |
c5ebcedb | 1180 | u64 stack_user_size; |
df1a132b PZ |
1181 | }; |
1182 | ||
fd0d000b RR |
1183 | static inline void perf_sample_data_init(struct perf_sample_data *data, |
1184 | u64 addr, u64 period) | |
dc1d628a | 1185 | { |
fd0d000b | 1186 | /* remaining struct members initialized in perf_prepare_sample() */ |
dc1d628a PZ |
1187 | data->addr = addr; |
1188 | data->raw = NULL; | |
bce38cd5 | 1189 | data->br_stack = NULL; |
4018994f JO |
1190 | data->period = period; |
1191 | data->regs_user.abi = PERF_SAMPLE_REGS_ABI_NONE; | |
1192 | data->regs_user.regs = NULL; | |
c5ebcedb | 1193 | data->stack_user_size = 0; |
dc1d628a PZ |
1194 | } |
1195 | ||
5622f295 MM |
1196 | extern void perf_output_sample(struct perf_output_handle *handle, |
1197 | struct perf_event_header *header, | |
1198 | struct perf_sample_data *data, | |
cdd6c482 | 1199 | struct perf_event *event); |
5622f295 MM |
1200 | extern void perf_prepare_sample(struct perf_event_header *header, |
1201 | struct perf_sample_data *data, | |
cdd6c482 | 1202 | struct perf_event *event, |
5622f295 MM |
1203 | struct pt_regs *regs); |
1204 | ||
a8b0ca17 | 1205 | extern int perf_event_overflow(struct perf_event *event, |
5622f295 MM |
1206 | struct perf_sample_data *data, |
1207 | struct pt_regs *regs); | |
df1a132b | 1208 | |
6c7e550f FBH |
1209 | static inline bool is_sampling_event(struct perf_event *event) |
1210 | { | |
1211 | return event->attr.sample_period != 0; | |
1212 | } | |
1213 | ||
3b6f9e5c | 1214 | /* |
cdd6c482 | 1215 | * Return 1 for a software event, 0 for a hardware event |
3b6f9e5c | 1216 | */ |
cdd6c482 | 1217 | static inline int is_software_event(struct perf_event *event) |
3b6f9e5c | 1218 | { |
89a1e187 | 1219 | return event->pmu->task_ctx_nr == perf_sw_context; |
3b6f9e5c PM |
1220 | } |
1221 | ||
c5905afb | 1222 | extern struct static_key perf_swevent_enabled[PERF_COUNT_SW_MAX]; |
f29ac756 | 1223 | |
a8b0ca17 | 1224 | extern void __perf_sw_event(u32, u64, struct pt_regs *, u64); |
f29ac756 | 1225 | |
b0f82b81 | 1226 | #ifndef perf_arch_fetch_caller_regs |
e7e7ee2e | 1227 | static inline void perf_arch_fetch_caller_regs(struct pt_regs *regs, unsigned long ip) { } |
b0f82b81 | 1228 | #endif |
5331d7b8 FW |
1229 | |
1230 | /* | |
1231 | * Take a snapshot of the regs. Skip ip and frame pointer to | |
1232 | * the nth caller. We only need a few of the regs: | |
1233 | * - ip for PERF_SAMPLE_IP | |
1234 | * - cs for user_mode() tests | |
1235 | * - bp for callchains | |
1236 | * - eflags, for future purposes, just in case | |
1237 | */ | |
b0f82b81 | 1238 | static inline void perf_fetch_caller_regs(struct pt_regs *regs) |
5331d7b8 | 1239 | { |
5331d7b8 FW |
1240 | memset(regs, 0, sizeof(*regs)); |
1241 | ||
b0f82b81 | 1242 | perf_arch_fetch_caller_regs(regs, CALLER_ADDR0); |
5331d7b8 FW |
1243 | } |
1244 | ||
7e54a5a0 | 1245 | static __always_inline void |
a8b0ca17 | 1246 | perf_sw_event(u32 event_id, u64 nr, struct pt_regs *regs, u64 addr) |
e49a5bd3 | 1247 | { |
7e54a5a0 PZ |
1248 | struct pt_regs hot_regs; |
1249 | ||
c5905afb | 1250 | if (static_key_false(&perf_swevent_enabled[event_id])) { |
d430d3d7 JB |
1251 | if (!regs) { |
1252 | perf_fetch_caller_regs(&hot_regs); | |
1253 | regs = &hot_regs; | |
1254 | } | |
a8b0ca17 | 1255 | __perf_sw_event(event_id, nr, regs, addr); |
e49a5bd3 FW |
1256 | } |
1257 | } | |
1258 | ||
c5905afb | 1259 | extern struct static_key_deferred perf_sched_events; |
ee6dcfa4 | 1260 | |
ab0cce56 | 1261 | static inline void perf_event_task_sched_in(struct task_struct *prev, |
a8d757ef | 1262 | struct task_struct *task) |
ab0cce56 JO |
1263 | { |
1264 | if (static_key_false(&perf_sched_events.key)) | |
1265 | __perf_event_task_sched_in(prev, task); | |
1266 | } | |
1267 | ||
1268 | static inline void perf_event_task_sched_out(struct task_struct *prev, | |
1269 | struct task_struct *next) | |
ee6dcfa4 | 1270 | { |
a8b0ca17 | 1271 | perf_sw_event(PERF_COUNT_SW_CONTEXT_SWITCHES, 1, NULL, 0); |
ee6dcfa4 | 1272 | |
c5905afb | 1273 | if (static_key_false(&perf_sched_events.key)) |
ab0cce56 | 1274 | __perf_event_task_sched_out(prev, next); |
ee6dcfa4 PZ |
1275 | } |
1276 | ||
3af9e859 | 1277 | extern void perf_event_mmap(struct vm_area_struct *vma); |
39447b38 | 1278 | extern struct perf_guest_info_callbacks *perf_guest_cbs; |
dcf46b94 ZY |
1279 | extern int perf_register_guest_info_callbacks(struct perf_guest_info_callbacks *callbacks); |
1280 | extern int perf_unregister_guest_info_callbacks(struct perf_guest_info_callbacks *callbacks); | |
39447b38 | 1281 | |
cdd6c482 IM |
1282 | extern void perf_event_comm(struct task_struct *tsk); |
1283 | extern void perf_event_fork(struct task_struct *tsk); | |
8d1b2d93 | 1284 | |
56962b44 FW |
1285 | /* Callchains */ |
1286 | DECLARE_PER_CPU(struct perf_callchain_entry, perf_callchain_entry); | |
1287 | ||
e7e7ee2e IM |
1288 | extern void perf_callchain_user(struct perf_callchain_entry *entry, struct pt_regs *regs); |
1289 | extern void perf_callchain_kernel(struct perf_callchain_entry *entry, struct pt_regs *regs); | |
394ee076 | 1290 | |
e7e7ee2e | 1291 | static inline void perf_callchain_store(struct perf_callchain_entry *entry, u64 ip) |
70791ce9 FW |
1292 | { |
1293 | if (entry->nr < PERF_MAX_STACK_DEPTH) | |
1294 | entry->ip[entry->nr++] = ip; | |
1295 | } | |
394ee076 | 1296 | |
cdd6c482 IM |
1297 | extern int sysctl_perf_event_paranoid; |
1298 | extern int sysctl_perf_event_mlock; | |
1299 | extern int sysctl_perf_event_sample_rate; | |
1ccd1549 | 1300 | |
163ec435 PZ |
1301 | extern int perf_proc_update_handler(struct ctl_table *table, int write, |
1302 | void __user *buffer, size_t *lenp, | |
1303 | loff_t *ppos); | |
1304 | ||
320ebf09 PZ |
1305 | static inline bool perf_paranoid_tracepoint_raw(void) |
1306 | { | |
1307 | return sysctl_perf_event_paranoid > -1; | |
1308 | } | |
1309 | ||
1310 | static inline bool perf_paranoid_cpu(void) | |
1311 | { | |
1312 | return sysctl_perf_event_paranoid > 0; | |
1313 | } | |
1314 | ||
1315 | static inline bool perf_paranoid_kernel(void) | |
1316 | { | |
1317 | return sysctl_perf_event_paranoid > 1; | |
1318 | } | |
1319 | ||
cdd6c482 | 1320 | extern void perf_event_init(void); |
1c024eca PZ |
1321 | extern void perf_tp_event(u64 addr, u64 count, void *record, |
1322 | int entry_size, struct pt_regs *regs, | |
e6dab5ff AV |
1323 | struct hlist_head *head, int rctx, |
1324 | struct task_struct *task); | |
24f1e32c | 1325 | extern void perf_bp_event(struct perf_event *event, void *data); |
0d905bca | 1326 | |
9d23a90a | 1327 | #ifndef perf_misc_flags |
e7e7ee2e IM |
1328 | # define perf_misc_flags(regs) \ |
1329 | (user_mode(regs) ? PERF_RECORD_MISC_USER : PERF_RECORD_MISC_KERNEL) | |
1330 | # define perf_instruction_pointer(regs) instruction_pointer(regs) | |
9d23a90a PM |
1331 | #endif |
1332 | ||
bce38cd5 SE |
1333 | static inline bool has_branch_stack(struct perf_event *event) |
1334 | { | |
1335 | return event->attr.sample_type & PERF_SAMPLE_BRANCH_STACK; | |
1336 | } | |
1337 | ||
5622f295 | 1338 | extern int perf_output_begin(struct perf_output_handle *handle, |
a7ac67ea | 1339 | struct perf_event *event, unsigned int size); |
5622f295 | 1340 | extern void perf_output_end(struct perf_output_handle *handle); |
91d7753a | 1341 | extern unsigned int perf_output_copy(struct perf_output_handle *handle, |
5622f295 | 1342 | const void *buf, unsigned int len); |
5685e0ff JO |
1343 | extern unsigned int perf_output_skip(struct perf_output_handle *handle, |
1344 | unsigned int len); | |
4ed7c92d PZ |
1345 | extern int perf_swevent_get_recursion_context(void); |
1346 | extern void perf_swevent_put_recursion_context(int rctx); | |
44234adc FW |
1347 | extern void perf_event_enable(struct perf_event *event); |
1348 | extern void perf_event_disable(struct perf_event *event); | |
e9d2b064 | 1349 | extern void perf_event_task_tick(void); |
0793a61d TG |
1350 | #else |
1351 | static inline void | |
ab0cce56 JO |
1352 | perf_event_task_sched_in(struct task_struct *prev, |
1353 | struct task_struct *task) { } | |
1354 | static inline void | |
1355 | perf_event_task_sched_out(struct task_struct *prev, | |
1356 | struct task_struct *next) { } | |
cdd6c482 IM |
1357 | static inline int perf_event_init_task(struct task_struct *child) { return 0; } |
1358 | static inline void perf_event_exit_task(struct task_struct *child) { } | |
1359 | static inline void perf_event_free_task(struct task_struct *task) { } | |
4e231c79 | 1360 | static inline void perf_event_delayed_put(struct task_struct *task) { } |
57c0c15b | 1361 | static inline void perf_event_print_debug(void) { } |
57c0c15b IM |
1362 | static inline int perf_event_task_disable(void) { return -EINVAL; } |
1363 | static inline int perf_event_task_enable(void) { return -EINVAL; } | |
26ca5c11 AK |
1364 | static inline int perf_event_refresh(struct perf_event *event, int refresh) |
1365 | { | |
1366 | return -EINVAL; | |
1367 | } | |
15dbf27c | 1368 | |
925d519a | 1369 | static inline void |
a8b0ca17 | 1370 | perf_sw_event(u32 event_id, u64 nr, struct pt_regs *regs, u64 addr) { } |
24f1e32c | 1371 | static inline void |
184f412c | 1372 | perf_bp_event(struct perf_event *event, void *data) { } |
0a4a9391 | 1373 | |
39447b38 | 1374 | static inline int perf_register_guest_info_callbacks |
e7e7ee2e | 1375 | (struct perf_guest_info_callbacks *callbacks) { return 0; } |
39447b38 | 1376 | static inline int perf_unregister_guest_info_callbacks |
e7e7ee2e | 1377 | (struct perf_guest_info_callbacks *callbacks) { return 0; } |
39447b38 | 1378 | |
57c0c15b | 1379 | static inline void perf_event_mmap(struct vm_area_struct *vma) { } |
cdd6c482 IM |
1380 | static inline void perf_event_comm(struct task_struct *tsk) { } |
1381 | static inline void perf_event_fork(struct task_struct *tsk) { } | |
1382 | static inline void perf_event_init(void) { } | |
184f412c | 1383 | static inline int perf_swevent_get_recursion_context(void) { return -1; } |
4ed7c92d | 1384 | static inline void perf_swevent_put_recursion_context(int rctx) { } |
44234adc FW |
1385 | static inline void perf_event_enable(struct perf_event *event) { } |
1386 | static inline void perf_event_disable(struct perf_event *event) { } | |
e9d2b064 | 1387 | static inline void perf_event_task_tick(void) { } |
0793a61d TG |
1388 | #endif |
1389 | ||
e7e7ee2e | 1390 | #define perf_output_put(handle, x) perf_output_copy((handle), &(x), sizeof(x)) |
5622f295 | 1391 | |
3f6da390 PZ |
1392 | /* |
1393 | * This has to have a higher priority than migration_notifier in sched.c. | |
1394 | */ | |
e7e7ee2e IM |
1395 | #define perf_cpu_notifier(fn) \ |
1396 | do { \ | |
1397 | static struct notifier_block fn##_nb __cpuinitdata = \ | |
1398 | { .notifier_call = fn, .priority = CPU_PRI_PERF }; \ | |
1399 | fn(&fn##_nb, (unsigned long)CPU_UP_PREPARE, \ | |
1400 | (void *)(unsigned long)smp_processor_id()); \ | |
1401 | fn(&fn##_nb, (unsigned long)CPU_STARTING, \ | |
1402 | (void *)(unsigned long)smp_processor_id()); \ | |
1403 | fn(&fn##_nb, (unsigned long)CPU_ONLINE, \ | |
1404 | (void *)(unsigned long)smp_processor_id()); \ | |
1405 | register_cpu_notifier(&fn##_nb); \ | |
3f6da390 PZ |
1406 | } while (0) |
1407 | ||
641cc938 JO |
1408 | |
1409 | #define PMU_FORMAT_ATTR(_name, _format) \ | |
1410 | static ssize_t \ | |
1411 | _name##_show(struct device *dev, \ | |
1412 | struct device_attribute *attr, \ | |
1413 | char *page) \ | |
1414 | { \ | |
1415 | BUILD_BUG_ON(sizeof(_format) >= PAGE_SIZE); \ | |
1416 | return sprintf(page, _format "\n"); \ | |
1417 | } \ | |
1418 | \ | |
1419 | static struct device_attribute format_attr_##_name = __ATTR_RO(_name) | |
1420 | ||
f3dfd265 | 1421 | #endif /* __KERNEL__ */ |
cdd6c482 | 1422 | #endif /* _LINUX_PERF_EVENT_H */ |