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00db8189 | 1 | /* |
00db8189 AF |
2 | * Framework and drivers for configuring and reading different PHYs |
3 | * Based on code in sungem_phy.c and gianfar_phy.c | |
4 | * | |
5 | * Author: Andy Fleming | |
6 | * | |
7 | * Copyright (c) 2004 Freescale Semiconductor, Inc. | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify it | |
10 | * under the terms of the GNU General Public License as published by the | |
11 | * Free Software Foundation; either version 2 of the License, or (at your | |
12 | * option) any later version. | |
13 | * | |
14 | */ | |
15 | ||
16 | #ifndef __PHY_H | |
17 | #define __PHY_H | |
18 | ||
19 | #include <linux/spinlock.h> | |
13df29f6 MR |
20 | #include <linux/ethtool.h> |
21 | #include <linux/mii.h> | |
3e3aaf64 | 22 | #include <linux/module.h> |
13df29f6 MR |
23 | #include <linux/timer.h> |
24 | #include <linux/workqueue.h> | |
8626d3b4 | 25 | #include <linux/mod_devicetable.h> |
00db8189 | 26 | |
60063497 | 27 | #include <linux/atomic.h> |
0ac49527 | 28 | |
e9fbdf17 | 29 | #define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \ |
00db8189 AF |
30 | SUPPORTED_TP | \ |
31 | SUPPORTED_MII) | |
32 | ||
e9fbdf17 FF |
33 | #define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \ |
34 | SUPPORTED_10baseT_Full) | |
35 | ||
36 | #define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \ | |
37 | SUPPORTED_100baseT_Full) | |
38 | ||
39 | #define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \ | |
00db8189 AF |
40 | SUPPORTED_1000baseT_Full) |
41 | ||
e9fbdf17 FF |
42 | #define PHY_BASIC_FEATURES (PHY_10BT_FEATURES | \ |
43 | PHY_100BT_FEATURES | \ | |
44 | PHY_DEFAULT_FEATURES) | |
45 | ||
46 | #define PHY_GBIT_FEATURES (PHY_BASIC_FEATURES | \ | |
47 | PHY_1000BT_FEATURES) | |
48 | ||
49 | ||
c5e38a94 AF |
50 | /* |
51 | * Set phydev->irq to PHY_POLL if interrupts are not supported, | |
00db8189 AF |
52 | * or not desired for this PHY. Set to PHY_IGNORE_INTERRUPT if |
53 | * the attached driver handles the interrupt | |
54 | */ | |
55 | #define PHY_POLL -1 | |
56 | #define PHY_IGNORE_INTERRUPT -2 | |
57 | ||
58 | #define PHY_HAS_INTERRUPT 0x00000001 | |
59 | #define PHY_HAS_MAGICANEG 0x00000002 | |
4284b6a5 | 60 | #define PHY_IS_INTERNAL 0x00000004 |
00db8189 | 61 | |
e8a2b6a4 AF |
62 | /* Interface Mode definitions */ |
63 | typedef enum { | |
4157ef1b | 64 | PHY_INTERFACE_MODE_NA, |
e8a2b6a4 AF |
65 | PHY_INTERFACE_MODE_MII, |
66 | PHY_INTERFACE_MODE_GMII, | |
67 | PHY_INTERFACE_MODE_SGMII, | |
68 | PHY_INTERFACE_MODE_TBI, | |
2cc70ba4 | 69 | PHY_INTERFACE_MODE_REVMII, |
e8a2b6a4 AF |
70 | PHY_INTERFACE_MODE_RMII, |
71 | PHY_INTERFACE_MODE_RGMII, | |
a999589c | 72 | PHY_INTERFACE_MODE_RGMII_ID, |
7d400a4c KP |
73 | PHY_INTERFACE_MODE_RGMII_RXID, |
74 | PHY_INTERFACE_MODE_RGMII_TXID, | |
4157ef1b SG |
75 | PHY_INTERFACE_MODE_RTBI, |
76 | PHY_INTERFACE_MODE_SMII, | |
898dd0bd | 77 | PHY_INTERFACE_MODE_XGMII, |
fd70f72c | 78 | PHY_INTERFACE_MODE_MOCA, |
b9d12085 | 79 | PHY_INTERFACE_MODE_QSGMII, |
8a2fe56e | 80 | PHY_INTERFACE_MODE_MAX, |
e8a2b6a4 AF |
81 | } phy_interface_t; |
82 | ||
8a2fe56e FF |
83 | /** |
84 | * It maps 'enum phy_interface_t' found in include/linux/phy.h | |
85 | * into the device tree binding of 'phy-mode', so that Ethernet | |
86 | * device driver can get phy interface from device tree. | |
87 | */ | |
88 | static inline const char *phy_modes(phy_interface_t interface) | |
89 | { | |
90 | switch (interface) { | |
91 | case PHY_INTERFACE_MODE_NA: | |
92 | return ""; | |
93 | case PHY_INTERFACE_MODE_MII: | |
94 | return "mii"; | |
95 | case PHY_INTERFACE_MODE_GMII: | |
96 | return "gmii"; | |
97 | case PHY_INTERFACE_MODE_SGMII: | |
98 | return "sgmii"; | |
99 | case PHY_INTERFACE_MODE_TBI: | |
100 | return "tbi"; | |
101 | case PHY_INTERFACE_MODE_REVMII: | |
102 | return "rev-mii"; | |
103 | case PHY_INTERFACE_MODE_RMII: | |
104 | return "rmii"; | |
105 | case PHY_INTERFACE_MODE_RGMII: | |
106 | return "rgmii"; | |
107 | case PHY_INTERFACE_MODE_RGMII_ID: | |
108 | return "rgmii-id"; | |
109 | case PHY_INTERFACE_MODE_RGMII_RXID: | |
110 | return "rgmii-rxid"; | |
111 | case PHY_INTERFACE_MODE_RGMII_TXID: | |
112 | return "rgmii-txid"; | |
113 | case PHY_INTERFACE_MODE_RTBI: | |
114 | return "rtbi"; | |
115 | case PHY_INTERFACE_MODE_SMII: | |
116 | return "smii"; | |
117 | case PHY_INTERFACE_MODE_XGMII: | |
118 | return "xgmii"; | |
fd70f72c FF |
119 | case PHY_INTERFACE_MODE_MOCA: |
120 | return "moca"; | |
b9d12085 TP |
121 | case PHY_INTERFACE_MODE_QSGMII: |
122 | return "qsgmii"; | |
8a2fe56e FF |
123 | default: |
124 | return "unknown"; | |
125 | } | |
126 | } | |
127 | ||
00db8189 | 128 | |
e8a2b6a4 | 129 | #define PHY_INIT_TIMEOUT 100000 |
00db8189 AF |
130 | #define PHY_STATE_TIME 1 |
131 | #define PHY_FORCE_TIMEOUT 10 | |
132 | #define PHY_AN_TIMEOUT 10 | |
133 | ||
e8a2b6a4 | 134 | #define PHY_MAX_ADDR 32 |
00db8189 | 135 | |
a4d00f17 | 136 | /* Used when trying to connect to a specific phy (mii bus id:phy device id) */ |
9d9326d3 AF |
137 | #define PHY_ID_FMT "%s:%02x" |
138 | ||
139 | /* | |
140 | * Need to be a little smaller than phydev->dev.bus_id to leave room | |
141 | * for the ":%02x" | |
142 | */ | |
8e401ecc | 143 | #define MII_BUS_ID_SIZE (20 - 3) |
a4d00f17 | 144 | |
abf35df2 JG |
145 | /* Or MII_ADDR_C45 into regnum for read/write on mii_bus to enable the 21 bit |
146 | IEEE 802.3ae clause 45 addressing mode used by 10GIGE phy chips. */ | |
147 | #define MII_ADDR_C45 (1<<30) | |
148 | ||
313162d0 PG |
149 | struct device; |
150 | struct sk_buff; | |
151 | ||
c5e38a94 AF |
152 | /* |
153 | * The Bus class for PHYs. Devices which provide access to | |
154 | * PHYs should register using this structure | |
155 | */ | |
00db8189 | 156 | struct mii_bus { |
3e3aaf64 | 157 | struct module *owner; |
00db8189 | 158 | const char *name; |
9d9326d3 | 159 | char id[MII_BUS_ID_SIZE]; |
00db8189 | 160 | void *priv; |
ccaa953e AL |
161 | int (*read)(struct mii_bus *bus, int addr, int regnum); |
162 | int (*write)(struct mii_bus *bus, int addr, int regnum, u16 val); | |
00db8189 AF |
163 | int (*reset)(struct mii_bus *bus); |
164 | ||
c5e38a94 AF |
165 | /* |
166 | * A lock to ensure that only one thing can read/write | |
167 | * the MDIO bus at a time | |
168 | */ | |
35b5f6b1 | 169 | struct mutex mdio_lock; |
00db8189 | 170 | |
18ee49dd | 171 | struct device *parent; |
46abc021 LB |
172 | enum { |
173 | MDIOBUS_ALLOCATED = 1, | |
174 | MDIOBUS_REGISTERED, | |
175 | MDIOBUS_UNREGISTERED, | |
176 | MDIOBUS_RELEASED, | |
177 | } state; | |
178 | struct device dev; | |
00db8189 AF |
179 | |
180 | /* list of all PHYs on bus */ | |
181 | struct phy_device *phy_map[PHY_MAX_ADDR]; | |
182 | ||
c6883996 | 183 | /* PHY addresses to be ignored when probing */ |
f896424c MP |
184 | u32 phy_mask; |
185 | ||
922f2dd1 FF |
186 | /* PHY addresses to ignore the TA/read failure */ |
187 | u32 phy_ignore_ta_mask; | |
188 | ||
c5e38a94 AF |
189 | /* |
190 | * Pointer to an array of interrupts, each PHY's | |
191 | * interrupt at the index matching its address | |
192 | */ | |
00db8189 AF |
193 | int *irq; |
194 | }; | |
46abc021 | 195 | #define to_mii_bus(d) container_of(d, struct mii_bus, dev) |
00db8189 | 196 | |
eb8a54a7 TT |
197 | struct mii_bus *mdiobus_alloc_size(size_t); |
198 | static inline struct mii_bus *mdiobus_alloc(void) | |
199 | { | |
200 | return mdiobus_alloc_size(0); | |
201 | } | |
202 | ||
3e3aaf64 RK |
203 | int __mdiobus_register(struct mii_bus *bus, struct module *owner); |
204 | #define mdiobus_register(bus) __mdiobus_register(bus, THIS_MODULE) | |
2e888103 LB |
205 | void mdiobus_unregister(struct mii_bus *bus); |
206 | void mdiobus_free(struct mii_bus *bus); | |
6d48f44b GS |
207 | struct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv); |
208 | static inline struct mii_bus *devm_mdiobus_alloc(struct device *dev) | |
209 | { | |
210 | return devm_mdiobus_alloc_size(dev, 0); | |
211 | } | |
212 | ||
213 | void devm_mdiobus_free(struct device *dev, struct mii_bus *bus); | |
2e888103 | 214 | struct phy_device *mdiobus_scan(struct mii_bus *bus, int addr); |
abf35df2 | 215 | int mdiobus_read(struct mii_bus *bus, int addr, u32 regnum); |
21dd19fe | 216 | int mdiobus_read_nested(struct mii_bus *bus, int addr, u32 regnum); |
abf35df2 | 217 | int mdiobus_write(struct mii_bus *bus, int addr, u32 regnum, u16 val); |
21dd19fe | 218 | int mdiobus_write_nested(struct mii_bus *bus, int addr, u32 regnum, u16 val); |
2e888103 LB |
219 | |
220 | ||
e8a2b6a4 AF |
221 | #define PHY_INTERRUPT_DISABLED 0x0 |
222 | #define PHY_INTERRUPT_ENABLED 0x80000000 | |
00db8189 AF |
223 | |
224 | /* PHY state machine states: | |
225 | * | |
226 | * DOWN: PHY device and driver are not ready for anything. probe | |
227 | * should be called if and only if the PHY is in this state, | |
228 | * given that the PHY device exists. | |
229 | * - PHY driver probe function will, depending on the PHY, set | |
230 | * the state to STARTING or READY | |
231 | * | |
232 | * STARTING: PHY device is coming up, and the ethernet driver is | |
233 | * not ready. PHY drivers may set this in the probe function. | |
234 | * If they do, they are responsible for making sure the state is | |
235 | * eventually set to indicate whether the PHY is UP or READY, | |
236 | * depending on the state when the PHY is done starting up. | |
237 | * - PHY driver will set the state to READY | |
238 | * - start will set the state to PENDING | |
239 | * | |
240 | * READY: PHY is ready to send and receive packets, but the | |
241 | * controller is not. By default, PHYs which do not implement | |
242 | * probe will be set to this state by phy_probe(). If the PHY | |
243 | * driver knows the PHY is ready, and the PHY state is STARTING, | |
244 | * then it sets this STATE. | |
245 | * - start will set the state to UP | |
246 | * | |
247 | * PENDING: PHY device is coming up, but the ethernet driver is | |
248 | * ready. phy_start will set this state if the PHY state is | |
249 | * STARTING. | |
250 | * - PHY driver will set the state to UP when the PHY is ready | |
251 | * | |
252 | * UP: The PHY and attached device are ready to do work. | |
253 | * Interrupts should be started here. | |
254 | * - timer moves to AN | |
255 | * | |
256 | * AN: The PHY is currently negotiating the link state. Link is | |
257 | * therefore down for now. phy_timer will set this state when it | |
258 | * detects the state is UP. config_aneg will set this state | |
259 | * whenever called with phydev->autoneg set to AUTONEG_ENABLE. | |
260 | * - If autonegotiation finishes, but there's no link, it sets | |
261 | * the state to NOLINK. | |
262 | * - If aneg finishes with link, it sets the state to RUNNING, | |
263 | * and calls adjust_link | |
264 | * - If autonegotiation did not finish after an arbitrary amount | |
265 | * of time, autonegotiation should be tried again if the PHY | |
266 | * supports "magic" autonegotiation (back to AN) | |
267 | * - If it didn't finish, and no magic_aneg, move to FORCING. | |
268 | * | |
269 | * NOLINK: PHY is up, but not currently plugged in. | |
270 | * - If the timer notes that the link comes back, we move to RUNNING | |
271 | * - config_aneg moves to AN | |
272 | * - phy_stop moves to HALTED | |
273 | * | |
274 | * FORCING: PHY is being configured with forced settings | |
275 | * - if link is up, move to RUNNING | |
276 | * - If link is down, we drop to the next highest setting, and | |
277 | * retry (FORCING) after a timeout | |
278 | * - phy_stop moves to HALTED | |
279 | * | |
280 | * RUNNING: PHY is currently up, running, and possibly sending | |
281 | * and/or receiving packets | |
282 | * - timer will set CHANGELINK if we're polling (this ensures the | |
283 | * link state is polled every other cycle of this state machine, | |
284 | * which makes it every other second) | |
285 | * - irq will set CHANGELINK | |
286 | * - config_aneg will set AN | |
287 | * - phy_stop moves to HALTED | |
288 | * | |
289 | * CHANGELINK: PHY experienced a change in link state | |
290 | * - timer moves to RUNNING if link | |
291 | * - timer moves to NOLINK if the link is down | |
292 | * - phy_stop moves to HALTED | |
293 | * | |
294 | * HALTED: PHY is up, but no polling or interrupts are done. Or | |
295 | * PHY is in an error state. | |
296 | * | |
297 | * - phy_start moves to RESUMING | |
298 | * | |
299 | * RESUMING: PHY was halted, but now wants to run again. | |
300 | * - If we are forcing, or aneg is done, timer moves to RUNNING | |
301 | * - If aneg is not done, timer moves to AN | |
302 | * - phy_stop moves to HALTED | |
303 | */ | |
304 | enum phy_state { | |
4017b4d3 | 305 | PHY_DOWN = 0, |
00db8189 AF |
306 | PHY_STARTING, |
307 | PHY_READY, | |
308 | PHY_PENDING, | |
309 | PHY_UP, | |
310 | PHY_AN, | |
311 | PHY_RUNNING, | |
312 | PHY_NOLINK, | |
313 | PHY_FORCING, | |
314 | PHY_CHANGELINK, | |
315 | PHY_HALTED, | |
316 | PHY_RESUMING | |
317 | }; | |
318 | ||
ac28b9f8 DD |
319 | /** |
320 | * struct phy_c45_device_ids - 802.3-c45 Device Identifiers | |
321 | * @devices_in_package: Bit vector of devices present. | |
322 | * @device_ids: The device identifer for each present device. | |
323 | */ | |
324 | struct phy_c45_device_ids { | |
325 | u32 devices_in_package; | |
326 | u32 device_ids[8]; | |
327 | }; | |
c1f19b51 | 328 | |
00db8189 AF |
329 | /* phy_device: An instance of a PHY |
330 | * | |
331 | * drv: Pointer to the driver for this PHY instance | |
332 | * bus: Pointer to the bus this PHY is on | |
333 | * dev: driver model device structure for this PHY | |
334 | * phy_id: UID for this device found during discovery | |
ac28b9f8 DD |
335 | * c45_ids: 802.3-c45 Device Identifers if is_c45. |
336 | * is_c45: Set to true if this phy uses clause 45 addressing. | |
4284b6a5 | 337 | * is_internal: Set to true if this phy is internal to a MAC. |
5a11dd7d | 338 | * is_pseudo_fixed_link: Set to true if this phy is an Ethernet switch, etc. |
aae88261 | 339 | * has_fixups: Set to true if this phy has fixups/quirks. |
8a477a6f | 340 | * suspended: Set to true if this phy has been suspended successfully. |
00db8189 AF |
341 | * state: state of the PHY for management purposes |
342 | * dev_flags: Device-specific flags used by the PHY driver. | |
343 | * addr: Bus address of PHY | |
344 | * link_timeout: The number of timer firings to wait before the | |
345 | * giving up on the current attempt at acquiring a link | |
346 | * irq: IRQ number of the PHY's interrupt (-1 if none) | |
347 | * phy_timer: The timer for handling the state machine | |
348 | * phy_queue: A work_queue for the interrupt | |
349 | * attached_dev: The attached enet driver's device instance ptr | |
350 | * adjust_link: Callback for the enet controller to respond to | |
351 | * changes in the link state. | |
00db8189 | 352 | * |
114002bc FF |
353 | * speed, duplex, pause, supported, advertising, lp_advertising, |
354 | * and autoneg are used like in mii_if_info | |
00db8189 AF |
355 | * |
356 | * interrupts currently only supports enabled or disabled, | |
357 | * but could be changed in the future to support enabling | |
358 | * and disabling specific interrupts | |
359 | * | |
360 | * Contains some infrastructure for polling and interrupt | |
361 | * handling, as well as handling shifts in PHY hardware state | |
362 | */ | |
363 | struct phy_device { | |
364 | /* Information about the PHY type */ | |
365 | /* And management functions */ | |
366 | struct phy_driver *drv; | |
367 | ||
368 | struct mii_bus *bus; | |
369 | ||
370 | struct device dev; | |
371 | ||
372 | u32 phy_id; | |
373 | ||
ac28b9f8 DD |
374 | struct phy_c45_device_ids c45_ids; |
375 | bool is_c45; | |
4284b6a5 | 376 | bool is_internal; |
5a11dd7d | 377 | bool is_pseudo_fixed_link; |
b0ae009f | 378 | bool has_fixups; |
8a477a6f | 379 | bool suspended; |
ac28b9f8 | 380 | |
00db8189 AF |
381 | enum phy_state state; |
382 | ||
383 | u32 dev_flags; | |
384 | ||
e8a2b6a4 AF |
385 | phy_interface_t interface; |
386 | ||
c6883996 | 387 | /* Bus address of the PHY (0-31) */ |
00db8189 AF |
388 | int addr; |
389 | ||
c5e38a94 AF |
390 | /* |
391 | * forced speed & duplex (no autoneg) | |
00db8189 AF |
392 | * partner speed & duplex & pause (autoneg) |
393 | */ | |
394 | int speed; | |
395 | int duplex; | |
396 | int pause; | |
397 | int asym_pause; | |
398 | ||
399 | /* The most recently read link state */ | |
400 | int link; | |
401 | ||
402 | /* Enabled Interrupts */ | |
403 | u32 interrupts; | |
404 | ||
405 | /* Union of PHY and Attached devices' supported modes */ | |
406 | /* See mii.h for more info */ | |
407 | u32 supported; | |
408 | u32 advertising; | |
114002bc | 409 | u32 lp_advertising; |
00db8189 AF |
410 | |
411 | int autoneg; | |
412 | ||
413 | int link_timeout; | |
414 | ||
c5e38a94 AF |
415 | /* |
416 | * Interrupt number for this PHY | |
417 | * -1 means no interrupt | |
418 | */ | |
00db8189 AF |
419 | int irq; |
420 | ||
421 | /* private data pointer */ | |
422 | /* For use by PHYs to maintain extra state */ | |
423 | void *priv; | |
424 | ||
425 | /* Interrupt and Polling infrastructure */ | |
426 | struct work_struct phy_queue; | |
a390d1f3 | 427 | struct delayed_work state_queue; |
0ac49527 | 428 | atomic_t irq_disable; |
00db8189 | 429 | |
35b5f6b1 | 430 | struct mutex lock; |
00db8189 AF |
431 | |
432 | struct net_device *attached_dev; | |
433 | ||
634ec36c DT |
434 | u8 mdix; |
435 | ||
00db8189 | 436 | void (*adjust_link)(struct net_device *dev); |
00db8189 AF |
437 | }; |
438 | #define to_phy_device(d) container_of(d, struct phy_device, dev) | |
439 | ||
440 | /* struct phy_driver: Driver structure for a particular PHY type | |
441 | * | |
442 | * phy_id: The result of reading the UID registers of this PHY | |
443 | * type, and ANDing them with the phy_id_mask. This driver | |
444 | * only works for PHYs with IDs which match this field | |
445 | * name: The friendly name of this PHY type | |
446 | * phy_id_mask: Defines the important bits of the phy_id | |
447 | * features: A list of features (speed, duplex, etc) supported | |
448 | * by this PHY | |
449 | * flags: A bitfield defining certain other features this PHY | |
450 | * supports (like interrupts) | |
860f6e9e | 451 | * driver_data: static driver data |
00db8189 AF |
452 | * |
453 | * The drivers must implement config_aneg and read_status. All | |
454 | * other functions are optional. Note that none of these | |
455 | * functions should be called from interrupt time. The goal is | |
456 | * for the bus read/write functions to be able to block when the | |
457 | * bus transaction is happening, and be freed up by an interrupt | |
458 | * (The MPC85xx has this ability, though it is not currently | |
459 | * supported in the driver). | |
460 | */ | |
461 | struct phy_driver { | |
462 | u32 phy_id; | |
463 | char *name; | |
464 | unsigned int phy_id_mask; | |
465 | u32 features; | |
466 | u32 flags; | |
860f6e9e | 467 | const void *driver_data; |
00db8189 | 468 | |
c5e38a94 | 469 | /* |
9df81dd7 FF |
470 | * Called to issue a PHY software reset |
471 | */ | |
472 | int (*soft_reset)(struct phy_device *phydev); | |
473 | ||
474 | /* | |
c5e38a94 AF |
475 | * Called to initialize the PHY, |
476 | * including after a reset | |
477 | */ | |
00db8189 AF |
478 | int (*config_init)(struct phy_device *phydev); |
479 | ||
c5e38a94 AF |
480 | /* |
481 | * Called during discovery. Used to set | |
482 | * up device-specific structures, if any | |
483 | */ | |
00db8189 AF |
484 | int (*probe)(struct phy_device *phydev); |
485 | ||
486 | /* PHY Power Management */ | |
487 | int (*suspend)(struct phy_device *phydev); | |
488 | int (*resume)(struct phy_device *phydev); | |
489 | ||
c5e38a94 AF |
490 | /* |
491 | * Configures the advertisement and resets | |
00db8189 AF |
492 | * autonegotiation if phydev->autoneg is on, |
493 | * forces the speed to the current settings in phydev | |
c5e38a94 AF |
494 | * if phydev->autoneg is off |
495 | */ | |
00db8189 AF |
496 | int (*config_aneg)(struct phy_device *phydev); |
497 | ||
76a423a3 FF |
498 | /* Determines the auto negotiation result */ |
499 | int (*aneg_done)(struct phy_device *phydev); | |
500 | ||
00db8189 AF |
501 | /* Determines the negotiated speed and duplex */ |
502 | int (*read_status)(struct phy_device *phydev); | |
503 | ||
504 | /* Clears any pending interrupts */ | |
505 | int (*ack_interrupt)(struct phy_device *phydev); | |
506 | ||
507 | /* Enables or disables interrupts */ | |
508 | int (*config_intr)(struct phy_device *phydev); | |
509 | ||
a8729eb3 AG |
510 | /* |
511 | * Checks if the PHY generated an interrupt. | |
512 | * For multi-PHY devices with shared PHY interrupt pin | |
513 | */ | |
514 | int (*did_interrupt)(struct phy_device *phydev); | |
515 | ||
00db8189 AF |
516 | /* Clears up any memory if needed */ |
517 | void (*remove)(struct phy_device *phydev); | |
518 | ||
a30e2c18 DD |
519 | /* Returns true if this is a suitable driver for the given |
520 | * phydev. If NULL, matching is based on phy_id and | |
521 | * phy_id_mask. | |
522 | */ | |
523 | int (*match_phy_device)(struct phy_device *phydev); | |
524 | ||
c8f3a8c3 RC |
525 | /* Handles ethtool queries for hardware time stamping. */ |
526 | int (*ts_info)(struct phy_device *phydev, struct ethtool_ts_info *ti); | |
527 | ||
c1f19b51 RC |
528 | /* Handles SIOCSHWTSTAMP ioctl for hardware time stamping. */ |
529 | int (*hwtstamp)(struct phy_device *phydev, struct ifreq *ifr); | |
530 | ||
531 | /* | |
532 | * Requests a Rx timestamp for 'skb'. If the skb is accepted, | |
533 | * the phy driver promises to deliver it using netif_rx() as | |
534 | * soon as a timestamp becomes available. One of the | |
535 | * PTP_CLASS_ values is passed in 'type'. The function must | |
536 | * return true if the skb is accepted for delivery. | |
537 | */ | |
538 | bool (*rxtstamp)(struct phy_device *dev, struct sk_buff *skb, int type); | |
539 | ||
540 | /* | |
541 | * Requests a Tx timestamp for 'skb'. The phy driver promises | |
da92b194 | 542 | * to deliver it using skb_complete_tx_timestamp() as soon as a |
c1f19b51 RC |
543 | * timestamp becomes available. One of the PTP_CLASS_ values |
544 | * is passed in 'type'. | |
545 | */ | |
546 | void (*txtstamp)(struct phy_device *dev, struct sk_buff *skb, int type); | |
547 | ||
42e836eb MS |
548 | /* Some devices (e.g. qnap TS-119P II) require PHY register changes to |
549 | * enable Wake on LAN, so set_wol is provided to be called in the | |
550 | * ethernet driver's set_wol function. */ | |
551 | int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); | |
552 | ||
553 | /* See set_wol, but for checking whether Wake on LAN is enabled. */ | |
554 | void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol); | |
555 | ||
2b8f2a28 DM |
556 | /* |
557 | * Called to inform a PHY device driver when the core is about to | |
558 | * change the link state. This callback is supposed to be used as | |
559 | * fixup hook for drivers that need to take action when the link | |
560 | * state changes. Drivers are by no means allowed to mess with the | |
561 | * PHY device structure in their implementations. | |
562 | */ | |
563 | void (*link_change_notify)(struct phy_device *dev); | |
564 | ||
0c1d77df VB |
565 | /* A function provided by a phy specific driver to override the |
566 | * the PHY driver framework support for reading a MMD register | |
567 | * from the PHY. If not supported, return -1. This function is | |
568 | * optional for PHY specific drivers, if not provided then the | |
569 | * default MMD read function is used by the PHY framework. | |
570 | */ | |
571 | int (*read_mmd_indirect)(struct phy_device *dev, int ptrad, | |
572 | int devnum, int regnum); | |
573 | ||
574 | /* A function provided by a phy specific driver to override the | |
575 | * the PHY driver framework support for writing a MMD register | |
576 | * from the PHY. This function is optional for PHY specific drivers, | |
577 | * if not provided then the default MMD read function is used by | |
578 | * the PHY framework. | |
579 | */ | |
580 | void (*write_mmd_indirect)(struct phy_device *dev, int ptrad, | |
581 | int devnum, int regnum, u32 val); | |
582 | ||
2f438366 ES |
583 | /* Get the size and type of the eeprom contained within a plug-in |
584 | * module */ | |
585 | int (*module_info)(struct phy_device *dev, | |
586 | struct ethtool_modinfo *modinfo); | |
587 | ||
588 | /* Get the eeprom information from the plug-in module */ | |
589 | int (*module_eeprom)(struct phy_device *dev, | |
590 | struct ethtool_eeprom *ee, u8 *data); | |
591 | ||
f3a40945 AL |
592 | /* Get statistics from the phy using ethtool */ |
593 | int (*get_sset_count)(struct phy_device *dev); | |
594 | void (*get_strings)(struct phy_device *dev, u8 *data); | |
595 | void (*get_stats)(struct phy_device *dev, | |
596 | struct ethtool_stats *stats, u64 *data); | |
597 | ||
00db8189 AF |
598 | struct device_driver driver; |
599 | }; | |
600 | #define to_phy_driver(d) container_of(d, struct phy_driver, driver) | |
601 | ||
f62220d3 AF |
602 | #define PHY_ANY_ID "MATCH ANY PHY" |
603 | #define PHY_ANY_UID 0xffffffff | |
604 | ||
605 | /* A Structure for boards to register fixups with the PHY Lib */ | |
606 | struct phy_fixup { | |
607 | struct list_head list; | |
8e401ecc | 608 | char bus_id[20]; |
f62220d3 AF |
609 | u32 phy_uid; |
610 | u32 phy_uid_mask; | |
611 | int (*run)(struct phy_device *phydev); | |
612 | }; | |
613 | ||
efabdfb9 AF |
614 | /** |
615 | * phy_read_mmd - Convenience function for reading a register | |
616 | * from an MMD on a given PHY. | |
617 | * @phydev: The phy_device struct | |
618 | * @devad: The MMD to read from | |
619 | * @regnum: The register on the MMD to read | |
620 | * | |
621 | * Same rules as for phy_read(); | |
622 | */ | |
623 | static inline int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum) | |
624 | { | |
625 | if (!phydev->is_c45) | |
626 | return -EOPNOTSUPP; | |
627 | ||
628 | return mdiobus_read(phydev->bus, phydev->addr, | |
629 | MII_ADDR_C45 | (devad << 16) | (regnum & 0xffff)); | |
630 | } | |
631 | ||
66ce7fb9 FF |
632 | /** |
633 | * phy_read_mmd_indirect - reads data from the MMD registers | |
634 | * @phydev: The PHY device bus | |
635 | * @prtad: MMD Address | |
636 | * @devad: MMD DEVAD | |
637 | * @addr: PHY address on the MII bus | |
638 | * | |
639 | * Description: it reads data from the MMD registers (clause 22 to access to | |
640 | * clause 45) of the specified phy address. | |
641 | */ | |
642 | int phy_read_mmd_indirect(struct phy_device *phydev, int prtad, | |
643 | int devad, int addr); | |
644 | ||
2e888103 LB |
645 | /** |
646 | * phy_read - Convenience function for reading a given PHY register | |
647 | * @phydev: the phy_device struct | |
648 | * @regnum: register number to read | |
649 | * | |
650 | * NOTE: MUST NOT be called from interrupt context, | |
651 | * because the bus read/write functions may wait for an interrupt | |
652 | * to conclude the operation. | |
653 | */ | |
abf35df2 | 654 | static inline int phy_read(struct phy_device *phydev, u32 regnum) |
2e888103 LB |
655 | { |
656 | return mdiobus_read(phydev->bus, phydev->addr, regnum); | |
657 | } | |
658 | ||
659 | /** | |
660 | * phy_write - Convenience function for writing a given PHY register | |
661 | * @phydev: the phy_device struct | |
662 | * @regnum: register number to write | |
663 | * @val: value to write to @regnum | |
664 | * | |
665 | * NOTE: MUST NOT be called from interrupt context, | |
666 | * because the bus read/write functions may wait for an interrupt | |
667 | * to conclude the operation. | |
668 | */ | |
abf35df2 | 669 | static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val) |
2e888103 LB |
670 | { |
671 | return mdiobus_write(phydev->bus, phydev->addr, regnum, val); | |
672 | } | |
673 | ||
2c7b4921 FF |
674 | /** |
675 | * phy_interrupt_is_valid - Convenience function for testing a given PHY irq | |
676 | * @phydev: the phy_device struct | |
677 | * | |
678 | * NOTE: must be kept in sync with addition/removal of PHY_POLL and | |
679 | * PHY_IGNORE_INTERRUPT | |
680 | */ | |
681 | static inline bool phy_interrupt_is_valid(struct phy_device *phydev) | |
682 | { | |
683 | return phydev->irq != PHY_POLL && phydev->irq != PHY_IGNORE_INTERRUPT; | |
684 | } | |
685 | ||
4284b6a5 FF |
686 | /** |
687 | * phy_is_internal - Convenience function for testing if a PHY is internal | |
688 | * @phydev: the phy_device struct | |
689 | */ | |
690 | static inline bool phy_is_internal(struct phy_device *phydev) | |
691 | { | |
692 | return phydev->is_internal; | |
693 | } | |
694 | ||
e463d88c FF |
695 | /** |
696 | * phy_interface_is_rgmii - Convenience function for testing if a PHY interface | |
697 | * is RGMII (all variants) | |
698 | * @phydev: the phy_device struct | |
699 | */ | |
700 | static inline bool phy_interface_is_rgmii(struct phy_device *phydev) | |
701 | { | |
702 | return phydev->interface >= PHY_INTERFACE_MODE_RGMII && | |
703 | phydev->interface <= PHY_INTERFACE_MODE_RGMII_TXID; | |
5a11dd7d FF |
704 | }; |
705 | ||
706 | /* | |
707 | * phy_is_pseudo_fixed_link - Convenience function for testing if this | |
708 | * PHY is the CPU port facing side of an Ethernet switch, or similar. | |
709 | * @phydev: the phy_device struct | |
710 | */ | |
711 | static inline bool phy_is_pseudo_fixed_link(struct phy_device *phydev) | |
712 | { | |
713 | return phydev->is_pseudo_fixed_link; | |
e463d88c FF |
714 | } |
715 | ||
efabdfb9 AF |
716 | /** |
717 | * phy_write_mmd - Convenience function for writing a register | |
718 | * on an MMD on a given PHY. | |
719 | * @phydev: The phy_device struct | |
720 | * @devad: The MMD to read from | |
721 | * @regnum: The register on the MMD to read | |
722 | * @val: value to write to @regnum | |
723 | * | |
724 | * Same rules as for phy_write(); | |
725 | */ | |
726 | static inline int phy_write_mmd(struct phy_device *phydev, int devad, | |
727 | u32 regnum, u16 val) | |
728 | { | |
729 | if (!phydev->is_c45) | |
730 | return -EOPNOTSUPP; | |
731 | ||
732 | regnum = MII_ADDR_C45 | ((devad & 0x1f) << 16) | (regnum & 0xffff); | |
733 | ||
734 | return mdiobus_write(phydev->bus, phydev->addr, regnum, val); | |
735 | } | |
736 | ||
66ce7fb9 FF |
737 | /** |
738 | * phy_write_mmd_indirect - writes data to the MMD registers | |
739 | * @phydev: The PHY device | |
740 | * @prtad: MMD Address | |
741 | * @devad: MMD DEVAD | |
742 | * @addr: PHY address on the MII bus | |
743 | * @data: data to write in the MMD register | |
744 | * | |
745 | * Description: Write data from the MMD registers of the specified | |
746 | * phy address. | |
747 | */ | |
748 | void phy_write_mmd_indirect(struct phy_device *phydev, int prtad, | |
749 | int devad, int addr, u32 data); | |
750 | ||
ac28b9f8 | 751 | struct phy_device *phy_device_create(struct mii_bus *bus, int addr, int phy_id, |
4017b4d3 SS |
752 | bool is_c45, |
753 | struct phy_c45_device_ids *c45_ids); | |
ac28b9f8 | 754 | struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45); |
4dea547f | 755 | int phy_device_register(struct phy_device *phy); |
38737e49 | 756 | void phy_device_remove(struct phy_device *phydev); |
2f5cb434 | 757 | int phy_init_hw(struct phy_device *phydev); |
481b5d93 SH |
758 | int phy_suspend(struct phy_device *phydev); |
759 | int phy_resume(struct phy_device *phydev); | |
4017b4d3 SS |
760 | struct phy_device *phy_attach(struct net_device *dev, const char *bus_id, |
761 | phy_interface_t interface); | |
f8f76db1 | 762 | struct phy_device *phy_find_first(struct mii_bus *bus); |
257184d7 AF |
763 | int phy_attach_direct(struct net_device *dev, struct phy_device *phydev, |
764 | u32 flags, phy_interface_t interface); | |
fa94f6d9 | 765 | int phy_connect_direct(struct net_device *dev, struct phy_device *phydev, |
4017b4d3 SS |
766 | void (*handler)(struct net_device *), |
767 | phy_interface_t interface); | |
768 | struct phy_device *phy_connect(struct net_device *dev, const char *bus_id, | |
769 | void (*handler)(struct net_device *), | |
770 | phy_interface_t interface); | |
e1393456 AF |
771 | void phy_disconnect(struct phy_device *phydev); |
772 | void phy_detach(struct phy_device *phydev); | |
773 | void phy_start(struct phy_device *phydev); | |
774 | void phy_stop(struct phy_device *phydev); | |
775 | int phy_start_aneg(struct phy_device *phydev); | |
776 | ||
e1393456 | 777 | int phy_stop_interrupts(struct phy_device *phydev); |
00db8189 | 778 | |
4017b4d3 SS |
779 | static inline int phy_read_status(struct phy_device *phydev) |
780 | { | |
00db8189 AF |
781 | return phydev->drv->read_status(phydev); |
782 | } | |
783 | ||
af6b6967 | 784 | int genphy_config_init(struct phy_device *phydev); |
3fb69bca | 785 | int genphy_setup_forced(struct phy_device *phydev); |
00db8189 AF |
786 | int genphy_restart_aneg(struct phy_device *phydev); |
787 | int genphy_config_aneg(struct phy_device *phydev); | |
a9fa6e6a | 788 | int genphy_aneg_done(struct phy_device *phydev); |
00db8189 AF |
789 | int genphy_update_link(struct phy_device *phydev); |
790 | int genphy_read_status(struct phy_device *phydev); | |
0f0ca340 GC |
791 | int genphy_suspend(struct phy_device *phydev); |
792 | int genphy_resume(struct phy_device *phydev); | |
797ac071 | 793 | int genphy_soft_reset(struct phy_device *phydev); |
00db8189 | 794 | void phy_driver_unregister(struct phy_driver *drv); |
d5bf9071 | 795 | void phy_drivers_unregister(struct phy_driver *drv, int n); |
00db8189 | 796 | int phy_driver_register(struct phy_driver *new_driver); |
d5bf9071 | 797 | int phy_drivers_register(struct phy_driver *new_driver, int n); |
4f9c85a1 | 798 | void phy_state_machine(struct work_struct *work); |
5ea94e76 FF |
799 | void phy_change(struct work_struct *work); |
800 | void phy_mac_interrupt(struct phy_device *phydev, int new_link); | |
29935aeb | 801 | void phy_start_machine(struct phy_device *phydev); |
00db8189 AF |
802 | void phy_stop_machine(struct phy_device *phydev); |
803 | int phy_ethtool_sset(struct phy_device *phydev, struct ethtool_cmd *cmd); | |
804 | int phy_ethtool_gset(struct phy_device *phydev, struct ethtool_cmd *cmd); | |
4017b4d3 | 805 | int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd); |
e1393456 AF |
806 | int phy_start_interrupts(struct phy_device *phydev); |
807 | void phy_print_status(struct phy_device *phydev); | |
6f4a7f41 | 808 | void phy_device_free(struct phy_device *phydev); |
f3a6bd39 | 809 | int phy_set_max_speed(struct phy_device *phydev, u32 max_speed); |
00db8189 | 810 | |
f62220d3 | 811 | int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask, |
4017b4d3 | 812 | int (*run)(struct phy_device *)); |
f62220d3 | 813 | int phy_register_fixup_for_id(const char *bus_id, |
4017b4d3 | 814 | int (*run)(struct phy_device *)); |
f62220d3 | 815 | int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask, |
4017b4d3 | 816 | int (*run)(struct phy_device *)); |
f62220d3 | 817 | |
a59a4d19 GC |
818 | int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable); |
819 | int phy_get_eee_err(struct phy_device *phydev); | |
820 | int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data); | |
821 | int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data); | |
42e836eb | 822 | int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol); |
4017b4d3 SS |
823 | void phy_ethtool_get_wol(struct phy_device *phydev, |
824 | struct ethtool_wolinfo *wol); | |
a59a4d19 | 825 | |
9b9a8bfc AF |
826 | int __init mdio_bus_init(void); |
827 | void mdio_bus_exit(void); | |
828 | ||
00db8189 | 829 | extern struct bus_type mdio_bus_type; |
c31accd1 JH |
830 | |
831 | /** | |
832 | * module_phy_driver() - Helper macro for registering PHY drivers | |
833 | * @__phy_drivers: array of PHY drivers to register | |
834 | * | |
835 | * Helper macro for PHY drivers which do not do anything special in module | |
836 | * init/exit. Each module may only use this macro once, and calling it | |
837 | * replaces module_init() and module_exit(). | |
838 | */ | |
839 | #define phy_module_driver(__phy_drivers, __count) \ | |
840 | static int __init phy_module_init(void) \ | |
841 | { \ | |
842 | return phy_drivers_register(__phy_drivers, __count); \ | |
843 | } \ | |
844 | module_init(phy_module_init); \ | |
845 | static void __exit phy_module_exit(void) \ | |
846 | { \ | |
847 | phy_drivers_unregister(__phy_drivers, __count); \ | |
848 | } \ | |
849 | module_exit(phy_module_exit) | |
850 | ||
851 | #define module_phy_driver(__phy_drivers) \ | |
852 | phy_module_driver(__phy_drivers, ARRAY_SIZE(__phy_drivers)) | |
853 | ||
00db8189 | 854 | #endif /* __PHY_H */ |