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1 | #ifndef __LINUX_REGMAP_H |
2 | #define __LINUX_REGMAP_H | |
3 | ||
4 | /* | |
5 | * Register map access API | |
6 | * | |
7 | * Copyright 2011 Wolfson Microelectronics plc | |
8 | * | |
9 | * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> | |
10 | * | |
11 | * This program is free software; you can redistribute it and/or modify | |
12 | * it under the terms of the GNU General Public License version 2 as | |
13 | * published by the Free Software Foundation. | |
14 | */ | |
15 | ||
b83a313b | 16 | #include <linux/list.h> |
6863ca62 | 17 | #include <linux/rbtree.h> |
49ccc142 | 18 | #include <linux/err.h> |
3f0fa9a8 | 19 | #include <linux/bug.h> |
3cfe7a74 | 20 | #include <linux/lockdep.h> |
b83a313b | 21 | |
de477254 | 22 | struct module; |
313162d0 | 23 | struct device; |
9943fa30 | 24 | struct i2c_client; |
90f790d2 | 25 | struct irq_domain; |
a676f083 | 26 | struct spi_device; |
a01779f8 | 27 | struct spmi_device; |
b83d2ff0 | 28 | struct regmap; |
6863ca62 | 29 | struct regmap_range_cfg; |
67252287 | 30 | struct regmap_field; |
22853223 | 31 | struct snd_ac97; |
9943fa30 | 32 | |
9fabe24e DP |
33 | /* An enum of all the supported cache types */ |
34 | enum regcache_type { | |
35 | REGCACHE_NONE, | |
28644c80 | 36 | REGCACHE_RBTREE, |
2ac902ce MB |
37 | REGCACHE_COMPRESSED, |
38 | REGCACHE_FLAT, | |
9fabe24e DP |
39 | }; |
40 | ||
bd20eb54 MB |
41 | /** |
42 | * Default value for a register. We use an array of structs rather | |
43 | * than a simple array as many modern devices have very sparse | |
44 | * register maps. | |
45 | * | |
46 | * @reg: Register address. | |
47 | * @def: Register default value. | |
48 | */ | |
49 | struct reg_default { | |
50 | unsigned int reg; | |
51 | unsigned int def; | |
52 | }; | |
53 | ||
8019ff6c | 54 | /** |
2de9d600 NP |
55 | * Register/value pairs for sequences of writes with an optional delay in |
56 | * microseconds to be applied after each write. | |
8019ff6c NP |
57 | * |
58 | * @reg: Register address. | |
59 | * @def: Register value. | |
2de9d600 | 60 | * @delay_us: Delay to be applied after the register write in microseconds |
8019ff6c NP |
61 | */ |
62 | struct reg_sequence { | |
63 | unsigned int reg; | |
64 | unsigned int def; | |
2de9d600 | 65 | unsigned int delay_us; |
8019ff6c NP |
66 | }; |
67 | ||
ca7a9446 KM |
68 | #define regmap_update_bits(map, reg, mask, val) \ |
69 | regmap_update_bits_base(map, reg, mask, val, NULL, false, false) | |
30ed9cb7 KM |
70 | #define regmap_update_bits_async(map, reg, mask, val)\ |
71 | regmap_update_bits_base(map, reg, mask, val, NULL, true, false) | |
98c2dc48 KM |
72 | #define regmap_update_bits_check(map, reg, mask, val, change)\ |
73 | regmap_update_bits_base(map, reg, mask, val, change, false, false) | |
89d8d4b8 KM |
74 | #define regmap_update_bits_check_async(map, reg, mask, val, change)\ |
75 | regmap_update_bits_base(map, reg, mask, val, change, true, false) | |
ca7a9446 | 76 | |
3674124b KM |
77 | #define regmap_field_write(field, val) \ |
78 | regmap_field_update_bits_base(field, ~0, val, NULL, false, false) | |
721ed64d KM |
79 | #define regmap_field_update_bits(field, mask, val)\ |
80 | regmap_field_update_bits_base(field, mask, val, NULL, false, false) | |
3674124b | 81 | |
b83d2ff0 MB |
82 | #ifdef CONFIG_REGMAP |
83 | ||
141eba2e SW |
84 | enum regmap_endian { |
85 | /* Unspecified -> 0 -> Backwards compatible default */ | |
86 | REGMAP_ENDIAN_DEFAULT = 0, | |
87 | REGMAP_ENDIAN_BIG, | |
88 | REGMAP_ENDIAN_LITTLE, | |
89 | REGMAP_ENDIAN_NATIVE, | |
90 | }; | |
91 | ||
76aad392 DC |
92 | /** |
93 | * A register range, used for access related checks | |
94 | * (readable/writeable/volatile/precious checks) | |
95 | * | |
96 | * @range_min: address of first register | |
97 | * @range_max: address of last register | |
98 | */ | |
99 | struct regmap_range { | |
100 | unsigned int range_min; | |
101 | unsigned int range_max; | |
102 | }; | |
103 | ||
6112fe60 LD |
104 | #define regmap_reg_range(low, high) { .range_min = low, .range_max = high, } |
105 | ||
76aad392 DC |
106 | /* |
107 | * A table of ranges including some yes ranges and some no ranges. | |
108 | * If a register belongs to a no_range, the corresponding check function | |
109 | * will return false. If a register belongs to a yes range, the corresponding | |
110 | * check function will return true. "no_ranges" are searched first. | |
111 | * | |
112 | * @yes_ranges : pointer to an array of regmap ranges used as "yes ranges" | |
113 | * @n_yes_ranges: size of the above array | |
114 | * @no_ranges: pointer to an array of regmap ranges used as "no ranges" | |
115 | * @n_no_ranges: size of the above array | |
116 | */ | |
117 | struct regmap_access_table { | |
118 | const struct regmap_range *yes_ranges; | |
119 | unsigned int n_yes_ranges; | |
120 | const struct regmap_range *no_ranges; | |
121 | unsigned int n_no_ranges; | |
122 | }; | |
123 | ||
0d4529c5 DC |
124 | typedef void (*regmap_lock)(void *); |
125 | typedef void (*regmap_unlock)(void *); | |
126 | ||
dd898b20 MB |
127 | /** |
128 | * Configuration for the register map of a device. | |
129 | * | |
d3c242e1 SW |
130 | * @name: Optional name of the regmap. Useful when a device has multiple |
131 | * register regions. | |
132 | * | |
dd898b20 | 133 | * @reg_bits: Number of bits in a register address, mandatory. |
f01ee60f SW |
134 | * @reg_stride: The register address stride. Valid register addresses are a |
135 | * multiple of this value. If set to 0, a value of 1 will be | |
136 | * used. | |
82159ba8 | 137 | * @pad_bits: Number of bits of padding between register and value. |
dd898b20 | 138 | * @val_bits: Number of bits in a register value, mandatory. |
2e2ae66d | 139 | * |
3566cc9d | 140 | * @writeable_reg: Optional callback returning true if the register |
76aad392 DC |
141 | * can be written to. If this field is NULL but wr_table |
142 | * (see below) is not, the check is performed on such table | |
143 | * (a register is writeable if it belongs to one of the ranges | |
144 | * specified by wr_table). | |
3566cc9d | 145 | * @readable_reg: Optional callback returning true if the register |
76aad392 DC |
146 | * can be read from. If this field is NULL but rd_table |
147 | * (see below) is not, the check is performed on such table | |
148 | * (a register is readable if it belongs to one of the ranges | |
149 | * specified by rd_table). | |
3566cc9d | 150 | * @volatile_reg: Optional callback returning true if the register |
76aad392 DC |
151 | * value can't be cached. If this field is NULL but |
152 | * volatile_table (see below) is not, the check is performed on | |
153 | * such table (a register is volatile if it belongs to one of | |
154 | * the ranges specified by volatile_table). | |
bdc39644 | 155 | * @precious_reg: Optional callback returning true if the register |
76aad392 | 156 | * should not be read outside of a call from the driver |
bdc39644 | 157 | * (e.g., a clear on read interrupt status register). If this |
76aad392 DC |
158 | * field is NULL but precious_table (see below) is not, the |
159 | * check is performed on such table (a register is precious if | |
160 | * it belongs to one of the ranges specified by precious_table). | |
161 | * @lock: Optional lock callback (overrides regmap's default lock | |
162 | * function, based on spinlock or mutex). | |
163 | * @unlock: As above for unlocking. | |
164 | * @lock_arg: this field is passed as the only argument of lock/unlock | |
165 | * functions (ignored in case regular lock/unlock functions | |
166 | * are not overridden). | |
d2a5884a AS |
167 | * @reg_read: Optional callback that if filled will be used to perform |
168 | * all the reads from the registers. Should only be provided for | |
bdc39644 LP |
169 | * devices whose read operation cannot be represented as a simple |
170 | * read operation on a bus such as SPI, I2C, etc. Most of the | |
171 | * devices do not need this. | |
d2a5884a AS |
172 | * @reg_write: Same as above for writing. |
173 | * @fast_io: Register IO is fast. Use a spinlock instead of a mutex | |
174 | * to perform locking. This field is ignored if custom lock/unlock | |
175 | * functions are used (see fields lock/unlock of struct regmap_config). | |
176 | * This field is a duplicate of a similar file in | |
177 | * 'struct regmap_bus' and serves exact same purpose. | |
178 | * Use it only for "no-bus" cases. | |
bd20eb54 | 179 | * @max_register: Optional, specifies the maximum valid register index. |
76aad392 DC |
180 | * @wr_table: Optional, points to a struct regmap_access_table specifying |
181 | * valid ranges for write access. | |
182 | * @rd_table: As above, for read access. | |
183 | * @volatile_table: As above, for volatile registers. | |
184 | * @precious_table: As above, for precious registers. | |
bd20eb54 MB |
185 | * @reg_defaults: Power on reset values for registers (for use with |
186 | * register cache support). | |
187 | * @num_reg_defaults: Number of elements in reg_defaults. | |
6f306441 LPC |
188 | * |
189 | * @read_flag_mask: Mask to be set in the top byte of the register when doing | |
190 | * a read. | |
191 | * @write_flag_mask: Mask to be set in the top byte of the register when doing | |
192 | * a write. If both read_flag_mask and write_flag_mask are | |
193 | * empty the regmap_bus default masks are used. | |
2e33caf1 AJ |
194 | * @use_single_rw: If set, converts the bulk read and write operations into |
195 | * a series of single read and write operations. This is useful | |
196 | * for device that does not support bulk read and write. | |
e894c3f4 OAO |
197 | * @can_multi_write: If set, the device supports the multi write mode of bulk |
198 | * write operations, if clear multi write requests will be | |
199 | * split into individual write operations | |
9fabe24e DP |
200 | * |
201 | * @cache_type: The actual cache type. | |
202 | * @reg_defaults_raw: Power on reset values for registers (for use with | |
203 | * register cache support). | |
204 | * @num_reg_defaults_raw: Number of elements in reg_defaults_raw. | |
141eba2e SW |
205 | * @reg_format_endian: Endianness for formatted register addresses. If this is |
206 | * DEFAULT, the @reg_format_endian_default value from the | |
207 | * regmap bus is used. | |
208 | * @val_format_endian: Endianness for formatted register values. If this is | |
209 | * DEFAULT, the @reg_format_endian_default value from the | |
210 | * regmap bus is used. | |
6863ca62 KG |
211 | * |
212 | * @ranges: Array of configuration entries for virtual address ranges. | |
213 | * @num_ranges: Number of range configuration entries. | |
dd898b20 | 214 | */ |
b83a313b | 215 | struct regmap_config { |
d3c242e1 SW |
216 | const char *name; |
217 | ||
b83a313b | 218 | int reg_bits; |
f01ee60f | 219 | int reg_stride; |
82159ba8 | 220 | int pad_bits; |
b83a313b | 221 | int val_bits; |
2e2ae66d | 222 | |
2e2ae66d MB |
223 | bool (*writeable_reg)(struct device *dev, unsigned int reg); |
224 | bool (*readable_reg)(struct device *dev, unsigned int reg); | |
225 | bool (*volatile_reg)(struct device *dev, unsigned int reg); | |
18694886 | 226 | bool (*precious_reg)(struct device *dev, unsigned int reg); |
0d4529c5 DC |
227 | regmap_lock lock; |
228 | regmap_unlock unlock; | |
229 | void *lock_arg; | |
bd20eb54 | 230 | |
d2a5884a AS |
231 | int (*reg_read)(void *context, unsigned int reg, unsigned int *val); |
232 | int (*reg_write)(void *context, unsigned int reg, unsigned int val); | |
233 | ||
234 | bool fast_io; | |
235 | ||
bd20eb54 | 236 | unsigned int max_register; |
76aad392 DC |
237 | const struct regmap_access_table *wr_table; |
238 | const struct regmap_access_table *rd_table; | |
239 | const struct regmap_access_table *volatile_table; | |
240 | const struct regmap_access_table *precious_table; | |
720e4616 | 241 | const struct reg_default *reg_defaults; |
9fabe24e DP |
242 | unsigned int num_reg_defaults; |
243 | enum regcache_type cache_type; | |
244 | const void *reg_defaults_raw; | |
245 | unsigned int num_reg_defaults_raw; | |
6f306441 LPC |
246 | |
247 | u8 read_flag_mask; | |
248 | u8 write_flag_mask; | |
2e33caf1 AJ |
249 | |
250 | bool use_single_rw; | |
e894c3f4 | 251 | bool can_multi_write; |
141eba2e SW |
252 | |
253 | enum regmap_endian reg_format_endian; | |
254 | enum regmap_endian val_format_endian; | |
38e23194 | 255 | |
6863ca62 | 256 | const struct regmap_range_cfg *ranges; |
e3549cd0 | 257 | unsigned int num_ranges; |
6863ca62 KG |
258 | }; |
259 | ||
260 | /** | |
261 | * Configuration for indirectly accessed or paged registers. | |
262 | * Registers, mapped to this virtual range, are accessed in two steps: | |
263 | * 1. page selector register update; | |
264 | * 2. access through data window registers. | |
265 | * | |
d058bb49 MB |
266 | * @name: Descriptive name for diagnostics |
267 | * | |
6863ca62 KG |
268 | * @range_min: Address of the lowest register address in virtual range. |
269 | * @range_max: Address of the highest register in virtual range. | |
270 | * | |
271 | * @page_sel_reg: Register with selector field. | |
272 | * @page_sel_mask: Bit shift for selector value. | |
273 | * @page_sel_shift: Bit mask for selector value. | |
274 | * | |
275 | * @window_start: Address of first (lowest) register in data window. | |
276 | * @window_len: Number of registers in data window. | |
277 | */ | |
278 | struct regmap_range_cfg { | |
d058bb49 MB |
279 | const char *name; |
280 | ||
6863ca62 KG |
281 | /* Registers of virtual address range */ |
282 | unsigned int range_min; | |
283 | unsigned int range_max; | |
284 | ||
285 | /* Page selector for indirect addressing */ | |
286 | unsigned int selector_reg; | |
287 | unsigned int selector_mask; | |
288 | int selector_shift; | |
289 | ||
290 | /* Data window (per each page) */ | |
291 | unsigned int window_start; | |
292 | unsigned int window_len; | |
b83a313b MB |
293 | }; |
294 | ||
0d509f2b MB |
295 | struct regmap_async; |
296 | ||
0135bbcc | 297 | typedef int (*regmap_hw_write)(void *context, const void *data, |
b83a313b | 298 | size_t count); |
0135bbcc | 299 | typedef int (*regmap_hw_gather_write)(void *context, |
b83a313b MB |
300 | const void *reg, size_t reg_len, |
301 | const void *val, size_t val_len); | |
0d509f2b MB |
302 | typedef int (*regmap_hw_async_write)(void *context, |
303 | const void *reg, size_t reg_len, | |
304 | const void *val, size_t val_len, | |
305 | struct regmap_async *async); | |
0135bbcc | 306 | typedef int (*regmap_hw_read)(void *context, |
b83a313b MB |
307 | const void *reg_buf, size_t reg_size, |
308 | void *val_buf, size_t val_size); | |
3ac17037 BB |
309 | typedef int (*regmap_hw_reg_read)(void *context, unsigned int reg, |
310 | unsigned int *val); | |
311 | typedef int (*regmap_hw_reg_write)(void *context, unsigned int reg, | |
312 | unsigned int val); | |
77792b11 JR |
313 | typedef int (*regmap_hw_reg_update_bits)(void *context, unsigned int reg, |
314 | unsigned int mask, unsigned int val); | |
0d509f2b | 315 | typedef struct regmap_async *(*regmap_hw_async_alloc)(void); |
0135bbcc | 316 | typedef void (*regmap_hw_free_context)(void *context); |
b83a313b MB |
317 | |
318 | /** | |
319 | * Description of a hardware bus for the register map infrastructure. | |
320 | * | |
bacdbe07 | 321 | * @fast_io: Register IO is fast. Use a spinlock instead of a mutex |
0d4529c5 DC |
322 | * to perform locking. This field is ignored if custom lock/unlock |
323 | * functions are used (see fields lock/unlock of | |
324 | * struct regmap_config). | |
b83a313b MB |
325 | * @write: Write operation. |
326 | * @gather_write: Write operation with split register/value, return -ENOTSUPP | |
327 | * if not implemented on a given device. | |
0d509f2b MB |
328 | * @async_write: Write operation which completes asynchronously, optional and |
329 | * must serialise with respect to non-async I/O. | |
c5f58f2d MP |
330 | * @reg_write: Write a single register value to the given register address. This |
331 | * write operation has to complete when returning from the function. | |
b83a313b MB |
332 | * @read: Read operation. Data is returned in the buffer used to transmit |
333 | * data. | |
c5f58f2d MP |
334 | * @reg_read: Read a single register value from a given register address. |
335 | * @free_context: Free context. | |
0d509f2b | 336 | * @async_alloc: Allocate a regmap_async() structure. |
b83a313b MB |
337 | * @read_flag_mask: Mask to be set in the top byte of the register when doing |
338 | * a read. | |
141eba2e SW |
339 | * @reg_format_endian_default: Default endianness for formatted register |
340 | * addresses. Used when the regmap_config specifies DEFAULT. If this is | |
341 | * DEFAULT, BIG is assumed. | |
342 | * @val_format_endian_default: Default endianness for formatted register | |
343 | * values. Used when the regmap_config specifies DEFAULT. If this is | |
344 | * DEFAULT, BIG is assumed. | |
adaac459 MP |
345 | * @max_raw_read: Max raw read size that can be used on the bus. |
346 | * @max_raw_write: Max raw write size that can be used on the bus. | |
b83a313b MB |
347 | */ |
348 | struct regmap_bus { | |
bacdbe07 | 349 | bool fast_io; |
b83a313b MB |
350 | regmap_hw_write write; |
351 | regmap_hw_gather_write gather_write; | |
0d509f2b | 352 | regmap_hw_async_write async_write; |
3ac17037 | 353 | regmap_hw_reg_write reg_write; |
77792b11 | 354 | regmap_hw_reg_update_bits reg_update_bits; |
b83a313b | 355 | regmap_hw_read read; |
3ac17037 | 356 | regmap_hw_reg_read reg_read; |
0135bbcc | 357 | regmap_hw_free_context free_context; |
0d509f2b | 358 | regmap_hw_async_alloc async_alloc; |
b83a313b | 359 | u8 read_flag_mask; |
141eba2e SW |
360 | enum regmap_endian reg_format_endian_default; |
361 | enum regmap_endian val_format_endian_default; | |
adaac459 MP |
362 | size_t max_raw_read; |
363 | size_t max_raw_write; | |
b83a313b MB |
364 | }; |
365 | ||
3cfe7a74 NB |
366 | /* |
367 | * __regmap_init functions. | |
368 | * | |
369 | * These functions take a lock key and name parameter, and should not be called | |
370 | * directly. Instead, use the regmap_init macros that generate a key and name | |
371 | * for each call. | |
372 | */ | |
373 | struct regmap *__regmap_init(struct device *dev, | |
374 | const struct regmap_bus *bus, | |
375 | void *bus_context, | |
376 | const struct regmap_config *config, | |
377 | struct lock_class_key *lock_key, | |
378 | const char *lock_name); | |
379 | struct regmap *__regmap_init_i2c(struct i2c_client *i2c, | |
380 | const struct regmap_config *config, | |
381 | struct lock_class_key *lock_key, | |
382 | const char *lock_name); | |
383 | struct regmap *__regmap_init_spi(struct spi_device *dev, | |
384 | const struct regmap_config *config, | |
385 | struct lock_class_key *lock_key, | |
386 | const char *lock_name); | |
387 | struct regmap *__regmap_init_spmi_base(struct spmi_device *dev, | |
388 | const struct regmap_config *config, | |
389 | struct lock_class_key *lock_key, | |
390 | const char *lock_name); | |
391 | struct regmap *__regmap_init_spmi_ext(struct spmi_device *dev, | |
392 | const struct regmap_config *config, | |
393 | struct lock_class_key *lock_key, | |
394 | const char *lock_name); | |
395 | struct regmap *__regmap_init_mmio_clk(struct device *dev, const char *clk_id, | |
396 | void __iomem *regs, | |
397 | const struct regmap_config *config, | |
398 | struct lock_class_key *lock_key, | |
399 | const char *lock_name); | |
400 | struct regmap *__regmap_init_ac97(struct snd_ac97 *ac97, | |
401 | const struct regmap_config *config, | |
402 | struct lock_class_key *lock_key, | |
403 | const char *lock_name); | |
404 | ||
405 | struct regmap *__devm_regmap_init(struct device *dev, | |
406 | const struct regmap_bus *bus, | |
407 | void *bus_context, | |
408 | const struct regmap_config *config, | |
409 | struct lock_class_key *lock_key, | |
410 | const char *lock_name); | |
411 | struct regmap *__devm_regmap_init_i2c(struct i2c_client *i2c, | |
412 | const struct regmap_config *config, | |
413 | struct lock_class_key *lock_key, | |
414 | const char *lock_name); | |
415 | struct regmap *__devm_regmap_init_spi(struct spi_device *dev, | |
416 | const struct regmap_config *config, | |
417 | struct lock_class_key *lock_key, | |
418 | const char *lock_name); | |
419 | struct regmap *__devm_regmap_init_spmi_base(struct spmi_device *dev, | |
420 | const struct regmap_config *config, | |
421 | struct lock_class_key *lock_key, | |
422 | const char *lock_name); | |
423 | struct regmap *__devm_regmap_init_spmi_ext(struct spmi_device *dev, | |
424 | const struct regmap_config *config, | |
425 | struct lock_class_key *lock_key, | |
426 | const char *lock_name); | |
427 | struct regmap *__devm_regmap_init_mmio_clk(struct device *dev, | |
428 | const char *clk_id, | |
429 | void __iomem *regs, | |
430 | const struct regmap_config *config, | |
431 | struct lock_class_key *lock_key, | |
432 | const char *lock_name); | |
433 | struct regmap *__devm_regmap_init_ac97(struct snd_ac97 *ac97, | |
434 | const struct regmap_config *config, | |
435 | struct lock_class_key *lock_key, | |
436 | const char *lock_name); | |
22853223 | 437 | |
3cfe7a74 NB |
438 | /* |
439 | * Wrapper for regmap_init macros to include a unique lockdep key and name | |
440 | * for each call. No-op if CONFIG_LOCKDEP is not set. | |
441 | * | |
442 | * @fn: Real function to call (in the form __[*_]regmap_init[_*]) | |
443 | * @name: Config variable name (#config in the calling macro) | |
444 | **/ | |
445 | #ifdef CONFIG_LOCKDEP | |
446 | #define __regmap_lockdep_wrapper(fn, name, ...) \ | |
447 | ( \ | |
448 | ({ \ | |
449 | static struct lock_class_key _key; \ | |
450 | fn(__VA_ARGS__, &_key, \ | |
451 | KBUILD_BASENAME ":" \ | |
452 | __stringify(__LINE__) ":" \ | |
453 | "(" name ")->lock"); \ | |
454 | }) \ | |
455 | ) | |
456 | #else | |
457 | #define __regmap_lockdep_wrapper(fn, name, ...) fn(__VA_ARGS__, NULL, NULL) | |
458 | #endif | |
459 | ||
1ed81114 NB |
460 | /** |
461 | * regmap_init(): Initialise register map | |
462 | * | |
463 | * @dev: Device that will be interacted with | |
464 | * @bus: Bus-specific callbacks to use with device | |
465 | * @bus_context: Data passed to bus-specific callbacks | |
466 | * @config: Configuration for register map | |
467 | * | |
468 | * The return value will be an ERR_PTR() on error or a valid pointer to | |
469 | * a struct regmap. This function should generally not be called | |
470 | * directly, it should be called by bus-specific init functions. | |
471 | */ | |
3cfe7a74 NB |
472 | #define regmap_init(dev, bus, bus_context, config) \ |
473 | __regmap_lockdep_wrapper(__regmap_init, #config, \ | |
474 | dev, bus, bus_context, config) | |
6cfec04b | 475 | int regmap_attach_dev(struct device *dev, struct regmap *map, |
3cfe7a74 | 476 | const struct regmap_config *config); |
22853223 | 477 | |
1ed81114 NB |
478 | /** |
479 | * regmap_init_i2c(): Initialise register map | |
480 | * | |
481 | * @i2c: Device that will be interacted with | |
482 | * @config: Configuration for register map | |
483 | * | |
484 | * The return value will be an ERR_PTR() on error or a valid pointer to | |
485 | * a struct regmap. | |
486 | */ | |
3cfe7a74 NB |
487 | #define regmap_init_i2c(i2c, config) \ |
488 | __regmap_lockdep_wrapper(__regmap_init_i2c, #config, \ | |
489 | i2c, config) | |
1ed81114 NB |
490 | |
491 | /** | |
492 | * regmap_init_spi(): Initialise register map | |
493 | * | |
494 | * @spi: Device that will be interacted with | |
495 | * @config: Configuration for register map | |
496 | * | |
497 | * The return value will be an ERR_PTR() on error or a valid pointer to | |
498 | * a struct regmap. | |
499 | */ | |
3cfe7a74 NB |
500 | #define regmap_init_spi(dev, config) \ |
501 | __regmap_lockdep_wrapper(__regmap_init_spi, #config, \ | |
502 | dev, config) | |
1ed81114 NB |
503 | |
504 | /** | |
505 | * regmap_init_spmi_base(): Create regmap for the Base register space | |
506 | * @sdev: SPMI device that will be interacted with | |
507 | * @config: Configuration for register map | |
508 | * | |
509 | * The return value will be an ERR_PTR() on error or a valid pointer to | |
510 | * a struct regmap. | |
511 | */ | |
3cfe7a74 NB |
512 | #define regmap_init_spmi_base(dev, config) \ |
513 | __regmap_lockdep_wrapper(__regmap_init_spmi_base, #config, \ | |
514 | dev, config) | |
1ed81114 NB |
515 | |
516 | /** | |
517 | * regmap_init_spmi_ext(): Create regmap for Ext register space | |
518 | * @sdev: Device that will be interacted with | |
519 | * @config: Configuration for register map | |
520 | * | |
521 | * The return value will be an ERR_PTR() on error or a valid pointer to | |
522 | * a struct regmap. | |
523 | */ | |
3cfe7a74 NB |
524 | #define regmap_init_spmi_ext(dev, config) \ |
525 | __regmap_lockdep_wrapper(__regmap_init_spmi_ext, #config, \ | |
526 | dev, config) | |
1ed81114 NB |
527 | |
528 | /** | |
529 | * regmap_init_mmio_clk(): Initialise register map with register clock | |
530 | * | |
531 | * @dev: Device that will be interacted with | |
532 | * @clk_id: register clock consumer ID | |
533 | * @regs: Pointer to memory-mapped IO region | |
534 | * @config: Configuration for register map | |
535 | * | |
536 | * The return value will be an ERR_PTR() on error or a valid pointer to | |
537 | * a struct regmap. | |
538 | */ | |
3cfe7a74 NB |
539 | #define regmap_init_mmio_clk(dev, clk_id, regs, config) \ |
540 | __regmap_lockdep_wrapper(__regmap_init_mmio_clk, #config, \ | |
541 | dev, clk_id, regs, config) | |
878ec67b PZ |
542 | |
543 | /** | |
544 | * regmap_init_mmio(): Initialise register map | |
545 | * | |
546 | * @dev: Device that will be interacted with | |
547 | * @regs: Pointer to memory-mapped IO region | |
548 | * @config: Configuration for register map | |
549 | * | |
550 | * The return value will be an ERR_PTR() on error or a valid pointer to | |
551 | * a struct regmap. | |
552 | */ | |
1ed81114 NB |
553 | #define regmap_init_mmio(dev, regs, config) \ |
554 | regmap_init_mmio_clk(dev, NULL, regs, config) | |
555 | ||
556 | /** | |
557 | * regmap_init_ac97(): Initialise AC'97 register map | |
558 | * | |
559 | * @ac97: Device that will be interacted with | |
560 | * @config: Configuration for register map | |
561 | * | |
562 | * The return value will be an ERR_PTR() on error or a valid pointer to | |
563 | * a struct regmap. | |
564 | */ | |
3cfe7a74 NB |
565 | #define regmap_init_ac97(ac97, config) \ |
566 | __regmap_lockdep_wrapper(__regmap_init_ac97, #config, \ | |
567 | ac97, config) | |
22853223 | 568 | bool regmap_ac97_default_volatile(struct device *dev, unsigned int reg); |
878ec67b | 569 | |
1ed81114 NB |
570 | /** |
571 | * devm_regmap_init(): Initialise managed register map | |
572 | * | |
573 | * @dev: Device that will be interacted with | |
574 | * @bus: Bus-specific callbacks to use with device | |
575 | * @bus_context: Data passed to bus-specific callbacks | |
576 | * @config: Configuration for register map | |
577 | * | |
578 | * The return value will be an ERR_PTR() on error or a valid pointer | |
579 | * to a struct regmap. This function should generally not be called | |
580 | * directly, it should be called by bus-specific init functions. The | |
581 | * map will be automatically freed by the device management code. | |
582 | */ | |
3cfe7a74 NB |
583 | #define devm_regmap_init(dev, bus, bus_context, config) \ |
584 | __regmap_lockdep_wrapper(__devm_regmap_init, #config, \ | |
585 | dev, bus, bus_context, config) | |
1ed81114 NB |
586 | |
587 | /** | |
588 | * devm_regmap_init_i2c(): Initialise managed register map | |
589 | * | |
590 | * @i2c: Device that will be interacted with | |
591 | * @config: Configuration for register map | |
592 | * | |
593 | * The return value will be an ERR_PTR() on error or a valid pointer | |
594 | * to a struct regmap. The regmap will be automatically freed by the | |
595 | * device management code. | |
596 | */ | |
3cfe7a74 NB |
597 | #define devm_regmap_init_i2c(i2c, config) \ |
598 | __regmap_lockdep_wrapper(__devm_regmap_init_i2c, #config, \ | |
599 | i2c, config) | |
1ed81114 NB |
600 | |
601 | /** | |
602 | * devm_regmap_init_spi(): Initialise register map | |
603 | * | |
604 | * @spi: Device that will be interacted with | |
605 | * @config: Configuration for register map | |
606 | * | |
607 | * The return value will be an ERR_PTR() on error or a valid pointer | |
608 | * to a struct regmap. The map will be automatically freed by the | |
609 | * device management code. | |
610 | */ | |
3cfe7a74 NB |
611 | #define devm_regmap_init_spi(dev, config) \ |
612 | __regmap_lockdep_wrapper(__devm_regmap_init_spi, #config, \ | |
613 | dev, config) | |
1ed81114 NB |
614 | |
615 | /** | |
616 | * devm_regmap_init_spmi_base(): Create managed regmap for Base register space | |
617 | * @sdev: SPMI device that will be interacted with | |
618 | * @config: Configuration for register map | |
619 | * | |
620 | * The return value will be an ERR_PTR() on error or a valid pointer | |
621 | * to a struct regmap. The regmap will be automatically freed by the | |
622 | * device management code. | |
623 | */ | |
3cfe7a74 NB |
624 | #define devm_regmap_init_spmi_base(dev, config) \ |
625 | __regmap_lockdep_wrapper(__devm_regmap_init_spmi_base, #config, \ | |
626 | dev, config) | |
1ed81114 NB |
627 | |
628 | /** | |
629 | * devm_regmap_init_spmi_ext(): Create managed regmap for Ext register space | |
630 | * @sdev: SPMI device that will be interacted with | |
631 | * @config: Configuration for register map | |
632 | * | |
633 | * The return value will be an ERR_PTR() on error or a valid pointer | |
634 | * to a struct regmap. The regmap will be automatically freed by the | |
635 | * device management code. | |
636 | */ | |
3cfe7a74 NB |
637 | #define devm_regmap_init_spmi_ext(dev, config) \ |
638 | __regmap_lockdep_wrapper(__devm_regmap_init_spmi_ext, #config, \ | |
639 | dev, config) | |
3cfe7a74 | 640 | |
878ec67b | 641 | /** |
1ed81114 | 642 | * devm_regmap_init_mmio_clk(): Initialise managed register map with clock |
878ec67b PZ |
643 | * |
644 | * @dev: Device that will be interacted with | |
1ed81114 | 645 | * @clk_id: register clock consumer ID |
878ec67b PZ |
646 | * @regs: Pointer to memory-mapped IO region |
647 | * @config: Configuration for register map | |
648 | * | |
1ed81114 NB |
649 | * The return value will be an ERR_PTR() on error or a valid pointer |
650 | * to a struct regmap. The regmap will be automatically freed by the | |
651 | * device management code. | |
878ec67b | 652 | */ |
1ed81114 NB |
653 | #define devm_regmap_init_mmio_clk(dev, clk_id, regs, config) \ |
654 | __regmap_lockdep_wrapper(__devm_regmap_init_mmio_clk, #config, \ | |
655 | dev, clk_id, regs, config) | |
878ec67b PZ |
656 | |
657 | /** | |
658 | * devm_regmap_init_mmio(): Initialise managed register map | |
659 | * | |
660 | * @dev: Device that will be interacted with | |
661 | * @regs: Pointer to memory-mapped IO region | |
662 | * @config: Configuration for register map | |
663 | * | |
664 | * The return value will be an ERR_PTR() on error or a valid pointer | |
665 | * to a struct regmap. The regmap will be automatically freed by the | |
666 | * device management code. | |
667 | */ | |
3cfe7a74 NB |
668 | #define devm_regmap_init_mmio(dev, regs, config) \ |
669 | devm_regmap_init_mmio_clk(dev, NULL, regs, config) | |
c0eb4676 | 670 | |
1ed81114 NB |
671 | /** |
672 | * devm_regmap_init_ac97(): Initialise AC'97 register map | |
673 | * | |
674 | * @ac97: Device that will be interacted with | |
675 | * @config: Configuration for register map | |
676 | * | |
677 | * The return value will be an ERR_PTR() on error or a valid pointer | |
678 | * to a struct regmap. The regmap will be automatically freed by the | |
679 | * device management code. | |
680 | */ | |
681 | #define devm_regmap_init_ac97(ac97, config) \ | |
682 | __regmap_lockdep_wrapper(__devm_regmap_init_ac97, #config, \ | |
683 | ac97, config) | |
c0eb4676 | 684 | |
b83a313b | 685 | void regmap_exit(struct regmap *map); |
bf315173 MB |
686 | int regmap_reinit_cache(struct regmap *map, |
687 | const struct regmap_config *config); | |
72b39f6f | 688 | struct regmap *dev_get_regmap(struct device *dev, const char *name); |
8d7d3972 | 689 | struct device *regmap_get_device(struct regmap *map); |
b83a313b | 690 | int regmap_write(struct regmap *map, unsigned int reg, unsigned int val); |
915f441b | 691 | int regmap_write_async(struct regmap *map, unsigned int reg, unsigned int val); |
b83a313b MB |
692 | int regmap_raw_write(struct regmap *map, unsigned int reg, |
693 | const void *val, size_t val_len); | |
8eaeb219 LD |
694 | int regmap_bulk_write(struct regmap *map, unsigned int reg, const void *val, |
695 | size_t val_count); | |
8019ff6c | 696 | int regmap_multi_reg_write(struct regmap *map, const struct reg_sequence *regs, |
e33fabd3 | 697 | int num_regs); |
1d5b40bc | 698 | int regmap_multi_reg_write_bypassed(struct regmap *map, |
8019ff6c | 699 | const struct reg_sequence *regs, |
1d5b40bc | 700 | int num_regs); |
0d509f2b MB |
701 | int regmap_raw_write_async(struct regmap *map, unsigned int reg, |
702 | const void *val, size_t val_len); | |
b83a313b MB |
703 | int regmap_read(struct regmap *map, unsigned int reg, unsigned int *val); |
704 | int regmap_raw_read(struct regmap *map, unsigned int reg, | |
705 | void *val, size_t val_len); | |
706 | int regmap_bulk_read(struct regmap *map, unsigned int reg, void *val, | |
707 | size_t val_count); | |
91d31b9f KM |
708 | int regmap_update_bits_base(struct regmap *map, unsigned int reg, |
709 | unsigned int mask, unsigned int val, | |
710 | bool *change, bool async, bool force); | |
fd4b7286 KM |
711 | int regmap_write_bits(struct regmap *map, unsigned int reg, |
712 | unsigned int mask, unsigned int val); | |
a6539c32 | 713 | int regmap_get_val_bytes(struct regmap *map); |
668abc72 | 714 | int regmap_get_max_register(struct regmap *map); |
a2f776cb | 715 | int regmap_get_reg_stride(struct regmap *map); |
0d509f2b | 716 | int regmap_async_complete(struct regmap *map); |
221ad7f2 | 717 | bool regmap_can_raw_write(struct regmap *map); |
f50c9eb4 MP |
718 | size_t regmap_get_raw_read_max(struct regmap *map); |
719 | size_t regmap_get_raw_write_max(struct regmap *map); | |
b83a313b | 720 | |
39a58439 | 721 | int regcache_sync(struct regmap *map); |
4d4cfd16 MB |
722 | int regcache_sync_region(struct regmap *map, unsigned int min, |
723 | unsigned int max); | |
697e85bc MB |
724 | int regcache_drop_region(struct regmap *map, unsigned int min, |
725 | unsigned int max); | |
92afb286 | 726 | void regcache_cache_only(struct regmap *map, bool enable); |
6eb0f5e0 | 727 | void regcache_cache_bypass(struct regmap *map, bool enable); |
8ae0d7e8 | 728 | void regcache_mark_dirty(struct regmap *map); |
92afb286 | 729 | |
154881e5 MB |
730 | bool regmap_check_range_table(struct regmap *map, unsigned int reg, |
731 | const struct regmap_access_table *table); | |
732 | ||
8019ff6c | 733 | int regmap_register_patch(struct regmap *map, const struct reg_sequence *regs, |
22f0d90a | 734 | int num_regs); |
13ff50c8 NC |
735 | int regmap_parse_val(struct regmap *map, const void *buf, |
736 | unsigned int *val); | |
22f0d90a | 737 | |
76aad392 DC |
738 | static inline bool regmap_reg_in_range(unsigned int reg, |
739 | const struct regmap_range *range) | |
740 | { | |
741 | return reg >= range->range_min && reg <= range->range_max; | |
742 | } | |
743 | ||
744 | bool regmap_reg_in_ranges(unsigned int reg, | |
745 | const struct regmap_range *ranges, | |
746 | unsigned int nranges); | |
747 | ||
67252287 SK |
748 | /** |
749 | * Description of an register field | |
750 | * | |
751 | * @reg: Offset of the register within the regmap bank | |
752 | * @lsb: lsb of the register field. | |
f27b37f5 | 753 | * @msb: msb of the register field. |
a0102375 KM |
754 | * @id_size: port size if it has some ports |
755 | * @id_offset: address offset for each ports | |
67252287 SK |
756 | */ |
757 | struct reg_field { | |
758 | unsigned int reg; | |
759 | unsigned int lsb; | |
760 | unsigned int msb; | |
a0102375 KM |
761 | unsigned int id_size; |
762 | unsigned int id_offset; | |
67252287 SK |
763 | }; |
764 | ||
765 | #define REG_FIELD(_reg, _lsb, _msb) { \ | |
766 | .reg = _reg, \ | |
767 | .lsb = _lsb, \ | |
768 | .msb = _msb, \ | |
769 | } | |
770 | ||
771 | struct regmap_field *regmap_field_alloc(struct regmap *regmap, | |
772 | struct reg_field reg_field); | |
773 | void regmap_field_free(struct regmap_field *field); | |
774 | ||
775 | struct regmap_field *devm_regmap_field_alloc(struct device *dev, | |
776 | struct regmap *regmap, struct reg_field reg_field); | |
777 | void devm_regmap_field_free(struct device *dev, struct regmap_field *field); | |
778 | ||
779 | int regmap_field_read(struct regmap_field *field, unsigned int *val); | |
28972eaa KM |
780 | int regmap_field_update_bits_base(struct regmap_field *field, |
781 | unsigned int mask, unsigned int val, | |
782 | bool *change, bool async, bool force); | |
a0102375 KM |
783 | int regmap_fields_write(struct regmap_field *field, unsigned int id, |
784 | unsigned int val); | |
e874e6c7 KM |
785 | int regmap_fields_force_write(struct regmap_field *field, unsigned int id, |
786 | unsigned int val); | |
a0102375 KM |
787 | int regmap_fields_read(struct regmap_field *field, unsigned int id, |
788 | unsigned int *val); | |
789 | int regmap_fields_update_bits(struct regmap_field *field, unsigned int id, | |
790 | unsigned int mask, unsigned int val); | |
e126edec KM |
791 | int regmap_fields_update_bits_base(struct regmap_field *field, unsigned int id, |
792 | unsigned int mask, unsigned int val, | |
793 | bool *change, bool async, bool force); | |
76aad392 | 794 | |
f8beab2b MB |
795 | /** |
796 | * Description of an IRQ for the generic regmap irq_chip. | |
797 | * | |
798 | * @reg_offset: Offset of the status/mask register within the bank | |
799 | * @mask: Mask used to flag/control the register. | |
7a78479f LD |
800 | * @type_reg_offset: Offset register for the irq type setting. |
801 | * @type_rising_mask: Mask bit to configure RISING type irq. | |
802 | * @type_falling_mask: Mask bit to configure FALLING type irq. | |
f8beab2b MB |
803 | */ |
804 | struct regmap_irq { | |
805 | unsigned int reg_offset; | |
806 | unsigned int mask; | |
7a78479f LD |
807 | unsigned int type_reg_offset; |
808 | unsigned int type_rising_mask; | |
809 | unsigned int type_falling_mask; | |
f8beab2b MB |
810 | }; |
811 | ||
b4fe8ba7 QZ |
812 | #define REGMAP_IRQ_REG(_irq, _off, _mask) \ |
813 | [_irq] = { .reg_offset = (_off), .mask = (_mask) } | |
814 | ||
f8beab2b MB |
815 | /** |
816 | * Description of a generic regmap irq_chip. This is not intended to | |
817 | * handle every possible interrupt controller, but it should handle a | |
818 | * substantial proportion of those that are found in the wild. | |
819 | * | |
820 | * @name: Descriptive name for IRQ controller. | |
821 | * | |
822 | * @status_base: Base status register address. | |
823 | * @mask_base: Base mask register address. | |
7b7d1968 GZ |
824 | * @unmask_base: Base unmask register address. for chips who have |
825 | * separate mask and unmask registers | |
d3233433 AS |
826 | * @ack_base: Base ack address. If zero then the chip is clear on read. |
827 | * Using zero value is possible with @use_ack bit. | |
a43fd50d | 828 | * @wake_base: Base address for wake enables. If zero unsupported. |
7a78479f | 829 | * @type_base: Base address for irq type. If zero unsupported. |
022f926a | 830 | * @irq_reg_stride: Stride to use for chips where registers are not contiguous. |
2753e6f8 | 831 | * @init_ack_masked: Ack all masked interrupts once during initalization. |
68622bdf | 832 | * @mask_invert: Inverted mask register: cleared bits are masked out. |
d3233433 | 833 | * @use_ack: Use @ack register even if it is zero. |
a650fdd9 | 834 | * @ack_invert: Inverted ack register: cleared bits for ack. |
68622bdf | 835 | * @wake_invert: Inverted wake register: cleared bits are wake enabled. |
7a78479f | 836 | * @type_invert: Invert the type flags. |
0c00c50b | 837 | * @runtime_pm: Hold a runtime PM lock on the device when accessing it. |
f8beab2b MB |
838 | * |
839 | * @num_regs: Number of registers in each control bank. | |
840 | * @irqs: Descriptors for individual IRQs. Interrupt numbers are | |
841 | * assigned based on the index in the array of the interrupt. | |
842 | * @num_irqs: Number of descriptors. | |
7a78479f LD |
843 | * @num_type_reg: Number of type registers. |
844 | * @type_reg_stride: Stride to use for chips where type registers are not | |
845 | * contiguous. | |
f8beab2b MB |
846 | */ |
847 | struct regmap_irq_chip { | |
848 | const char *name; | |
849 | ||
850 | unsigned int status_base; | |
851 | unsigned int mask_base; | |
7b7d1968 | 852 | unsigned int unmask_base; |
f8beab2b | 853 | unsigned int ack_base; |
a43fd50d | 854 | unsigned int wake_base; |
7a78479f | 855 | unsigned int type_base; |
022f926a | 856 | unsigned int irq_reg_stride; |
f484f7a6 PZ |
857 | bool init_ack_masked:1; |
858 | bool mask_invert:1; | |
d3233433 | 859 | bool use_ack:1; |
a650fdd9 | 860 | bool ack_invert:1; |
f484f7a6 PZ |
861 | bool wake_invert:1; |
862 | bool runtime_pm:1; | |
7a78479f | 863 | bool type_invert:1; |
f8beab2b MB |
864 | |
865 | int num_regs; | |
866 | ||
867 | const struct regmap_irq *irqs; | |
868 | int num_irqs; | |
7a78479f LD |
869 | |
870 | int num_type_reg; | |
871 | unsigned int type_reg_stride; | |
f8beab2b MB |
872 | }; |
873 | ||
874 | struct regmap_irq_chip_data; | |
875 | ||
876 | int regmap_add_irq_chip(struct regmap *map, int irq, int irq_flags, | |
b026ddbb | 877 | int irq_base, const struct regmap_irq_chip *chip, |
f8beab2b MB |
878 | struct regmap_irq_chip_data **data); |
879 | void regmap_del_irq_chip(int irq, struct regmap_irq_chip_data *data); | |
209a6006 | 880 | int regmap_irq_chip_get_base(struct regmap_irq_chip_data *data); |
4af8be67 | 881 | int regmap_irq_get_virq(struct regmap_irq_chip_data *data, int irq); |
90f790d2 | 882 | struct irq_domain *regmap_irq_get_domain(struct regmap_irq_chip_data *data); |
92afb286 | 883 | |
9cde5fcd MB |
884 | #else |
885 | ||
886 | /* | |
887 | * These stubs should only ever be called by generic code which has | |
888 | * regmap based facilities, if they ever get called at runtime | |
889 | * something is going wrong and something probably needs to select | |
890 | * REGMAP. | |
891 | */ | |
892 | ||
893 | static inline int regmap_write(struct regmap *map, unsigned int reg, | |
894 | unsigned int val) | |
895 | { | |
896 | WARN_ONCE(1, "regmap API is disabled"); | |
897 | return -EINVAL; | |
898 | } | |
899 | ||
915f441b MB |
900 | static inline int regmap_write_async(struct regmap *map, unsigned int reg, |
901 | unsigned int val) | |
902 | { | |
903 | WARN_ONCE(1, "regmap API is disabled"); | |
904 | return -EINVAL; | |
905 | } | |
906 | ||
9cde5fcd MB |
907 | static inline int regmap_raw_write(struct regmap *map, unsigned int reg, |
908 | const void *val, size_t val_len) | |
909 | { | |
910 | WARN_ONCE(1, "regmap API is disabled"); | |
911 | return -EINVAL; | |
912 | } | |
913 | ||
0d509f2b MB |
914 | static inline int regmap_raw_write_async(struct regmap *map, unsigned int reg, |
915 | const void *val, size_t val_len) | |
916 | { | |
917 | WARN_ONCE(1, "regmap API is disabled"); | |
918 | return -EINVAL; | |
919 | } | |
920 | ||
9cde5fcd MB |
921 | static inline int regmap_bulk_write(struct regmap *map, unsigned int reg, |
922 | const void *val, size_t val_count) | |
923 | { | |
924 | WARN_ONCE(1, "regmap API is disabled"); | |
925 | return -EINVAL; | |
926 | } | |
927 | ||
928 | static inline int regmap_read(struct regmap *map, unsigned int reg, | |
929 | unsigned int *val) | |
930 | { | |
931 | WARN_ONCE(1, "regmap API is disabled"); | |
932 | return -EINVAL; | |
933 | } | |
934 | ||
935 | static inline int regmap_raw_read(struct regmap *map, unsigned int reg, | |
936 | void *val, size_t val_len) | |
937 | { | |
938 | WARN_ONCE(1, "regmap API is disabled"); | |
939 | return -EINVAL; | |
940 | } | |
941 | ||
942 | static inline int regmap_bulk_read(struct regmap *map, unsigned int reg, | |
943 | void *val, size_t val_count) | |
944 | { | |
945 | WARN_ONCE(1, "regmap API is disabled"); | |
946 | return -EINVAL; | |
947 | } | |
948 | ||
91d31b9f KM |
949 | static inline int regmap_update_bits_base(struct regmap *map, unsigned int reg, |
950 | unsigned int mask, unsigned int val, | |
951 | bool *change, bool async, bool force) | |
952 | { | |
953 | WARN_ONCE(1, "regmap API is disabled"); | |
954 | return -EINVAL; | |
955 | } | |
956 | ||
fd4b7286 KM |
957 | static inline int regmap_write_bits(struct regmap *map, unsigned int reg, |
958 | unsigned int mask, unsigned int val) | |
959 | { | |
960 | WARN_ONCE(1, "regmap API is disabled"); | |
961 | return -EINVAL; | |
962 | } | |
963 | ||
28972eaa KM |
964 | static inline int regmap_field_update_bits_base(struct regmap_field *field, |
965 | unsigned int mask, unsigned int val, | |
966 | bool *change, bool async, bool force) | |
967 | { | |
968 | WARN_ONCE(1, "regmap API is disabled"); | |
969 | return -EINVAL; | |
970 | } | |
971 | ||
e126edec KM |
972 | static inline int regmap_fields_update_bits_base(struct regmap_field *field, |
973 | unsigned int id, | |
974 | unsigned int mask, unsigned int val, | |
975 | bool *change, bool async, bool force) | |
976 | { | |
977 | WARN_ONCE(1, "regmap API is disabled"); | |
978 | return -EINVAL; | |
979 | } | |
980 | ||
9cde5fcd MB |
981 | static inline int regmap_get_val_bytes(struct regmap *map) |
982 | { | |
983 | WARN_ONCE(1, "regmap API is disabled"); | |
984 | return -EINVAL; | |
985 | } | |
986 | ||
668abc72 SK |
987 | static inline int regmap_get_max_register(struct regmap *map) |
988 | { | |
989 | WARN_ONCE(1, "regmap API is disabled"); | |
990 | return -EINVAL; | |
991 | } | |
992 | ||
a2f776cb SK |
993 | static inline int regmap_get_reg_stride(struct regmap *map) |
994 | { | |
995 | WARN_ONCE(1, "regmap API is disabled"); | |
996 | return -EINVAL; | |
997 | } | |
998 | ||
9cde5fcd MB |
999 | static inline int regcache_sync(struct regmap *map) |
1000 | { | |
1001 | WARN_ONCE(1, "regmap API is disabled"); | |
1002 | return -EINVAL; | |
1003 | } | |
1004 | ||
a313f9f5 MB |
1005 | static inline int regcache_sync_region(struct regmap *map, unsigned int min, |
1006 | unsigned int max) | |
1007 | { | |
1008 | WARN_ONCE(1, "regmap API is disabled"); | |
1009 | return -EINVAL; | |
1010 | } | |
1011 | ||
697e85bc MB |
1012 | static inline int regcache_drop_region(struct regmap *map, unsigned int min, |
1013 | unsigned int max) | |
1014 | { | |
1015 | WARN_ONCE(1, "regmap API is disabled"); | |
1016 | return -EINVAL; | |
1017 | } | |
1018 | ||
9cde5fcd MB |
1019 | static inline void regcache_cache_only(struct regmap *map, bool enable) |
1020 | { | |
1021 | WARN_ONCE(1, "regmap API is disabled"); | |
1022 | } | |
1023 | ||
1024 | static inline void regcache_cache_bypass(struct regmap *map, bool enable) | |
1025 | { | |
1026 | WARN_ONCE(1, "regmap API is disabled"); | |
1027 | } | |
1028 | ||
1029 | static inline void regcache_mark_dirty(struct regmap *map) | |
1030 | { | |
1031 | WARN_ONCE(1, "regmap API is disabled"); | |
1032 | } | |
1033 | ||
0d509f2b MB |
1034 | static inline void regmap_async_complete(struct regmap *map) |
1035 | { | |
1036 | WARN_ONCE(1, "regmap API is disabled"); | |
1037 | } | |
1038 | ||
9cde5fcd | 1039 | static inline int regmap_register_patch(struct regmap *map, |
a6baa3de | 1040 | const struct reg_sequence *regs, |
9cde5fcd MB |
1041 | int num_regs) |
1042 | { | |
1043 | WARN_ONCE(1, "regmap API is disabled"); | |
1044 | return -EINVAL; | |
1045 | } | |
1046 | ||
13ff50c8 NC |
1047 | static inline int regmap_parse_val(struct regmap *map, const void *buf, |
1048 | unsigned int *val) | |
1049 | { | |
1050 | WARN_ONCE(1, "regmap API is disabled"); | |
1051 | return -EINVAL; | |
1052 | } | |
1053 | ||
72b39f6f MB |
1054 | static inline struct regmap *dev_get_regmap(struct device *dev, |
1055 | const char *name) | |
1056 | { | |
72b39f6f MB |
1057 | return NULL; |
1058 | } | |
1059 | ||
8d7d3972 TT |
1060 | static inline struct device *regmap_get_device(struct regmap *map) |
1061 | { | |
1062 | WARN_ONCE(1, "regmap API is disabled"); | |
1d33dc6b | 1063 | return NULL; |
8d7d3972 TT |
1064 | } |
1065 | ||
9cde5fcd MB |
1066 | #endif |
1067 | ||
b83a313b | 1068 | #endif |