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genirq: Provide default irq init flags
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CommitLineData
dd87eb3a
TG
1/*
2 * linux/kernel/irq/chip.c
3 *
4 * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
5 * Copyright (C) 2005-2006, Thomas Gleixner, Russell King
6 *
7 * This file contains the core interrupt handling code, for irq-chip
8 * based architectures.
9 *
10 * Detailed information is available in Documentation/DocBook/genericirq
11 */
12
13#include <linux/irq.h>
7fe3730d 14#include <linux/msi.h>
dd87eb3a
TG
15#include <linux/module.h>
16#include <linux/interrupt.h>
17#include <linux/kernel_stat.h>
18
19#include "internals.h"
20
ced5b697 21static void dynamic_irq_init_x(unsigned int irq, bool keep_chip_data)
3a16d713 22{
0b8f1efa 23 struct irq_desc *desc;
3a16d713
EB
24 unsigned long flags;
25
0b8f1efa 26 desc = irq_to_desc(irq);
7d94f7ca 27 if (!desc) {
261c40c1 28 WARN(1, KERN_ERR "Trying to initialize invalid IRQ%d\n", irq);
3a16d713
EB
29 return;
30 }
31
32 /* Ensure we don't have left over values from a previous use of this irq */
239007b8 33 raw_spin_lock_irqsave(&desc->lock, flags);
1318a481 34 desc->status = IRQ_DEFAULT_INIT_FLAGS;
6b8ff312 35 desc->irq_data.chip = &no_irq_chip;
3a16d713
EB
36 desc->handle_irq = handle_bad_irq;
37 desc->depth = 1;
6b8ff312
TG
38 desc->irq_data.msi_desc = NULL;
39 desc->irq_data.handler_data = NULL;
ced5b697 40 if (!keep_chip_data)
6b8ff312 41 desc->irq_data.chip_data = NULL;
3a16d713
EB
42 desc->action = NULL;
43 desc->irq_count = 0;
44 desc->irqs_unhandled = 0;
45#ifdef CONFIG_SMP
6b8ff312 46 cpumask_setall(desc->irq_data.affinity);
7f7ace0c
MT
47#ifdef CONFIG_GENERIC_PENDING_IRQ
48 cpumask_clear(desc->pending_mask);
49#endif
3a16d713 50#endif
239007b8 51 raw_spin_unlock_irqrestore(&desc->lock, flags);
3a16d713
EB
52}
53
54/**
ced5b697 55 * dynamic_irq_init - initialize a dynamically allocated irq
3a16d713
EB
56 * @irq: irq number to initialize
57 */
ced5b697
BP
58void dynamic_irq_init(unsigned int irq)
59{
60 dynamic_irq_init_x(irq, false);
61}
62
63/**
64 * dynamic_irq_init_keep_chip_data - initialize a dynamically allocated irq
65 * @irq: irq number to initialize
66 *
6b8ff312 67 * does not set irq_to_desc(irq)->irq_data.chip_data to NULL
ced5b697
BP
68 */
69void dynamic_irq_init_keep_chip_data(unsigned int irq)
70{
71 dynamic_irq_init_x(irq, true);
72}
73
74static void dynamic_irq_cleanup_x(unsigned int irq, bool keep_chip_data)
3a16d713 75{
d3c60047 76 struct irq_desc *desc = irq_to_desc(irq);
3a16d713
EB
77 unsigned long flags;
78
7d94f7ca 79 if (!desc) {
261c40c1 80 WARN(1, KERN_ERR "Trying to cleanup invalid IRQ%d\n", irq);
3a16d713
EB
81 return;
82 }
83
239007b8 84 raw_spin_lock_irqsave(&desc->lock, flags);
1f80025e 85 if (desc->action) {
239007b8 86 raw_spin_unlock_irqrestore(&desc->lock, flags);
261c40c1 87 WARN(1, KERN_ERR "Destroying IRQ%d without calling free_irq\n",
1f80025e 88 irq);
1f80025e
EB
89 return;
90 }
6b8ff312
TG
91 desc->irq_data.msi_desc = NULL;
92 desc->irq_data.handler_data = NULL;
ced5b697 93 if (!keep_chip_data)
6b8ff312 94 desc->irq_data.chip_data = NULL;
3a16d713 95 desc->handle_irq = handle_bad_irq;
6b8ff312 96 desc->irq_data.chip = &no_irq_chip;
b6f3b780 97 desc->name = NULL;
0f3c2a89 98 clear_kstat_irqs(desc);
239007b8 99 raw_spin_unlock_irqrestore(&desc->lock, flags);
3a16d713
EB
100}
101
ced5b697
BP
102/**
103 * dynamic_irq_cleanup - cleanup a dynamically allocated irq
104 * @irq: irq number to initialize
105 */
106void dynamic_irq_cleanup(unsigned int irq)
107{
108 dynamic_irq_cleanup_x(irq, false);
109}
110
111/**
112 * dynamic_irq_cleanup_keep_chip_data - cleanup a dynamically allocated irq
113 * @irq: irq number to initialize
114 *
6b8ff312 115 * does not set irq_to_desc(irq)->irq_data.chip_data to NULL
ced5b697
BP
116 */
117void dynamic_irq_cleanup_keep_chip_data(unsigned int irq)
118{
119 dynamic_irq_cleanup_x(irq, true);
120}
121
3a16d713 122
dd87eb3a
TG
123/**
124 * set_irq_chip - set the irq chip for an irq
125 * @irq: irq number
126 * @chip: pointer to irq chip description structure
127 */
128int set_irq_chip(unsigned int irq, struct irq_chip *chip)
129{
d3c60047 130 struct irq_desc *desc = irq_to_desc(irq);
dd87eb3a
TG
131 unsigned long flags;
132
7d94f7ca 133 if (!desc) {
261c40c1 134 WARN(1, KERN_ERR "Trying to install chip for IRQ%d\n", irq);
dd87eb3a
TG
135 return -EINVAL;
136 }
137
138 if (!chip)
139 chip = &no_irq_chip;
140
239007b8 141 raw_spin_lock_irqsave(&desc->lock, flags);
dd87eb3a 142 irq_chip_set_defaults(chip);
6b8ff312 143 desc->irq_data.chip = chip;
239007b8 144 raw_spin_unlock_irqrestore(&desc->lock, flags);
dd87eb3a
TG
145
146 return 0;
147}
148EXPORT_SYMBOL(set_irq_chip);
149
150/**
0c5d1eb7 151 * set_irq_type - set the irq trigger type for an irq
dd87eb3a 152 * @irq: irq number
0c5d1eb7 153 * @type: IRQ_TYPE_{LEVEL,EDGE}_* value - see include/linux/irq.h
dd87eb3a
TG
154 */
155int set_irq_type(unsigned int irq, unsigned int type)
156{
d3c60047 157 struct irq_desc *desc = irq_to_desc(irq);
dd87eb3a
TG
158 unsigned long flags;
159 int ret = -ENXIO;
160
7d94f7ca 161 if (!desc) {
dd87eb3a
TG
162 printk(KERN_ERR "Trying to set irq type for IRQ%d\n", irq);
163 return -ENODEV;
164 }
165
f2b662da 166 type &= IRQ_TYPE_SENSE_MASK;
0c5d1eb7
DB
167 if (type == IRQ_TYPE_NONE)
168 return 0;
169
239007b8 170 raw_spin_lock_irqsave(&desc->lock, flags);
0b3682ba 171 ret = __irq_set_trigger(desc, irq, type);
239007b8 172 raw_spin_unlock_irqrestore(&desc->lock, flags);
dd87eb3a
TG
173 return ret;
174}
175EXPORT_SYMBOL(set_irq_type);
176
177/**
178 * set_irq_data - set irq type data for an irq
179 * @irq: Interrupt number
180 * @data: Pointer to interrupt specific data
181 *
182 * Set the hardware irq controller data for an irq
183 */
184int set_irq_data(unsigned int irq, void *data)
185{
d3c60047 186 struct irq_desc *desc = irq_to_desc(irq);
dd87eb3a
TG
187 unsigned long flags;
188
7d94f7ca 189 if (!desc) {
dd87eb3a
TG
190 printk(KERN_ERR
191 "Trying to install controller data for IRQ%d\n", irq);
192 return -EINVAL;
193 }
194
239007b8 195 raw_spin_lock_irqsave(&desc->lock, flags);
6b8ff312 196 desc->irq_data.handler_data = data;
239007b8 197 raw_spin_unlock_irqrestore(&desc->lock, flags);
dd87eb3a
TG
198 return 0;
199}
200EXPORT_SYMBOL(set_irq_data);
201
5b912c10 202/**
24b26d42 203 * set_irq_msi - set MSI descriptor data for an irq
5b912c10 204 * @irq: Interrupt number
472900b8 205 * @entry: Pointer to MSI descriptor data
5b912c10 206 *
24b26d42 207 * Set the MSI descriptor entry for an irq
5b912c10
EB
208 */
209int set_irq_msi(unsigned int irq, struct msi_desc *entry)
210{
d3c60047 211 struct irq_desc *desc = irq_to_desc(irq);
5b912c10
EB
212 unsigned long flags;
213
7d94f7ca 214 if (!desc) {
5b912c10
EB
215 printk(KERN_ERR
216 "Trying to install msi data for IRQ%d\n", irq);
217 return -EINVAL;
218 }
7d94f7ca 219
239007b8 220 raw_spin_lock_irqsave(&desc->lock, flags);
6b8ff312 221 desc->irq_data.msi_desc = entry;
7fe3730d
ME
222 if (entry)
223 entry->irq = irq;
239007b8 224 raw_spin_unlock_irqrestore(&desc->lock, flags);
5b912c10
EB
225 return 0;
226}
227
dd87eb3a
TG
228/**
229 * set_irq_chip_data - set irq chip data for an irq
230 * @irq: Interrupt number
231 * @data: Pointer to chip specific data
232 *
233 * Set the hardware irq chip data for an irq
234 */
235int set_irq_chip_data(unsigned int irq, void *data)
236{
d3c60047 237 struct irq_desc *desc = irq_to_desc(irq);
dd87eb3a
TG
238 unsigned long flags;
239
7d94f7ca
YL
240 if (!desc) {
241 printk(KERN_ERR
242 "Trying to install chip data for IRQ%d\n", irq);
243 return -EINVAL;
244 }
245
6b8ff312 246 if (!desc->irq_data.chip) {
dd87eb3a
TG
247 printk(KERN_ERR "BUG: bad set_irq_chip_data(IRQ#%d)\n", irq);
248 return -EINVAL;
249 }
250
239007b8 251 raw_spin_lock_irqsave(&desc->lock, flags);
6b8ff312 252 desc->irq_data.chip_data = data;
239007b8 253 raw_spin_unlock_irqrestore(&desc->lock, flags);
dd87eb3a
TG
254
255 return 0;
256}
257EXPORT_SYMBOL(set_irq_chip_data);
258
f303a6dd
TG
259struct irq_data *irq_get_irq_data(unsigned int irq)
260{
261 struct irq_desc *desc = irq_to_desc(irq);
262
263 return desc ? &desc->irq_data : NULL;
264}
265EXPORT_SYMBOL_GPL(irq_get_irq_data);
266
399b5da2
TG
267/**
268 * set_irq_nested_thread - Set/Reset the IRQ_NESTED_THREAD flag of an irq
269 *
270 * @irq: Interrupt number
271 * @nest: 0 to clear / 1 to set the IRQ_NESTED_THREAD flag
272 *
273 * The IRQ_NESTED_THREAD flag indicates that on
274 * request_threaded_irq() no separate interrupt thread should be
275 * created for the irq as the handler are called nested in the
276 * context of a demultiplexing interrupt handler thread.
277 */
278void set_irq_nested_thread(unsigned int irq, int nest)
279{
280 struct irq_desc *desc = irq_to_desc(irq);
281 unsigned long flags;
282
283 if (!desc)
284 return;
285
239007b8 286 raw_spin_lock_irqsave(&desc->lock, flags);
399b5da2
TG
287 if (nest)
288 desc->status |= IRQ_NESTED_THREAD;
289 else
290 desc->status &= ~IRQ_NESTED_THREAD;
239007b8 291 raw_spin_unlock_irqrestore(&desc->lock, flags);
399b5da2
TG
292}
293EXPORT_SYMBOL_GPL(set_irq_nested_thread);
294
dd87eb3a
TG
295/*
296 * default enable function
297 */
c5f75634 298static void default_enable(struct irq_data *data)
dd87eb3a 299{
c5f75634 300 struct irq_desc *desc = irq_data_to_desc(data);
dd87eb3a 301
0eda58b7 302 desc->irq_data.chip->irq_unmask(&desc->irq_data);
dd87eb3a
TG
303 desc->status &= ~IRQ_MASKED;
304}
305
306/*
307 * default disable function
308 */
bc310dda 309static void default_disable(struct irq_data *data)
dd87eb3a 310{
dd87eb3a
TG
311}
312
313/*
314 * default startup function
315 */
37e12df7 316static unsigned int default_startup(struct irq_data *data)
dd87eb3a 317{
37e12df7 318 struct irq_desc *desc = irq_data_to_desc(data);
08678b08 319
37e12df7 320 desc->irq_data.chip->irq_enable(data);
dd87eb3a
TG
321 return 0;
322}
323
89d694b9
TG
324/*
325 * default shutdown function
326 */
bc310dda 327static void default_shutdown(struct irq_data *data)
89d694b9 328{
bc310dda 329 struct irq_desc *desc = irq_data_to_desc(data);
89d694b9 330
e2c0f8ff 331 desc->irq_data.chip->irq_mask(&desc->irq_data);
89d694b9
TG
332 desc->status |= IRQ_MASKED;
333}
334
bd151412 335#ifndef CONFIG_GENERIC_HARDIRQS_NO_DEPRECATED
3876ec9e 336/* Temporary migration helpers */
e2c0f8ff
TG
337static void compat_irq_mask(struct irq_data *data)
338{
339 data->chip->mask(data->irq);
340}
341
0eda58b7
TG
342static void compat_irq_unmask(struct irq_data *data)
343{
344 data->chip->unmask(data->irq);
345}
346
22a49163
TG
347static void compat_irq_ack(struct irq_data *data)
348{
349 data->chip->ack(data->irq);
350}
351
9205e31d
TG
352static void compat_irq_mask_ack(struct irq_data *data)
353{
354 data->chip->mask_ack(data->irq);
355}
356
0c5c1557
TG
357static void compat_irq_eoi(struct irq_data *data)
358{
359 data->chip->eoi(data->irq);
360}
361
c5f75634
TG
362static void compat_irq_enable(struct irq_data *data)
363{
364 data->chip->enable(data->irq);
365}
366
bc310dda
TG
367static void compat_irq_disable(struct irq_data *data)
368{
369 data->chip->disable(data->irq);
370}
371
372static void compat_irq_shutdown(struct irq_data *data)
373{
374 data->chip->shutdown(data->irq);
375}
376
37e12df7
TG
377static unsigned int compat_irq_startup(struct irq_data *data)
378{
379 return data->chip->startup(data->irq);
380}
381
c96b3b3c
TG
382static int compat_irq_set_affinity(struct irq_data *data,
383 const struct cpumask *dest, bool force)
384{
385 return data->chip->set_affinity(data->irq, dest);
386}
387
b2ba2c30
TG
388static int compat_irq_set_type(struct irq_data *data, unsigned int type)
389{
390 return data->chip->set_type(data->irq, type);
391}
392
2f7e99bb
TG
393static int compat_irq_set_wake(struct irq_data *data, unsigned int on)
394{
395 return data->chip->set_wake(data->irq, on);
396}
397
21e2b8c6
TG
398static int compat_irq_retrigger(struct irq_data *data)
399{
400 return data->chip->retrigger(data->irq);
401}
402
3876ec9e
TG
403static void compat_bus_lock(struct irq_data *data)
404{
405 data->chip->bus_lock(data->irq);
406}
407
408static void compat_bus_sync_unlock(struct irq_data *data)
409{
410 data->chip->bus_sync_unlock(data->irq);
411}
bd151412 412#endif
3876ec9e 413
dd87eb3a
TG
414/*
415 * Fixup enable/disable function pointers
416 */
417void irq_chip_set_defaults(struct irq_chip *chip)
418{
bd151412 419#ifndef CONFIG_GENERIC_HARDIRQS_NO_DEPRECATED
c5f75634
TG
420 /*
421 * Compat fixup functions need to be before we set the
422 * defaults for enable/disable/startup/shutdown
423 */
424 if (chip->enable)
425 chip->irq_enable = compat_irq_enable;
bc310dda
TG
426 if (chip->disable)
427 chip->irq_disable = compat_irq_disable;
428 if (chip->shutdown)
429 chip->irq_shutdown = compat_irq_shutdown;
37e12df7
TG
430 if (chip->startup)
431 chip->irq_startup = compat_irq_startup;
bd151412 432#endif
c5f75634
TG
433 /*
434 * The real defaults
435 */
436 if (!chip->irq_enable)
437 chip->irq_enable = default_enable;
bc310dda
TG
438 if (!chip->irq_disable)
439 chip->irq_disable = default_disable;
37e12df7
TG
440 if (!chip->irq_startup)
441 chip->irq_startup = default_startup;
89d694b9 442 /*
bc310dda
TG
443 * We use chip->irq_disable, when the user provided its own. When
444 * we have default_disable set for chip->irq_disable, then we need
89d694b9
TG
445 * to use default_shutdown, otherwise the irq line is not
446 * disabled on free_irq():
447 */
bc310dda
TG
448 if (!chip->irq_shutdown)
449 chip->irq_shutdown = chip->irq_disable != default_disable ?
450 chip->irq_disable : default_shutdown;
bd151412
TG
451
452#ifndef CONFIG_GENERIC_HARDIRQS_NO_DEPRECATED
b86432b4
ZY
453 if (!chip->end)
454 chip->end = dummy_irq_chip.end;
3876ec9e 455
bc310dda
TG
456 /*
457 * Now fix up the remaining compat handlers
458 */
3876ec9e
TG
459 if (chip->bus_lock)
460 chip->irq_bus_lock = compat_bus_lock;
461 if (chip->bus_sync_unlock)
462 chip->irq_bus_sync_unlock = compat_bus_sync_unlock;
e2c0f8ff
TG
463 if (chip->mask)
464 chip->irq_mask = compat_irq_mask;
0eda58b7
TG
465 if (chip->unmask)
466 chip->irq_unmask = compat_irq_unmask;
22a49163
TG
467 if (chip->ack)
468 chip->irq_ack = compat_irq_ack;
9205e31d
TG
469 if (chip->mask_ack)
470 chip->irq_mask_ack = compat_irq_mask_ack;
0c5c1557
TG
471 if (chip->eoi)
472 chip->irq_eoi = compat_irq_eoi;
c96b3b3c
TG
473 if (chip->set_affinity)
474 chip->irq_set_affinity = compat_irq_set_affinity;
b2ba2c30
TG
475 if (chip->set_type)
476 chip->irq_set_type = compat_irq_set_type;
2f7e99bb
TG
477 if (chip->set_wake)
478 chip->irq_set_wake = compat_irq_set_wake;
21e2b8c6
TG
479 if (chip->retrigger)
480 chip->irq_retrigger = compat_irq_retrigger;
bd151412 481#endif
dd87eb3a
TG
482}
483
9205e31d 484static inline void mask_ack_irq(struct irq_desc *desc)
dd87eb3a 485{
9205e31d
TG
486 if (desc->irq_data.chip->irq_mask_ack)
487 desc->irq_data.chip->irq_mask_ack(&desc->irq_data);
dd87eb3a 488 else {
e2c0f8ff 489 desc->irq_data.chip->irq_mask(&desc->irq_data);
22a49163
TG
490 if (desc->irq_data.chip->irq_ack)
491 desc->irq_data.chip->irq_ack(&desc->irq_data);
dd87eb3a 492 }
0b1adaa0
TG
493 desc->status |= IRQ_MASKED;
494}
495
e2c0f8ff 496static inline void mask_irq(struct irq_desc *desc)
0b1adaa0 497{
e2c0f8ff
TG
498 if (desc->irq_data.chip->irq_mask) {
499 desc->irq_data.chip->irq_mask(&desc->irq_data);
0b1adaa0
TG
500 desc->status |= IRQ_MASKED;
501 }
502}
503
0eda58b7 504static inline void unmask_irq(struct irq_desc *desc)
0b1adaa0 505{
0eda58b7
TG
506 if (desc->irq_data.chip->irq_unmask) {
507 desc->irq_data.chip->irq_unmask(&desc->irq_data);
0b1adaa0
TG
508 desc->status &= ~IRQ_MASKED;
509 }
dd87eb3a
TG
510}
511
399b5da2
TG
512/*
513 * handle_nested_irq - Handle a nested irq from a irq thread
514 * @irq: the interrupt number
515 *
516 * Handle interrupts which are nested into a threaded interrupt
517 * handler. The handler function is called inside the calling
518 * threads context.
519 */
520void handle_nested_irq(unsigned int irq)
521{
522 struct irq_desc *desc = irq_to_desc(irq);
523 struct irqaction *action;
524 irqreturn_t action_ret;
525
526 might_sleep();
527
239007b8 528 raw_spin_lock_irq(&desc->lock);
399b5da2
TG
529
530 kstat_incr_irqs_this_cpu(irq, desc);
531
532 action = desc->action;
533 if (unlikely(!action || (desc->status & IRQ_DISABLED)))
534 goto out_unlock;
535
536 desc->status |= IRQ_INPROGRESS;
239007b8 537 raw_spin_unlock_irq(&desc->lock);
399b5da2
TG
538
539 action_ret = action->thread_fn(action->irq, action->dev_id);
540 if (!noirqdebug)
541 note_interrupt(irq, desc, action_ret);
542
239007b8 543 raw_spin_lock_irq(&desc->lock);
399b5da2
TG
544 desc->status &= ~IRQ_INPROGRESS;
545
546out_unlock:
239007b8 547 raw_spin_unlock_irq(&desc->lock);
399b5da2
TG
548}
549EXPORT_SYMBOL_GPL(handle_nested_irq);
550
dd87eb3a
TG
551/**
552 * handle_simple_irq - Simple and software-decoded IRQs.
553 * @irq: the interrupt number
554 * @desc: the interrupt description structure for this irq
dd87eb3a
TG
555 *
556 * Simple interrupts are either sent from a demultiplexing interrupt
557 * handler or come from hardware, where no interrupt hardware control
558 * is necessary.
559 *
560 * Note: The caller is expected to handle the ack, clear, mask and
561 * unmask issues if necessary.
562 */
7ad5b3a5 563void
7d12e780 564handle_simple_irq(unsigned int irq, struct irq_desc *desc)
dd87eb3a
TG
565{
566 struct irqaction *action;
567 irqreturn_t action_ret;
dd87eb3a 568
239007b8 569 raw_spin_lock(&desc->lock);
dd87eb3a
TG
570
571 if (unlikely(desc->status & IRQ_INPROGRESS))
572 goto out_unlock;
971e5b35 573 desc->status &= ~(IRQ_REPLAY | IRQ_WAITING);
d6c88a50 574 kstat_incr_irqs_this_cpu(irq, desc);
dd87eb3a
TG
575
576 action = desc->action;
971e5b35 577 if (unlikely(!action || (desc->status & IRQ_DISABLED)))
dd87eb3a
TG
578 goto out_unlock;
579
580 desc->status |= IRQ_INPROGRESS;
239007b8 581 raw_spin_unlock(&desc->lock);
dd87eb3a 582
7d12e780 583 action_ret = handle_IRQ_event(irq, action);
dd87eb3a 584 if (!noirqdebug)
7d12e780 585 note_interrupt(irq, desc, action_ret);
dd87eb3a 586
239007b8 587 raw_spin_lock(&desc->lock);
dd87eb3a
TG
588 desc->status &= ~IRQ_INPROGRESS;
589out_unlock:
239007b8 590 raw_spin_unlock(&desc->lock);
dd87eb3a
TG
591}
592
593/**
594 * handle_level_irq - Level type irq handler
595 * @irq: the interrupt number
596 * @desc: the interrupt description structure for this irq
dd87eb3a
TG
597 *
598 * Level type interrupts are active as long as the hardware line has
599 * the active level. This may require to mask the interrupt and unmask
600 * it after the associated handler has acknowledged the device, so the
601 * interrupt line is back to inactive.
602 */
7ad5b3a5 603void
7d12e780 604handle_level_irq(unsigned int irq, struct irq_desc *desc)
dd87eb3a 605{
dd87eb3a
TG
606 struct irqaction *action;
607 irqreturn_t action_ret;
608
239007b8 609 raw_spin_lock(&desc->lock);
9205e31d 610 mask_ack_irq(desc);
dd87eb3a
TG
611
612 if (unlikely(desc->status & IRQ_INPROGRESS))
86998aa6 613 goto out_unlock;
dd87eb3a 614 desc->status &= ~(IRQ_REPLAY | IRQ_WAITING);
d6c88a50 615 kstat_incr_irqs_this_cpu(irq, desc);
dd87eb3a
TG
616
617 /*
618 * If its disabled or no action available
619 * keep it masked and get out of here
620 */
621 action = desc->action;
49663421 622 if (unlikely(!action || (desc->status & IRQ_DISABLED)))
86998aa6 623 goto out_unlock;
dd87eb3a
TG
624
625 desc->status |= IRQ_INPROGRESS;
239007b8 626 raw_spin_unlock(&desc->lock);
dd87eb3a 627
7d12e780 628 action_ret = handle_IRQ_event(irq, action);
dd87eb3a 629 if (!noirqdebug)
7d12e780 630 note_interrupt(irq, desc, action_ret);
dd87eb3a 631
239007b8 632 raw_spin_lock(&desc->lock);
dd87eb3a 633 desc->status &= ~IRQ_INPROGRESS;
b25c340c 634
0b1adaa0 635 if (!(desc->status & (IRQ_DISABLED | IRQ_ONESHOT)))
0eda58b7 636 unmask_irq(desc);
86998aa6 637out_unlock:
239007b8 638 raw_spin_unlock(&desc->lock);
dd87eb3a 639}
14819ea1 640EXPORT_SYMBOL_GPL(handle_level_irq);
dd87eb3a
TG
641
642/**
47c2a3aa 643 * handle_fasteoi_irq - irq handler for transparent controllers
dd87eb3a
TG
644 * @irq: the interrupt number
645 * @desc: the interrupt description structure for this irq
dd87eb3a 646 *
47c2a3aa 647 * Only a single callback will be issued to the chip: an ->eoi()
dd87eb3a
TG
648 * call when the interrupt has been serviced. This enables support
649 * for modern forms of interrupt handlers, which handle the flow
650 * details in hardware, transparently.
651 */
7ad5b3a5 652void
7d12e780 653handle_fasteoi_irq(unsigned int irq, struct irq_desc *desc)
dd87eb3a 654{
dd87eb3a
TG
655 struct irqaction *action;
656 irqreturn_t action_ret;
657
239007b8 658 raw_spin_lock(&desc->lock);
dd87eb3a
TG
659
660 if (unlikely(desc->status & IRQ_INPROGRESS))
661 goto out;
662
663 desc->status &= ~(IRQ_REPLAY | IRQ_WAITING);
d6c88a50 664 kstat_incr_irqs_this_cpu(irq, desc);
dd87eb3a
TG
665
666 /*
667 * If its disabled or no action available
76d21601 668 * then mask it and get out of here:
dd87eb3a
TG
669 */
670 action = desc->action;
98bb244b
BH
671 if (unlikely(!action || (desc->status & IRQ_DISABLED))) {
672 desc->status |= IRQ_PENDING;
e2c0f8ff 673 mask_irq(desc);
dd87eb3a 674 goto out;
98bb244b 675 }
dd87eb3a
TG
676
677 desc->status |= IRQ_INPROGRESS;
98bb244b 678 desc->status &= ~IRQ_PENDING;
239007b8 679 raw_spin_unlock(&desc->lock);
dd87eb3a 680
7d12e780 681 action_ret = handle_IRQ_event(irq, action);
dd87eb3a 682 if (!noirqdebug)
7d12e780 683 note_interrupt(irq, desc, action_ret);
dd87eb3a 684
239007b8 685 raw_spin_lock(&desc->lock);
dd87eb3a
TG
686 desc->status &= ~IRQ_INPROGRESS;
687out:
0c5c1557 688 desc->irq_data.chip->irq_eoi(&desc->irq_data);
dd87eb3a 689
239007b8 690 raw_spin_unlock(&desc->lock);
dd87eb3a
TG
691}
692
693/**
694 * handle_edge_irq - edge type IRQ handler
695 * @irq: the interrupt number
696 * @desc: the interrupt description structure for this irq
dd87eb3a
TG
697 *
698 * Interrupt occures on the falling and/or rising edge of a hardware
699 * signal. The occurence is latched into the irq controller hardware
700 * and must be acked in order to be reenabled. After the ack another
701 * interrupt can happen on the same source even before the first one
dfff0615 702 * is handled by the associated event handler. If this happens it
dd87eb3a
TG
703 * might be necessary to disable (mask) the interrupt depending on the
704 * controller hardware. This requires to reenable the interrupt inside
705 * of the loop which handles the interrupts which have arrived while
706 * the handler was running. If all pending interrupts are handled, the
707 * loop is left.
708 */
7ad5b3a5 709void
7d12e780 710handle_edge_irq(unsigned int irq, struct irq_desc *desc)
dd87eb3a 711{
239007b8 712 raw_spin_lock(&desc->lock);
dd87eb3a
TG
713
714 desc->status &= ~(IRQ_REPLAY | IRQ_WAITING);
715
716 /*
717 * If we're currently running this IRQ, or its disabled,
718 * we shouldn't process the IRQ. Mark it pending, handle
719 * the necessary masking and go out
720 */
721 if (unlikely((desc->status & (IRQ_INPROGRESS | IRQ_DISABLED)) ||
722 !desc->action)) {
723 desc->status |= (IRQ_PENDING | IRQ_MASKED);
9205e31d 724 mask_ack_irq(desc);
dd87eb3a
TG
725 goto out_unlock;
726 }
d6c88a50 727 kstat_incr_irqs_this_cpu(irq, desc);
dd87eb3a
TG
728
729 /* Start handling the irq */
22a49163 730 desc->irq_data.chip->irq_ack(&desc->irq_data);
dd87eb3a
TG
731
732 /* Mark the IRQ currently in progress.*/
733 desc->status |= IRQ_INPROGRESS;
734
735 do {
736 struct irqaction *action = desc->action;
737 irqreturn_t action_ret;
738
739 if (unlikely(!action)) {
e2c0f8ff 740 mask_irq(desc);
dd87eb3a
TG
741 goto out_unlock;
742 }
743
744 /*
745 * When another irq arrived while we were handling
746 * one, we could have masked the irq.
747 * Renable it, if it was not disabled in meantime.
748 */
749 if (unlikely((desc->status &
750 (IRQ_PENDING | IRQ_MASKED | IRQ_DISABLED)) ==
751 (IRQ_PENDING | IRQ_MASKED))) {
0eda58b7 752 unmask_irq(desc);
dd87eb3a
TG
753 }
754
755 desc->status &= ~IRQ_PENDING;
239007b8 756 raw_spin_unlock(&desc->lock);
7d12e780 757 action_ret = handle_IRQ_event(irq, action);
dd87eb3a 758 if (!noirqdebug)
7d12e780 759 note_interrupt(irq, desc, action_ret);
239007b8 760 raw_spin_lock(&desc->lock);
dd87eb3a
TG
761
762 } while ((desc->status & (IRQ_PENDING | IRQ_DISABLED)) == IRQ_PENDING);
763
764 desc->status &= ~IRQ_INPROGRESS;
765out_unlock:
239007b8 766 raw_spin_unlock(&desc->lock);
dd87eb3a
TG
767}
768
dd87eb3a 769/**
24b26d42 770 * handle_percpu_irq - Per CPU local irq handler
dd87eb3a
TG
771 * @irq: the interrupt number
772 * @desc: the interrupt description structure for this irq
dd87eb3a
TG
773 *
774 * Per CPU interrupts on SMP machines without locking requirements
775 */
7ad5b3a5 776void
7d12e780 777handle_percpu_irq(unsigned int irq, struct irq_desc *desc)
dd87eb3a
TG
778{
779 irqreturn_t action_ret;
780
d6c88a50 781 kstat_incr_irqs_this_cpu(irq, desc);
dd87eb3a 782
22a49163
TG
783 if (desc->irq_data.chip->irq_ack)
784 desc->irq_data.chip->irq_ack(&desc->irq_data);
dd87eb3a 785
7d12e780 786 action_ret = handle_IRQ_event(irq, desc->action);
dd87eb3a 787 if (!noirqdebug)
7d12e780 788 note_interrupt(irq, desc, action_ret);
dd87eb3a 789
0c5c1557
TG
790 if (desc->irq_data.chip->irq_eoi)
791 desc->irq_data.chip->irq_eoi(&desc->irq_data);
dd87eb3a
TG
792}
793
dd87eb3a 794void
a460e745
IM
795__set_irq_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained,
796 const char *name)
dd87eb3a 797{
d3c60047 798 struct irq_desc *desc = irq_to_desc(irq);
dd87eb3a
TG
799 unsigned long flags;
800
7d94f7ca 801 if (!desc) {
dd87eb3a
TG
802 printk(KERN_ERR
803 "Trying to install type control for IRQ%d\n", irq);
804 return;
805 }
806
dd87eb3a
TG
807 if (!handle)
808 handle = handle_bad_irq;
6b8ff312 809 else if (desc->irq_data.chip == &no_irq_chip) {
f8b5473f 810 printk(KERN_WARNING "Trying to install %sinterrupt handler "
b039db8e 811 "for IRQ%d\n", is_chained ? "chained " : "", irq);
f8b5473f
TG
812 /*
813 * Some ARM implementations install a handler for really dumb
814 * interrupt hardware without setting an irq_chip. This worked
815 * with the ARM no_irq_chip but the check in setup_irq would
816 * prevent us to setup the interrupt at all. Switch it to
817 * dummy_irq_chip for easy transition.
818 */
6b8ff312 819 desc->irq_data.chip = &dummy_irq_chip;
f8b5473f 820 }
dd87eb3a 821
3876ec9e 822 chip_bus_lock(desc);
239007b8 823 raw_spin_lock_irqsave(&desc->lock, flags);
dd87eb3a
TG
824
825 /* Uninstall? */
826 if (handle == handle_bad_irq) {
6b8ff312 827 if (desc->irq_data.chip != &no_irq_chip)
9205e31d 828 mask_ack_irq(desc);
dd87eb3a
TG
829 desc->status |= IRQ_DISABLED;
830 desc->depth = 1;
831 }
832 desc->handle_irq = handle;
a460e745 833 desc->name = name;
dd87eb3a
TG
834
835 if (handle != handle_bad_irq && is_chained) {
836 desc->status &= ~IRQ_DISABLED;
837 desc->status |= IRQ_NOREQUEST | IRQ_NOPROBE;
838 desc->depth = 0;
37e12df7 839 desc->irq_data.chip->irq_startup(&desc->irq_data);
dd87eb3a 840 }
239007b8 841 raw_spin_unlock_irqrestore(&desc->lock, flags);
3876ec9e 842 chip_bus_sync_unlock(desc);
dd87eb3a 843}
14819ea1 844EXPORT_SYMBOL_GPL(__set_irq_handler);
dd87eb3a
TG
845
846void
847set_irq_chip_and_handler(unsigned int irq, struct irq_chip *chip,
57a58a94 848 irq_flow_handler_t handle)
dd87eb3a
TG
849{
850 set_irq_chip(irq, chip);
a460e745 851 __set_irq_handler(irq, handle, 0, NULL);
dd87eb3a
TG
852}
853
a460e745
IM
854void
855set_irq_chip_and_handler_name(unsigned int irq, struct irq_chip *chip,
856 irq_flow_handler_t handle, const char *name)
dd87eb3a 857{
a460e745
IM
858 set_irq_chip(irq, chip);
859 __set_irq_handler(irq, handle, 0, name);
dd87eb3a 860}
46f4f8f6 861
44247184 862void irq_modify_status(unsigned int irq, unsigned long clr, unsigned long set)
46f4f8f6 863{
d3c60047 864 struct irq_desc *desc = irq_to_desc(irq);
46f4f8f6
RB
865 unsigned long flags;
866
44247184 867 if (!desc)
46f4f8f6 868 return;
46f4f8f6 869
44247184
TG
870 /* Sanitize flags */
871 set &= IRQF_MODIFY_MASK;
872 clr &= IRQF_MODIFY_MASK;
46f4f8f6 873
239007b8 874 raw_spin_lock_irqsave(&desc->lock, flags);
44247184
TG
875 desc->status &= ~clr;
876 desc->status |= set;
239007b8 877 raw_spin_unlock_irqrestore(&desc->lock, flags);
46f4f8f6 878}