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1 | // This code is automatically generated. DO NOT MODIFY. |
2 | // | |
3 | // Instead, modify `crates/stdarch-gen/neon.spec` and run the following command to re-generate this file: | |
4 | // | |
5 | // ``` | |
6 | // OUT_DIR=`pwd`/crates/core_arch cargo run -p stdarch-gen -- crates/stdarch-gen/neon.spec | |
7 | // ``` | |
8 | use super::*; | |
9 | #[cfg(test)] | |
10 | use stdarch_test::assert_instr; | |
11 | ||
12 | /// Vector bitwise and | |
13 | #[inline] | |
14 | #[target_feature(enable = "neon")] | |
15 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
16 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vand))] | |
17 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(and))] | |
18 | pub unsafe fn vand_s8(a: int8x8_t, b: int8x8_t) -> int8x8_t { | |
19 | simd_and(a, b) | |
20 | } | |
21 | ||
22 | /// Vector bitwise and | |
23 | #[inline] | |
24 | #[target_feature(enable = "neon")] | |
25 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
26 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vand))] | |
27 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(and))] | |
28 | pub unsafe fn vandq_s8(a: int8x16_t, b: int8x16_t) -> int8x16_t { | |
29 | simd_and(a, b) | |
30 | } | |
31 | ||
32 | /// Vector bitwise and | |
33 | #[inline] | |
34 | #[target_feature(enable = "neon")] | |
35 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
36 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vand))] | |
37 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(and))] | |
38 | pub unsafe fn vand_s16(a: int16x4_t, b: int16x4_t) -> int16x4_t { | |
39 | simd_and(a, b) | |
40 | } | |
41 | ||
42 | /// Vector bitwise and | |
43 | #[inline] | |
44 | #[target_feature(enable = "neon")] | |
45 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
46 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vand))] | |
47 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(and))] | |
48 | pub unsafe fn vandq_s16(a: int16x8_t, b: int16x8_t) -> int16x8_t { | |
49 | simd_and(a, b) | |
50 | } | |
51 | ||
52 | /// Vector bitwise and | |
53 | #[inline] | |
54 | #[target_feature(enable = "neon")] | |
55 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
56 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vand))] | |
57 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(and))] | |
58 | pub unsafe fn vand_s32(a: int32x2_t, b: int32x2_t) -> int32x2_t { | |
59 | simd_and(a, b) | |
60 | } | |
61 | ||
62 | /// Vector bitwise and | |
63 | #[inline] | |
64 | #[target_feature(enable = "neon")] | |
65 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
66 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vand))] | |
67 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(and))] | |
68 | pub unsafe fn vandq_s32(a: int32x4_t, b: int32x4_t) -> int32x4_t { | |
69 | simd_and(a, b) | |
70 | } | |
71 | ||
72 | /// Vector bitwise and | |
73 | #[inline] | |
74 | #[target_feature(enable = "neon")] | |
75 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
76 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vand))] | |
77 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(and))] | |
78 | pub unsafe fn vand_u8(a: uint8x8_t, b: uint8x8_t) -> uint8x8_t { | |
79 | simd_and(a, b) | |
80 | } | |
81 | ||
82 | /// Vector bitwise and | |
83 | #[inline] | |
84 | #[target_feature(enable = "neon")] | |
85 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
86 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vand))] | |
87 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(and))] | |
88 | pub unsafe fn vandq_u8(a: uint8x16_t, b: uint8x16_t) -> uint8x16_t { | |
89 | simd_and(a, b) | |
90 | } | |
91 | ||
92 | /// Vector bitwise and | |
93 | #[inline] | |
94 | #[target_feature(enable = "neon")] | |
95 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
96 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vand))] | |
97 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(and))] | |
98 | pub unsafe fn vand_u16(a: uint16x4_t, b: uint16x4_t) -> uint16x4_t { | |
99 | simd_and(a, b) | |
100 | } | |
101 | ||
102 | /// Vector bitwise and | |
103 | #[inline] | |
104 | #[target_feature(enable = "neon")] | |
105 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
106 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vand))] | |
107 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(and))] | |
108 | pub unsafe fn vandq_u16(a: uint16x8_t, b: uint16x8_t) -> uint16x8_t { | |
109 | simd_and(a, b) | |
110 | } | |
111 | ||
112 | /// Vector bitwise and | |
113 | #[inline] | |
114 | #[target_feature(enable = "neon")] | |
115 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
116 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vand))] | |
117 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(and))] | |
118 | pub unsafe fn vand_u32(a: uint32x2_t, b: uint32x2_t) -> uint32x2_t { | |
119 | simd_and(a, b) | |
120 | } | |
121 | ||
122 | /// Vector bitwise and | |
123 | #[inline] | |
124 | #[target_feature(enable = "neon")] | |
125 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
126 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vand))] | |
127 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(and))] | |
128 | pub unsafe fn vandq_u32(a: uint32x4_t, b: uint32x4_t) -> uint32x4_t { | |
129 | simd_and(a, b) | |
130 | } | |
131 | ||
132 | /// Vector bitwise and | |
133 | #[inline] | |
134 | #[target_feature(enable = "neon")] | |
135 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
136 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vand))] | |
137 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(and))] | |
138 | pub unsafe fn vand_s64(a: int64x1_t, b: int64x1_t) -> int64x1_t { | |
139 | simd_and(a, b) | |
140 | } | |
141 | ||
142 | /// Vector bitwise and | |
143 | #[inline] | |
144 | #[target_feature(enable = "neon")] | |
145 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
146 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vand))] | |
147 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(and))] | |
148 | pub unsafe fn vandq_s64(a: int64x2_t, b: int64x2_t) -> int64x2_t { | |
149 | simd_and(a, b) | |
150 | } | |
151 | ||
152 | /// Vector bitwise and | |
153 | #[inline] | |
154 | #[target_feature(enable = "neon")] | |
155 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
156 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vand))] | |
157 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(and))] | |
158 | pub unsafe fn vand_u64(a: uint64x1_t, b: uint64x1_t) -> uint64x1_t { | |
159 | simd_and(a, b) | |
160 | } | |
161 | ||
162 | /// Vector bitwise and | |
163 | #[inline] | |
164 | #[target_feature(enable = "neon")] | |
165 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
166 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vand))] | |
167 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(and))] | |
168 | pub unsafe fn vandq_u64(a: uint64x2_t, b: uint64x2_t) -> uint64x2_t { | |
169 | simd_and(a, b) | |
170 | } | |
171 | ||
172 | /// Vector bitwise or (immediate, inclusive) | |
173 | #[inline] | |
174 | #[target_feature(enable = "neon")] | |
175 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
176 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vorr))] | |
177 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(orr))] | |
178 | pub unsafe fn vorr_s8(a: int8x8_t, b: int8x8_t) -> int8x8_t { | |
179 | simd_or(a, b) | |
180 | } | |
181 | ||
182 | /// Vector bitwise or (immediate, inclusive) | |
183 | #[inline] | |
184 | #[target_feature(enable = "neon")] | |
185 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
186 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vorr))] | |
187 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(orr))] | |
188 | pub unsafe fn vorrq_s8(a: int8x16_t, b: int8x16_t) -> int8x16_t { | |
189 | simd_or(a, b) | |
190 | } | |
191 | ||
192 | /// Vector bitwise or (immediate, inclusive) | |
193 | #[inline] | |
194 | #[target_feature(enable = "neon")] | |
195 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
196 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vorr))] | |
197 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(orr))] | |
198 | pub unsafe fn vorr_s16(a: int16x4_t, b: int16x4_t) -> int16x4_t { | |
199 | simd_or(a, b) | |
200 | } | |
201 | ||
202 | /// Vector bitwise or (immediate, inclusive) | |
203 | #[inline] | |
204 | #[target_feature(enable = "neon")] | |
205 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
206 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vorr))] | |
207 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(orr))] | |
208 | pub unsafe fn vorrq_s16(a: int16x8_t, b: int16x8_t) -> int16x8_t { | |
209 | simd_or(a, b) | |
210 | } | |
211 | ||
212 | /// Vector bitwise or (immediate, inclusive) | |
213 | #[inline] | |
214 | #[target_feature(enable = "neon")] | |
215 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
216 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vorr))] | |
217 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(orr))] | |
218 | pub unsafe fn vorr_s32(a: int32x2_t, b: int32x2_t) -> int32x2_t { | |
219 | simd_or(a, b) | |
220 | } | |
221 | ||
222 | /// Vector bitwise or (immediate, inclusive) | |
223 | #[inline] | |
224 | #[target_feature(enable = "neon")] | |
225 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
226 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vorr))] | |
227 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(orr))] | |
228 | pub unsafe fn vorrq_s32(a: int32x4_t, b: int32x4_t) -> int32x4_t { | |
229 | simd_or(a, b) | |
230 | } | |
231 | ||
232 | /// Vector bitwise or (immediate, inclusive) | |
233 | #[inline] | |
234 | #[target_feature(enable = "neon")] | |
235 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
236 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vorr))] | |
237 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(orr))] | |
238 | pub unsafe fn vorr_u8(a: uint8x8_t, b: uint8x8_t) -> uint8x8_t { | |
239 | simd_or(a, b) | |
240 | } | |
241 | ||
242 | /// Vector bitwise or (immediate, inclusive) | |
243 | #[inline] | |
244 | #[target_feature(enable = "neon")] | |
245 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
246 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vorr))] | |
247 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(orr))] | |
248 | pub unsafe fn vorrq_u8(a: uint8x16_t, b: uint8x16_t) -> uint8x16_t { | |
249 | simd_or(a, b) | |
250 | } | |
251 | ||
252 | /// Vector bitwise or (immediate, inclusive) | |
253 | #[inline] | |
254 | #[target_feature(enable = "neon")] | |
255 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
256 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vorr))] | |
257 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(orr))] | |
258 | pub unsafe fn vorr_u16(a: uint16x4_t, b: uint16x4_t) -> uint16x4_t { | |
259 | simd_or(a, b) | |
260 | } | |
261 | ||
262 | /// Vector bitwise or (immediate, inclusive) | |
263 | #[inline] | |
264 | #[target_feature(enable = "neon")] | |
265 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
266 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vorr))] | |
267 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(orr))] | |
268 | pub unsafe fn vorrq_u16(a: uint16x8_t, b: uint16x8_t) -> uint16x8_t { | |
269 | simd_or(a, b) | |
270 | } | |
271 | ||
272 | /// Vector bitwise or (immediate, inclusive) | |
273 | #[inline] | |
274 | #[target_feature(enable = "neon")] | |
275 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
276 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vorr))] | |
277 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(orr))] | |
278 | pub unsafe fn vorr_u32(a: uint32x2_t, b: uint32x2_t) -> uint32x2_t { | |
279 | simd_or(a, b) | |
280 | } | |
281 | ||
282 | /// Vector bitwise or (immediate, inclusive) | |
283 | #[inline] | |
284 | #[target_feature(enable = "neon")] | |
285 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
286 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vorr))] | |
287 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(orr))] | |
288 | pub unsafe fn vorrq_u32(a: uint32x4_t, b: uint32x4_t) -> uint32x4_t { | |
289 | simd_or(a, b) | |
290 | } | |
291 | ||
292 | /// Vector bitwise or (immediate, inclusive) | |
293 | #[inline] | |
294 | #[target_feature(enable = "neon")] | |
295 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
296 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vorr))] | |
297 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(orr))] | |
298 | pub unsafe fn vorr_s64(a: int64x1_t, b: int64x1_t) -> int64x1_t { | |
299 | simd_or(a, b) | |
300 | } | |
301 | ||
302 | /// Vector bitwise or (immediate, inclusive) | |
303 | #[inline] | |
304 | #[target_feature(enable = "neon")] | |
305 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
306 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vorr))] | |
307 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(orr))] | |
308 | pub unsafe fn vorrq_s64(a: int64x2_t, b: int64x2_t) -> int64x2_t { | |
309 | simd_or(a, b) | |
310 | } | |
311 | ||
312 | /// Vector bitwise or (immediate, inclusive) | |
313 | #[inline] | |
314 | #[target_feature(enable = "neon")] | |
315 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
316 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vorr))] | |
317 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(orr))] | |
318 | pub unsafe fn vorr_u64(a: uint64x1_t, b: uint64x1_t) -> uint64x1_t { | |
319 | simd_or(a, b) | |
320 | } | |
321 | ||
322 | /// Vector bitwise or (immediate, inclusive) | |
323 | #[inline] | |
324 | #[target_feature(enable = "neon")] | |
325 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
326 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vorr))] | |
327 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(orr))] | |
328 | pub unsafe fn vorrq_u64(a: uint64x2_t, b: uint64x2_t) -> uint64x2_t { | |
329 | simd_or(a, b) | |
330 | } | |
331 | ||
332 | /// Vector bitwise exclusive or (vector) | |
333 | #[inline] | |
334 | #[target_feature(enable = "neon")] | |
335 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
336 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr(veor))] | |
337 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(eor))] | |
338 | pub unsafe fn veor_s8(a: int8x8_t, b: int8x8_t) -> int8x8_t { | |
339 | simd_xor(a, b) | |
340 | } | |
341 | ||
342 | /// Vector bitwise exclusive or (vector) | |
343 | #[inline] | |
344 | #[target_feature(enable = "neon")] | |
345 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
346 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr(veor))] | |
347 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(eor))] | |
348 | pub unsafe fn veorq_s8(a: int8x16_t, b: int8x16_t) -> int8x16_t { | |
349 | simd_xor(a, b) | |
350 | } | |
351 | ||
352 | /// Vector bitwise exclusive or (vector) | |
353 | #[inline] | |
354 | #[target_feature(enable = "neon")] | |
355 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
356 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr(veor))] | |
357 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(eor))] | |
358 | pub unsafe fn veor_s16(a: int16x4_t, b: int16x4_t) -> int16x4_t { | |
359 | simd_xor(a, b) | |
360 | } | |
361 | ||
362 | /// Vector bitwise exclusive or (vector) | |
363 | #[inline] | |
364 | #[target_feature(enable = "neon")] | |
365 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
366 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr(veor))] | |
367 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(eor))] | |
368 | pub unsafe fn veorq_s16(a: int16x8_t, b: int16x8_t) -> int16x8_t { | |
369 | simd_xor(a, b) | |
370 | } | |
371 | ||
372 | /// Vector bitwise exclusive or (vector) | |
373 | #[inline] | |
374 | #[target_feature(enable = "neon")] | |
375 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
376 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr(veor))] | |
377 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(eor))] | |
378 | pub unsafe fn veor_s32(a: int32x2_t, b: int32x2_t) -> int32x2_t { | |
379 | simd_xor(a, b) | |
380 | } | |
381 | ||
382 | /// Vector bitwise exclusive or (vector) | |
383 | #[inline] | |
384 | #[target_feature(enable = "neon")] | |
385 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
386 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr(veor))] | |
387 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(eor))] | |
388 | pub unsafe fn veorq_s32(a: int32x4_t, b: int32x4_t) -> int32x4_t { | |
389 | simd_xor(a, b) | |
390 | } | |
391 | ||
392 | /// Vector bitwise exclusive or (vector) | |
393 | #[inline] | |
394 | #[target_feature(enable = "neon")] | |
395 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
396 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr(veor))] | |
397 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(eor))] | |
398 | pub unsafe fn veor_u8(a: uint8x8_t, b: uint8x8_t) -> uint8x8_t { | |
399 | simd_xor(a, b) | |
400 | } | |
401 | ||
402 | /// Vector bitwise exclusive or (vector) | |
403 | #[inline] | |
404 | #[target_feature(enable = "neon")] | |
405 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
406 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr(veor))] | |
407 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(eor))] | |
408 | pub unsafe fn veorq_u8(a: uint8x16_t, b: uint8x16_t) -> uint8x16_t { | |
409 | simd_xor(a, b) | |
410 | } | |
411 | ||
412 | /// Vector bitwise exclusive or (vector) | |
413 | #[inline] | |
414 | #[target_feature(enable = "neon")] | |
415 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
416 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr(veor))] | |
417 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(eor))] | |
418 | pub unsafe fn veor_u16(a: uint16x4_t, b: uint16x4_t) -> uint16x4_t { | |
419 | simd_xor(a, b) | |
420 | } | |
421 | ||
422 | /// Vector bitwise exclusive or (vector) | |
423 | #[inline] | |
424 | #[target_feature(enable = "neon")] | |
425 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
426 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr(veor))] | |
427 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(eor))] | |
428 | pub unsafe fn veorq_u16(a: uint16x8_t, b: uint16x8_t) -> uint16x8_t { | |
429 | simd_xor(a, b) | |
430 | } | |
431 | ||
432 | /// Vector bitwise exclusive or (vector) | |
433 | #[inline] | |
434 | #[target_feature(enable = "neon")] | |
435 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
436 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr(veor))] | |
437 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(eor))] | |
438 | pub unsafe fn veor_u32(a: uint32x2_t, b: uint32x2_t) -> uint32x2_t { | |
439 | simd_xor(a, b) | |
440 | } | |
441 | ||
442 | /// Vector bitwise exclusive or (vector) | |
443 | #[inline] | |
444 | #[target_feature(enable = "neon")] | |
445 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
446 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr(veor))] | |
447 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(eor))] | |
448 | pub unsafe fn veorq_u32(a: uint32x4_t, b: uint32x4_t) -> uint32x4_t { | |
449 | simd_xor(a, b) | |
450 | } | |
451 | ||
452 | /// Vector bitwise exclusive or (vector) | |
453 | #[inline] | |
454 | #[target_feature(enable = "neon")] | |
455 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
456 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr(veor))] | |
457 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(eor))] | |
458 | pub unsafe fn veor_s64(a: int64x1_t, b: int64x1_t) -> int64x1_t { | |
459 | simd_xor(a, b) | |
460 | } | |
461 | ||
462 | /// Vector bitwise exclusive or (vector) | |
463 | #[inline] | |
464 | #[target_feature(enable = "neon")] | |
465 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
466 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr(veor))] | |
467 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(eor))] | |
468 | pub unsafe fn veorq_s64(a: int64x2_t, b: int64x2_t) -> int64x2_t { | |
469 | simd_xor(a, b) | |
470 | } | |
471 | ||
472 | /// Vector bitwise exclusive or (vector) | |
473 | #[inline] | |
474 | #[target_feature(enable = "neon")] | |
475 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
476 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr(veor))] | |
477 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(eor))] | |
478 | pub unsafe fn veor_u64(a: uint64x1_t, b: uint64x1_t) -> uint64x1_t { | |
479 | simd_xor(a, b) | |
480 | } | |
481 | ||
482 | /// Vector bitwise exclusive or (vector) | |
483 | #[inline] | |
484 | #[target_feature(enable = "neon")] | |
485 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
486 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr(veor))] | |
487 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(eor))] | |
488 | pub unsafe fn veorq_u64(a: uint64x2_t, b: uint64x2_t) -> uint64x2_t { | |
489 | simd_xor(a, b) | |
490 | } | |
491 | ||
492 | /// Compare bitwise Equal (vector) | |
493 | #[inline] | |
494 | #[target_feature(enable = "neon")] | |
495 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
496 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vceq.i8"))] | |
497 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmeq))] | |
498 | pub unsafe fn vceq_u8(a: uint8x8_t, b: uint8x8_t) -> uint8x8_t { | |
499 | simd_eq(a, b) | |
500 | } | |
501 | ||
502 | /// Compare bitwise Equal (vector) | |
503 | #[inline] | |
504 | #[target_feature(enable = "neon")] | |
505 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
506 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vceq.i8"))] | |
507 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmeq))] | |
508 | pub unsafe fn vceqq_u8(a: uint8x16_t, b: uint8x16_t) -> uint8x16_t { | |
509 | simd_eq(a, b) | |
510 | } | |
511 | ||
512 | /// Compare bitwise Equal (vector) | |
513 | #[inline] | |
514 | #[target_feature(enable = "neon")] | |
515 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
516 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vceq.i16"))] | |
517 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmeq))] | |
518 | pub unsafe fn vceq_u16(a: uint16x4_t, b: uint16x4_t) -> uint16x4_t { | |
519 | simd_eq(a, b) | |
520 | } | |
521 | ||
522 | /// Compare bitwise Equal (vector) | |
523 | #[inline] | |
524 | #[target_feature(enable = "neon")] | |
525 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
526 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vceq.i16"))] | |
527 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmeq))] | |
528 | pub unsafe fn vceqq_u16(a: uint16x8_t, b: uint16x8_t) -> uint16x8_t { | |
529 | simd_eq(a, b) | |
530 | } | |
531 | ||
532 | /// Compare bitwise Equal (vector) | |
533 | #[inline] | |
534 | #[target_feature(enable = "neon")] | |
535 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
536 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vceq.i32"))] | |
537 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmeq))] | |
538 | pub unsafe fn vceq_u32(a: uint32x2_t, b: uint32x2_t) -> uint32x2_t { | |
539 | simd_eq(a, b) | |
540 | } | |
541 | ||
542 | /// Compare bitwise Equal (vector) | |
543 | #[inline] | |
544 | #[target_feature(enable = "neon")] | |
545 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
546 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vceq.i32"))] | |
547 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmeq))] | |
548 | pub unsafe fn vceqq_u32(a: uint32x4_t, b: uint32x4_t) -> uint32x4_t { | |
549 | simd_eq(a, b) | |
550 | } | |
551 | ||
552 | /// Compare bitwise Equal (vector) | |
553 | #[inline] | |
554 | #[target_feature(enable = "neon")] | |
555 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
556 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vceq.i8"))] | |
557 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmeq))] | |
558 | pub unsafe fn vceq_s8(a: int8x8_t, b: int8x8_t) -> uint8x8_t { | |
559 | simd_eq(a, b) | |
560 | } | |
561 | ||
562 | /// Compare bitwise Equal (vector) | |
563 | #[inline] | |
564 | #[target_feature(enable = "neon")] | |
565 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
566 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vceq.i8"))] | |
567 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmeq))] | |
568 | pub unsafe fn vceqq_s8(a: int8x16_t, b: int8x16_t) -> uint8x16_t { | |
569 | simd_eq(a, b) | |
570 | } | |
571 | ||
572 | /// Compare bitwise Equal (vector) | |
573 | #[inline] | |
574 | #[target_feature(enable = "neon")] | |
575 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
576 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vceq.i16"))] | |
577 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmeq))] | |
578 | pub unsafe fn vceq_s16(a: int16x4_t, b: int16x4_t) -> uint16x4_t { | |
579 | simd_eq(a, b) | |
580 | } | |
581 | ||
582 | /// Compare bitwise Equal (vector) | |
583 | #[inline] | |
584 | #[target_feature(enable = "neon")] | |
585 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
586 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vceq.i16"))] | |
587 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmeq))] | |
588 | pub unsafe fn vceqq_s16(a: int16x8_t, b: int16x8_t) -> uint16x8_t { | |
589 | simd_eq(a, b) | |
590 | } | |
591 | ||
592 | /// Compare bitwise Equal (vector) | |
593 | #[inline] | |
594 | #[target_feature(enable = "neon")] | |
595 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
596 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vceq.i32"))] | |
597 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmeq))] | |
598 | pub unsafe fn vceq_s32(a: int32x2_t, b: int32x2_t) -> uint32x2_t { | |
599 | simd_eq(a, b) | |
600 | } | |
601 | ||
602 | /// Compare bitwise Equal (vector) | |
603 | #[inline] | |
604 | #[target_feature(enable = "neon")] | |
605 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
606 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vceq.i32"))] | |
607 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmeq))] | |
608 | pub unsafe fn vceqq_s32(a: int32x4_t, b: int32x4_t) -> uint32x4_t { | |
609 | simd_eq(a, b) | |
610 | } | |
611 | ||
612 | /// Floating-point compare equal | |
613 | #[inline] | |
614 | #[target_feature(enable = "neon")] | |
615 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
616 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vceq.f32"))] | |
617 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(fcmeq))] | |
618 | pub unsafe fn vceq_f32(a: float32x2_t, b: float32x2_t) -> uint32x2_t { | |
619 | simd_eq(a, b) | |
620 | } | |
621 | ||
622 | /// Floating-point compare equal | |
623 | #[inline] | |
624 | #[target_feature(enable = "neon")] | |
625 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
626 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vceq.f32"))] | |
627 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(fcmeq))] | |
628 | pub unsafe fn vceqq_f32(a: float32x4_t, b: float32x4_t) -> uint32x4_t { | |
629 | simd_eq(a, b) | |
630 | } | |
631 | ||
632 | /// Compare signed greater than | |
633 | #[inline] | |
634 | #[target_feature(enable = "neon")] | |
635 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
636 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcgt.s8"))] | |
637 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmgt))] | |
638 | pub unsafe fn vcgt_s8(a: int8x8_t, b: int8x8_t) -> uint8x8_t { | |
639 | simd_gt(a, b) | |
640 | } | |
641 | ||
642 | /// Compare signed greater than | |
643 | #[inline] | |
644 | #[target_feature(enable = "neon")] | |
645 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
646 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcgt.s8"))] | |
647 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmgt))] | |
648 | pub unsafe fn vcgtq_s8(a: int8x16_t, b: int8x16_t) -> uint8x16_t { | |
649 | simd_gt(a, b) | |
650 | } | |
651 | ||
652 | /// Compare signed greater than | |
653 | #[inline] | |
654 | #[target_feature(enable = "neon")] | |
655 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
656 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcgt.s16"))] | |
657 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmgt))] | |
658 | pub unsafe fn vcgt_s16(a: int16x4_t, b: int16x4_t) -> uint16x4_t { | |
659 | simd_gt(a, b) | |
660 | } | |
661 | ||
662 | /// Compare signed greater than | |
663 | #[inline] | |
664 | #[target_feature(enable = "neon")] | |
665 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
666 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcgt.s16"))] | |
667 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmgt))] | |
668 | pub unsafe fn vcgtq_s16(a: int16x8_t, b: int16x8_t) -> uint16x8_t { | |
669 | simd_gt(a, b) | |
670 | } | |
671 | ||
672 | /// Compare signed greater than | |
673 | #[inline] | |
674 | #[target_feature(enable = "neon")] | |
675 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
676 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcgt.s32"))] | |
677 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmgt))] | |
678 | pub unsafe fn vcgt_s32(a: int32x2_t, b: int32x2_t) -> uint32x2_t { | |
679 | simd_gt(a, b) | |
680 | } | |
681 | ||
682 | /// Compare signed greater than | |
683 | #[inline] | |
684 | #[target_feature(enable = "neon")] | |
685 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
686 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcgt.s32"))] | |
687 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmgt))] | |
688 | pub unsafe fn vcgtq_s32(a: int32x4_t, b: int32x4_t) -> uint32x4_t { | |
689 | simd_gt(a, b) | |
690 | } | |
691 | ||
692 | /// Compare unsigned highe | |
693 | #[inline] | |
694 | #[target_feature(enable = "neon")] | |
695 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
696 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcgt.u8"))] | |
697 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmhi))] | |
698 | pub unsafe fn vcgt_u8(a: uint8x8_t, b: uint8x8_t) -> uint8x8_t { | |
699 | simd_gt(a, b) | |
700 | } | |
701 | ||
702 | /// Compare unsigned highe | |
703 | #[inline] | |
704 | #[target_feature(enable = "neon")] | |
705 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
706 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcgt.u8"))] | |
707 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmhi))] | |
708 | pub unsafe fn vcgtq_u8(a: uint8x16_t, b: uint8x16_t) -> uint8x16_t { | |
709 | simd_gt(a, b) | |
710 | } | |
711 | ||
712 | /// Compare unsigned highe | |
713 | #[inline] | |
714 | #[target_feature(enable = "neon")] | |
715 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
716 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcgt.u16"))] | |
717 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmhi))] | |
718 | pub unsafe fn vcgt_u16(a: uint16x4_t, b: uint16x4_t) -> uint16x4_t { | |
719 | simd_gt(a, b) | |
720 | } | |
721 | ||
722 | /// Compare unsigned highe | |
723 | #[inline] | |
724 | #[target_feature(enable = "neon")] | |
725 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
726 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcgt.u16"))] | |
727 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmhi))] | |
728 | pub unsafe fn vcgtq_u16(a: uint16x8_t, b: uint16x8_t) -> uint16x8_t { | |
729 | simd_gt(a, b) | |
730 | } | |
731 | ||
732 | /// Compare unsigned highe | |
733 | #[inline] | |
734 | #[target_feature(enable = "neon")] | |
735 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
736 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcgt.u32"))] | |
737 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmhi))] | |
738 | pub unsafe fn vcgt_u32(a: uint32x2_t, b: uint32x2_t) -> uint32x2_t { | |
739 | simd_gt(a, b) | |
740 | } | |
741 | ||
742 | /// Compare unsigned highe | |
743 | #[inline] | |
744 | #[target_feature(enable = "neon")] | |
745 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
746 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcgt.u32"))] | |
747 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmhi))] | |
748 | pub unsafe fn vcgtq_u32(a: uint32x4_t, b: uint32x4_t) -> uint32x4_t { | |
749 | simd_gt(a, b) | |
750 | } | |
751 | ||
752 | /// Floating-point compare greater than | |
753 | #[inline] | |
754 | #[target_feature(enable = "neon")] | |
755 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
756 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcgt.f32"))] | |
757 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(fcmgt))] | |
758 | pub unsafe fn vcgt_f32(a: float32x2_t, b: float32x2_t) -> uint32x2_t { | |
759 | simd_gt(a, b) | |
760 | } | |
761 | ||
762 | /// Floating-point compare greater than | |
763 | #[inline] | |
764 | #[target_feature(enable = "neon")] | |
765 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
766 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcgt.f32"))] | |
767 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(fcmgt))] | |
768 | pub unsafe fn vcgtq_f32(a: float32x4_t, b: float32x4_t) -> uint32x4_t { | |
769 | simd_gt(a, b) | |
770 | } | |
771 | ||
772 | /// Compare signed less than | |
773 | #[inline] | |
774 | #[target_feature(enable = "neon")] | |
775 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
776 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcgt.s8"))] | |
777 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmgt))] | |
778 | pub unsafe fn vclt_s8(a: int8x8_t, b: int8x8_t) -> uint8x8_t { | |
779 | simd_lt(a, b) | |
780 | } | |
781 | ||
782 | /// Compare signed less than | |
783 | #[inline] | |
784 | #[target_feature(enable = "neon")] | |
785 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
786 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcgt.s8"))] | |
787 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmgt))] | |
788 | pub unsafe fn vcltq_s8(a: int8x16_t, b: int8x16_t) -> uint8x16_t { | |
789 | simd_lt(a, b) | |
790 | } | |
791 | ||
792 | /// Compare signed less than | |
793 | #[inline] | |
794 | #[target_feature(enable = "neon")] | |
795 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
796 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcgt.s16"))] | |
797 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmgt))] | |
798 | pub unsafe fn vclt_s16(a: int16x4_t, b: int16x4_t) -> uint16x4_t { | |
799 | simd_lt(a, b) | |
800 | } | |
801 | ||
802 | /// Compare signed less than | |
803 | #[inline] | |
804 | #[target_feature(enable = "neon")] | |
805 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
806 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcgt.s16"))] | |
807 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmgt))] | |
808 | pub unsafe fn vcltq_s16(a: int16x8_t, b: int16x8_t) -> uint16x8_t { | |
809 | simd_lt(a, b) | |
810 | } | |
811 | ||
812 | /// Compare signed less than | |
813 | #[inline] | |
814 | #[target_feature(enable = "neon")] | |
815 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
816 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcgt.s32"))] | |
817 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmgt))] | |
818 | pub unsafe fn vclt_s32(a: int32x2_t, b: int32x2_t) -> uint32x2_t { | |
819 | simd_lt(a, b) | |
820 | } | |
821 | ||
822 | /// Compare signed less than | |
823 | #[inline] | |
824 | #[target_feature(enable = "neon")] | |
825 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
826 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcgt.s32"))] | |
827 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmgt))] | |
828 | pub unsafe fn vcltq_s32(a: int32x4_t, b: int32x4_t) -> uint32x4_t { | |
829 | simd_lt(a, b) | |
830 | } | |
831 | ||
832 | /// Compare unsigned less than | |
833 | #[inline] | |
834 | #[target_feature(enable = "neon")] | |
835 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
836 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcgt.u8"))] | |
837 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmhi))] | |
838 | pub unsafe fn vclt_u8(a: uint8x8_t, b: uint8x8_t) -> uint8x8_t { | |
839 | simd_lt(a, b) | |
840 | } | |
841 | ||
842 | /// Compare unsigned less than | |
843 | #[inline] | |
844 | #[target_feature(enable = "neon")] | |
845 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
846 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcgt.u8"))] | |
847 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmhi))] | |
848 | pub unsafe fn vcltq_u8(a: uint8x16_t, b: uint8x16_t) -> uint8x16_t { | |
849 | simd_lt(a, b) | |
850 | } | |
851 | ||
852 | /// Compare unsigned less than | |
853 | #[inline] | |
854 | #[target_feature(enable = "neon")] | |
855 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
856 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcgt.u16"))] | |
857 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmhi))] | |
858 | pub unsafe fn vclt_u16(a: uint16x4_t, b: uint16x4_t) -> uint16x4_t { | |
859 | simd_lt(a, b) | |
860 | } | |
861 | ||
862 | /// Compare unsigned less than | |
863 | #[inline] | |
864 | #[target_feature(enable = "neon")] | |
865 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
866 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcgt.u16"))] | |
867 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmhi))] | |
868 | pub unsafe fn vcltq_u16(a: uint16x8_t, b: uint16x8_t) -> uint16x8_t { | |
869 | simd_lt(a, b) | |
870 | } | |
871 | ||
872 | /// Compare unsigned less than | |
873 | #[inline] | |
874 | #[target_feature(enable = "neon")] | |
875 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
876 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcgt.u32"))] | |
877 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmhi))] | |
878 | pub unsafe fn vclt_u32(a: uint32x2_t, b: uint32x2_t) -> uint32x2_t { | |
879 | simd_lt(a, b) | |
880 | } | |
881 | ||
882 | /// Compare unsigned less than | |
883 | #[inline] | |
884 | #[target_feature(enable = "neon")] | |
885 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
886 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcgt.u32"))] | |
887 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmhi))] | |
888 | pub unsafe fn vcltq_u32(a: uint32x4_t, b: uint32x4_t) -> uint32x4_t { | |
889 | simd_lt(a, b) | |
890 | } | |
891 | ||
892 | /// Floating-point compare less than | |
893 | #[inline] | |
894 | #[target_feature(enable = "neon")] | |
895 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
896 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcgt.f32"))] | |
897 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(fcmgt))] | |
898 | pub unsafe fn vclt_f32(a: float32x2_t, b: float32x2_t) -> uint32x2_t { | |
899 | simd_lt(a, b) | |
900 | } | |
901 | ||
902 | /// Floating-point compare less than | |
903 | #[inline] | |
904 | #[target_feature(enable = "neon")] | |
905 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
906 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcgt.f32"))] | |
907 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(fcmgt))] | |
908 | pub unsafe fn vcltq_f32(a: float32x4_t, b: float32x4_t) -> uint32x4_t { | |
909 | simd_lt(a, b) | |
910 | } | |
911 | ||
912 | /// Compare signed less than or equal | |
913 | #[inline] | |
914 | #[target_feature(enable = "neon")] | |
915 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
916 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcge.s8"))] | |
917 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmge))] | |
918 | pub unsafe fn vcle_s8(a: int8x8_t, b: int8x8_t) -> uint8x8_t { | |
919 | simd_le(a, b) | |
920 | } | |
921 | ||
922 | /// Compare signed less than or equal | |
923 | #[inline] | |
924 | #[target_feature(enable = "neon")] | |
925 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
926 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcge.s8"))] | |
927 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmge))] | |
928 | pub unsafe fn vcleq_s8(a: int8x16_t, b: int8x16_t) -> uint8x16_t { | |
929 | simd_le(a, b) | |
930 | } | |
931 | ||
932 | /// Compare signed less than or equal | |
933 | #[inline] | |
934 | #[target_feature(enable = "neon")] | |
935 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
936 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcge.s16"))] | |
937 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmge))] | |
938 | pub unsafe fn vcle_s16(a: int16x4_t, b: int16x4_t) -> uint16x4_t { | |
939 | simd_le(a, b) | |
940 | } | |
941 | ||
942 | /// Compare signed less than or equal | |
943 | #[inline] | |
944 | #[target_feature(enable = "neon")] | |
945 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
946 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcge.s16"))] | |
947 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmge))] | |
948 | pub unsafe fn vcleq_s16(a: int16x8_t, b: int16x8_t) -> uint16x8_t { | |
949 | simd_le(a, b) | |
950 | } | |
951 | ||
952 | /// Compare signed less than or equal | |
953 | #[inline] | |
954 | #[target_feature(enable = "neon")] | |
955 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
956 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcge.s32"))] | |
957 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmge))] | |
958 | pub unsafe fn vcle_s32(a: int32x2_t, b: int32x2_t) -> uint32x2_t { | |
959 | simd_le(a, b) | |
960 | } | |
961 | ||
962 | /// Compare signed less than or equal | |
963 | #[inline] | |
964 | #[target_feature(enable = "neon")] | |
965 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
966 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcge.s32"))] | |
967 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmge))] | |
968 | pub unsafe fn vcleq_s32(a: int32x4_t, b: int32x4_t) -> uint32x4_t { | |
969 | simd_le(a, b) | |
970 | } | |
971 | ||
972 | /// Compare unsigned less than or equal | |
973 | #[inline] | |
974 | #[target_feature(enable = "neon")] | |
975 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
976 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcge.u8"))] | |
977 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmhs))] | |
978 | pub unsafe fn vcle_u8(a: uint8x8_t, b: uint8x8_t) -> uint8x8_t { | |
979 | simd_le(a, b) | |
980 | } | |
981 | ||
982 | /// Compare unsigned less than or equal | |
983 | #[inline] | |
984 | #[target_feature(enable = "neon")] | |
985 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
986 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcge.u8"))] | |
987 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmhs))] | |
988 | pub unsafe fn vcleq_u8(a: uint8x16_t, b: uint8x16_t) -> uint8x16_t { | |
989 | simd_le(a, b) | |
990 | } | |
991 | ||
992 | /// Compare unsigned less than or equal | |
993 | #[inline] | |
994 | #[target_feature(enable = "neon")] | |
995 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
996 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcge.u16"))] | |
997 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmhs))] | |
998 | pub unsafe fn vcle_u16(a: uint16x4_t, b: uint16x4_t) -> uint16x4_t { | |
999 | simd_le(a, b) | |
1000 | } | |
1001 | ||
1002 | /// Compare unsigned less than or equal | |
1003 | #[inline] | |
1004 | #[target_feature(enable = "neon")] | |
1005 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
1006 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcge.u16"))] | |
1007 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmhs))] | |
1008 | pub unsafe fn vcleq_u16(a: uint16x8_t, b: uint16x8_t) -> uint16x8_t { | |
1009 | simd_le(a, b) | |
1010 | } | |
1011 | ||
1012 | /// Compare unsigned less than or equal | |
1013 | #[inline] | |
1014 | #[target_feature(enable = "neon")] | |
1015 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
1016 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcge.u32"))] | |
1017 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmhs))] | |
1018 | pub unsafe fn vcle_u32(a: uint32x2_t, b: uint32x2_t) -> uint32x2_t { | |
1019 | simd_le(a, b) | |
1020 | } | |
1021 | ||
1022 | /// Compare unsigned less than or equal | |
1023 | #[inline] | |
1024 | #[target_feature(enable = "neon")] | |
1025 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
1026 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcge.u32"))] | |
1027 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmhs))] | |
1028 | pub unsafe fn vcleq_u32(a: uint32x4_t, b: uint32x4_t) -> uint32x4_t { | |
1029 | simd_le(a, b) | |
1030 | } | |
1031 | ||
1032 | /// Floating-point compare less than or equal | |
1033 | #[inline] | |
1034 | #[target_feature(enable = "neon")] | |
1035 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
1036 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcge.f32"))] | |
1037 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(fcmge))] | |
1038 | pub unsafe fn vcle_f32(a: float32x2_t, b: float32x2_t) -> uint32x2_t { | |
1039 | simd_le(a, b) | |
1040 | } | |
1041 | ||
1042 | /// Floating-point compare less than or equal | |
1043 | #[inline] | |
1044 | #[target_feature(enable = "neon")] | |
1045 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
1046 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcge.f32"))] | |
1047 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(fcmge))] | |
1048 | pub unsafe fn vcleq_f32(a: float32x4_t, b: float32x4_t) -> uint32x4_t { | |
1049 | simd_le(a, b) | |
1050 | } | |
1051 | ||
1052 | /// Compare signed greater than or equal | |
1053 | #[inline] | |
1054 | #[target_feature(enable = "neon")] | |
1055 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
1056 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcge.s8"))] | |
1057 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmge))] | |
1058 | pub unsafe fn vcge_s8(a: int8x8_t, b: int8x8_t) -> uint8x8_t { | |
1059 | simd_ge(a, b) | |
1060 | } | |
1061 | ||
1062 | /// Compare signed greater than or equal | |
1063 | #[inline] | |
1064 | #[target_feature(enable = "neon")] | |
1065 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
1066 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcge.s8"))] | |
1067 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmge))] | |
1068 | pub unsafe fn vcgeq_s8(a: int8x16_t, b: int8x16_t) -> uint8x16_t { | |
1069 | simd_ge(a, b) | |
1070 | } | |
1071 | ||
1072 | /// Compare signed greater than or equal | |
1073 | #[inline] | |
1074 | #[target_feature(enable = "neon")] | |
1075 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
1076 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcge.s16"))] | |
1077 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmge))] | |
1078 | pub unsafe fn vcge_s16(a: int16x4_t, b: int16x4_t) -> uint16x4_t { | |
1079 | simd_ge(a, b) | |
1080 | } | |
1081 | ||
1082 | /// Compare signed greater than or equal | |
1083 | #[inline] | |
1084 | #[target_feature(enable = "neon")] | |
1085 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
1086 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcge.s16"))] | |
1087 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmge))] | |
1088 | pub unsafe fn vcgeq_s16(a: int16x8_t, b: int16x8_t) -> uint16x8_t { | |
1089 | simd_ge(a, b) | |
1090 | } | |
1091 | ||
1092 | /// Compare signed greater than or equal | |
1093 | #[inline] | |
1094 | #[target_feature(enable = "neon")] | |
1095 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
1096 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcge.s32"))] | |
1097 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmge))] | |
1098 | pub unsafe fn vcge_s32(a: int32x2_t, b: int32x2_t) -> uint32x2_t { | |
1099 | simd_ge(a, b) | |
1100 | } | |
1101 | ||
1102 | /// Compare signed greater than or equal | |
1103 | #[inline] | |
1104 | #[target_feature(enable = "neon")] | |
1105 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
1106 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcge.s32"))] | |
1107 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmge))] | |
1108 | pub unsafe fn vcgeq_s32(a: int32x4_t, b: int32x4_t) -> uint32x4_t { | |
1109 | simd_ge(a, b) | |
1110 | } | |
1111 | ||
1112 | /// Compare unsigned greater than or equal | |
1113 | #[inline] | |
1114 | #[target_feature(enable = "neon")] | |
1115 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
1116 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcge.u8"))] | |
1117 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmhs))] | |
1118 | pub unsafe fn vcge_u8(a: uint8x8_t, b: uint8x8_t) -> uint8x8_t { | |
1119 | simd_ge(a, b) | |
1120 | } | |
1121 | ||
1122 | /// Compare unsigned greater than or equal | |
1123 | #[inline] | |
1124 | #[target_feature(enable = "neon")] | |
1125 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
1126 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcge.u8"))] | |
1127 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmhs))] | |
1128 | pub unsafe fn vcgeq_u8(a: uint8x16_t, b: uint8x16_t) -> uint8x16_t { | |
1129 | simd_ge(a, b) | |
1130 | } | |
1131 | ||
1132 | /// Compare unsigned greater than or equal | |
1133 | #[inline] | |
1134 | #[target_feature(enable = "neon")] | |
1135 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
1136 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcge.u16"))] | |
1137 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmhs))] | |
1138 | pub unsafe fn vcge_u16(a: uint16x4_t, b: uint16x4_t) -> uint16x4_t { | |
1139 | simd_ge(a, b) | |
1140 | } | |
1141 | ||
1142 | /// Compare unsigned greater than or equal | |
1143 | #[inline] | |
1144 | #[target_feature(enable = "neon")] | |
1145 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
1146 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcge.u16"))] | |
1147 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmhs))] | |
1148 | pub unsafe fn vcgeq_u16(a: uint16x8_t, b: uint16x8_t) -> uint16x8_t { | |
1149 | simd_ge(a, b) | |
1150 | } | |
1151 | ||
1152 | /// Compare unsigned greater than or equal | |
1153 | #[inline] | |
1154 | #[target_feature(enable = "neon")] | |
1155 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
1156 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcge.u32"))] | |
1157 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmhs))] | |
1158 | pub unsafe fn vcge_u32(a: uint32x2_t, b: uint32x2_t) -> uint32x2_t { | |
1159 | simd_ge(a, b) | |
1160 | } | |
1161 | ||
1162 | /// Compare unsigned greater than or equal | |
1163 | #[inline] | |
1164 | #[target_feature(enable = "neon")] | |
1165 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
1166 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcge.u32"))] | |
1167 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(cmhs))] | |
1168 | pub unsafe fn vcgeq_u32(a: uint32x4_t, b: uint32x4_t) -> uint32x4_t { | |
1169 | simd_ge(a, b) | |
1170 | } | |
1171 | ||
1172 | /// Floating-point compare greater than or equal | |
1173 | #[inline] | |
1174 | #[target_feature(enable = "neon")] | |
1175 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
1176 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcge.f32"))] | |
1177 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(fcmge))] | |
1178 | pub unsafe fn vcge_f32(a: float32x2_t, b: float32x2_t) -> uint32x2_t { | |
1179 | simd_ge(a, b) | |
1180 | } | |
1181 | ||
1182 | /// Floating-point compare greater than or equal | |
1183 | #[inline] | |
1184 | #[target_feature(enable = "neon")] | |
1185 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
1186 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vcge.f32"))] | |
1187 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(fcmge))] | |
1188 | pub unsafe fn vcgeq_f32(a: float32x4_t, b: float32x4_t) -> uint32x4_t { | |
1189 | simd_ge(a, b) | |
1190 | } | |
1191 | ||
1192 | /// Saturating subtract | |
1193 | #[inline] | |
1194 | #[target_feature(enable = "neon")] | |
1195 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
1196 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vqsub.u8"))] | |
1197 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(uqsub))] | |
1198 | pub unsafe fn vqsub_u8(a: uint8x8_t, b: uint8x8_t) -> uint8x8_t { | |
1199 | #[allow(improper_ctypes)] | |
1200 | extern "C" { | |
1201 | #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqsubu.v8i8")] | |
1202 | #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.uqsub.v8i8")] | |
1203 | fn vqsub_u8_(a: uint8x8_t, b: uint8x8_t) -> uint8x8_t; | |
1204 | } | |
1205 | vqsub_u8_(a, b) | |
1206 | } | |
1207 | ||
1208 | /// Saturating subtract | |
1209 | #[inline] | |
1210 | #[target_feature(enable = "neon")] | |
1211 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
1212 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vqsub.u8"))] | |
1213 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(uqsub))] | |
1214 | pub unsafe fn vqsubq_u8(a: uint8x16_t, b: uint8x16_t) -> uint8x16_t { | |
1215 | #[allow(improper_ctypes)] | |
1216 | extern "C" { | |
1217 | #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqsubu.v16i8")] | |
1218 | #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.uqsub.v16i8")] | |
1219 | fn vqsubq_u8_(a: uint8x16_t, b: uint8x16_t) -> uint8x16_t; | |
1220 | } | |
1221 | vqsubq_u8_(a, b) | |
1222 | } | |
1223 | ||
1224 | /// Saturating subtract | |
1225 | #[inline] | |
1226 | #[target_feature(enable = "neon")] | |
1227 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
1228 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vqsub.u16"))] | |
1229 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(uqsub))] | |
1230 | pub unsafe fn vqsub_u16(a: uint16x4_t, b: uint16x4_t) -> uint16x4_t { | |
1231 | #[allow(improper_ctypes)] | |
1232 | extern "C" { | |
1233 | #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqsubu.v4i16")] | |
1234 | #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.uqsub.v4i16")] | |
1235 | fn vqsub_u16_(a: uint16x4_t, b: uint16x4_t) -> uint16x4_t; | |
1236 | } | |
1237 | vqsub_u16_(a, b) | |
1238 | } | |
1239 | ||
1240 | /// Saturating subtract | |
1241 | #[inline] | |
1242 | #[target_feature(enable = "neon")] | |
1243 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
1244 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vqsub.u16"))] | |
1245 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(uqsub))] | |
1246 | pub unsafe fn vqsubq_u16(a: uint16x8_t, b: uint16x8_t) -> uint16x8_t { | |
1247 | #[allow(improper_ctypes)] | |
1248 | extern "C" { | |
1249 | #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqsubu.v8i16")] | |
1250 | #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.uqsub.v8i16")] | |
1251 | fn vqsubq_u16_(a: uint16x8_t, b: uint16x8_t) -> uint16x8_t; | |
1252 | } | |
1253 | vqsubq_u16_(a, b) | |
1254 | } | |
1255 | ||
1256 | /// Saturating subtract | |
1257 | #[inline] | |
1258 | #[target_feature(enable = "neon")] | |
1259 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
1260 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vqsub.u32"))] | |
1261 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(uqsub))] | |
1262 | pub unsafe fn vqsub_u32(a: uint32x2_t, b: uint32x2_t) -> uint32x2_t { | |
1263 | #[allow(improper_ctypes)] | |
1264 | extern "C" { | |
1265 | #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqsubu.v2i32")] | |
1266 | #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.uqsub.v2i32")] | |
1267 | fn vqsub_u32_(a: uint32x2_t, b: uint32x2_t) -> uint32x2_t; | |
1268 | } | |
1269 | vqsub_u32_(a, b) | |
1270 | } | |
1271 | ||
1272 | /// Saturating subtract | |
1273 | #[inline] | |
1274 | #[target_feature(enable = "neon")] | |
1275 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
1276 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vqsub.u32"))] | |
1277 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(uqsub))] | |
1278 | pub unsafe fn vqsubq_u32(a: uint32x4_t, b: uint32x4_t) -> uint32x4_t { | |
1279 | #[allow(improper_ctypes)] | |
1280 | extern "C" { | |
1281 | #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqsubu.v4i32")] | |
1282 | #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.uqsub.v4i32")] | |
1283 | fn vqsubq_u32_(a: uint32x4_t, b: uint32x4_t) -> uint32x4_t; | |
1284 | } | |
1285 | vqsubq_u32_(a, b) | |
1286 | } | |
1287 | ||
1288 | /// Saturating subtract | |
1289 | #[inline] | |
1290 | #[target_feature(enable = "neon")] | |
1291 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
1292 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vqsub.s8"))] | |
1293 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(sqsub))] | |
1294 | pub unsafe fn vqsub_s8(a: int8x8_t, b: int8x8_t) -> int8x8_t { | |
1295 | #[allow(improper_ctypes)] | |
1296 | extern "C" { | |
1297 | #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqsubs.v8i8")] | |
1298 | #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.sqsub.v8i8")] | |
1299 | fn vqsub_s8_(a: int8x8_t, b: int8x8_t) -> int8x8_t; | |
1300 | } | |
1301 | vqsub_s8_(a, b) | |
1302 | } | |
1303 | ||
1304 | /// Saturating subtract | |
1305 | #[inline] | |
1306 | #[target_feature(enable = "neon")] | |
1307 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
1308 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vqsub.s8"))] | |
1309 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(sqsub))] | |
1310 | pub unsafe fn vqsubq_s8(a: int8x16_t, b: int8x16_t) -> int8x16_t { | |
1311 | #[allow(improper_ctypes)] | |
1312 | extern "C" { | |
1313 | #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqsubs.v16i8")] | |
1314 | #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.sqsub.v16i8")] | |
1315 | fn vqsubq_s8_(a: int8x16_t, b: int8x16_t) -> int8x16_t; | |
1316 | } | |
1317 | vqsubq_s8_(a, b) | |
1318 | } | |
1319 | ||
1320 | /// Saturating subtract | |
1321 | #[inline] | |
1322 | #[target_feature(enable = "neon")] | |
1323 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
1324 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vqsub.s16"))] | |
1325 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(sqsub))] | |
1326 | pub unsafe fn vqsub_s16(a: int16x4_t, b: int16x4_t) -> int16x4_t { | |
1327 | #[allow(improper_ctypes)] | |
1328 | extern "C" { | |
1329 | #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqsubs.v4i16")] | |
1330 | #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.sqsub.v4i16")] | |
1331 | fn vqsub_s16_(a: int16x4_t, b: int16x4_t) -> int16x4_t; | |
1332 | } | |
1333 | vqsub_s16_(a, b) | |
1334 | } | |
1335 | ||
1336 | /// Saturating subtract | |
1337 | #[inline] | |
1338 | #[target_feature(enable = "neon")] | |
1339 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
1340 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vqsub.s16"))] | |
1341 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(sqsub))] | |
1342 | pub unsafe fn vqsubq_s16(a: int16x8_t, b: int16x8_t) -> int16x8_t { | |
1343 | #[allow(improper_ctypes)] | |
1344 | extern "C" { | |
1345 | #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqsubs.v8i16")] | |
1346 | #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.sqsub.v8i16")] | |
1347 | fn vqsubq_s16_(a: int16x8_t, b: int16x8_t) -> int16x8_t; | |
1348 | } | |
1349 | vqsubq_s16_(a, b) | |
1350 | } | |
1351 | ||
1352 | /// Saturating subtract | |
1353 | #[inline] | |
1354 | #[target_feature(enable = "neon")] | |
1355 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
1356 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vqsub.s32"))] | |
1357 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(sqsub))] | |
1358 | pub unsafe fn vqsub_s32(a: int32x2_t, b: int32x2_t) -> int32x2_t { | |
1359 | #[allow(improper_ctypes)] | |
1360 | extern "C" { | |
1361 | #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqsubs.v2i32")] | |
1362 | #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.sqsub.v2i32")] | |
1363 | fn vqsub_s32_(a: int32x2_t, b: int32x2_t) -> int32x2_t; | |
1364 | } | |
1365 | vqsub_s32_(a, b) | |
1366 | } | |
1367 | ||
1368 | /// Saturating subtract | |
1369 | #[inline] | |
1370 | #[target_feature(enable = "neon")] | |
1371 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
1372 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vqsub.s32"))] | |
1373 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(sqsub))] | |
1374 | pub unsafe fn vqsubq_s32(a: int32x4_t, b: int32x4_t) -> int32x4_t { | |
1375 | #[allow(improper_ctypes)] | |
1376 | extern "C" { | |
1377 | #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqsubs.v4i32")] | |
1378 | #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.sqsub.v4i32")] | |
1379 | fn vqsubq_s32_(a: int32x4_t, b: int32x4_t) -> int32x4_t; | |
1380 | } | |
1381 | vqsubq_s32_(a, b) | |
1382 | } | |
1383 | ||
1384 | /// Halving add | |
1385 | #[inline] | |
1386 | #[target_feature(enable = "neon")] | |
1387 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
1388 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vhadd.u8"))] | |
1389 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(uhadd))] | |
1390 | pub unsafe fn vhadd_u8(a: uint8x8_t, b: uint8x8_t) -> uint8x8_t { | |
1391 | #[allow(improper_ctypes)] | |
1392 | extern "C" { | |
1393 | #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vhaddu.v8i8")] | |
1394 | #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.uhadd.v8i8")] | |
1395 | fn vhadd_u8_(a: uint8x8_t, b: uint8x8_t) -> uint8x8_t; | |
1396 | } | |
1397 | vhadd_u8_(a, b) | |
1398 | } | |
1399 | ||
1400 | /// Halving add | |
1401 | #[inline] | |
1402 | #[target_feature(enable = "neon")] | |
1403 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
1404 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vhadd.u8"))] | |
1405 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(uhadd))] | |
1406 | pub unsafe fn vhaddq_u8(a: uint8x16_t, b: uint8x16_t) -> uint8x16_t { | |
1407 | #[allow(improper_ctypes)] | |
1408 | extern "C" { | |
1409 | #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vhaddu.v16i8")] | |
1410 | #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.uhadd.v16i8")] | |
1411 | fn vhaddq_u8_(a: uint8x16_t, b: uint8x16_t) -> uint8x16_t; | |
1412 | } | |
1413 | vhaddq_u8_(a, b) | |
1414 | } | |
1415 | ||
1416 | /// Halving add | |
1417 | #[inline] | |
1418 | #[target_feature(enable = "neon")] | |
1419 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
1420 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vhadd.u16"))] | |
1421 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(uhadd))] | |
1422 | pub unsafe fn vhadd_u16(a: uint16x4_t, b: uint16x4_t) -> uint16x4_t { | |
1423 | #[allow(improper_ctypes)] | |
1424 | extern "C" { | |
1425 | #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vhaddu.v4i16")] | |
1426 | #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.uhadd.v4i16")] | |
1427 | fn vhadd_u16_(a: uint16x4_t, b: uint16x4_t) -> uint16x4_t; | |
1428 | } | |
1429 | vhadd_u16_(a, b) | |
1430 | } | |
1431 | ||
1432 | /// Halving add | |
1433 | #[inline] | |
1434 | #[target_feature(enable = "neon")] | |
1435 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
1436 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vhadd.u16"))] | |
1437 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(uhadd))] | |
1438 | pub unsafe fn vhaddq_u16(a: uint16x8_t, b: uint16x8_t) -> uint16x8_t { | |
1439 | #[allow(improper_ctypes)] | |
1440 | extern "C" { | |
1441 | #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vhaddu.v8i16")] | |
1442 | #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.uhadd.v8i16")] | |
1443 | fn vhaddq_u16_(a: uint16x8_t, b: uint16x8_t) -> uint16x8_t; | |
1444 | } | |
1445 | vhaddq_u16_(a, b) | |
1446 | } | |
1447 | ||
1448 | /// Halving add | |
1449 | #[inline] | |
1450 | #[target_feature(enable = "neon")] | |
1451 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
1452 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vhadd.u32"))] | |
1453 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(uhadd))] | |
1454 | pub unsafe fn vhadd_u32(a: uint32x2_t, b: uint32x2_t) -> uint32x2_t { | |
1455 | #[allow(improper_ctypes)] | |
1456 | extern "C" { | |
1457 | #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vhaddu.v2i32")] | |
1458 | #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.uhadd.v2i32")] | |
1459 | fn vhadd_u32_(a: uint32x2_t, b: uint32x2_t) -> uint32x2_t; | |
1460 | } | |
1461 | vhadd_u32_(a, b) | |
1462 | } | |
1463 | ||
1464 | /// Halving add | |
1465 | #[inline] | |
1466 | #[target_feature(enable = "neon")] | |
1467 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
1468 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vhadd.u32"))] | |
1469 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(uhadd))] | |
1470 | pub unsafe fn vhaddq_u32(a: uint32x4_t, b: uint32x4_t) -> uint32x4_t { | |
1471 | #[allow(improper_ctypes)] | |
1472 | extern "C" { | |
1473 | #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vhaddu.v4i32")] | |
1474 | #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.uhadd.v4i32")] | |
1475 | fn vhaddq_u32_(a: uint32x4_t, b: uint32x4_t) -> uint32x4_t; | |
1476 | } | |
1477 | vhaddq_u32_(a, b) | |
1478 | } | |
1479 | ||
1480 | /// Halving add | |
1481 | #[inline] | |
1482 | #[target_feature(enable = "neon")] | |
1483 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
1484 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vhadd.s8"))] | |
1485 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(shadd))] | |
1486 | pub unsafe fn vhadd_s8(a: int8x8_t, b: int8x8_t) -> int8x8_t { | |
1487 | #[allow(improper_ctypes)] | |
1488 | extern "C" { | |
1489 | #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vhadds.v8i8")] | |
1490 | #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.shadd.v8i8")] | |
1491 | fn vhadd_s8_(a: int8x8_t, b: int8x8_t) -> int8x8_t; | |
1492 | } | |
1493 | vhadd_s8_(a, b) | |
1494 | } | |
1495 | ||
1496 | /// Halving add | |
1497 | #[inline] | |
1498 | #[target_feature(enable = "neon")] | |
1499 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
1500 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vhadd.s8"))] | |
1501 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(shadd))] | |
1502 | pub unsafe fn vhaddq_s8(a: int8x16_t, b: int8x16_t) -> int8x16_t { | |
1503 | #[allow(improper_ctypes)] | |
1504 | extern "C" { | |
1505 | #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vhadds.v16i8")] | |
1506 | #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.shadd.v16i8")] | |
1507 | fn vhaddq_s8_(a: int8x16_t, b: int8x16_t) -> int8x16_t; | |
1508 | } | |
1509 | vhaddq_s8_(a, b) | |
1510 | } | |
1511 | ||
1512 | /// Halving add | |
1513 | #[inline] | |
1514 | #[target_feature(enable = "neon")] | |
1515 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
1516 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vhadd.s16"))] | |
1517 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(shadd))] | |
1518 | pub unsafe fn vhadd_s16(a: int16x4_t, b: int16x4_t) -> int16x4_t { | |
1519 | #[allow(improper_ctypes)] | |
1520 | extern "C" { | |
1521 | #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vhadds.v4i16")] | |
1522 | #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.shadd.v4i16")] | |
1523 | fn vhadd_s16_(a: int16x4_t, b: int16x4_t) -> int16x4_t; | |
1524 | } | |
1525 | vhadd_s16_(a, b) | |
1526 | } | |
1527 | ||
1528 | /// Halving add | |
1529 | #[inline] | |
1530 | #[target_feature(enable = "neon")] | |
1531 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
1532 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vhadd.s16"))] | |
1533 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(shadd))] | |
1534 | pub unsafe fn vhaddq_s16(a: int16x8_t, b: int16x8_t) -> int16x8_t { | |
1535 | #[allow(improper_ctypes)] | |
1536 | extern "C" { | |
1537 | #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vhadds.v8i16")] | |
1538 | #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.shadd.v8i16")] | |
1539 | fn vhaddq_s16_(a: int16x8_t, b: int16x8_t) -> int16x8_t; | |
1540 | } | |
1541 | vhaddq_s16_(a, b) | |
1542 | } | |
1543 | ||
1544 | /// Halving add | |
1545 | #[inline] | |
1546 | #[target_feature(enable = "neon")] | |
1547 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
1548 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vhadd.s32"))] | |
1549 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(shadd))] | |
1550 | pub unsafe fn vhadd_s32(a: int32x2_t, b: int32x2_t) -> int32x2_t { | |
1551 | #[allow(improper_ctypes)] | |
1552 | extern "C" { | |
1553 | #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vhadds.v2i32")] | |
1554 | #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.shadd.v2i32")] | |
1555 | fn vhadd_s32_(a: int32x2_t, b: int32x2_t) -> int32x2_t; | |
1556 | } | |
1557 | vhadd_s32_(a, b) | |
1558 | } | |
1559 | ||
1560 | /// Halving add | |
1561 | #[inline] | |
1562 | #[target_feature(enable = "neon")] | |
1563 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
1564 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vhadd.s32"))] | |
1565 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(shadd))] | |
1566 | pub unsafe fn vhaddq_s32(a: int32x4_t, b: int32x4_t) -> int32x4_t { | |
1567 | #[allow(improper_ctypes)] | |
1568 | extern "C" { | |
1569 | #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vhadds.v4i32")] | |
1570 | #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.shadd.v4i32")] | |
1571 | fn vhaddq_s32_(a: int32x4_t, b: int32x4_t) -> int32x4_t; | |
1572 | } | |
1573 | vhaddq_s32_(a, b) | |
1574 | } | |
1575 | ||
1576 | /// Rounding halving add | |
1577 | #[inline] | |
1578 | #[target_feature(enable = "neon")] | |
1579 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
1580 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vrhadd.u8"))] | |
1581 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(urhadd))] | |
1582 | pub unsafe fn vrhadd_u8(a: uint8x8_t, b: uint8x8_t) -> uint8x8_t { | |
1583 | #[allow(improper_ctypes)] | |
1584 | extern "C" { | |
1585 | #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vrhaddu.v8i8")] | |
1586 | #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.urhadd.v8i8")] | |
1587 | fn vrhadd_u8_(a: uint8x8_t, b: uint8x8_t) -> uint8x8_t; | |
1588 | } | |
1589 | vrhadd_u8_(a, b) | |
1590 | } | |
1591 | ||
1592 | /// Rounding halving add | |
1593 | #[inline] | |
1594 | #[target_feature(enable = "neon")] | |
1595 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
1596 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vrhadd.u8"))] | |
1597 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(urhadd))] | |
1598 | pub unsafe fn vrhaddq_u8(a: uint8x16_t, b: uint8x16_t) -> uint8x16_t { | |
1599 | #[allow(improper_ctypes)] | |
1600 | extern "C" { | |
1601 | #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vrhaddu.v16i8")] | |
1602 | #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.urhadd.v16i8")] | |
1603 | fn vrhaddq_u8_(a: uint8x16_t, b: uint8x16_t) -> uint8x16_t; | |
1604 | } | |
1605 | vrhaddq_u8_(a, b) | |
1606 | } | |
1607 | ||
1608 | /// Rounding halving add | |
1609 | #[inline] | |
1610 | #[target_feature(enable = "neon")] | |
1611 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
1612 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vrhadd.u16"))] | |
1613 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(urhadd))] | |
1614 | pub unsafe fn vrhadd_u16(a: uint16x4_t, b: uint16x4_t) -> uint16x4_t { | |
1615 | #[allow(improper_ctypes)] | |
1616 | extern "C" { | |
1617 | #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vrhaddu.v4i16")] | |
1618 | #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.urhadd.v4i16")] | |
1619 | fn vrhadd_u16_(a: uint16x4_t, b: uint16x4_t) -> uint16x4_t; | |
1620 | } | |
1621 | vrhadd_u16_(a, b) | |
1622 | } | |
1623 | ||
1624 | /// Rounding halving add | |
1625 | #[inline] | |
1626 | #[target_feature(enable = "neon")] | |
1627 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
1628 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vrhadd.u16"))] | |
1629 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(urhadd))] | |
1630 | pub unsafe fn vrhaddq_u16(a: uint16x8_t, b: uint16x8_t) -> uint16x8_t { | |
1631 | #[allow(improper_ctypes)] | |
1632 | extern "C" { | |
1633 | #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vrhaddu.v8i16")] | |
1634 | #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.urhadd.v8i16")] | |
1635 | fn vrhaddq_u16_(a: uint16x8_t, b: uint16x8_t) -> uint16x8_t; | |
1636 | } | |
1637 | vrhaddq_u16_(a, b) | |
1638 | } | |
1639 | ||
1640 | /// Rounding halving add | |
1641 | #[inline] | |
1642 | #[target_feature(enable = "neon")] | |
1643 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
1644 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vrhadd.u32"))] | |
1645 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(urhadd))] | |
1646 | pub unsafe fn vrhadd_u32(a: uint32x2_t, b: uint32x2_t) -> uint32x2_t { | |
1647 | #[allow(improper_ctypes)] | |
1648 | extern "C" { | |
1649 | #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vrhaddu.v2i32")] | |
1650 | #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.urhadd.v2i32")] | |
1651 | fn vrhadd_u32_(a: uint32x2_t, b: uint32x2_t) -> uint32x2_t; | |
1652 | } | |
1653 | vrhadd_u32_(a, b) | |
1654 | } | |
1655 | ||
1656 | /// Rounding halving add | |
1657 | #[inline] | |
1658 | #[target_feature(enable = "neon")] | |
1659 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
1660 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vrhadd.u32"))] | |
1661 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(urhadd))] | |
1662 | pub unsafe fn vrhaddq_u32(a: uint32x4_t, b: uint32x4_t) -> uint32x4_t { | |
1663 | #[allow(improper_ctypes)] | |
1664 | extern "C" { | |
1665 | #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vrhaddu.v4i32")] | |
1666 | #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.urhadd.v4i32")] | |
1667 | fn vrhaddq_u32_(a: uint32x4_t, b: uint32x4_t) -> uint32x4_t; | |
1668 | } | |
1669 | vrhaddq_u32_(a, b) | |
1670 | } | |
1671 | ||
1672 | /// Rounding halving add | |
1673 | #[inline] | |
1674 | #[target_feature(enable = "neon")] | |
1675 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
1676 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vrhadd.s8"))] | |
1677 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(srhadd))] | |
1678 | pub unsafe fn vrhadd_s8(a: int8x8_t, b: int8x8_t) -> int8x8_t { | |
1679 | #[allow(improper_ctypes)] | |
1680 | extern "C" { | |
1681 | #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vrhadds.v8i8")] | |
1682 | #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.srhadd.v8i8")] | |
1683 | fn vrhadd_s8_(a: int8x8_t, b: int8x8_t) -> int8x8_t; | |
1684 | } | |
1685 | vrhadd_s8_(a, b) | |
1686 | } | |
1687 | ||
1688 | /// Rounding halving add | |
1689 | #[inline] | |
1690 | #[target_feature(enable = "neon")] | |
1691 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
1692 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vrhadd.s8"))] | |
1693 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(srhadd))] | |
1694 | pub unsafe fn vrhaddq_s8(a: int8x16_t, b: int8x16_t) -> int8x16_t { | |
1695 | #[allow(improper_ctypes)] | |
1696 | extern "C" { | |
1697 | #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vrhadds.v16i8")] | |
1698 | #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.srhadd.v16i8")] | |
1699 | fn vrhaddq_s8_(a: int8x16_t, b: int8x16_t) -> int8x16_t; | |
1700 | } | |
1701 | vrhaddq_s8_(a, b) | |
1702 | } | |
1703 | ||
1704 | /// Rounding halving add | |
1705 | #[inline] | |
1706 | #[target_feature(enable = "neon")] | |
1707 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
1708 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vrhadd.s16"))] | |
1709 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(srhadd))] | |
1710 | pub unsafe fn vrhadd_s16(a: int16x4_t, b: int16x4_t) -> int16x4_t { | |
1711 | #[allow(improper_ctypes)] | |
1712 | extern "C" { | |
1713 | #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vrhadds.v4i16")] | |
1714 | #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.srhadd.v4i16")] | |
1715 | fn vrhadd_s16_(a: int16x4_t, b: int16x4_t) -> int16x4_t; | |
1716 | } | |
1717 | vrhadd_s16_(a, b) | |
1718 | } | |
1719 | ||
1720 | /// Rounding halving add | |
1721 | #[inline] | |
1722 | #[target_feature(enable = "neon")] | |
1723 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
1724 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vrhadd.s16"))] | |
1725 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(srhadd))] | |
1726 | pub unsafe fn vrhaddq_s16(a: int16x8_t, b: int16x8_t) -> int16x8_t { | |
1727 | #[allow(improper_ctypes)] | |
1728 | extern "C" { | |
1729 | #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vrhadds.v8i16")] | |
1730 | #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.srhadd.v8i16")] | |
1731 | fn vrhaddq_s16_(a: int16x8_t, b: int16x8_t) -> int16x8_t; | |
1732 | } | |
1733 | vrhaddq_s16_(a, b) | |
1734 | } | |
1735 | ||
1736 | /// Rounding halving add | |
1737 | #[inline] | |
1738 | #[target_feature(enable = "neon")] | |
1739 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
1740 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vrhadd.s32"))] | |
1741 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(srhadd))] | |
1742 | pub unsafe fn vrhadd_s32(a: int32x2_t, b: int32x2_t) -> int32x2_t { | |
1743 | #[allow(improper_ctypes)] | |
1744 | extern "C" { | |
1745 | #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vrhadds.v2i32")] | |
1746 | #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.srhadd.v2i32")] | |
1747 | fn vrhadd_s32_(a: int32x2_t, b: int32x2_t) -> int32x2_t; | |
1748 | } | |
1749 | vrhadd_s32_(a, b) | |
1750 | } | |
1751 | ||
1752 | /// Rounding halving add | |
1753 | #[inline] | |
1754 | #[target_feature(enable = "neon")] | |
1755 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
1756 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vrhadd.s32"))] | |
1757 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(srhadd))] | |
1758 | pub unsafe fn vrhaddq_s32(a: int32x4_t, b: int32x4_t) -> int32x4_t { | |
1759 | #[allow(improper_ctypes)] | |
1760 | extern "C" { | |
1761 | #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vrhadds.v4i32")] | |
1762 | #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.srhadd.v4i32")] | |
1763 | fn vrhaddq_s32_(a: int32x4_t, b: int32x4_t) -> int32x4_t; | |
1764 | } | |
1765 | vrhaddq_s32_(a, b) | |
1766 | } | |
1767 | ||
1768 | /// Saturating add | |
1769 | #[inline] | |
1770 | #[target_feature(enable = "neon")] | |
1771 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
1772 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vqadd.u8"))] | |
1773 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(uqadd))] | |
1774 | pub unsafe fn vqadd_u8(a: uint8x8_t, b: uint8x8_t) -> uint8x8_t { | |
1775 | #[allow(improper_ctypes)] | |
1776 | extern "C" { | |
1777 | #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqaddu.v8i8")] | |
1778 | #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.uqadd.v8i8")] | |
1779 | fn vqadd_u8_(a: uint8x8_t, b: uint8x8_t) -> uint8x8_t; | |
1780 | } | |
1781 | vqadd_u8_(a, b) | |
1782 | } | |
1783 | ||
1784 | /// Saturating add | |
1785 | #[inline] | |
1786 | #[target_feature(enable = "neon")] | |
1787 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
1788 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vqadd.u8"))] | |
1789 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(uqadd))] | |
1790 | pub unsafe fn vqaddq_u8(a: uint8x16_t, b: uint8x16_t) -> uint8x16_t { | |
1791 | #[allow(improper_ctypes)] | |
1792 | extern "C" { | |
1793 | #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqaddu.v16i8")] | |
1794 | #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.uqadd.v16i8")] | |
1795 | fn vqaddq_u8_(a: uint8x16_t, b: uint8x16_t) -> uint8x16_t; | |
1796 | } | |
1797 | vqaddq_u8_(a, b) | |
1798 | } | |
1799 | ||
1800 | /// Saturating add | |
1801 | #[inline] | |
1802 | #[target_feature(enable = "neon")] | |
1803 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
1804 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vqadd.u16"))] | |
1805 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(uqadd))] | |
1806 | pub unsafe fn vqadd_u16(a: uint16x4_t, b: uint16x4_t) -> uint16x4_t { | |
1807 | #[allow(improper_ctypes)] | |
1808 | extern "C" { | |
1809 | #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqaddu.v4i16")] | |
1810 | #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.uqadd.v4i16")] | |
1811 | fn vqadd_u16_(a: uint16x4_t, b: uint16x4_t) -> uint16x4_t; | |
1812 | } | |
1813 | vqadd_u16_(a, b) | |
1814 | } | |
1815 | ||
1816 | /// Saturating add | |
1817 | #[inline] | |
1818 | #[target_feature(enable = "neon")] | |
1819 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
1820 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vqadd.u16"))] | |
1821 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(uqadd))] | |
1822 | pub unsafe fn vqaddq_u16(a: uint16x8_t, b: uint16x8_t) -> uint16x8_t { | |
1823 | #[allow(improper_ctypes)] | |
1824 | extern "C" { | |
1825 | #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqaddu.v8i16")] | |
1826 | #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.uqadd.v8i16")] | |
1827 | fn vqaddq_u16_(a: uint16x8_t, b: uint16x8_t) -> uint16x8_t; | |
1828 | } | |
1829 | vqaddq_u16_(a, b) | |
1830 | } | |
1831 | ||
1832 | /// Saturating add | |
1833 | #[inline] | |
1834 | #[target_feature(enable = "neon")] | |
1835 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
1836 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vqadd.u32"))] | |
1837 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(uqadd))] | |
1838 | pub unsafe fn vqadd_u32(a: uint32x2_t, b: uint32x2_t) -> uint32x2_t { | |
1839 | #[allow(improper_ctypes)] | |
1840 | extern "C" { | |
1841 | #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqaddu.v2i32")] | |
1842 | #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.uqadd.v2i32")] | |
1843 | fn vqadd_u32_(a: uint32x2_t, b: uint32x2_t) -> uint32x2_t; | |
1844 | } | |
1845 | vqadd_u32_(a, b) | |
1846 | } | |
1847 | ||
1848 | /// Saturating add | |
1849 | #[inline] | |
1850 | #[target_feature(enable = "neon")] | |
1851 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
1852 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vqadd.u32"))] | |
1853 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(uqadd))] | |
1854 | pub unsafe fn vqaddq_u32(a: uint32x4_t, b: uint32x4_t) -> uint32x4_t { | |
1855 | #[allow(improper_ctypes)] | |
1856 | extern "C" { | |
1857 | #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqaddu.v4i32")] | |
1858 | #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.uqadd.v4i32")] | |
1859 | fn vqaddq_u32_(a: uint32x4_t, b: uint32x4_t) -> uint32x4_t; | |
1860 | } | |
1861 | vqaddq_u32_(a, b) | |
1862 | } | |
1863 | ||
1864 | /// Saturating add | |
1865 | #[inline] | |
1866 | #[target_feature(enable = "neon")] | |
1867 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
1868 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vqadd.s8"))] | |
1869 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(sqadd))] | |
1870 | pub unsafe fn vqadd_s8(a: int8x8_t, b: int8x8_t) -> int8x8_t { | |
1871 | #[allow(improper_ctypes)] | |
1872 | extern "C" { | |
1873 | #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqadds.v8i8")] | |
1874 | #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.sqadd.v8i8")] | |
1875 | fn vqadd_s8_(a: int8x8_t, b: int8x8_t) -> int8x8_t; | |
1876 | } | |
1877 | vqadd_s8_(a, b) | |
1878 | } | |
1879 | ||
1880 | /// Saturating add | |
1881 | #[inline] | |
1882 | #[target_feature(enable = "neon")] | |
1883 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
1884 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vqadd.s8"))] | |
1885 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(sqadd))] | |
1886 | pub unsafe fn vqaddq_s8(a: int8x16_t, b: int8x16_t) -> int8x16_t { | |
1887 | #[allow(improper_ctypes)] | |
1888 | extern "C" { | |
1889 | #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqadds.v16i8")] | |
1890 | #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.sqadd.v16i8")] | |
1891 | fn vqaddq_s8_(a: int8x16_t, b: int8x16_t) -> int8x16_t; | |
1892 | } | |
1893 | vqaddq_s8_(a, b) | |
1894 | } | |
1895 | ||
1896 | /// Saturating add | |
1897 | #[inline] | |
1898 | #[target_feature(enable = "neon")] | |
1899 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
1900 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vqadd.s16"))] | |
1901 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(sqadd))] | |
1902 | pub unsafe fn vqadd_s16(a: int16x4_t, b: int16x4_t) -> int16x4_t { | |
1903 | #[allow(improper_ctypes)] | |
1904 | extern "C" { | |
1905 | #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqadds.v4i16")] | |
1906 | #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.sqadd.v4i16")] | |
1907 | fn vqadd_s16_(a: int16x4_t, b: int16x4_t) -> int16x4_t; | |
1908 | } | |
1909 | vqadd_s16_(a, b) | |
1910 | } | |
1911 | ||
1912 | /// Saturating add | |
1913 | #[inline] | |
1914 | #[target_feature(enable = "neon")] | |
1915 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
1916 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vqadd.s16"))] | |
1917 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(sqadd))] | |
1918 | pub unsafe fn vqaddq_s16(a: int16x8_t, b: int16x8_t) -> int16x8_t { | |
1919 | #[allow(improper_ctypes)] | |
1920 | extern "C" { | |
1921 | #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqadds.v8i16")] | |
1922 | #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.sqadd.v8i16")] | |
1923 | fn vqaddq_s16_(a: int16x8_t, b: int16x8_t) -> int16x8_t; | |
1924 | } | |
1925 | vqaddq_s16_(a, b) | |
1926 | } | |
1927 | ||
1928 | /// Saturating add | |
1929 | #[inline] | |
1930 | #[target_feature(enable = "neon")] | |
1931 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
1932 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vqadd.s32"))] | |
1933 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(sqadd))] | |
1934 | pub unsafe fn vqadd_s32(a: int32x2_t, b: int32x2_t) -> int32x2_t { | |
1935 | #[allow(improper_ctypes)] | |
1936 | extern "C" { | |
1937 | #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqadds.v2i32")] | |
1938 | #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.sqadd.v2i32")] | |
1939 | fn vqadd_s32_(a: int32x2_t, b: int32x2_t) -> int32x2_t; | |
1940 | } | |
1941 | vqadd_s32_(a, b) | |
1942 | } | |
1943 | ||
1944 | /// Saturating add | |
1945 | #[inline] | |
1946 | #[target_feature(enable = "neon")] | |
1947 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
1948 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vqadd.s32"))] | |
1949 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(sqadd))] | |
1950 | pub unsafe fn vqaddq_s32(a: int32x4_t, b: int32x4_t) -> int32x4_t { | |
1951 | #[allow(improper_ctypes)] | |
1952 | extern "C" { | |
1953 | #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vqadds.v4i32")] | |
1954 | #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.sqadd.v4i32")] | |
1955 | fn vqaddq_s32_(a: int32x4_t, b: int32x4_t) -> int32x4_t; | |
1956 | } | |
1957 | vqaddq_s32_(a, b) | |
1958 | } | |
1959 | ||
1960 | /// Multiply | |
1961 | #[inline] | |
1962 | #[target_feature(enable = "neon")] | |
1963 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
1964 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vmul.i8"))] | |
1965 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(mul))] | |
1966 | pub unsafe fn vmul_s8(a: int8x8_t, b: int8x8_t) -> int8x8_t { | |
1967 | simd_mul(a, b) | |
1968 | } | |
1969 | ||
1970 | /// Multiply | |
1971 | #[inline] | |
1972 | #[target_feature(enable = "neon")] | |
1973 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
1974 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vmul.i8"))] | |
1975 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(mul))] | |
1976 | pub unsafe fn vmulq_s8(a: int8x16_t, b: int8x16_t) -> int8x16_t { | |
1977 | simd_mul(a, b) | |
1978 | } | |
1979 | ||
1980 | /// Multiply | |
1981 | #[inline] | |
1982 | #[target_feature(enable = "neon")] | |
1983 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
1984 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vmul.i16"))] | |
1985 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(mul))] | |
1986 | pub unsafe fn vmul_s16(a: int16x4_t, b: int16x4_t) -> int16x4_t { | |
1987 | simd_mul(a, b) | |
1988 | } | |
1989 | ||
1990 | /// Multiply | |
1991 | #[inline] | |
1992 | #[target_feature(enable = "neon")] | |
1993 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
1994 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vmul.i16"))] | |
1995 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(mul))] | |
1996 | pub unsafe fn vmulq_s16(a: int16x8_t, b: int16x8_t) -> int16x8_t { | |
1997 | simd_mul(a, b) | |
1998 | } | |
1999 | ||
2000 | /// Multiply | |
2001 | #[inline] | |
2002 | #[target_feature(enable = "neon")] | |
2003 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
2004 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vmul.i32"))] | |
2005 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(mul))] | |
2006 | pub unsafe fn vmul_s32(a: int32x2_t, b: int32x2_t) -> int32x2_t { | |
2007 | simd_mul(a, b) | |
2008 | } | |
2009 | ||
2010 | /// Multiply | |
2011 | #[inline] | |
2012 | #[target_feature(enable = "neon")] | |
2013 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
2014 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vmul.i32"))] | |
2015 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(mul))] | |
2016 | pub unsafe fn vmulq_s32(a: int32x4_t, b: int32x4_t) -> int32x4_t { | |
2017 | simd_mul(a, b) | |
2018 | } | |
2019 | ||
2020 | /// Multiply | |
2021 | #[inline] | |
2022 | #[target_feature(enable = "neon")] | |
2023 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
2024 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vmul.i8"))] | |
2025 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(mul))] | |
2026 | pub unsafe fn vmul_u8(a: uint8x8_t, b: uint8x8_t) -> uint8x8_t { | |
2027 | simd_mul(a, b) | |
2028 | } | |
2029 | ||
2030 | /// Multiply | |
2031 | #[inline] | |
2032 | #[target_feature(enable = "neon")] | |
2033 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
2034 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vmul.i8"))] | |
2035 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(mul))] | |
2036 | pub unsafe fn vmulq_u8(a: uint8x16_t, b: uint8x16_t) -> uint8x16_t { | |
2037 | simd_mul(a, b) | |
2038 | } | |
2039 | ||
2040 | /// Multiply | |
2041 | #[inline] | |
2042 | #[target_feature(enable = "neon")] | |
2043 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
2044 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vmul.i16"))] | |
2045 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(mul))] | |
2046 | pub unsafe fn vmul_u16(a: uint16x4_t, b: uint16x4_t) -> uint16x4_t { | |
2047 | simd_mul(a, b) | |
2048 | } | |
2049 | ||
2050 | /// Multiply | |
2051 | #[inline] | |
2052 | #[target_feature(enable = "neon")] | |
2053 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
2054 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vmul.i16"))] | |
2055 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(mul))] | |
2056 | pub unsafe fn vmulq_u16(a: uint16x8_t, b: uint16x8_t) -> uint16x8_t { | |
2057 | simd_mul(a, b) | |
2058 | } | |
2059 | ||
2060 | /// Multiply | |
2061 | #[inline] | |
2062 | #[target_feature(enable = "neon")] | |
2063 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
2064 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vmul.i32"))] | |
2065 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(mul))] | |
2066 | pub unsafe fn vmul_u32(a: uint32x2_t, b: uint32x2_t) -> uint32x2_t { | |
2067 | simd_mul(a, b) | |
2068 | } | |
2069 | ||
2070 | /// Multiply | |
2071 | #[inline] | |
2072 | #[target_feature(enable = "neon")] | |
2073 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
2074 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vmul.i32"))] | |
2075 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(mul))] | |
2076 | pub unsafe fn vmulq_u32(a: uint32x4_t, b: uint32x4_t) -> uint32x4_t { | |
2077 | simd_mul(a, b) | |
2078 | } | |
2079 | ||
2080 | /// Multiply | |
2081 | #[inline] | |
2082 | #[target_feature(enable = "neon")] | |
2083 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
2084 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vmul.f32"))] | |
2085 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(fmul))] | |
2086 | pub unsafe fn vmul_f32(a: float32x2_t, b: float32x2_t) -> float32x2_t { | |
2087 | simd_mul(a, b) | |
2088 | } | |
2089 | ||
2090 | /// Multiply | |
2091 | #[inline] | |
2092 | #[target_feature(enable = "neon")] | |
2093 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
2094 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vmul.f32"))] | |
2095 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(fmul))] | |
2096 | pub unsafe fn vmulq_f32(a: float32x4_t, b: float32x4_t) -> float32x4_t { | |
2097 | simd_mul(a, b) | |
2098 | } | |
2099 | ||
2100 | /// Subtract | |
2101 | #[inline] | |
2102 | #[target_feature(enable = "neon")] | |
2103 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
2104 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vsub.i8"))] | |
2105 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(sub))] | |
2106 | pub unsafe fn vsub_s8(a: int8x8_t, b: int8x8_t) -> int8x8_t { | |
2107 | simd_sub(a, b) | |
2108 | } | |
2109 | ||
2110 | /// Subtract | |
2111 | #[inline] | |
2112 | #[target_feature(enable = "neon")] | |
2113 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
2114 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vsub.i8"))] | |
2115 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(sub))] | |
2116 | pub unsafe fn vsubq_s8(a: int8x16_t, b: int8x16_t) -> int8x16_t { | |
2117 | simd_sub(a, b) | |
2118 | } | |
2119 | ||
2120 | /// Subtract | |
2121 | #[inline] | |
2122 | #[target_feature(enable = "neon")] | |
2123 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
2124 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vsub.i16"))] | |
2125 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(sub))] | |
2126 | pub unsafe fn vsub_s16(a: int16x4_t, b: int16x4_t) -> int16x4_t { | |
2127 | simd_sub(a, b) | |
2128 | } | |
2129 | ||
2130 | /// Subtract | |
2131 | #[inline] | |
2132 | #[target_feature(enable = "neon")] | |
2133 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
2134 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vsub.i16"))] | |
2135 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(sub))] | |
2136 | pub unsafe fn vsubq_s16(a: int16x8_t, b: int16x8_t) -> int16x8_t { | |
2137 | simd_sub(a, b) | |
2138 | } | |
2139 | ||
2140 | /// Subtract | |
2141 | #[inline] | |
2142 | #[target_feature(enable = "neon")] | |
2143 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
2144 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vsub.i32"))] | |
2145 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(sub))] | |
2146 | pub unsafe fn vsub_s32(a: int32x2_t, b: int32x2_t) -> int32x2_t { | |
2147 | simd_sub(a, b) | |
2148 | } | |
2149 | ||
2150 | /// Subtract | |
2151 | #[inline] | |
2152 | #[target_feature(enable = "neon")] | |
2153 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
2154 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vsub.i32"))] | |
2155 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(sub))] | |
2156 | pub unsafe fn vsubq_s32(a: int32x4_t, b: int32x4_t) -> int32x4_t { | |
2157 | simd_sub(a, b) | |
2158 | } | |
2159 | ||
2160 | /// Subtract | |
2161 | #[inline] | |
2162 | #[target_feature(enable = "neon")] | |
2163 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
2164 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vsub.i8"))] | |
2165 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(sub))] | |
2166 | pub unsafe fn vsub_u8(a: uint8x8_t, b: uint8x8_t) -> uint8x8_t { | |
2167 | simd_sub(a, b) | |
2168 | } | |
2169 | ||
2170 | /// Subtract | |
2171 | #[inline] | |
2172 | #[target_feature(enable = "neon")] | |
2173 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
2174 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vsub.i8"))] | |
2175 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(sub))] | |
2176 | pub unsafe fn vsubq_u8(a: uint8x16_t, b: uint8x16_t) -> uint8x16_t { | |
2177 | simd_sub(a, b) | |
2178 | } | |
2179 | ||
2180 | /// Subtract | |
2181 | #[inline] | |
2182 | #[target_feature(enable = "neon")] | |
2183 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
2184 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vsub.i16"))] | |
2185 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(sub))] | |
2186 | pub unsafe fn vsub_u16(a: uint16x4_t, b: uint16x4_t) -> uint16x4_t { | |
2187 | simd_sub(a, b) | |
2188 | } | |
2189 | ||
2190 | /// Subtract | |
2191 | #[inline] | |
2192 | #[target_feature(enable = "neon")] | |
2193 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
2194 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vsub.i16"))] | |
2195 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(sub))] | |
2196 | pub unsafe fn vsubq_u16(a: uint16x8_t, b: uint16x8_t) -> uint16x8_t { | |
2197 | simd_sub(a, b) | |
2198 | } | |
2199 | ||
2200 | /// Subtract | |
2201 | #[inline] | |
2202 | #[target_feature(enable = "neon")] | |
2203 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
2204 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vsub.i32"))] | |
2205 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(sub))] | |
2206 | pub unsafe fn vsub_u32(a: uint32x2_t, b: uint32x2_t) -> uint32x2_t { | |
2207 | simd_sub(a, b) | |
2208 | } | |
2209 | ||
2210 | /// Subtract | |
2211 | #[inline] | |
2212 | #[target_feature(enable = "neon")] | |
2213 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
2214 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vsub.i32"))] | |
2215 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(sub))] | |
2216 | pub unsafe fn vsubq_u32(a: uint32x4_t, b: uint32x4_t) -> uint32x4_t { | |
2217 | simd_sub(a, b) | |
2218 | } | |
2219 | ||
2220 | /// Subtract | |
2221 | #[inline] | |
2222 | #[target_feature(enable = "neon")] | |
2223 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
2224 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vsub.i64"))] | |
2225 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(sub))] | |
2226 | pub unsafe fn vsub_s64(a: int64x1_t, b: int64x1_t) -> int64x1_t { | |
2227 | simd_sub(a, b) | |
2228 | } | |
2229 | ||
2230 | /// Subtract | |
2231 | #[inline] | |
2232 | #[target_feature(enable = "neon")] | |
2233 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
2234 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vsub.i64"))] | |
2235 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(sub))] | |
2236 | pub unsafe fn vsubq_s64(a: int64x2_t, b: int64x2_t) -> int64x2_t { | |
2237 | simd_sub(a, b) | |
2238 | } | |
2239 | ||
2240 | /// Subtract | |
2241 | #[inline] | |
2242 | #[target_feature(enable = "neon")] | |
2243 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
2244 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vsub.i64"))] | |
2245 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(sub))] | |
2246 | pub unsafe fn vsub_u64(a: uint64x1_t, b: uint64x1_t) -> uint64x1_t { | |
2247 | simd_sub(a, b) | |
2248 | } | |
2249 | ||
2250 | /// Subtract | |
2251 | #[inline] | |
2252 | #[target_feature(enable = "neon")] | |
2253 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
2254 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vsub.i64"))] | |
2255 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(sub))] | |
2256 | pub unsafe fn vsubq_u64(a: uint64x2_t, b: uint64x2_t) -> uint64x2_t { | |
2257 | simd_sub(a, b) | |
2258 | } | |
2259 | ||
2260 | /// Subtract | |
2261 | #[inline] | |
2262 | #[target_feature(enable = "neon")] | |
2263 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
2264 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vsub.f32"))] | |
2265 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(fsub))] | |
2266 | pub unsafe fn vsub_f32(a: float32x2_t, b: float32x2_t) -> float32x2_t { | |
2267 | simd_sub(a, b) | |
2268 | } | |
2269 | ||
2270 | /// Subtract | |
2271 | #[inline] | |
2272 | #[target_feature(enable = "neon")] | |
2273 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
2274 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vsub.f32"))] | |
2275 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(fsub))] | |
2276 | pub unsafe fn vsubq_f32(a: float32x4_t, b: float32x4_t) -> float32x4_t { | |
2277 | simd_sub(a, b) | |
2278 | } | |
2279 | ||
2280 | /// Signed halving subtract | |
2281 | #[inline] | |
2282 | #[target_feature(enable = "neon")] | |
2283 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
2284 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vhsub.u8"))] | |
2285 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(uhsub))] | |
2286 | pub unsafe fn vhsub_u8(a: uint8x8_t, b: uint8x8_t) -> uint8x8_t { | |
2287 | #[allow(improper_ctypes)] | |
2288 | extern "C" { | |
2289 | #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vhsubu.v8i8")] | |
2290 | #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.uhsub.v8i8")] | |
2291 | fn vhsub_u8_(a: uint8x8_t, b: uint8x8_t) -> uint8x8_t; | |
2292 | } | |
2293 | vhsub_u8_(a, b) | |
2294 | } | |
2295 | ||
2296 | /// Signed halving subtract | |
2297 | #[inline] | |
2298 | #[target_feature(enable = "neon")] | |
2299 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
2300 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vhsub.u8"))] | |
2301 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(uhsub))] | |
2302 | pub unsafe fn vhsubq_u8(a: uint8x16_t, b: uint8x16_t) -> uint8x16_t { | |
2303 | #[allow(improper_ctypes)] | |
2304 | extern "C" { | |
2305 | #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vhsubu.v16i8")] | |
2306 | #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.uhsub.v16i8")] | |
2307 | fn vhsubq_u8_(a: uint8x16_t, b: uint8x16_t) -> uint8x16_t; | |
2308 | } | |
2309 | vhsubq_u8_(a, b) | |
2310 | } | |
2311 | ||
2312 | /// Signed halving subtract | |
2313 | #[inline] | |
2314 | #[target_feature(enable = "neon")] | |
2315 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
2316 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vhsub.u16"))] | |
2317 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(uhsub))] | |
2318 | pub unsafe fn vhsub_u16(a: uint16x4_t, b: uint16x4_t) -> uint16x4_t { | |
2319 | #[allow(improper_ctypes)] | |
2320 | extern "C" { | |
2321 | #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vhsubu.v4i16")] | |
2322 | #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.uhsub.v4i16")] | |
2323 | fn vhsub_u16_(a: uint16x4_t, b: uint16x4_t) -> uint16x4_t; | |
2324 | } | |
2325 | vhsub_u16_(a, b) | |
2326 | } | |
2327 | ||
2328 | /// Signed halving subtract | |
2329 | #[inline] | |
2330 | #[target_feature(enable = "neon")] | |
2331 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
2332 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vhsub.u16"))] | |
2333 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(uhsub))] | |
2334 | pub unsafe fn vhsubq_u16(a: uint16x8_t, b: uint16x8_t) -> uint16x8_t { | |
2335 | #[allow(improper_ctypes)] | |
2336 | extern "C" { | |
2337 | #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vhsubu.v8i16")] | |
2338 | #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.uhsub.v8i16")] | |
2339 | fn vhsubq_u16_(a: uint16x8_t, b: uint16x8_t) -> uint16x8_t; | |
2340 | } | |
2341 | vhsubq_u16_(a, b) | |
2342 | } | |
2343 | ||
2344 | /// Signed halving subtract | |
2345 | #[inline] | |
2346 | #[target_feature(enable = "neon")] | |
2347 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
2348 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vhsub.u32"))] | |
2349 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(uhsub))] | |
2350 | pub unsafe fn vhsub_u32(a: uint32x2_t, b: uint32x2_t) -> uint32x2_t { | |
2351 | #[allow(improper_ctypes)] | |
2352 | extern "C" { | |
2353 | #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vhsubu.v2i32")] | |
2354 | #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.uhsub.v2i32")] | |
2355 | fn vhsub_u32_(a: uint32x2_t, b: uint32x2_t) -> uint32x2_t; | |
2356 | } | |
2357 | vhsub_u32_(a, b) | |
2358 | } | |
2359 | ||
2360 | /// Signed halving subtract | |
2361 | #[inline] | |
2362 | #[target_feature(enable = "neon")] | |
2363 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
2364 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vhsub.u32"))] | |
2365 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(uhsub))] | |
2366 | pub unsafe fn vhsubq_u32(a: uint32x4_t, b: uint32x4_t) -> uint32x4_t { | |
2367 | #[allow(improper_ctypes)] | |
2368 | extern "C" { | |
2369 | #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vhsubu.v4i32")] | |
2370 | #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.uhsub.v4i32")] | |
2371 | fn vhsubq_u32_(a: uint32x4_t, b: uint32x4_t) -> uint32x4_t; | |
2372 | } | |
2373 | vhsubq_u32_(a, b) | |
2374 | } | |
2375 | ||
2376 | /// Signed halving subtract | |
2377 | #[inline] | |
2378 | #[target_feature(enable = "neon")] | |
2379 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
2380 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vhsub.s8"))] | |
2381 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(shsub))] | |
2382 | pub unsafe fn vhsub_s8(a: int8x8_t, b: int8x8_t) -> int8x8_t { | |
2383 | #[allow(improper_ctypes)] | |
2384 | extern "C" { | |
2385 | #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vhsubs.v8i8")] | |
2386 | #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.shsub.v8i8")] | |
2387 | fn vhsub_s8_(a: int8x8_t, b: int8x8_t) -> int8x8_t; | |
2388 | } | |
2389 | vhsub_s8_(a, b) | |
2390 | } | |
2391 | ||
2392 | /// Signed halving subtract | |
2393 | #[inline] | |
2394 | #[target_feature(enable = "neon")] | |
2395 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
2396 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vhsub.s8"))] | |
2397 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(shsub))] | |
2398 | pub unsafe fn vhsubq_s8(a: int8x16_t, b: int8x16_t) -> int8x16_t { | |
2399 | #[allow(improper_ctypes)] | |
2400 | extern "C" { | |
2401 | #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vhsubs.v16i8")] | |
2402 | #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.shsub.v16i8")] | |
2403 | fn vhsubq_s8_(a: int8x16_t, b: int8x16_t) -> int8x16_t; | |
2404 | } | |
2405 | vhsubq_s8_(a, b) | |
2406 | } | |
2407 | ||
2408 | /// Signed halving subtract | |
2409 | #[inline] | |
2410 | #[target_feature(enable = "neon")] | |
2411 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
2412 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vhsub.s16"))] | |
2413 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(shsub))] | |
2414 | pub unsafe fn vhsub_s16(a: int16x4_t, b: int16x4_t) -> int16x4_t { | |
2415 | #[allow(improper_ctypes)] | |
2416 | extern "C" { | |
2417 | #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vhsubs.v4i16")] | |
2418 | #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.shsub.v4i16")] | |
2419 | fn vhsub_s16_(a: int16x4_t, b: int16x4_t) -> int16x4_t; | |
2420 | } | |
2421 | vhsub_s16_(a, b) | |
2422 | } | |
2423 | ||
2424 | /// Signed halving subtract | |
2425 | #[inline] | |
2426 | #[target_feature(enable = "neon")] | |
2427 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
2428 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vhsub.s16"))] | |
2429 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(shsub))] | |
2430 | pub unsafe fn vhsubq_s16(a: int16x8_t, b: int16x8_t) -> int16x8_t { | |
2431 | #[allow(improper_ctypes)] | |
2432 | extern "C" { | |
2433 | #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vhsubs.v8i16")] | |
2434 | #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.shsub.v8i16")] | |
2435 | fn vhsubq_s16_(a: int16x8_t, b: int16x8_t) -> int16x8_t; | |
2436 | } | |
2437 | vhsubq_s16_(a, b) | |
2438 | } | |
2439 | ||
2440 | /// Signed halving subtract | |
2441 | #[inline] | |
2442 | #[target_feature(enable = "neon")] | |
2443 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
2444 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vhsub.s32"))] | |
2445 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(shsub))] | |
2446 | pub unsafe fn vhsub_s32(a: int32x2_t, b: int32x2_t) -> int32x2_t { | |
2447 | #[allow(improper_ctypes)] | |
2448 | extern "C" { | |
2449 | #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vhsubs.v2i32")] | |
2450 | #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.shsub.v2i32")] | |
2451 | fn vhsub_s32_(a: int32x2_t, b: int32x2_t) -> int32x2_t; | |
2452 | } | |
2453 | vhsub_s32_(a, b) | |
2454 | } | |
2455 | ||
2456 | /// Signed halving subtract | |
2457 | #[inline] | |
2458 | #[target_feature(enable = "neon")] | |
2459 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
2460 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr("vhsub.s32"))] | |
2461 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(shsub))] | |
2462 | pub unsafe fn vhsubq_s32(a: int32x4_t, b: int32x4_t) -> int32x4_t { | |
2463 | #[allow(improper_ctypes)] | |
2464 | extern "C" { | |
2465 | #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vhsubs.v4i32")] | |
2466 | #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.shsub.v4i32")] | |
2467 | fn vhsubq_s32_(a: int32x4_t, b: int32x4_t) -> int32x4_t; | |
2468 | } | |
2469 | vhsubq_s32_(a, b) | |
2470 | } | |
2471 | ||
fc512014 XL |
2472 | /// Maximum (vector) |
2473 | #[inline] | |
2474 | #[target_feature(enable = "neon")] | |
2475 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
2476 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vmax))] | |
2477 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(smax))] | |
2478 | pub unsafe fn vmax_s8(a: int8x8_t, b: int8x8_t) -> int8x8_t { | |
2479 | #[allow(improper_ctypes)] | |
2480 | extern "C" { | |
2481 | #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vmaxs.v8i8")] | |
2482 | #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.smax.v8i8")] | |
2483 | fn vmax_s8_(a: int8x8_t, b: int8x8_t) -> int8x8_t; | |
2484 | } | |
2485 | vmax_s8_(a, b) | |
2486 | } | |
2487 | ||
2488 | /// Maximum (vector) | |
2489 | #[inline] | |
2490 | #[target_feature(enable = "neon")] | |
2491 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
2492 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vmax))] | |
2493 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(smax))] | |
2494 | pub unsafe fn vmaxq_s8(a: int8x16_t, b: int8x16_t) -> int8x16_t { | |
2495 | #[allow(improper_ctypes)] | |
2496 | extern "C" { | |
2497 | #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vmaxs.v16i8")] | |
2498 | #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.smax.v16i8")] | |
2499 | fn vmaxq_s8_(a: int8x16_t, b: int8x16_t) -> int8x16_t; | |
2500 | } | |
2501 | vmaxq_s8_(a, b) | |
2502 | } | |
2503 | ||
2504 | /// Maximum (vector) | |
2505 | #[inline] | |
2506 | #[target_feature(enable = "neon")] | |
2507 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
2508 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vmax))] | |
2509 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(smax))] | |
2510 | pub unsafe fn vmax_s16(a: int16x4_t, b: int16x4_t) -> int16x4_t { | |
2511 | #[allow(improper_ctypes)] | |
2512 | extern "C" { | |
2513 | #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vmaxs.v4i16")] | |
2514 | #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.smax.v4i16")] | |
2515 | fn vmax_s16_(a: int16x4_t, b: int16x4_t) -> int16x4_t; | |
2516 | } | |
2517 | vmax_s16_(a, b) | |
2518 | } | |
2519 | ||
2520 | /// Maximum (vector) | |
2521 | #[inline] | |
2522 | #[target_feature(enable = "neon")] | |
2523 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
2524 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vmax))] | |
2525 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(smax))] | |
2526 | pub unsafe fn vmaxq_s16(a: int16x8_t, b: int16x8_t) -> int16x8_t { | |
2527 | #[allow(improper_ctypes)] | |
2528 | extern "C" { | |
2529 | #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vmaxs.v8i16")] | |
2530 | #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.smax.v8i16")] | |
2531 | fn vmaxq_s16_(a: int16x8_t, b: int16x8_t) -> int16x8_t; | |
2532 | } | |
2533 | vmaxq_s16_(a, b) | |
2534 | } | |
2535 | ||
2536 | /// Maximum (vector) | |
2537 | #[inline] | |
2538 | #[target_feature(enable = "neon")] | |
2539 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
2540 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vmax))] | |
2541 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(smax))] | |
2542 | pub unsafe fn vmax_s32(a: int32x2_t, b: int32x2_t) -> int32x2_t { | |
2543 | #[allow(improper_ctypes)] | |
2544 | extern "C" { | |
2545 | #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vmaxs.v2i32")] | |
2546 | #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.smax.v2i32")] | |
2547 | fn vmax_s32_(a: int32x2_t, b: int32x2_t) -> int32x2_t; | |
2548 | } | |
2549 | vmax_s32_(a, b) | |
2550 | } | |
2551 | ||
2552 | /// Maximum (vector) | |
2553 | #[inline] | |
2554 | #[target_feature(enable = "neon")] | |
2555 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
2556 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vmax))] | |
2557 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(smax))] | |
2558 | pub unsafe fn vmaxq_s32(a: int32x4_t, b: int32x4_t) -> int32x4_t { | |
2559 | #[allow(improper_ctypes)] | |
2560 | extern "C" { | |
2561 | #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vmaxs.v4i32")] | |
2562 | #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.smax.v4i32")] | |
2563 | fn vmaxq_s32_(a: int32x4_t, b: int32x4_t) -> int32x4_t; | |
2564 | } | |
2565 | vmaxq_s32_(a, b) | |
2566 | } | |
2567 | ||
2568 | /// Maximum (vector) | |
2569 | #[inline] | |
2570 | #[target_feature(enable = "neon")] | |
2571 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
2572 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vmax))] | |
2573 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(umax))] | |
2574 | pub unsafe fn vmax_u8(a: uint8x8_t, b: uint8x8_t) -> uint8x8_t { | |
2575 | #[allow(improper_ctypes)] | |
2576 | extern "C" { | |
2577 | #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vmaxu.v8i8")] | |
2578 | #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.umax.v8i8")] | |
2579 | fn vmax_u8_(a: uint8x8_t, b: uint8x8_t) -> uint8x8_t; | |
2580 | } | |
2581 | vmax_u8_(a, b) | |
2582 | } | |
2583 | ||
2584 | /// Maximum (vector) | |
2585 | #[inline] | |
2586 | #[target_feature(enable = "neon")] | |
2587 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
2588 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vmax))] | |
2589 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(umax))] | |
2590 | pub unsafe fn vmaxq_u8(a: uint8x16_t, b: uint8x16_t) -> uint8x16_t { | |
2591 | #[allow(improper_ctypes)] | |
2592 | extern "C" { | |
2593 | #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vmaxu.v16i8")] | |
2594 | #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.umax.v16i8")] | |
2595 | fn vmaxq_u8_(a: uint8x16_t, b: uint8x16_t) -> uint8x16_t; | |
2596 | } | |
2597 | vmaxq_u8_(a, b) | |
2598 | } | |
2599 | ||
2600 | /// Maximum (vector) | |
2601 | #[inline] | |
2602 | #[target_feature(enable = "neon")] | |
2603 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
2604 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vmax))] | |
2605 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(umax))] | |
2606 | pub unsafe fn vmax_u16(a: uint16x4_t, b: uint16x4_t) -> uint16x4_t { | |
2607 | #[allow(improper_ctypes)] | |
2608 | extern "C" { | |
2609 | #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vmaxu.v4i16")] | |
2610 | #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.umax.v4i16")] | |
2611 | fn vmax_u16_(a: uint16x4_t, b: uint16x4_t) -> uint16x4_t; | |
2612 | } | |
2613 | vmax_u16_(a, b) | |
2614 | } | |
2615 | ||
2616 | /// Maximum (vector) | |
2617 | #[inline] | |
2618 | #[target_feature(enable = "neon")] | |
2619 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
2620 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vmax))] | |
2621 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(umax))] | |
2622 | pub unsafe fn vmaxq_u16(a: uint16x8_t, b: uint16x8_t) -> uint16x8_t { | |
2623 | #[allow(improper_ctypes)] | |
2624 | extern "C" { | |
2625 | #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vmaxu.v8i16")] | |
2626 | #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.umax.v8i16")] | |
2627 | fn vmaxq_u16_(a: uint16x8_t, b: uint16x8_t) -> uint16x8_t; | |
2628 | } | |
2629 | vmaxq_u16_(a, b) | |
2630 | } | |
2631 | ||
2632 | /// Maximum (vector) | |
2633 | #[inline] | |
2634 | #[target_feature(enable = "neon")] | |
2635 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
2636 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vmax))] | |
2637 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(umax))] | |
2638 | pub unsafe fn vmax_u32(a: uint32x2_t, b: uint32x2_t) -> uint32x2_t { | |
2639 | #[allow(improper_ctypes)] | |
2640 | extern "C" { | |
2641 | #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vmaxu.v2i32")] | |
2642 | #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.umax.v2i32")] | |
2643 | fn vmax_u32_(a: uint32x2_t, b: uint32x2_t) -> uint32x2_t; | |
2644 | } | |
2645 | vmax_u32_(a, b) | |
2646 | } | |
2647 | ||
2648 | /// Maximum (vector) | |
2649 | #[inline] | |
2650 | #[target_feature(enable = "neon")] | |
2651 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
2652 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vmax))] | |
2653 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(umax))] | |
2654 | pub unsafe fn vmaxq_u32(a: uint32x4_t, b: uint32x4_t) -> uint32x4_t { | |
2655 | #[allow(improper_ctypes)] | |
2656 | extern "C" { | |
2657 | #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vmaxu.v4i32")] | |
2658 | #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.umax.v4i32")] | |
2659 | fn vmaxq_u32_(a: uint32x4_t, b: uint32x4_t) -> uint32x4_t; | |
2660 | } | |
2661 | vmaxq_u32_(a, b) | |
2662 | } | |
2663 | ||
2664 | /// Maximum (vector) | |
2665 | #[inline] | |
2666 | #[target_feature(enable = "neon")] | |
2667 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
2668 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vmax))] | |
2669 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(fmax))] | |
2670 | pub unsafe fn vmax_f32(a: float32x2_t, b: float32x2_t) -> float32x2_t { | |
2671 | #[allow(improper_ctypes)] | |
2672 | extern "C" { | |
2673 | #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vmaxs.v2f32")] | |
2674 | #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.fmax.v2f32")] | |
2675 | fn vmax_f32_(a: float32x2_t, b: float32x2_t) -> float32x2_t; | |
2676 | } | |
2677 | vmax_f32_(a, b) | |
2678 | } | |
2679 | ||
2680 | /// Maximum (vector) | |
2681 | #[inline] | |
2682 | #[target_feature(enable = "neon")] | |
2683 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
2684 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vmax))] | |
2685 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(fmax))] | |
2686 | pub unsafe fn vmaxq_f32(a: float32x4_t, b: float32x4_t) -> float32x4_t { | |
2687 | #[allow(improper_ctypes)] | |
2688 | extern "C" { | |
2689 | #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vmaxs.v4f32")] | |
2690 | #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.fmax.v4f32")] | |
2691 | fn vmaxq_f32_(a: float32x4_t, b: float32x4_t) -> float32x4_t; | |
2692 | } | |
2693 | vmaxq_f32_(a, b) | |
2694 | } | |
2695 | ||
2696 | /// Minimum (vector) | |
2697 | #[inline] | |
2698 | #[target_feature(enable = "neon")] | |
2699 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
2700 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vmin))] | |
2701 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(smin))] | |
2702 | pub unsafe fn vmin_s8(a: int8x8_t, b: int8x8_t) -> int8x8_t { | |
2703 | #[allow(improper_ctypes)] | |
2704 | extern "C" { | |
2705 | #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vmins.v8i8")] | |
2706 | #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.smin.v8i8")] | |
2707 | fn vmin_s8_(a: int8x8_t, b: int8x8_t) -> int8x8_t; | |
2708 | } | |
2709 | vmin_s8_(a, b) | |
2710 | } | |
2711 | ||
2712 | /// Minimum (vector) | |
2713 | #[inline] | |
2714 | #[target_feature(enable = "neon")] | |
2715 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
2716 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vmin))] | |
2717 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(smin))] | |
2718 | pub unsafe fn vminq_s8(a: int8x16_t, b: int8x16_t) -> int8x16_t { | |
2719 | #[allow(improper_ctypes)] | |
2720 | extern "C" { | |
2721 | #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vmins.v16i8")] | |
2722 | #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.smin.v16i8")] | |
2723 | fn vminq_s8_(a: int8x16_t, b: int8x16_t) -> int8x16_t; | |
2724 | } | |
2725 | vminq_s8_(a, b) | |
2726 | } | |
2727 | ||
2728 | /// Minimum (vector) | |
2729 | #[inline] | |
2730 | #[target_feature(enable = "neon")] | |
2731 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
2732 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vmin))] | |
2733 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(smin))] | |
2734 | pub unsafe fn vmin_s16(a: int16x4_t, b: int16x4_t) -> int16x4_t { | |
2735 | #[allow(improper_ctypes)] | |
2736 | extern "C" { | |
2737 | #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vmins.v4i16")] | |
2738 | #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.smin.v4i16")] | |
2739 | fn vmin_s16_(a: int16x4_t, b: int16x4_t) -> int16x4_t; | |
2740 | } | |
2741 | vmin_s16_(a, b) | |
2742 | } | |
2743 | ||
2744 | /// Minimum (vector) | |
2745 | #[inline] | |
2746 | #[target_feature(enable = "neon")] | |
2747 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
2748 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vmin))] | |
2749 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(smin))] | |
2750 | pub unsafe fn vminq_s16(a: int16x8_t, b: int16x8_t) -> int16x8_t { | |
2751 | #[allow(improper_ctypes)] | |
2752 | extern "C" { | |
2753 | #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vmins.v8i16")] | |
2754 | #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.smin.v8i16")] | |
2755 | fn vminq_s16_(a: int16x8_t, b: int16x8_t) -> int16x8_t; | |
2756 | } | |
2757 | vminq_s16_(a, b) | |
2758 | } | |
2759 | ||
2760 | /// Minimum (vector) | |
2761 | #[inline] | |
2762 | #[target_feature(enable = "neon")] | |
2763 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
2764 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vmin))] | |
2765 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(smin))] | |
2766 | pub unsafe fn vmin_s32(a: int32x2_t, b: int32x2_t) -> int32x2_t { | |
2767 | #[allow(improper_ctypes)] | |
2768 | extern "C" { | |
2769 | #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vmins.v2i32")] | |
2770 | #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.smin.v2i32")] | |
2771 | fn vmin_s32_(a: int32x2_t, b: int32x2_t) -> int32x2_t; | |
2772 | } | |
2773 | vmin_s32_(a, b) | |
2774 | } | |
2775 | ||
2776 | /// Minimum (vector) | |
2777 | #[inline] | |
2778 | #[target_feature(enable = "neon")] | |
2779 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
2780 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vmin))] | |
2781 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(smin))] | |
2782 | pub unsafe fn vminq_s32(a: int32x4_t, b: int32x4_t) -> int32x4_t { | |
2783 | #[allow(improper_ctypes)] | |
2784 | extern "C" { | |
2785 | #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vmins.v4i32")] | |
2786 | #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.smin.v4i32")] | |
2787 | fn vminq_s32_(a: int32x4_t, b: int32x4_t) -> int32x4_t; | |
2788 | } | |
2789 | vminq_s32_(a, b) | |
2790 | } | |
2791 | ||
2792 | /// Minimum (vector) | |
2793 | #[inline] | |
2794 | #[target_feature(enable = "neon")] | |
2795 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
2796 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vmin))] | |
2797 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(umin))] | |
2798 | pub unsafe fn vmin_u8(a: uint8x8_t, b: uint8x8_t) -> uint8x8_t { | |
2799 | #[allow(improper_ctypes)] | |
2800 | extern "C" { | |
2801 | #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vminu.v8i8")] | |
2802 | #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.umin.v8i8")] | |
2803 | fn vmin_u8_(a: uint8x8_t, b: uint8x8_t) -> uint8x8_t; | |
2804 | } | |
2805 | vmin_u8_(a, b) | |
2806 | } | |
2807 | ||
2808 | /// Minimum (vector) | |
2809 | #[inline] | |
2810 | #[target_feature(enable = "neon")] | |
2811 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
2812 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vmin))] | |
2813 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(umin))] | |
2814 | pub unsafe fn vminq_u8(a: uint8x16_t, b: uint8x16_t) -> uint8x16_t { | |
2815 | #[allow(improper_ctypes)] | |
2816 | extern "C" { | |
2817 | #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vminu.v16i8")] | |
2818 | #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.umin.v16i8")] | |
2819 | fn vminq_u8_(a: uint8x16_t, b: uint8x16_t) -> uint8x16_t; | |
2820 | } | |
2821 | vminq_u8_(a, b) | |
2822 | } | |
2823 | ||
2824 | /// Minimum (vector) | |
2825 | #[inline] | |
2826 | #[target_feature(enable = "neon")] | |
2827 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
2828 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vmin))] | |
2829 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(umin))] | |
2830 | pub unsafe fn vmin_u16(a: uint16x4_t, b: uint16x4_t) -> uint16x4_t { | |
2831 | #[allow(improper_ctypes)] | |
2832 | extern "C" { | |
2833 | #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vminu.v4i16")] | |
2834 | #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.umin.v4i16")] | |
2835 | fn vmin_u16_(a: uint16x4_t, b: uint16x4_t) -> uint16x4_t; | |
2836 | } | |
2837 | vmin_u16_(a, b) | |
2838 | } | |
2839 | ||
2840 | /// Minimum (vector) | |
2841 | #[inline] | |
2842 | #[target_feature(enable = "neon")] | |
2843 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
2844 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vmin))] | |
2845 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(umin))] | |
2846 | pub unsafe fn vminq_u16(a: uint16x8_t, b: uint16x8_t) -> uint16x8_t { | |
2847 | #[allow(improper_ctypes)] | |
2848 | extern "C" { | |
2849 | #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vminu.v8i16")] | |
2850 | #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.umin.v8i16")] | |
2851 | fn vminq_u16_(a: uint16x8_t, b: uint16x8_t) -> uint16x8_t; | |
2852 | } | |
2853 | vminq_u16_(a, b) | |
2854 | } | |
2855 | ||
2856 | /// Minimum (vector) | |
2857 | #[inline] | |
2858 | #[target_feature(enable = "neon")] | |
2859 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
2860 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vmin))] | |
2861 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(umin))] | |
2862 | pub unsafe fn vmin_u32(a: uint32x2_t, b: uint32x2_t) -> uint32x2_t { | |
2863 | #[allow(improper_ctypes)] | |
2864 | extern "C" { | |
2865 | #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vminu.v2i32")] | |
2866 | #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.umin.v2i32")] | |
2867 | fn vmin_u32_(a: uint32x2_t, b: uint32x2_t) -> uint32x2_t; | |
2868 | } | |
2869 | vmin_u32_(a, b) | |
2870 | } | |
2871 | ||
2872 | /// Minimum (vector) | |
2873 | #[inline] | |
2874 | #[target_feature(enable = "neon")] | |
2875 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
2876 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vmin))] | |
2877 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(umin))] | |
2878 | pub unsafe fn vminq_u32(a: uint32x4_t, b: uint32x4_t) -> uint32x4_t { | |
2879 | #[allow(improper_ctypes)] | |
2880 | extern "C" { | |
2881 | #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vminu.v4i32")] | |
2882 | #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.umin.v4i32")] | |
2883 | fn vminq_u32_(a: uint32x4_t, b: uint32x4_t) -> uint32x4_t; | |
2884 | } | |
2885 | vminq_u32_(a, b) | |
2886 | } | |
2887 | ||
2888 | /// Minimum (vector) | |
2889 | #[inline] | |
2890 | #[target_feature(enable = "neon")] | |
2891 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
2892 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vmin))] | |
2893 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(fmin))] | |
2894 | pub unsafe fn vmin_f32(a: float32x2_t, b: float32x2_t) -> float32x2_t { | |
2895 | #[allow(improper_ctypes)] | |
2896 | extern "C" { | |
2897 | #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vmins.v2f32")] | |
2898 | #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.fmin.v2f32")] | |
2899 | fn vmin_f32_(a: float32x2_t, b: float32x2_t) -> float32x2_t; | |
2900 | } | |
2901 | vmin_f32_(a, b) | |
2902 | } | |
2903 | ||
2904 | /// Minimum (vector) | |
2905 | #[inline] | |
2906 | #[target_feature(enable = "neon")] | |
2907 | #[cfg_attr(target_arch = "arm", target_feature(enable = "v7"))] | |
2908 | #[cfg_attr(all(test, target_arch = "arm"), assert_instr(vmin))] | |
2909 | #[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(fmin))] | |
2910 | pub unsafe fn vminq_f32(a: float32x4_t, b: float32x4_t) -> float32x4_t { | |
2911 | #[allow(improper_ctypes)] | |
2912 | extern "C" { | |
2913 | #[cfg_attr(target_arch = "arm", link_name = "llvm.arm.neon.vmins.v4f32")] | |
2914 | #[cfg_attr(target_arch = "aarch64", link_name = "llvm.aarch64.neon.fmin.v4f32")] | |
2915 | fn vminq_f32_(a: float32x4_t, b: float32x4_t) -> float32x4_t; | |
2916 | } | |
2917 | vminq_f32_(a, b) | |
2918 | } | |
2919 | ||
ba9703b0 XL |
2920 | #[cfg(test)] |
2921 | #[allow(overflowing_literals)] | |
2922 | mod test { | |
2923 | use super::*; | |
2924 | use crate::core_arch::simd::*; | |
2925 | use std::mem::transmute; | |
2926 | use stdarch_test::simd_test; | |
2927 | ||
2928 | #[simd_test(enable = "neon")] | |
2929 | unsafe fn test_vand_s8() { | |
2930 | let a: i8x8 = i8x8::new(0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07); | |
2931 | let b: i8x8 = i8x8::new(0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F); | |
2932 | let e: i8x8 = i8x8::new(0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07); | |
2933 | let r: i8x8 = transmute(vand_s8(transmute(a), transmute(b))); | |
2934 | assert_eq!(r, e); | |
2935 | ||
2936 | let a: i8x8 = i8x8::new(0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07); | |
2937 | let b: i8x8 = i8x8::new(0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00); | |
2938 | let e: i8x8 = i8x8::new(0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00); | |
2939 | let r: i8x8 = transmute(vand_s8(transmute(a), transmute(b))); | |
2940 | assert_eq!(r, e); | |
2941 | } | |
2942 | ||
2943 | #[simd_test(enable = "neon")] | |
2944 | unsafe fn test_vandq_s8() { | |
2945 | let a: i8x16 = i8x16::new(0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x00); | |
2946 | let b: i8x16 = i8x16::new(0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F); | |
2947 | let e: i8x16 = i8x16::new(0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x00); | |
2948 | let r: i8x16 = transmute(vandq_s8(transmute(a), transmute(b))); | |
2949 | assert_eq!(r, e); | |
2950 | ||
2951 | let a: i8x16 = i8x16::new(0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x00); | |
2952 | let b: i8x16 = i8x16::new(0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00); | |
2953 | let e: i8x16 = i8x16::new(0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00); | |
2954 | let r: i8x16 = transmute(vandq_s8(transmute(a), transmute(b))); | |
2955 | assert_eq!(r, e); | |
2956 | } | |
2957 | ||
2958 | #[simd_test(enable = "neon")] | |
2959 | unsafe fn test_vand_s16() { | |
2960 | let a: i16x4 = i16x4::new(0x00, 0x01, 0x02, 0x03); | |
2961 | let b: i16x4 = i16x4::new(0x0F, 0x0F, 0x0F, 0x0F); | |
2962 | let e: i16x4 = i16x4::new(0x00, 0x01, 0x02, 0x03); | |
2963 | let r: i16x4 = transmute(vand_s16(transmute(a), transmute(b))); | |
2964 | assert_eq!(r, e); | |
2965 | ||
2966 | let a: i16x4 = i16x4::new(0x00, 0x01, 0x02, 0x03); | |
2967 | let b: i16x4 = i16x4::new(0x00, 0x00, 0x00, 0x00); | |
2968 | let e: i16x4 = i16x4::new(0x00, 0x00, 0x00, 0x00); | |
2969 | let r: i16x4 = transmute(vand_s16(transmute(a), transmute(b))); | |
2970 | assert_eq!(r, e); | |
2971 | } | |
2972 | ||
2973 | #[simd_test(enable = "neon")] | |
2974 | unsafe fn test_vandq_s16() { | |
2975 | let a: i16x8 = i16x8::new(0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07); | |
2976 | let b: i16x8 = i16x8::new(0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F); | |
2977 | let e: i16x8 = i16x8::new(0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07); | |
2978 | let r: i16x8 = transmute(vandq_s16(transmute(a), transmute(b))); | |
2979 | assert_eq!(r, e); | |
2980 | ||
2981 | let a: i16x8 = i16x8::new(0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07); | |
2982 | let b: i16x8 = i16x8::new(0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00); | |
2983 | let e: i16x8 = i16x8::new(0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00); | |
2984 | let r: i16x8 = transmute(vandq_s16(transmute(a), transmute(b))); | |
2985 | assert_eq!(r, e); | |
2986 | } | |
2987 | ||
2988 | #[simd_test(enable = "neon")] | |
2989 | unsafe fn test_vand_s32() { | |
2990 | let a: i32x2 = i32x2::new(0x00, 0x01); | |
2991 | let b: i32x2 = i32x2::new(0x0F, 0x0F); | |
2992 | let e: i32x2 = i32x2::new(0x00, 0x01); | |
2993 | let r: i32x2 = transmute(vand_s32(transmute(a), transmute(b))); | |
2994 | assert_eq!(r, e); | |
2995 | ||
2996 | let a: i32x2 = i32x2::new(0x00, 0x01); | |
2997 | let b: i32x2 = i32x2::new(0x00, 0x00); | |
2998 | let e: i32x2 = i32x2::new(0x00, 0x00); | |
2999 | let r: i32x2 = transmute(vand_s32(transmute(a), transmute(b))); | |
3000 | assert_eq!(r, e); | |
3001 | } | |
3002 | ||
3003 | #[simd_test(enable = "neon")] | |
3004 | unsafe fn test_vandq_s32() { | |
3005 | let a: i32x4 = i32x4::new(0x00, 0x01, 0x02, 0x03); | |
3006 | let b: i32x4 = i32x4::new(0x0F, 0x0F, 0x0F, 0x0F); | |
3007 | let e: i32x4 = i32x4::new(0x00, 0x01, 0x02, 0x03); | |
3008 | let r: i32x4 = transmute(vandq_s32(transmute(a), transmute(b))); | |
3009 | assert_eq!(r, e); | |
3010 | ||
3011 | let a: i32x4 = i32x4::new(0x00, 0x01, 0x02, 0x03); | |
3012 | let b: i32x4 = i32x4::new(0x00, 0x00, 0x00, 0x00); | |
3013 | let e: i32x4 = i32x4::new(0x00, 0x00, 0x00, 0x00); | |
3014 | let r: i32x4 = transmute(vandq_s32(transmute(a), transmute(b))); | |
3015 | assert_eq!(r, e); | |
3016 | } | |
3017 | ||
3018 | #[simd_test(enable = "neon")] | |
3019 | unsafe fn test_vand_u8() { | |
3020 | let a: u8x8 = u8x8::new(0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07); | |
3021 | let b: u8x8 = u8x8::new(0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F); | |
3022 | let e: u8x8 = u8x8::new(0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07); | |
3023 | let r: u8x8 = transmute(vand_u8(transmute(a), transmute(b))); | |
3024 | assert_eq!(r, e); | |
3025 | ||
3026 | let a: u8x8 = u8x8::new(0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07); | |
3027 | let b: u8x8 = u8x8::new(0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00); | |
3028 | let e: u8x8 = u8x8::new(0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00); | |
3029 | let r: u8x8 = transmute(vand_u8(transmute(a), transmute(b))); | |
3030 | assert_eq!(r, e); | |
3031 | } | |
3032 | ||
3033 | #[simd_test(enable = "neon")] | |
3034 | unsafe fn test_vandq_u8() { | |
3035 | let a: u8x16 = u8x16::new(0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x00); | |
3036 | let b: u8x16 = u8x16::new(0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F); | |
3037 | let e: u8x16 = u8x16::new(0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x00); | |
3038 | let r: u8x16 = transmute(vandq_u8(transmute(a), transmute(b))); | |
3039 | assert_eq!(r, e); | |
3040 | ||
3041 | let a: u8x16 = u8x16::new(0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x00); | |
3042 | let b: u8x16 = u8x16::new(0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00); | |
3043 | let e: u8x16 = u8x16::new(0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00); | |
3044 | let r: u8x16 = transmute(vandq_u8(transmute(a), transmute(b))); | |
3045 | assert_eq!(r, e); | |
3046 | } | |
3047 | ||
3048 | #[simd_test(enable = "neon")] | |
3049 | unsafe fn test_vand_u16() { | |
3050 | let a: u16x4 = u16x4::new(0x00, 0x01, 0x02, 0x03); | |
3051 | let b: u16x4 = u16x4::new(0x0F, 0x0F, 0x0F, 0x0F); | |
3052 | let e: u16x4 = u16x4::new(0x00, 0x01, 0x02, 0x03); | |
3053 | let r: u16x4 = transmute(vand_u16(transmute(a), transmute(b))); | |
3054 | assert_eq!(r, e); | |
3055 | ||
3056 | let a: u16x4 = u16x4::new(0x00, 0x01, 0x02, 0x03); | |
3057 | let b: u16x4 = u16x4::new(0x00, 0x00, 0x00, 0x00); | |
3058 | let e: u16x4 = u16x4::new(0x00, 0x00, 0x00, 0x00); | |
3059 | let r: u16x4 = transmute(vand_u16(transmute(a), transmute(b))); | |
3060 | assert_eq!(r, e); | |
3061 | } | |
3062 | ||
3063 | #[simd_test(enable = "neon")] | |
3064 | unsafe fn test_vandq_u16() { | |
3065 | let a: u16x8 = u16x8::new(0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07); | |
3066 | let b: u16x8 = u16x8::new(0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F, 0x0F); | |
3067 | let e: u16x8 = u16x8::new(0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07); | |
3068 | let r: u16x8 = transmute(vandq_u16(transmute(a), transmute(b))); | |
3069 | assert_eq!(r, e); | |
3070 | ||
3071 | let a: u16x8 = u16x8::new(0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07); | |
3072 | let b: u16x8 = u16x8::new(0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00); | |
3073 | let e: u16x8 = u16x8::new(0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00); | |
3074 | let r: u16x8 = transmute(vandq_u16(transmute(a), transmute(b))); | |
3075 | assert_eq!(r, e); | |
3076 | } | |
3077 | ||
3078 | #[simd_test(enable = "neon")] | |
3079 | unsafe fn test_vand_u32() { | |
3080 | let a: u32x2 = u32x2::new(0x00, 0x01); | |
3081 | let b: u32x2 = u32x2::new(0x0F, 0x0F); | |
3082 | let e: u32x2 = u32x2::new(0x00, 0x01); | |
3083 | let r: u32x2 = transmute(vand_u32(transmute(a), transmute(b))); | |
3084 | assert_eq!(r, e); | |
3085 | ||
3086 | let a: u32x2 = u32x2::new(0x00, 0x01); | |
3087 | let b: u32x2 = u32x2::new(0x00, 0x00); | |
3088 | let e: u32x2 = u32x2::new(0x00, 0x00); | |
3089 | let r: u32x2 = transmute(vand_u32(transmute(a), transmute(b))); | |
3090 | assert_eq!(r, e); | |
3091 | } | |
3092 | ||
3093 | #[simd_test(enable = "neon")] | |
3094 | unsafe fn test_vandq_u32() { | |
3095 | let a: u32x4 = u32x4::new(0x00, 0x01, 0x02, 0x03); | |
3096 | let b: u32x4 = u32x4::new(0x0F, 0x0F, 0x0F, 0x0F); | |
3097 | let e: u32x4 = u32x4::new(0x00, 0x01, 0x02, 0x03); | |
3098 | let r: u32x4 = transmute(vandq_u32(transmute(a), transmute(b))); | |
3099 | assert_eq!(r, e); | |
3100 | ||
3101 | let a: u32x4 = u32x4::new(0x00, 0x01, 0x02, 0x03); | |
3102 | let b: u32x4 = u32x4::new(0x00, 0x00, 0x00, 0x00); | |
3103 | let e: u32x4 = u32x4::new(0x00, 0x00, 0x00, 0x00); | |
3104 | let r: u32x4 = transmute(vandq_u32(transmute(a), transmute(b))); | |
3105 | assert_eq!(r, e); | |
3106 | } | |
3107 | ||
3108 | #[simd_test(enable = "neon")] | |
3109 | unsafe fn test_vand_s64() { | |
3110 | let a: i64x1 = i64x1::new(0x00); | |
3111 | let b: i64x1 = i64x1::new(0x0F); | |
3112 | let e: i64x1 = i64x1::new(0x00); | |
3113 | let r: i64x1 = transmute(vand_s64(transmute(a), transmute(b))); | |
3114 | assert_eq!(r, e); | |
3115 | ||
3116 | let a: i64x1 = i64x1::new(0x00); | |
3117 | let b: i64x1 = i64x1::new(0x00); | |
3118 | let e: i64x1 = i64x1::new(0x00); | |
3119 | let r: i64x1 = transmute(vand_s64(transmute(a), transmute(b))); | |
3120 | assert_eq!(r, e); | |
3121 | } | |
3122 | ||
3123 | #[simd_test(enable = "neon")] | |
3124 | unsafe fn test_vandq_s64() { | |
3125 | let a: i64x2 = i64x2::new(0x00, 0x01); | |
3126 | let b: i64x2 = i64x2::new(0x0F, 0x0F); | |
3127 | let e: i64x2 = i64x2::new(0x00, 0x01); | |
3128 | let r: i64x2 = transmute(vandq_s64(transmute(a), transmute(b))); | |
3129 | assert_eq!(r, e); | |
3130 | ||
3131 | let a: i64x2 = i64x2::new(0x00, 0x01); | |
3132 | let b: i64x2 = i64x2::new(0x00, 0x00); | |
3133 | let e: i64x2 = i64x2::new(0x00, 0x00); | |
3134 | let r: i64x2 = transmute(vandq_s64(transmute(a), transmute(b))); | |
3135 | assert_eq!(r, e); | |
3136 | } | |
3137 | ||
3138 | #[simd_test(enable = "neon")] | |
3139 | unsafe fn test_vand_u64() { | |
3140 | let a: u64x1 = u64x1::new(0x00); | |
3141 | let b: u64x1 = u64x1::new(0x0F); | |
3142 | let e: u64x1 = u64x1::new(0x00); | |
3143 | let r: u64x1 = transmute(vand_u64(transmute(a), transmute(b))); | |
3144 | assert_eq!(r, e); | |
3145 | ||
3146 | let a: u64x1 = u64x1::new(0x00); | |
3147 | let b: u64x1 = u64x1::new(0x00); | |
3148 | let e: u64x1 = u64x1::new(0x00); | |
3149 | let r: u64x1 = transmute(vand_u64(transmute(a), transmute(b))); | |
3150 | assert_eq!(r, e); | |
3151 | } | |
3152 | ||
3153 | #[simd_test(enable = "neon")] | |
3154 | unsafe fn test_vandq_u64() { | |
3155 | let a: u64x2 = u64x2::new(0x00, 0x01); | |
3156 | let b: u64x2 = u64x2::new(0x0F, 0x0F); | |
3157 | let e: u64x2 = u64x2::new(0x00, 0x01); | |
3158 | let r: u64x2 = transmute(vandq_u64(transmute(a), transmute(b))); | |
3159 | assert_eq!(r, e); | |
3160 | ||
3161 | let a: u64x2 = u64x2::new(0x00, 0x01); | |
3162 | let b: u64x2 = u64x2::new(0x00, 0x00); | |
3163 | let e: u64x2 = u64x2::new(0x00, 0x00); | |
3164 | let r: u64x2 = transmute(vandq_u64(transmute(a), transmute(b))); | |
3165 | assert_eq!(r, e); | |
3166 | } | |
3167 | ||
3168 | #[simd_test(enable = "neon")] | |
3169 | unsafe fn test_vorr_s8() { | |
3170 | let a: i8x8 = i8x8::new(0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07); | |
3171 | let b: i8x8 = i8x8::new(0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00); | |
3172 | let e: i8x8 = i8x8::new(0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07); | |
3173 | let r: i8x8 = transmute(vorr_s8(transmute(a), transmute(b))); | |
3174 | assert_eq!(r, e); | |
3175 | } | |
3176 | ||
3177 | #[simd_test(enable = "neon")] | |
3178 | unsafe fn test_vorrq_s8() { | |
3179 | let a: i8x16 = i8x16::new(0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F); | |
3180 | let b: i8x16 = i8x16::new(0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00); | |
3181 | let e: i8x16 = i8x16::new(0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F); | |
3182 | let r: i8x16 = transmute(vorrq_s8(transmute(a), transmute(b))); | |
3183 | assert_eq!(r, e); | |
3184 | } | |
3185 | ||
3186 | #[simd_test(enable = "neon")] | |
3187 | unsafe fn test_vorr_s16() { | |
3188 | let a: i16x4 = i16x4::new(0x00, 0x01, 0x02, 0x03); | |
3189 | let b: i16x4 = i16x4::new(0x00, 0x00, 0x00, 0x00); | |
3190 | let e: i16x4 = i16x4::new(0x00, 0x01, 0x02, 0x03); | |
3191 | let r: i16x4 = transmute(vorr_s16(transmute(a), transmute(b))); | |
3192 | assert_eq!(r, e); | |
3193 | } | |
3194 | ||
3195 | #[simd_test(enable = "neon")] | |
3196 | unsafe fn test_vorrq_s16() { | |
3197 | let a: i16x8 = i16x8::new(0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07); | |
3198 | let b: i16x8 = i16x8::new(0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00); | |
3199 | let e: i16x8 = i16x8::new(0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07); | |
3200 | let r: i16x8 = transmute(vorrq_s16(transmute(a), transmute(b))); | |
3201 | assert_eq!(r, e); | |
3202 | } | |
3203 | ||
3204 | #[simd_test(enable = "neon")] | |
3205 | unsafe fn test_vorr_s32() { | |
3206 | let a: i32x2 = i32x2::new(0x00, 0x01); | |
3207 | let b: i32x2 = i32x2::new(0x00, 0x00); | |
3208 | let e: i32x2 = i32x2::new(0x00, 0x01); | |
3209 | let r: i32x2 = transmute(vorr_s32(transmute(a), transmute(b))); | |
3210 | assert_eq!(r, e); | |
3211 | } | |
3212 | ||
3213 | #[simd_test(enable = "neon")] | |
3214 | unsafe fn test_vorrq_s32() { | |
3215 | let a: i32x4 = i32x4::new(0x00, 0x01, 0x02, 0x03); | |
3216 | let b: i32x4 = i32x4::new(0x00, 0x00, 0x00, 0x00); | |
3217 | let e: i32x4 = i32x4::new(0x00, 0x01, 0x02, 0x03); | |
3218 | let r: i32x4 = transmute(vorrq_s32(transmute(a), transmute(b))); | |
3219 | assert_eq!(r, e); | |
3220 | } | |
3221 | ||
3222 | #[simd_test(enable = "neon")] | |
3223 | unsafe fn test_vorr_u8() { | |
3224 | let a: u8x8 = u8x8::new(0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07); | |
3225 | let b: u8x8 = u8x8::new(0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00); | |
3226 | let e: u8x8 = u8x8::new(0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07); | |
3227 | let r: u8x8 = transmute(vorr_u8(transmute(a), transmute(b))); | |
3228 | assert_eq!(r, e); | |
3229 | } | |
3230 | ||
3231 | #[simd_test(enable = "neon")] | |
3232 | unsafe fn test_vorrq_u8() { | |
3233 | let a: u8x16 = u8x16::new(0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F); | |
3234 | let b: u8x16 = u8x16::new(0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00); | |
3235 | let e: u8x16 = u8x16::new(0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F); | |
3236 | let r: u8x16 = transmute(vorrq_u8(transmute(a), transmute(b))); | |
3237 | assert_eq!(r, e); | |
3238 | } | |
3239 | ||
3240 | #[simd_test(enable = "neon")] | |
3241 | unsafe fn test_vorr_u16() { | |
3242 | let a: u16x4 = u16x4::new(0x00, 0x01, 0x02, 0x03); | |
3243 | let b: u16x4 = u16x4::new(0x00, 0x00, 0x00, 0x00); | |
3244 | let e: u16x4 = u16x4::new(0x00, 0x01, 0x02, 0x03); | |
3245 | let r: u16x4 = transmute(vorr_u16(transmute(a), transmute(b))); | |
3246 | assert_eq!(r, e); | |
3247 | } | |
3248 | ||
3249 | #[simd_test(enable = "neon")] | |
3250 | unsafe fn test_vorrq_u16() { | |
3251 | let a: u16x8 = u16x8::new(0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07); | |
3252 | let b: u16x8 = u16x8::new(0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00); | |
3253 | let e: u16x8 = u16x8::new(0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07); | |
3254 | let r: u16x8 = transmute(vorrq_u16(transmute(a), transmute(b))); | |
3255 | assert_eq!(r, e); | |
3256 | } | |
3257 | ||
3258 | #[simd_test(enable = "neon")] | |
3259 | unsafe fn test_vorr_u32() { | |
3260 | let a: u32x2 = u32x2::new(0x00, 0x01); | |
3261 | let b: u32x2 = u32x2::new(0x00, 0x00); | |
3262 | let e: u32x2 = u32x2::new(0x00, 0x01); | |
3263 | let r: u32x2 = transmute(vorr_u32(transmute(a), transmute(b))); | |
3264 | assert_eq!(r, e); | |
3265 | } | |
3266 | ||
3267 | #[simd_test(enable = "neon")] | |
3268 | unsafe fn test_vorrq_u32() { | |
3269 | let a: u32x4 = u32x4::new(0x00, 0x01, 0x02, 0x03); | |
3270 | let b: u32x4 = u32x4::new(0x00, 0x00, 0x00, 0x00); | |
3271 | let e: u32x4 = u32x4::new(0x00, 0x01, 0x02, 0x03); | |
3272 | let r: u32x4 = transmute(vorrq_u32(transmute(a), transmute(b))); | |
3273 | assert_eq!(r, e); | |
3274 | } | |
3275 | ||
3276 | #[simd_test(enable = "neon")] | |
3277 | unsafe fn test_vorr_s64() { | |
3278 | let a: i64x1 = i64x1::new(0x00); | |
3279 | let b: i64x1 = i64x1::new(0x00); | |
3280 | let e: i64x1 = i64x1::new(0x00); | |
3281 | let r: i64x1 = transmute(vorr_s64(transmute(a), transmute(b))); | |
3282 | assert_eq!(r, e); | |
3283 | } | |
3284 | ||
3285 | #[simd_test(enable = "neon")] | |
3286 | unsafe fn test_vorrq_s64() { | |
3287 | let a: i64x2 = i64x2::new(0x00, 0x01); | |
3288 | let b: i64x2 = i64x2::new(0x00, 0x00); | |
3289 | let e: i64x2 = i64x2::new(0x00, 0x01); | |
3290 | let r: i64x2 = transmute(vorrq_s64(transmute(a), transmute(b))); | |
3291 | assert_eq!(r, e); | |
3292 | } | |
3293 | ||
3294 | #[simd_test(enable = "neon")] | |
3295 | unsafe fn test_vorr_u64() { | |
3296 | let a: u64x1 = u64x1::new(0x00); | |
3297 | let b: u64x1 = u64x1::new(0x00); | |
3298 | let e: u64x1 = u64x1::new(0x00); | |
3299 | let r: u64x1 = transmute(vorr_u64(transmute(a), transmute(b))); | |
3300 | assert_eq!(r, e); | |
3301 | } | |
3302 | ||
3303 | #[simd_test(enable = "neon")] | |
3304 | unsafe fn test_vorrq_u64() { | |
3305 | let a: u64x2 = u64x2::new(0x00, 0x01); | |
3306 | let b: u64x2 = u64x2::new(0x00, 0x00); | |
3307 | let e: u64x2 = u64x2::new(0x00, 0x01); | |
3308 | let r: u64x2 = transmute(vorrq_u64(transmute(a), transmute(b))); | |
3309 | assert_eq!(r, e); | |
3310 | } | |
3311 | ||
3312 | #[simd_test(enable = "neon")] | |
3313 | unsafe fn test_veor_s8() { | |
3314 | let a: i8x8 = i8x8::new(0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07); | |
3315 | let b: i8x8 = i8x8::new(0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00); | |
3316 | let e: i8x8 = i8x8::new(0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07); | |
3317 | let r: i8x8 = transmute(veor_s8(transmute(a), transmute(b))); | |
3318 | assert_eq!(r, e); | |
3319 | } | |
3320 | ||
3321 | #[simd_test(enable = "neon")] | |
3322 | unsafe fn test_veorq_s8() { | |
3323 | let a: i8x16 = i8x16::new(0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F); | |
3324 | let b: i8x16 = i8x16::new(0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00); | |
3325 | let e: i8x16 = i8x16::new(0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F); | |
3326 | let r: i8x16 = transmute(veorq_s8(transmute(a), transmute(b))); | |
3327 | assert_eq!(r, e); | |
3328 | } | |
3329 | ||
3330 | #[simd_test(enable = "neon")] | |
3331 | unsafe fn test_veor_s16() { | |
3332 | let a: i16x4 = i16x4::new(0x00, 0x01, 0x02, 0x03); | |
3333 | let b: i16x4 = i16x4::new(0x00, 0x00, 0x00, 0x00); | |
3334 | let e: i16x4 = i16x4::new(0x00, 0x01, 0x02, 0x03); | |
3335 | let r: i16x4 = transmute(veor_s16(transmute(a), transmute(b))); | |
3336 | assert_eq!(r, e); | |
3337 | } | |
3338 | ||
3339 | #[simd_test(enable = "neon")] | |
3340 | unsafe fn test_veorq_s16() { | |
3341 | let a: i16x8 = i16x8::new(0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07); | |
3342 | let b: i16x8 = i16x8::new(0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00); | |
3343 | let e: i16x8 = i16x8::new(0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07); | |
3344 | let r: i16x8 = transmute(veorq_s16(transmute(a), transmute(b))); | |
3345 | assert_eq!(r, e); | |
3346 | } | |
3347 | ||
3348 | #[simd_test(enable = "neon")] | |
3349 | unsafe fn test_veor_s32() { | |
3350 | let a: i32x2 = i32x2::new(0x00, 0x01); | |
3351 | let b: i32x2 = i32x2::new(0x00, 0x00); | |
3352 | let e: i32x2 = i32x2::new(0x00, 0x01); | |
3353 | let r: i32x2 = transmute(veor_s32(transmute(a), transmute(b))); | |
3354 | assert_eq!(r, e); | |
3355 | } | |
3356 | ||
3357 | #[simd_test(enable = "neon")] | |
3358 | unsafe fn test_veorq_s32() { | |
3359 | let a: i32x4 = i32x4::new(0x00, 0x01, 0x02, 0x03); | |
3360 | let b: i32x4 = i32x4::new(0x00, 0x00, 0x00, 0x00); | |
3361 | let e: i32x4 = i32x4::new(0x00, 0x01, 0x02, 0x03); | |
3362 | let r: i32x4 = transmute(veorq_s32(transmute(a), transmute(b))); | |
3363 | assert_eq!(r, e); | |
3364 | } | |
3365 | ||
3366 | #[simd_test(enable = "neon")] | |
3367 | unsafe fn test_veor_u8() { | |
3368 | let a: u8x8 = u8x8::new(0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07); | |
3369 | let b: u8x8 = u8x8::new(0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00); | |
3370 | let e: u8x8 = u8x8::new(0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07); | |
3371 | let r: u8x8 = transmute(veor_u8(transmute(a), transmute(b))); | |
3372 | assert_eq!(r, e); | |
3373 | } | |
3374 | ||
3375 | #[simd_test(enable = "neon")] | |
3376 | unsafe fn test_veorq_u8() { | |
3377 | let a: u8x16 = u8x16::new(0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F); | |
3378 | let b: u8x16 = u8x16::new(0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00); | |
3379 | let e: u8x16 = u8x16::new(0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0x0F); | |
3380 | let r: u8x16 = transmute(veorq_u8(transmute(a), transmute(b))); | |
3381 | assert_eq!(r, e); | |
3382 | } | |
3383 | ||
3384 | #[simd_test(enable = "neon")] | |
3385 | unsafe fn test_veor_u16() { | |
3386 | let a: u16x4 = u16x4::new(0x00, 0x01, 0x02, 0x03); | |
3387 | let b: u16x4 = u16x4::new(0x00, 0x00, 0x00, 0x00); | |
3388 | let e: u16x4 = u16x4::new(0x00, 0x01, 0x02, 0x03); | |
3389 | let r: u16x4 = transmute(veor_u16(transmute(a), transmute(b))); | |
3390 | assert_eq!(r, e); | |
3391 | } | |
3392 | ||
3393 | #[simd_test(enable = "neon")] | |
3394 | unsafe fn test_veorq_u16() { | |
3395 | let a: u16x8 = u16x8::new(0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07); | |
3396 | let b: u16x8 = u16x8::new(0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00); | |
3397 | let e: u16x8 = u16x8::new(0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07); | |
3398 | let r: u16x8 = transmute(veorq_u16(transmute(a), transmute(b))); | |
3399 | assert_eq!(r, e); | |
3400 | } | |
3401 | ||
3402 | #[simd_test(enable = "neon")] | |
3403 | unsafe fn test_veor_u32() { | |
3404 | let a: u32x2 = u32x2::new(0x00, 0x01); | |
3405 | let b: u32x2 = u32x2::new(0x00, 0x00); | |
3406 | let e: u32x2 = u32x2::new(0x00, 0x01); | |
3407 | let r: u32x2 = transmute(veor_u32(transmute(a), transmute(b))); | |
3408 | assert_eq!(r, e); | |
3409 | } | |
3410 | ||
3411 | #[simd_test(enable = "neon")] | |
3412 | unsafe fn test_veorq_u32() { | |
3413 | let a: u32x4 = u32x4::new(0x00, 0x01, 0x02, 0x03); | |
3414 | let b: u32x4 = u32x4::new(0x00, 0x00, 0x00, 0x00); | |
3415 | let e: u32x4 = u32x4::new(0x00, 0x01, 0x02, 0x03); | |
3416 | let r: u32x4 = transmute(veorq_u32(transmute(a), transmute(b))); | |
3417 | assert_eq!(r, e); | |
3418 | } | |
3419 | ||
3420 | #[simd_test(enable = "neon")] | |
3421 | unsafe fn test_veor_s64() { | |
3422 | let a: i64x1 = i64x1::new(0x00); | |
3423 | let b: i64x1 = i64x1::new(0x00); | |
3424 | let e: i64x1 = i64x1::new(0x00); | |
3425 | let r: i64x1 = transmute(veor_s64(transmute(a), transmute(b))); | |
3426 | assert_eq!(r, e); | |
3427 | } | |
3428 | ||
3429 | #[simd_test(enable = "neon")] | |
3430 | unsafe fn test_veorq_s64() { | |
3431 | let a: i64x2 = i64x2::new(0x00, 0x01); | |
3432 | let b: i64x2 = i64x2::new(0x00, 0x00); | |
3433 | let e: i64x2 = i64x2::new(0x00, 0x01); | |
3434 | let r: i64x2 = transmute(veorq_s64(transmute(a), transmute(b))); | |
3435 | assert_eq!(r, e); | |
3436 | } | |
3437 | ||
3438 | #[simd_test(enable = "neon")] | |
3439 | unsafe fn test_veor_u64() { | |
3440 | let a: u64x1 = u64x1::new(0x00); | |
3441 | let b: u64x1 = u64x1::new(0x00); | |
3442 | let e: u64x1 = u64x1::new(0x00); | |
3443 | let r: u64x1 = transmute(veor_u64(transmute(a), transmute(b))); | |
3444 | assert_eq!(r, e); | |
3445 | } | |
3446 | ||
3447 | #[simd_test(enable = "neon")] | |
3448 | unsafe fn test_veorq_u64() { | |
3449 | let a: u64x2 = u64x2::new(0x00, 0x01); | |
3450 | let b: u64x2 = u64x2::new(0x00, 0x00); | |
3451 | let e: u64x2 = u64x2::new(0x00, 0x01); | |
3452 | let r: u64x2 = transmute(veorq_u64(transmute(a), transmute(b))); | |
3453 | assert_eq!(r, e); | |
3454 | } | |
3455 | ||
3456 | #[simd_test(enable = "neon")] | |
3457 | unsafe fn test_vceq_u8() { | |
3458 | let a: u8x8 = u8x8::new(0xFF, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07); | |
3459 | let b: u8x8 = u8x8::new(0xFF, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07); | |
3460 | let e: u8x8 = u8x8::new(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF); | |
3461 | let r: u8x8 = transmute(vceq_u8(transmute(a), transmute(b))); | |
3462 | assert_eq!(r, e); | |
3463 | ||
3464 | let a: u8x8 = u8x8::new(0xFF, 0xFF, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07); | |
3465 | let b: u8x8 = u8x8::new(0xFF, 0, 0x02, 0x04, 0x04, 0x00, 0x06, 0x08); | |
3466 | let e: u8x8 = u8x8::new(0xFF, 0, 0xFF, 0, 0xFF, 0, 0xFF, 0); | |
3467 | let r: u8x8 = transmute(vceq_u8(transmute(a), transmute(b))); | |
3468 | assert_eq!(r, e); | |
3469 | } | |
3470 | ||
3471 | #[simd_test(enable = "neon")] | |
3472 | unsafe fn test_vceqq_u8() { | |
3473 | let a: u8x16 = u8x16::new(0xFF, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0); | |
3474 | let b: u8x16 = u8x16::new(0xFF, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, 0); | |
3475 | let e: u8x16 = u8x16::new(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF); | |
3476 | let r: u8x16 = transmute(vceqq_u8(transmute(a), transmute(b))); | |
3477 | assert_eq!(r, e); | |
3478 | ||
3479 | let a: u8x16 = u8x16::new(0xFF, 0xFF, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0xCC, 0x0D, 0xEE, 0); | |
3480 | let b: u8x16 = u8x16::new(0xFF, 0, 0x02, 0x04, 0x04, 0x00, 0x06, 0x08, 0x08, 0x00, 0x0A, 0x0A, 0xCC, 0xD0, 0xEE, 0xFF); | |
3481 | let e: u8x16 = u8x16::new(0xFF, 0, 0xFF, 0, 0xFF, 0, 0xFF, 0, 0xFF, 0, 0xFF, 0, 0xFF, 0, 0xFF, 0); | |
3482 | let r: u8x16 = transmute(vceqq_u8(transmute(a), transmute(b))); | |
3483 | assert_eq!(r, e); | |
3484 | } | |
3485 | ||
3486 | #[simd_test(enable = "neon")] | |
3487 | unsafe fn test_vceq_u16() { | |
3488 | let a: u16x4 = u16x4::new(0xFF_FF, 0x01, 0x02, 0x03); | |
3489 | let b: u16x4 = u16x4::new(0xFF_FF, 0x01, 0x02, 0x03); | |
3490 | let e: u16x4 = u16x4::new(0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF); | |
3491 | let r: u16x4 = transmute(vceq_u16(transmute(a), transmute(b))); | |
3492 | assert_eq!(r, e); | |
3493 | ||
3494 | let a: u16x4 = u16x4::new(0xFF_FF, 0xFF_FF, 0x02, 0x03); | |
3495 | let b: u16x4 = u16x4::new(0xFF_FF, 0, 0x02, 0x04); | |
3496 | let e: u16x4 = u16x4::new(0xFF_FF, 0, 0xFF_FF, 0); | |
3497 | let r: u16x4 = transmute(vceq_u16(transmute(a), transmute(b))); | |
3498 | assert_eq!(r, e); | |
3499 | } | |
3500 | ||
3501 | #[simd_test(enable = "neon")] | |
3502 | unsafe fn test_vceqq_u16() { | |
3503 | let a: u16x8 = u16x8::new(0xFF_FF, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07); | |
3504 | let b: u16x8 = u16x8::new(0xFF_FF, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07); | |
3505 | let e: u16x8 = u16x8::new(0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF); | |
3506 | let r: u16x8 = transmute(vceqq_u16(transmute(a), transmute(b))); | |
3507 | assert_eq!(r, e); | |
3508 | ||
3509 | let a: u16x8 = u16x8::new(0xFF_FF, 0xFF_FF, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07); | |
3510 | let b: u16x8 = u16x8::new(0xFF_FF, 0, 0x02, 0x04, 0x04, 0x00, 0x06, 0x08); | |
3511 | let e: u16x8 = u16x8::new(0xFF_FF, 0, 0xFF_FF, 0, 0xFF_FF, 0, 0xFF_FF, 0); | |
3512 | let r: u16x8 = transmute(vceqq_u16(transmute(a), transmute(b))); | |
3513 | assert_eq!(r, e); | |
3514 | } | |
3515 | ||
3516 | #[simd_test(enable = "neon")] | |
3517 | unsafe fn test_vceq_u32() { | |
3518 | let a: u32x2 = u32x2::new(0xFF_FF_FF_FF, 0x01); | |
3519 | let b: u32x2 = u32x2::new(0xFF_FF_FF_FF, 0x01); | |
3520 | let e: u32x2 = u32x2::new(0xFF_FF_FF_FF, 0xFF_FF_FF_FF); | |
3521 | let r: u32x2 = transmute(vceq_u32(transmute(a), transmute(b))); | |
3522 | assert_eq!(r, e); | |
3523 | ||
3524 | let a: u32x2 = u32x2::new(0xFF_FF_FF_FF, 0xFF_FF_FF_FF); | |
3525 | let b: u32x2 = u32x2::new(0xFF_FF_FF_FF, 0); | |
3526 | let e: u32x2 = u32x2::new(0xFF_FF_FF_FF, 0); | |
3527 | let r: u32x2 = transmute(vceq_u32(transmute(a), transmute(b))); | |
3528 | assert_eq!(r, e); | |
3529 | } | |
3530 | ||
3531 | #[simd_test(enable = "neon")] | |
3532 | unsafe fn test_vceqq_u32() { | |
3533 | let a: u32x4 = u32x4::new(0xFF_FF_FF_FF, 0x01, 0x02, 0x03); | |
3534 | let b: u32x4 = u32x4::new(0xFF_FF_FF_FF, 0x01, 0x02, 0x03); | |
3535 | let e: u32x4 = u32x4::new(0xFF_FF_FF_FF, 0xFF_FF_FF_FF, 0xFF_FF_FF_FF, 0xFF_FF_FF_FF); | |
3536 | let r: u32x4 = transmute(vceqq_u32(transmute(a), transmute(b))); | |
3537 | assert_eq!(r, e); | |
3538 | ||
3539 | let a: u32x4 = u32x4::new(0xFF_FF_FF_FF, 0xFF_FF_FF_FF, 0x02, 0x03); | |
3540 | let b: u32x4 = u32x4::new(0xFF_FF_FF_FF, 0, 0x02, 0x04); | |
3541 | let e: u32x4 = u32x4::new(0xFF_FF_FF_FF, 0, 0xFF_FF_FF_FF, 0); | |
3542 | let r: u32x4 = transmute(vceqq_u32(transmute(a), transmute(b))); | |
3543 | assert_eq!(r, e); | |
3544 | } | |
3545 | ||
3546 | #[simd_test(enable = "neon")] | |
3547 | unsafe fn test_vceq_s8() { | |
3548 | let a: i8x8 = i8x8::new(0x7F, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07); | |
3549 | let b: i8x8 = i8x8::new(0x7F, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07); | |
3550 | let e: u8x8 = u8x8::new(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF); | |
3551 | let r: u8x8 = transmute(vceq_s8(transmute(a), transmute(b))); | |
3552 | assert_eq!(r, e); | |
3553 | ||
3554 | let a: i8x8 = i8x8::new(0x7F, 0x7F, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07); | |
3555 | let b: i8x8 = i8x8::new(0x7F, -128, 0x02, 0x04, 0x04, 0x00, 0x06, 0x08); | |
3556 | let e: u8x8 = u8x8::new(0xFF, 0, 0xFF, 0, 0xFF, 0, 0xFF, 0); | |
3557 | let r: u8x8 = transmute(vceq_s8(transmute(a), transmute(b))); | |
3558 | assert_eq!(r, e); | |
3559 | } | |
3560 | ||
3561 | #[simd_test(enable = "neon")] | |
3562 | unsafe fn test_vceqq_s8() { | |
3563 | let a: i8x16 = i8x16::new(0x7F, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, -128); | |
3564 | let b: i8x16 = i8x16::new(0x7F, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0x0C, 0x0D, 0x0E, -128); | |
3565 | let e: u8x16 = u8x16::new(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF); | |
3566 | let r: u8x16 = transmute(vceqq_s8(transmute(a), transmute(b))); | |
3567 | assert_eq!(r, e); | |
3568 | ||
3569 | let a: i8x16 = i8x16::new(0x7F, 0x7F, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0x0B, 0xCC, 0x0D, 0xEE, -128); | |
3570 | let b: i8x16 = i8x16::new(0x7F, -128, 0x02, 0x04, 0x04, 0x00, 0x06, 0x08, 0x08, 0x00, 0x0A, 0x0A, 0xCC, 0xD0, 0xEE, 0x7F); | |
3571 | let e: u8x16 = u8x16::new(0xFF, 0, 0xFF, 0, 0xFF, 0, 0xFF, 0, 0xFF, 0, 0xFF, 0, 0xFF, 0, 0xFF, 0); | |
3572 | let r: u8x16 = transmute(vceqq_s8(transmute(a), transmute(b))); | |
3573 | assert_eq!(r, e); | |
3574 | } | |
3575 | ||
3576 | #[simd_test(enable = "neon")] | |
3577 | unsafe fn test_vceq_s16() { | |
3578 | let a: i16x4 = i16x4::new(0x7F_FF, 0x01, 0x02, 0x03); | |
3579 | let b: i16x4 = i16x4::new(0x7F_FF, 0x01, 0x02, 0x03); | |
3580 | let e: u16x4 = u16x4::new(0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF); | |
3581 | let r: u16x4 = transmute(vceq_s16(transmute(a), transmute(b))); | |
3582 | assert_eq!(r, e); | |
3583 | ||
3584 | let a: i16x4 = i16x4::new(0x7F_FF, 0x7F_FF, 0x02, 0x03); | |
3585 | let b: i16x4 = i16x4::new(0x7F_FF, -32768, 0x02, 0x04); | |
3586 | let e: u16x4 = u16x4::new(0xFF_FF, 0, 0xFF_FF, 0); | |
3587 | let r: u16x4 = transmute(vceq_s16(transmute(a), transmute(b))); | |
3588 | assert_eq!(r, e); | |
3589 | } | |
3590 | ||
3591 | #[simd_test(enable = "neon")] | |
3592 | unsafe fn test_vceqq_s16() { | |
3593 | let a: i16x8 = i16x8::new(0x7F_FF, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07); | |
3594 | let b: i16x8 = i16x8::new(0x7F_FF, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07); | |
3595 | let e: u16x8 = u16x8::new(0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF); | |
3596 | let r: u16x8 = transmute(vceqq_s16(transmute(a), transmute(b))); | |
3597 | assert_eq!(r, e); | |
3598 | ||
3599 | let a: i16x8 = i16x8::new(0x7F_FF, 0x7F_FF, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07); | |
3600 | let b: i16x8 = i16x8::new(0x7F_FF, -32768, 0x02, 0x04, 0x04, 0x00, 0x06, 0x08); | |
3601 | let e: u16x8 = u16x8::new(0xFF_FF, 0, 0xFF_FF, 0, 0xFF_FF, 0, 0xFF_FF, 0); | |
3602 | let r: u16x8 = transmute(vceqq_s16(transmute(a), transmute(b))); | |
3603 | assert_eq!(r, e); | |
3604 | } | |
3605 | ||
3606 | #[simd_test(enable = "neon")] | |
3607 | unsafe fn test_vceq_s32() { | |
3608 | let a: i32x2 = i32x2::new(0x7F_FF_FF_FF, 0x01); | |
3609 | let b: i32x2 = i32x2::new(0x7F_FF_FF_FF, 0x01); | |
3610 | let e: u32x2 = u32x2::new(0xFF_FF_FF_FF, 0xFF_FF_FF_FF); | |
3611 | let r: u32x2 = transmute(vceq_s32(transmute(a), transmute(b))); | |
3612 | assert_eq!(r, e); | |
3613 | ||
3614 | let a: i32x2 = i32x2::new(0x7F_FF_FF_FF, 0x7F_FF_FF_FF); | |
3615 | let b: i32x2 = i32x2::new(0x7F_FF_FF_FF, -2147483648); | |
3616 | let e: u32x2 = u32x2::new(0xFF_FF_FF_FF, 0); | |
3617 | let r: u32x2 = transmute(vceq_s32(transmute(a), transmute(b))); | |
3618 | assert_eq!(r, e); | |
3619 | } | |
3620 | ||
3621 | #[simd_test(enable = "neon")] | |
3622 | unsafe fn test_vceqq_s32() { | |
3623 | let a: i32x4 = i32x4::new(0x7F_FF_FF_FF, 0x01, 0x02, 0x03); | |
3624 | let b: i32x4 = i32x4::new(0x7F_FF_FF_FF, 0x01, 0x02, 0x03); | |
3625 | let e: u32x4 = u32x4::new(0xFF_FF_FF_FF, 0xFF_FF_FF_FF, 0xFF_FF_FF_FF, 0xFF_FF_FF_FF); | |
3626 | let r: u32x4 = transmute(vceqq_s32(transmute(a), transmute(b))); | |
3627 | assert_eq!(r, e); | |
3628 | ||
3629 | let a: i32x4 = i32x4::new(0x7F_FF_FF_FF, 0x7F_FF_FF_FF, 0x02, 0x03); | |
3630 | let b: i32x4 = i32x4::new(0x7F_FF_FF_FF, -2147483648, 0x02, 0x04); | |
3631 | let e: u32x4 = u32x4::new(0xFF_FF_FF_FF, 0, 0xFF_FF_FF_FF, 0); | |
3632 | let r: u32x4 = transmute(vceqq_s32(transmute(a), transmute(b))); | |
3633 | assert_eq!(r, e); | |
3634 | } | |
3635 | ||
3636 | #[simd_test(enable = "neon")] | |
3637 | unsafe fn test_vceq_f32() { | |
3638 | let a: f32x2 = f32x2::new(1.2, 3.4); | |
3639 | let b: f32x2 = f32x2::new(1.2, 3.4); | |
3640 | let e: u32x2 = u32x2::new(0xFF_FF_FF_FF, 0xFF_FF_FF_FF); | |
3641 | let r: u32x2 = transmute(vceq_f32(transmute(a), transmute(b))); | |
3642 | assert_eq!(r, e); | |
3643 | } | |
3644 | ||
3645 | #[simd_test(enable = "neon")] | |
3646 | unsafe fn test_vceqq_f32() { | |
3647 | let a: f32x4 = f32x4::new(1.2, 3.4, 5.6, 7.8); | |
3648 | let b: f32x4 = f32x4::new(1.2, 3.4, 5.6, 7.8); | |
3649 | let e: u32x4 = u32x4::new(0xFF_FF_FF_FF, 0xFF_FF_FF_FF, 0xFF_FF_FF_FF, 0xFF_FF_FF_FF); | |
3650 | let r: u32x4 = transmute(vceqq_f32(transmute(a), transmute(b))); | |
3651 | assert_eq!(r, e); | |
3652 | } | |
3653 | ||
3654 | #[simd_test(enable = "neon")] | |
3655 | unsafe fn test_vcgt_s8() { | |
3656 | let a: i8x8 = i8x8::new(1, 2, 3, 4, 5, 6, 7, 8); | |
3657 | let b: i8x8 = i8x8::new(0, 1, 2, 3, 4, 5, 6, 7); | |
3658 | let e: u8x8 = u8x8::new(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF); | |
3659 | let r: u8x8 = transmute(vcgt_s8(transmute(a), transmute(b))); | |
3660 | assert_eq!(r, e); | |
3661 | } | |
3662 | ||
3663 | #[simd_test(enable = "neon")] | |
3664 | unsafe fn test_vcgtq_s8() { | |
3665 | let a: i8x16 = i8x16::new(1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16); | |
3666 | let b: i8x16 = i8x16::new(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15); | |
3667 | let e: u8x16 = u8x16::new(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF); | |
3668 | let r: u8x16 = transmute(vcgtq_s8(transmute(a), transmute(b))); | |
3669 | assert_eq!(r, e); | |
3670 | } | |
3671 | ||
3672 | #[simd_test(enable = "neon")] | |
3673 | unsafe fn test_vcgt_s16() { | |
3674 | let a: i16x4 = i16x4::new(1, 2, 3, 4); | |
3675 | let b: i16x4 = i16x4::new(0, 1, 2, 3); | |
3676 | let e: u16x4 = u16x4::new(0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF); | |
3677 | let r: u16x4 = transmute(vcgt_s16(transmute(a), transmute(b))); | |
3678 | assert_eq!(r, e); | |
3679 | } | |
3680 | ||
3681 | #[simd_test(enable = "neon")] | |
3682 | unsafe fn test_vcgtq_s16() { | |
3683 | let a: i16x8 = i16x8::new(1, 2, 3, 4, 5, 6, 7, 8); | |
3684 | let b: i16x8 = i16x8::new(0, 1, 2, 3, 4, 5, 6, 7); | |
3685 | let e: u16x8 = u16x8::new(0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF); | |
3686 | let r: u16x8 = transmute(vcgtq_s16(transmute(a), transmute(b))); | |
3687 | assert_eq!(r, e); | |
3688 | } | |
3689 | ||
3690 | #[simd_test(enable = "neon")] | |
3691 | unsafe fn test_vcgt_s32() { | |
3692 | let a: i32x2 = i32x2::new(1, 2); | |
3693 | let b: i32x2 = i32x2::new(0, 1); | |
3694 | let e: u32x2 = u32x2::new(0xFF_FF_FF_FF, 0xFF_FF_FF_FF); | |
3695 | let r: u32x2 = transmute(vcgt_s32(transmute(a), transmute(b))); | |
3696 | assert_eq!(r, e); | |
3697 | } | |
3698 | ||
3699 | #[simd_test(enable = "neon")] | |
3700 | unsafe fn test_vcgtq_s32() { | |
3701 | let a: i32x4 = i32x4::new(1, 2, 3, 4); | |
3702 | let b: i32x4 = i32x4::new(0, 1, 2, 3); | |
3703 | let e: u32x4 = u32x4::new(0xFF_FF_FF_FF, 0xFF_FF_FF_FF, 0xFF_FF_FF_FF, 0xFF_FF_FF_FF); | |
3704 | let r: u32x4 = transmute(vcgtq_s32(transmute(a), transmute(b))); | |
3705 | assert_eq!(r, e); | |
3706 | } | |
3707 | ||
3708 | #[simd_test(enable = "neon")] | |
3709 | unsafe fn test_vcgt_u8() { | |
3710 | let a: u8x8 = u8x8::new(1, 2, 3, 4, 5, 6, 7, 8); | |
3711 | let b: u8x8 = u8x8::new(0, 1, 2, 3, 4, 5, 6, 7); | |
3712 | let e: u8x8 = u8x8::new(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF); | |
3713 | let r: u8x8 = transmute(vcgt_u8(transmute(a), transmute(b))); | |
3714 | assert_eq!(r, e); | |
3715 | } | |
3716 | ||
3717 | #[simd_test(enable = "neon")] | |
3718 | unsafe fn test_vcgtq_u8() { | |
3719 | let a: u8x16 = u8x16::new(1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16); | |
3720 | let b: u8x16 = u8x16::new(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15); | |
3721 | let e: u8x16 = u8x16::new(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF); | |
3722 | let r: u8x16 = transmute(vcgtq_u8(transmute(a), transmute(b))); | |
3723 | assert_eq!(r, e); | |
3724 | } | |
3725 | ||
3726 | #[simd_test(enable = "neon")] | |
3727 | unsafe fn test_vcgt_u16() { | |
3728 | let a: u16x4 = u16x4::new(1, 2, 3, 4); | |
3729 | let b: u16x4 = u16x4::new(0, 1, 2, 3); | |
3730 | let e: u16x4 = u16x4::new(0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF); | |
3731 | let r: u16x4 = transmute(vcgt_u16(transmute(a), transmute(b))); | |
3732 | assert_eq!(r, e); | |
3733 | } | |
3734 | ||
3735 | #[simd_test(enable = "neon")] | |
3736 | unsafe fn test_vcgtq_u16() { | |
3737 | let a: u16x8 = u16x8::new(1, 2, 3, 4, 5, 6, 7, 8); | |
3738 | let b: u16x8 = u16x8::new(0, 1, 2, 3, 4, 5, 6, 7); | |
3739 | let e: u16x8 = u16x8::new(0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF); | |
3740 | let r: u16x8 = transmute(vcgtq_u16(transmute(a), transmute(b))); | |
3741 | assert_eq!(r, e); | |
3742 | } | |
3743 | ||
3744 | #[simd_test(enable = "neon")] | |
3745 | unsafe fn test_vcgt_u32() { | |
3746 | let a: u32x2 = u32x2::new(1, 2); | |
3747 | let b: u32x2 = u32x2::new(0, 1); | |
3748 | let e: u32x2 = u32x2::new(0xFF_FF_FF_FF, 0xFF_FF_FF_FF); | |
3749 | let r: u32x2 = transmute(vcgt_u32(transmute(a), transmute(b))); | |
3750 | assert_eq!(r, e); | |
3751 | } | |
3752 | ||
3753 | #[simd_test(enable = "neon")] | |
3754 | unsafe fn test_vcgtq_u32() { | |
3755 | let a: u32x4 = u32x4::new(1, 2, 3, 4); | |
3756 | let b: u32x4 = u32x4::new(0, 1, 2, 3); | |
3757 | let e: u32x4 = u32x4::new(0xFF_FF_FF_FF, 0xFF_FF_FF_FF, 0xFF_FF_FF_FF, 0xFF_FF_FF_FF); | |
3758 | let r: u32x4 = transmute(vcgtq_u32(transmute(a), transmute(b))); | |
3759 | assert_eq!(r, e); | |
3760 | } | |
3761 | ||
3762 | #[simd_test(enable = "neon")] | |
3763 | unsafe fn test_vcgt_f32() { | |
3764 | let a: f32x2 = f32x2::new(1.2, 2.3); | |
3765 | let b: f32x2 = f32x2::new(0.1, 1.2); | |
3766 | let e: u32x2 = u32x2::new(0xFF_FF_FF_FF, 0xFF_FF_FF_FF); | |
3767 | let r: u32x2 = transmute(vcgt_f32(transmute(a), transmute(b))); | |
3768 | assert_eq!(r, e); | |
3769 | } | |
3770 | ||
3771 | #[simd_test(enable = "neon")] | |
3772 | unsafe fn test_vcgtq_f32() { | |
3773 | let a: f32x4 = f32x4::new(1.2, 2.3, 3.4, 4.5); | |
3774 | let b: f32x4 = f32x4::new(0.1, 1.2, 2.3, 3.4); | |
3775 | let e: u32x4 = u32x4::new(0xFF_FF_FF_FF, 0xFF_FF_FF_FF, 0xFF_FF_FF_FF, 0xFF_FF_FF_FF); | |
3776 | let r: u32x4 = transmute(vcgtq_f32(transmute(a), transmute(b))); | |
3777 | assert_eq!(r, e); | |
3778 | } | |
3779 | ||
3780 | #[simd_test(enable = "neon")] | |
3781 | unsafe fn test_vclt_s8() { | |
3782 | let a: i8x8 = i8x8::new(0, 1, 2, 3, 4, 5, 6, 7); | |
3783 | let b: i8x8 = i8x8::new(1, 2, 3, 4, 5, 6, 7, 8); | |
3784 | let e: u8x8 = u8x8::new(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF); | |
3785 | let r: u8x8 = transmute(vclt_s8(transmute(a), transmute(b))); | |
3786 | assert_eq!(r, e); | |
3787 | } | |
3788 | ||
3789 | #[simd_test(enable = "neon")] | |
3790 | unsafe fn test_vcltq_s8() { | |
3791 | let a: i8x16 = i8x16::new(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15); | |
3792 | let b: i8x16 = i8x16::new(1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16); | |
3793 | let e: u8x16 = u8x16::new(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF); | |
3794 | let r: u8x16 = transmute(vcltq_s8(transmute(a), transmute(b))); | |
3795 | assert_eq!(r, e); | |
3796 | } | |
3797 | ||
3798 | #[simd_test(enable = "neon")] | |
3799 | unsafe fn test_vclt_s16() { | |
3800 | let a: i16x4 = i16x4::new(0, 1, 2, 3); | |
3801 | let b: i16x4 = i16x4::new(1, 2, 3, 4); | |
3802 | let e: u16x4 = u16x4::new(0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF); | |
3803 | let r: u16x4 = transmute(vclt_s16(transmute(a), transmute(b))); | |
3804 | assert_eq!(r, e); | |
3805 | } | |
3806 | ||
3807 | #[simd_test(enable = "neon")] | |
3808 | unsafe fn test_vcltq_s16() { | |
3809 | let a: i16x8 = i16x8::new(0, 1, 2, 3, 4, 5, 6, 7); | |
3810 | let b: i16x8 = i16x8::new(1, 2, 3, 4, 5, 6, 7, 8); | |
3811 | let e: u16x8 = u16x8::new(0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF); | |
3812 | let r: u16x8 = transmute(vcltq_s16(transmute(a), transmute(b))); | |
3813 | assert_eq!(r, e); | |
3814 | } | |
3815 | ||
3816 | #[simd_test(enable = "neon")] | |
3817 | unsafe fn test_vclt_s32() { | |
3818 | let a: i32x2 = i32x2::new(0, 1); | |
3819 | let b: i32x2 = i32x2::new(1, 2); | |
3820 | let e: u32x2 = u32x2::new(0xFF_FF_FF_FF, 0xFF_FF_FF_FF); | |
3821 | let r: u32x2 = transmute(vclt_s32(transmute(a), transmute(b))); | |
3822 | assert_eq!(r, e); | |
3823 | } | |
3824 | ||
3825 | #[simd_test(enable = "neon")] | |
3826 | unsafe fn test_vcltq_s32() { | |
3827 | let a: i32x4 = i32x4::new(0, 1, 2, 3); | |
3828 | let b: i32x4 = i32x4::new(1, 2, 3, 4); | |
3829 | let e: u32x4 = u32x4::new(0xFF_FF_FF_FF, 0xFF_FF_FF_FF, 0xFF_FF_FF_FF, 0xFF_FF_FF_FF); | |
3830 | let r: u32x4 = transmute(vcltq_s32(transmute(a), transmute(b))); | |
3831 | assert_eq!(r, e); | |
3832 | } | |
3833 | ||
3834 | #[simd_test(enable = "neon")] | |
3835 | unsafe fn test_vclt_u8() { | |
3836 | let a: u8x8 = u8x8::new(0, 1, 2, 3, 4, 5, 6, 7); | |
3837 | let b: u8x8 = u8x8::new(1, 2, 3, 4, 5, 6, 7, 8); | |
3838 | let e: u8x8 = u8x8::new(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF); | |
3839 | let r: u8x8 = transmute(vclt_u8(transmute(a), transmute(b))); | |
3840 | assert_eq!(r, e); | |
3841 | } | |
3842 | ||
3843 | #[simd_test(enable = "neon")] | |
3844 | unsafe fn test_vcltq_u8() { | |
3845 | let a: u8x16 = u8x16::new(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15); | |
3846 | let b: u8x16 = u8x16::new(1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16); | |
3847 | let e: u8x16 = u8x16::new(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF); | |
3848 | let r: u8x16 = transmute(vcltq_u8(transmute(a), transmute(b))); | |
3849 | assert_eq!(r, e); | |
3850 | } | |
3851 | ||
3852 | #[simd_test(enable = "neon")] | |
3853 | unsafe fn test_vclt_u16() { | |
3854 | let a: u16x4 = u16x4::new(0, 1, 2, 3); | |
3855 | let b: u16x4 = u16x4::new(1, 2, 3, 4); | |
3856 | let e: u16x4 = u16x4::new(0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF); | |
3857 | let r: u16x4 = transmute(vclt_u16(transmute(a), transmute(b))); | |
3858 | assert_eq!(r, e); | |
3859 | } | |
3860 | ||
3861 | #[simd_test(enable = "neon")] | |
3862 | unsafe fn test_vcltq_u16() { | |
3863 | let a: u16x8 = u16x8::new(0, 1, 2, 3, 4, 5, 6, 7); | |
3864 | let b: u16x8 = u16x8::new(1, 2, 3, 4, 5, 6, 7, 8); | |
3865 | let e: u16x8 = u16x8::new(0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF); | |
3866 | let r: u16x8 = transmute(vcltq_u16(transmute(a), transmute(b))); | |
3867 | assert_eq!(r, e); | |
3868 | } | |
3869 | ||
3870 | #[simd_test(enable = "neon")] | |
3871 | unsafe fn test_vclt_u32() { | |
3872 | let a: u32x2 = u32x2::new(0, 1); | |
3873 | let b: u32x2 = u32x2::new(1, 2); | |
3874 | let e: u32x2 = u32x2::new(0xFF_FF_FF_FF, 0xFF_FF_FF_FF); | |
3875 | let r: u32x2 = transmute(vclt_u32(transmute(a), transmute(b))); | |
3876 | assert_eq!(r, e); | |
3877 | } | |
3878 | ||
3879 | #[simd_test(enable = "neon")] | |
3880 | unsafe fn test_vcltq_u32() { | |
3881 | let a: u32x4 = u32x4::new(0, 1, 2, 3); | |
3882 | let b: u32x4 = u32x4::new(1, 2, 3, 4); | |
3883 | let e: u32x4 = u32x4::new(0xFF_FF_FF_FF, 0xFF_FF_FF_FF, 0xFF_FF_FF_FF, 0xFF_FF_FF_FF); | |
3884 | let r: u32x4 = transmute(vcltq_u32(transmute(a), transmute(b))); | |
3885 | assert_eq!(r, e); | |
3886 | } | |
3887 | ||
3888 | #[simd_test(enable = "neon")] | |
3889 | unsafe fn test_vclt_f32() { | |
3890 | let a: f32x2 = f32x2::new(0.1, 1.2); | |
3891 | let b: f32x2 = f32x2::new(1.2, 2.3); | |
3892 | let e: u32x2 = u32x2::new(0xFF_FF_FF_FF, 0xFF_FF_FF_FF); | |
3893 | let r: u32x2 = transmute(vclt_f32(transmute(a), transmute(b))); | |
3894 | assert_eq!(r, e); | |
3895 | } | |
3896 | ||
3897 | #[simd_test(enable = "neon")] | |
3898 | unsafe fn test_vcltq_f32() { | |
3899 | let a: f32x4 = f32x4::new(0.1, 1.2, 2.3, 3.4); | |
3900 | let b: f32x4 = f32x4::new(1.2, 2.3, 3.4, 4.5); | |
3901 | let e: u32x4 = u32x4::new(0xFF_FF_FF_FF, 0xFF_FF_FF_FF, 0xFF_FF_FF_FF, 0xFF_FF_FF_FF); | |
3902 | let r: u32x4 = transmute(vcltq_f32(transmute(a), transmute(b))); | |
3903 | assert_eq!(r, e); | |
3904 | } | |
3905 | ||
3906 | #[simd_test(enable = "neon")] | |
3907 | unsafe fn test_vcle_s8() { | |
3908 | let a: i8x8 = i8x8::new(0, 1, 2, 3, 4, 5, 6, 7); | |
3909 | let b: i8x8 = i8x8::new(1, 2, 3, 4, 5, 6, 7, 8); | |
3910 | let e: u8x8 = u8x8::new(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF); | |
3911 | let r: u8x8 = transmute(vcle_s8(transmute(a), transmute(b))); | |
3912 | assert_eq!(r, e); | |
3913 | } | |
3914 | ||
3915 | #[simd_test(enable = "neon")] | |
3916 | unsafe fn test_vcleq_s8() { | |
3917 | let a: i8x16 = i8x16::new(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15); | |
3918 | let b: i8x16 = i8x16::new(1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16); | |
3919 | let e: u8x16 = u8x16::new(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF); | |
3920 | let r: u8x16 = transmute(vcleq_s8(transmute(a), transmute(b))); | |
3921 | assert_eq!(r, e); | |
3922 | } | |
3923 | ||
3924 | #[simd_test(enable = "neon")] | |
3925 | unsafe fn test_vcle_s16() { | |
3926 | let a: i16x4 = i16x4::new(0, 1, 2, 3); | |
3927 | let b: i16x4 = i16x4::new(1, 2, 3, 4); | |
3928 | let e: u16x4 = u16x4::new(0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF); | |
3929 | let r: u16x4 = transmute(vcle_s16(transmute(a), transmute(b))); | |
3930 | assert_eq!(r, e); | |
3931 | } | |
3932 | ||
3933 | #[simd_test(enable = "neon")] | |
3934 | unsafe fn test_vcleq_s16() { | |
3935 | let a: i16x8 = i16x8::new(0, 1, 2, 3, 4, 5, 6, 7); | |
3936 | let b: i16x8 = i16x8::new(1, 2, 3, 4, 5, 6, 7, 8); | |
3937 | let e: u16x8 = u16x8::new(0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF); | |
3938 | let r: u16x8 = transmute(vcleq_s16(transmute(a), transmute(b))); | |
3939 | assert_eq!(r, e); | |
3940 | } | |
3941 | ||
3942 | #[simd_test(enable = "neon")] | |
3943 | unsafe fn test_vcle_s32() { | |
3944 | let a: i32x2 = i32x2::new(0, 1); | |
3945 | let b: i32x2 = i32x2::new(1, 2); | |
3946 | let e: u32x2 = u32x2::new(0xFF_FF_FF_FF, 0xFF_FF_FF_FF); | |
3947 | let r: u32x2 = transmute(vcle_s32(transmute(a), transmute(b))); | |
3948 | assert_eq!(r, e); | |
3949 | } | |
3950 | ||
3951 | #[simd_test(enable = "neon")] | |
3952 | unsafe fn test_vcleq_s32() { | |
3953 | let a: i32x4 = i32x4::new(0, 1, 2, 3); | |
3954 | let b: i32x4 = i32x4::new(1, 2, 3, 4); | |
3955 | let e: u32x4 = u32x4::new(0xFF_FF_FF_FF, 0xFF_FF_FF_FF, 0xFF_FF_FF_FF, 0xFF_FF_FF_FF); | |
3956 | let r: u32x4 = transmute(vcleq_s32(transmute(a), transmute(b))); | |
3957 | assert_eq!(r, e); | |
3958 | } | |
3959 | ||
3960 | #[simd_test(enable = "neon")] | |
3961 | unsafe fn test_vcle_u8() { | |
3962 | let a: u8x8 = u8x8::new(0, 1, 2, 3, 4, 5, 6, 7); | |
3963 | let b: u8x8 = u8x8::new(1, 2, 3, 4, 5, 6, 7, 8); | |
3964 | let e: u8x8 = u8x8::new(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF); | |
3965 | let r: u8x8 = transmute(vcle_u8(transmute(a), transmute(b))); | |
3966 | assert_eq!(r, e); | |
3967 | } | |
3968 | ||
3969 | #[simd_test(enable = "neon")] | |
3970 | unsafe fn test_vcleq_u8() { | |
3971 | let a: u8x16 = u8x16::new(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15); | |
3972 | let b: u8x16 = u8x16::new(1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16); | |
3973 | let e: u8x16 = u8x16::new(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF); | |
3974 | let r: u8x16 = transmute(vcleq_u8(transmute(a), transmute(b))); | |
3975 | assert_eq!(r, e); | |
3976 | } | |
3977 | ||
3978 | #[simd_test(enable = "neon")] | |
3979 | unsafe fn test_vcle_u16() { | |
3980 | let a: u16x4 = u16x4::new(0, 1, 2, 3); | |
3981 | let b: u16x4 = u16x4::new(1, 2, 3, 4); | |
3982 | let e: u16x4 = u16x4::new(0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF); | |
3983 | let r: u16x4 = transmute(vcle_u16(transmute(a), transmute(b))); | |
3984 | assert_eq!(r, e); | |
3985 | } | |
3986 | ||
3987 | #[simd_test(enable = "neon")] | |
3988 | unsafe fn test_vcleq_u16() { | |
3989 | let a: u16x8 = u16x8::new(0, 1, 2, 3, 4, 5, 6, 7); | |
3990 | let b: u16x8 = u16x8::new(1, 2, 3, 4, 5, 6, 7, 8); | |
3991 | let e: u16x8 = u16x8::new(0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF); | |
3992 | let r: u16x8 = transmute(vcleq_u16(transmute(a), transmute(b))); | |
3993 | assert_eq!(r, e); | |
3994 | } | |
3995 | ||
3996 | #[simd_test(enable = "neon")] | |
3997 | unsafe fn test_vcle_u32() { | |
3998 | let a: u32x2 = u32x2::new(0, 1); | |
3999 | let b: u32x2 = u32x2::new(1, 2); | |
4000 | let e: u32x2 = u32x2::new(0xFF_FF_FF_FF, 0xFF_FF_FF_FF); | |
4001 | let r: u32x2 = transmute(vcle_u32(transmute(a), transmute(b))); | |
4002 | assert_eq!(r, e); | |
4003 | } | |
4004 | ||
4005 | #[simd_test(enable = "neon")] | |
4006 | unsafe fn test_vcleq_u32() { | |
4007 | let a: u32x4 = u32x4::new(0, 1, 2, 3); | |
4008 | let b: u32x4 = u32x4::new(1, 2, 3, 4); | |
4009 | let e: u32x4 = u32x4::new(0xFF_FF_FF_FF, 0xFF_FF_FF_FF, 0xFF_FF_FF_FF, 0xFF_FF_FF_FF); | |
4010 | let r: u32x4 = transmute(vcleq_u32(transmute(a), transmute(b))); | |
4011 | assert_eq!(r, e); | |
4012 | } | |
4013 | ||
4014 | #[simd_test(enable = "neon")] | |
4015 | unsafe fn test_vcle_f32() { | |
4016 | let a: f32x2 = f32x2::new(0.1, 1.2); | |
4017 | let b: f32x2 = f32x2::new(1.2, 2.3); | |
4018 | let e: u32x2 = u32x2::new(0xFF_FF_FF_FF, 0xFF_FF_FF_FF); | |
4019 | let r: u32x2 = transmute(vcle_f32(transmute(a), transmute(b))); | |
4020 | assert_eq!(r, e); | |
4021 | } | |
4022 | ||
4023 | #[simd_test(enable = "neon")] | |
4024 | unsafe fn test_vcleq_f32() { | |
4025 | let a: f32x4 = f32x4::new(0.1, 1.2, 2.3, 3.4); | |
4026 | let b: f32x4 = f32x4::new(1.2, 2.3, 3.4, 4.5); | |
4027 | let e: u32x4 = u32x4::new(0xFF_FF_FF_FF, 0xFF_FF_FF_FF, 0xFF_FF_FF_FF, 0xFF_FF_FF_FF); | |
4028 | let r: u32x4 = transmute(vcleq_f32(transmute(a), transmute(b))); | |
4029 | assert_eq!(r, e); | |
4030 | } | |
4031 | ||
4032 | #[simd_test(enable = "neon")] | |
4033 | unsafe fn test_vcge_s8() { | |
4034 | let a: i8x8 = i8x8::new(1, 2, 3, 4, 5, 6, 7, 8); | |
4035 | let b: i8x8 = i8x8::new(0, 1, 2, 3, 4, 5, 6, 7); | |
4036 | let e: u8x8 = u8x8::new(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF); | |
4037 | let r: u8x8 = transmute(vcge_s8(transmute(a), transmute(b))); | |
4038 | assert_eq!(r, e); | |
4039 | } | |
4040 | ||
4041 | #[simd_test(enable = "neon")] | |
4042 | unsafe fn test_vcgeq_s8() { | |
4043 | let a: i8x16 = i8x16::new(1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16); | |
4044 | let b: i8x16 = i8x16::new(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15); | |
4045 | let e: u8x16 = u8x16::new(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF); | |
4046 | let r: u8x16 = transmute(vcgeq_s8(transmute(a), transmute(b))); | |
4047 | assert_eq!(r, e); | |
4048 | } | |
4049 | ||
4050 | #[simd_test(enable = "neon")] | |
4051 | unsafe fn test_vcge_s16() { | |
4052 | let a: i16x4 = i16x4::new(1, 2, 3, 4); | |
4053 | let b: i16x4 = i16x4::new(0, 1, 2, 3); | |
4054 | let e: u16x4 = u16x4::new(0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF); | |
4055 | let r: u16x4 = transmute(vcge_s16(transmute(a), transmute(b))); | |
4056 | assert_eq!(r, e); | |
4057 | } | |
4058 | ||
4059 | #[simd_test(enable = "neon")] | |
4060 | unsafe fn test_vcgeq_s16() { | |
4061 | let a: i16x8 = i16x8::new(1, 2, 3, 4, 5, 6, 7, 8); | |
4062 | let b: i16x8 = i16x8::new(0, 1, 2, 3, 4, 5, 6, 7); | |
4063 | let e: u16x8 = u16x8::new(0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF); | |
4064 | let r: u16x8 = transmute(vcgeq_s16(transmute(a), transmute(b))); | |
4065 | assert_eq!(r, e); | |
4066 | } | |
4067 | ||
4068 | #[simd_test(enable = "neon")] | |
4069 | unsafe fn test_vcge_s32() { | |
4070 | let a: i32x2 = i32x2::new(1, 2); | |
4071 | let b: i32x2 = i32x2::new(0, 1); | |
4072 | let e: u32x2 = u32x2::new(0xFF_FF_FF_FF, 0xFF_FF_FF_FF); | |
4073 | let r: u32x2 = transmute(vcge_s32(transmute(a), transmute(b))); | |
4074 | assert_eq!(r, e); | |
4075 | } | |
4076 | ||
4077 | #[simd_test(enable = "neon")] | |
4078 | unsafe fn test_vcgeq_s32() { | |
4079 | let a: i32x4 = i32x4::new(1, 2, 3, 4); | |
4080 | let b: i32x4 = i32x4::new(0, 1, 2, 3); | |
4081 | let e: u32x4 = u32x4::new(0xFF_FF_FF_FF, 0xFF_FF_FF_FF, 0xFF_FF_FF_FF, 0xFF_FF_FF_FF); | |
4082 | let r: u32x4 = transmute(vcgeq_s32(transmute(a), transmute(b))); | |
4083 | assert_eq!(r, e); | |
4084 | } | |
4085 | ||
4086 | #[simd_test(enable = "neon")] | |
4087 | unsafe fn test_vcge_u8() { | |
4088 | let a: u8x8 = u8x8::new(1, 2, 3, 4, 5, 6, 7, 8); | |
4089 | let b: u8x8 = u8x8::new(0, 1, 2, 3, 4, 5, 6, 7); | |
4090 | let e: u8x8 = u8x8::new(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF); | |
4091 | let r: u8x8 = transmute(vcge_u8(transmute(a), transmute(b))); | |
4092 | assert_eq!(r, e); | |
4093 | } | |
4094 | ||
4095 | #[simd_test(enable = "neon")] | |
4096 | unsafe fn test_vcgeq_u8() { | |
4097 | let a: u8x16 = u8x16::new(1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16); | |
4098 | let b: u8x16 = u8x16::new(0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15); | |
4099 | let e: u8x16 = u8x16::new(0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF); | |
4100 | let r: u8x16 = transmute(vcgeq_u8(transmute(a), transmute(b))); | |
4101 | assert_eq!(r, e); | |
4102 | } | |
4103 | ||
4104 | #[simd_test(enable = "neon")] | |
4105 | unsafe fn test_vcge_u16() { | |
4106 | let a: u16x4 = u16x4::new(1, 2, 3, 4); | |
4107 | let b: u16x4 = u16x4::new(0, 1, 2, 3); | |
4108 | let e: u16x4 = u16x4::new(0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF); | |
4109 | let r: u16x4 = transmute(vcge_u16(transmute(a), transmute(b))); | |
4110 | assert_eq!(r, e); | |
4111 | } | |
4112 | ||
4113 | #[simd_test(enable = "neon")] | |
4114 | unsafe fn test_vcgeq_u16() { | |
4115 | let a: u16x8 = u16x8::new(1, 2, 3, 4, 5, 6, 7, 8); | |
4116 | let b: u16x8 = u16x8::new(0, 1, 2, 3, 4, 5, 6, 7); | |
4117 | let e: u16x8 = u16x8::new(0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF, 0xFF_FF); | |
4118 | let r: u16x8 = transmute(vcgeq_u16(transmute(a), transmute(b))); | |
4119 | assert_eq!(r, e); | |
4120 | } | |
4121 | ||
4122 | #[simd_test(enable = "neon")] | |
4123 | unsafe fn test_vcge_u32() { | |
4124 | let a: u32x2 = u32x2::new(1, 2); | |
4125 | let b: u32x2 = u32x2::new(0, 1); | |
4126 | let e: u32x2 = u32x2::new(0xFF_FF_FF_FF, 0xFF_FF_FF_FF); | |
4127 | let r: u32x2 = transmute(vcge_u32(transmute(a), transmute(b))); | |
4128 | assert_eq!(r, e); | |
4129 | } | |
4130 | ||
4131 | #[simd_test(enable = "neon")] | |
4132 | unsafe fn test_vcgeq_u32() { | |
4133 | let a: u32x4 = u32x4::new(1, 2, 3, 4); | |
4134 | let b: u32x4 = u32x4::new(0, 1, 2, 3); | |
4135 | let e: u32x4 = u32x4::new(0xFF_FF_FF_FF, 0xFF_FF_FF_FF, 0xFF_FF_FF_FF, 0xFF_FF_FF_FF); | |
4136 | let r: u32x4 = transmute(vcgeq_u32(transmute(a), transmute(b))); | |
4137 | assert_eq!(r, e); | |
4138 | } | |
4139 | ||
4140 | #[simd_test(enable = "neon")] | |
4141 | unsafe fn test_vcge_f32() { | |
4142 | let a: f32x2 = f32x2::new(1.2, 2.3); | |
4143 | let b: f32x2 = f32x2::new(0.1, 1.2); | |
4144 | let e: u32x2 = u32x2::new(0xFF_FF_FF_FF, 0xFF_FF_FF_FF); | |
4145 | let r: u32x2 = transmute(vcge_f32(transmute(a), transmute(b))); | |
4146 | assert_eq!(r, e); | |
4147 | } | |
4148 | ||
4149 | #[simd_test(enable = "neon")] | |
4150 | unsafe fn test_vcgeq_f32() { | |
4151 | let a: f32x4 = f32x4::new(1.2, 2.3, 3.4, 4.5); | |
4152 | let b: f32x4 = f32x4::new(0.1, 1.2, 2.3, 3.4); | |
4153 | let e: u32x4 = u32x4::new(0xFF_FF_FF_FF, 0xFF_FF_FF_FF, 0xFF_FF_FF_FF, 0xFF_FF_FF_FF); | |
4154 | let r: u32x4 = transmute(vcgeq_f32(transmute(a), transmute(b))); | |
4155 | assert_eq!(r, e); | |
4156 | } | |
4157 | ||
4158 | #[simd_test(enable = "neon")] | |
4159 | unsafe fn test_vqsub_u8() { | |
4160 | let a: u8x8 = u8x8::new(42, 42, 42, 42, 42, 42, 42, 42); | |
4161 | let b: u8x8 = u8x8::new(1, 2, 3, 4, 5, 6, 7, 8); | |
4162 | let e: u8x8 = u8x8::new(41, 40, 39, 38, 37, 36, 35, 34); | |
4163 | let r: u8x8 = transmute(vqsub_u8(transmute(a), transmute(b))); | |
4164 | assert_eq!(r, e); | |
4165 | } | |
4166 | ||
4167 | #[simd_test(enable = "neon")] | |
4168 | unsafe fn test_vqsubq_u8() { | |
4169 | let a: u8x16 = u8x16::new(42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42); | |
4170 | let b: u8x16 = u8x16::new(1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16); | |
4171 | let e: u8x16 = u8x16::new(41, 40, 39, 38, 37, 36, 35, 34, 33, 32, 31, 30, 29, 28, 27, 26); | |
4172 | let r: u8x16 = transmute(vqsubq_u8(transmute(a), transmute(b))); | |
4173 | assert_eq!(r, e); | |
4174 | } | |
4175 | ||
4176 | #[simd_test(enable = "neon")] | |
4177 | unsafe fn test_vqsub_u16() { | |
4178 | let a: u16x4 = u16x4::new(42, 42, 42, 42); | |
4179 | let b: u16x4 = u16x4::new(1, 2, 3, 4); | |
4180 | let e: u16x4 = u16x4::new(41, 40, 39, 38); | |
4181 | let r: u16x4 = transmute(vqsub_u16(transmute(a), transmute(b))); | |
4182 | assert_eq!(r, e); | |
4183 | } | |
4184 | ||
4185 | #[simd_test(enable = "neon")] | |
4186 | unsafe fn test_vqsubq_u16() { | |
4187 | let a: u16x8 = u16x8::new(42, 42, 42, 42, 42, 42, 42, 42); | |
4188 | let b: u16x8 = u16x8::new(1, 2, 3, 4, 5, 6, 7, 8); | |
4189 | let e: u16x8 = u16x8::new(41, 40, 39, 38, 37, 36, 35, 34); | |
4190 | let r: u16x8 = transmute(vqsubq_u16(transmute(a), transmute(b))); | |
4191 | assert_eq!(r, e); | |
4192 | } | |
4193 | ||
4194 | #[simd_test(enable = "neon")] | |
4195 | unsafe fn test_vqsub_u32() { | |
4196 | let a: u32x2 = u32x2::new(42, 42); | |
4197 | let b: u32x2 = u32x2::new(1, 2); | |
4198 | let e: u32x2 = u32x2::new(41, 40); | |
4199 | let r: u32x2 = transmute(vqsub_u32(transmute(a), transmute(b))); | |
4200 | assert_eq!(r, e); | |
4201 | } | |
4202 | ||
4203 | #[simd_test(enable = "neon")] | |
4204 | unsafe fn test_vqsubq_u32() { | |
4205 | let a: u32x4 = u32x4::new(42, 42, 42, 42); | |
4206 | let b: u32x4 = u32x4::new(1, 2, 3, 4); | |
4207 | let e: u32x4 = u32x4::new(41, 40, 39, 38); | |
4208 | let r: u32x4 = transmute(vqsubq_u32(transmute(a), transmute(b))); | |
4209 | assert_eq!(r, e); | |
4210 | } | |
4211 | ||
4212 | #[simd_test(enable = "neon")] | |
4213 | unsafe fn test_vqsub_s8() { | |
4214 | let a: i8x8 = i8x8::new(42, 42, 42, 42, 42, 42, 42, 42); | |
4215 | let b: i8x8 = i8x8::new(1, 2, 3, 4, 5, 6, 7, 8); | |
4216 | let e: i8x8 = i8x8::new(41, 40, 39, 38, 37, 36, 35, 34); | |
4217 | let r: i8x8 = transmute(vqsub_s8(transmute(a), transmute(b))); | |
4218 | assert_eq!(r, e); | |
4219 | } | |
4220 | ||
4221 | #[simd_test(enable = "neon")] | |
4222 | unsafe fn test_vqsubq_s8() { | |
4223 | let a: i8x16 = i8x16::new(42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42); | |
4224 | let b: i8x16 = i8x16::new(1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16); | |
4225 | let e: i8x16 = i8x16::new(41, 40, 39, 38, 37, 36, 35, 34, 33, 32, 31, 30, 29, 28, 27, 26); | |
4226 | let r: i8x16 = transmute(vqsubq_s8(transmute(a), transmute(b))); | |
4227 | assert_eq!(r, e); | |
4228 | } | |
4229 | ||
4230 | #[simd_test(enable = "neon")] | |
4231 | unsafe fn test_vqsub_s16() { | |
4232 | let a: i16x4 = i16x4::new(42, 42, 42, 42); | |
4233 | let b: i16x4 = i16x4::new(1, 2, 3, 4); | |
4234 | let e: i16x4 = i16x4::new(41, 40, 39, 38); | |
4235 | let r: i16x4 = transmute(vqsub_s16(transmute(a), transmute(b))); | |
4236 | assert_eq!(r, e); | |
4237 | } | |
4238 | ||
4239 | #[simd_test(enable = "neon")] | |
4240 | unsafe fn test_vqsubq_s16() { | |
4241 | let a: i16x8 = i16x8::new(42, 42, 42, 42, 42, 42, 42, 42); | |
4242 | let b: i16x8 = i16x8::new(1, 2, 3, 4, 5, 6, 7, 8); | |
4243 | let e: i16x8 = i16x8::new(41, 40, 39, 38, 37, 36, 35, 34); | |
4244 | let r: i16x8 = transmute(vqsubq_s16(transmute(a), transmute(b))); | |
4245 | assert_eq!(r, e); | |
4246 | } | |
4247 | ||
4248 | #[simd_test(enable = "neon")] | |
4249 | unsafe fn test_vqsub_s32() { | |
4250 | let a: i32x2 = i32x2::new(42, 42); | |
4251 | let b: i32x2 = i32x2::new(1, 2); | |
4252 | let e: i32x2 = i32x2::new(41, 40); | |
4253 | let r: i32x2 = transmute(vqsub_s32(transmute(a), transmute(b))); | |
4254 | assert_eq!(r, e); | |
4255 | } | |
4256 | ||
4257 | #[simd_test(enable = "neon")] | |
4258 | unsafe fn test_vqsubq_s32() { | |
4259 | let a: i32x4 = i32x4::new(42, 42, 42, 42); | |
4260 | let b: i32x4 = i32x4::new(1, 2, 3, 4); | |
4261 | let e: i32x4 = i32x4::new(41, 40, 39, 38); | |
4262 | let r: i32x4 = transmute(vqsubq_s32(transmute(a), transmute(b))); | |
4263 | assert_eq!(r, e); | |
4264 | } | |
4265 | ||
4266 | #[simd_test(enable = "neon")] | |
4267 | unsafe fn test_vhadd_u8() { | |
4268 | let a: u8x8 = u8x8::new(42, 42, 42, 42, 42, 42, 42, 42); | |
4269 | let b: u8x8 = u8x8::new(1, 2, 3, 4, 5, 6, 7, 8); | |
4270 | let e: u8x8 = u8x8::new(21, 22, 22, 23, 23, 24, 24, 25); | |
4271 | let r: u8x8 = transmute(vhadd_u8(transmute(a), transmute(b))); | |
4272 | assert_eq!(r, e); | |
4273 | } | |
4274 | ||
4275 | #[simd_test(enable = "neon")] | |
4276 | unsafe fn test_vhaddq_u8() { | |
4277 | let a: u8x16 = u8x16::new(42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42); | |
4278 | let b: u8x16 = u8x16::new(1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16); | |
4279 | let e: u8x16 = u8x16::new(21, 22, 22, 23, 23, 24, 24, 25, 25, 26, 26, 27, 27, 28, 28, 29); | |
4280 | let r: u8x16 = transmute(vhaddq_u8(transmute(a), transmute(b))); | |
4281 | assert_eq!(r, e); | |
4282 | } | |
4283 | ||
4284 | #[simd_test(enable = "neon")] | |
4285 | unsafe fn test_vhadd_u16() { | |
4286 | let a: u16x4 = u16x4::new(42, 42, 42, 42); | |
4287 | let b: u16x4 = u16x4::new(1, 2, 3, 4); | |
4288 | let e: u16x4 = u16x4::new(21, 22, 22, 23); | |
4289 | let r: u16x4 = transmute(vhadd_u16(transmute(a), transmute(b))); | |
4290 | assert_eq!(r, e); | |
4291 | } | |
4292 | ||
4293 | #[simd_test(enable = "neon")] | |
4294 | unsafe fn test_vhaddq_u16() { | |
4295 | let a: u16x8 = u16x8::new(42, 42, 42, 42, 42, 42, 42, 42); | |
4296 | let b: u16x8 = u16x8::new(1, 2, 3, 4, 5, 6, 7, 8); | |
4297 | let e: u16x8 = u16x8::new(21, 22, 22, 23, 23, 24, 24, 25); | |
4298 | let r: u16x8 = transmute(vhaddq_u16(transmute(a), transmute(b))); | |
4299 | assert_eq!(r, e); | |
4300 | } | |
4301 | ||
4302 | #[simd_test(enable = "neon")] | |
4303 | unsafe fn test_vhadd_u32() { | |
4304 | let a: u32x2 = u32x2::new(42, 42); | |
4305 | let b: u32x2 = u32x2::new(1, 2); | |
4306 | let e: u32x2 = u32x2::new(21, 22); | |
4307 | let r: u32x2 = transmute(vhadd_u32(transmute(a), transmute(b))); | |
4308 | assert_eq!(r, e); | |
4309 | } | |
4310 | ||
4311 | #[simd_test(enable = "neon")] | |
4312 | unsafe fn test_vhaddq_u32() { | |
4313 | let a: u32x4 = u32x4::new(42, 42, 42, 42); | |
4314 | let b: u32x4 = u32x4::new(1, 2, 3, 4); | |
4315 | let e: u32x4 = u32x4::new(21, 22, 22, 23); | |
4316 | let r: u32x4 = transmute(vhaddq_u32(transmute(a), transmute(b))); | |
4317 | assert_eq!(r, e); | |
4318 | } | |
4319 | ||
4320 | #[simd_test(enable = "neon")] | |
4321 | unsafe fn test_vhadd_s8() { | |
4322 | let a: i8x8 = i8x8::new(42, 42, 42, 42, 42, 42, 42, 42); | |
4323 | let b: i8x8 = i8x8::new(1, 2, 3, 4, 5, 6, 7, 8); | |
4324 | let e: i8x8 = i8x8::new(21, 22, 22, 23, 23, 24, 24, 25); | |
4325 | let r: i8x8 = transmute(vhadd_s8(transmute(a), transmute(b))); | |
4326 | assert_eq!(r, e); | |
4327 | } | |
4328 | ||
4329 | #[simd_test(enable = "neon")] | |
4330 | unsafe fn test_vhaddq_s8() { | |
4331 | let a: i8x16 = i8x16::new(42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42); | |
4332 | let b: i8x16 = i8x16::new(1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16); | |
4333 | let e: i8x16 = i8x16::new(21, 22, 22, 23, 23, 24, 24, 25, 25, 26, 26, 27, 27, 28, 28, 29); | |
4334 | let r: i8x16 = transmute(vhaddq_s8(transmute(a), transmute(b))); | |
4335 | assert_eq!(r, e); | |
4336 | } | |
4337 | ||
4338 | #[simd_test(enable = "neon")] | |
4339 | unsafe fn test_vhadd_s16() { | |
4340 | let a: i16x4 = i16x4::new(42, 42, 42, 42); | |
4341 | let b: i16x4 = i16x4::new(1, 2, 3, 4); | |
4342 | let e: i16x4 = i16x4::new(21, 22, 22, 23); | |
4343 | let r: i16x4 = transmute(vhadd_s16(transmute(a), transmute(b))); | |
4344 | assert_eq!(r, e); | |
4345 | } | |
4346 | ||
4347 | #[simd_test(enable = "neon")] | |
4348 | unsafe fn test_vhaddq_s16() { | |
4349 | let a: i16x8 = i16x8::new(42, 42, 42, 42, 42, 42, 42, 42); | |
4350 | let b: i16x8 = i16x8::new(1, 2, 3, 4, 5, 6, 7, 8); | |
4351 | let e: i16x8 = i16x8::new(21, 22, 22, 23, 23, 24, 24, 25); | |
4352 | let r: i16x8 = transmute(vhaddq_s16(transmute(a), transmute(b))); | |
4353 | assert_eq!(r, e); | |
4354 | } | |
4355 | ||
4356 | #[simd_test(enable = "neon")] | |
4357 | unsafe fn test_vhadd_s32() { | |
4358 | let a: i32x2 = i32x2::new(42, 42); | |
4359 | let b: i32x2 = i32x2::new(1, 2); | |
4360 | let e: i32x2 = i32x2::new(21, 22); | |
4361 | let r: i32x2 = transmute(vhadd_s32(transmute(a), transmute(b))); | |
4362 | assert_eq!(r, e); | |
4363 | } | |
4364 | ||
4365 | #[simd_test(enable = "neon")] | |
4366 | unsafe fn test_vhaddq_s32() { | |
4367 | let a: i32x4 = i32x4::new(42, 42, 42, 42); | |
4368 | let b: i32x4 = i32x4::new(1, 2, 3, 4); | |
4369 | let e: i32x4 = i32x4::new(21, 22, 22, 23); | |
4370 | let r: i32x4 = transmute(vhaddq_s32(transmute(a), transmute(b))); | |
4371 | assert_eq!(r, e); | |
4372 | } | |
4373 | ||
4374 | #[simd_test(enable = "neon")] | |
4375 | unsafe fn test_vrhadd_u8() { | |
4376 | let a: u8x8 = u8x8::new(42, 42, 42, 42, 42, 42, 42, 42); | |
4377 | let b: u8x8 = u8x8::new(1, 2, 3, 4, 5, 6, 7, 8); | |
4378 | let e: u8x8 = u8x8::new(22, 22, 23, 23, 24, 24, 25, 25); | |
4379 | let r: u8x8 = transmute(vrhadd_u8(transmute(a), transmute(b))); | |
4380 | assert_eq!(r, e); | |
4381 | } | |
4382 | ||
4383 | #[simd_test(enable = "neon")] | |
4384 | unsafe fn test_vrhaddq_u8() { | |
4385 | let a: u8x16 = u8x16::new(42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42); | |
4386 | let b: u8x16 = u8x16::new(1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16); | |
4387 | let e: u8x16 = u8x16::new(22, 22, 23, 23, 24, 24, 25, 25, 26, 26, 27, 27, 28, 28, 29, 29); | |
4388 | let r: u8x16 = transmute(vrhaddq_u8(transmute(a), transmute(b))); | |
4389 | assert_eq!(r, e); | |
4390 | } | |
4391 | ||
4392 | #[simd_test(enable = "neon")] | |
4393 | unsafe fn test_vrhadd_u16() { | |
4394 | let a: u16x4 = u16x4::new(42, 42, 42, 42); | |
4395 | let b: u16x4 = u16x4::new(1, 2, 3, 4); | |
4396 | let e: u16x4 = u16x4::new(22, 22, 23, 23); | |
4397 | let r: u16x4 = transmute(vrhadd_u16(transmute(a), transmute(b))); | |
4398 | assert_eq!(r, e); | |
4399 | } | |
4400 | ||
4401 | #[simd_test(enable = "neon")] | |
4402 | unsafe fn test_vrhaddq_u16() { | |
4403 | let a: u16x8 = u16x8::new(42, 42, 42, 42, 42, 42, 42, 42); | |
4404 | let b: u16x8 = u16x8::new(1, 2, 3, 4, 5, 6, 7, 8); | |
4405 | let e: u16x8 = u16x8::new(22, 22, 23, 23, 24, 24, 25, 25); | |
4406 | let r: u16x8 = transmute(vrhaddq_u16(transmute(a), transmute(b))); | |
4407 | assert_eq!(r, e); | |
4408 | } | |
4409 | ||
4410 | #[simd_test(enable = "neon")] | |
4411 | unsafe fn test_vrhadd_u32() { | |
4412 | let a: u32x2 = u32x2::new(42, 42); | |
4413 | let b: u32x2 = u32x2::new(1, 2); | |
4414 | let e: u32x2 = u32x2::new(22, 22); | |
4415 | let r: u32x2 = transmute(vrhadd_u32(transmute(a), transmute(b))); | |
4416 | assert_eq!(r, e); | |
4417 | } | |
4418 | ||
4419 | #[simd_test(enable = "neon")] | |
4420 | unsafe fn test_vrhaddq_u32() { | |
4421 | let a: u32x4 = u32x4::new(42, 42, 42, 42); | |
4422 | let b: u32x4 = u32x4::new(1, 2, 3, 4); | |
4423 | let e: u32x4 = u32x4::new(22, 22, 23, 23); | |
4424 | let r: u32x4 = transmute(vrhaddq_u32(transmute(a), transmute(b))); | |
4425 | assert_eq!(r, e); | |
4426 | } | |
4427 | ||
4428 | #[simd_test(enable = "neon")] | |
4429 | unsafe fn test_vrhadd_s8() { | |
4430 | let a: i8x8 = i8x8::new(42, 42, 42, 42, 42, 42, 42, 42); | |
4431 | let b: i8x8 = i8x8::new(1, 2, 3, 4, 5, 6, 7, 8); | |
4432 | let e: i8x8 = i8x8::new(22, 22, 23, 23, 24, 24, 25, 25); | |
4433 | let r: i8x8 = transmute(vrhadd_s8(transmute(a), transmute(b))); | |
4434 | assert_eq!(r, e); | |
4435 | } | |
4436 | ||
4437 | #[simd_test(enable = "neon")] | |
4438 | unsafe fn test_vrhaddq_s8() { | |
4439 | let a: i8x16 = i8x16::new(42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42); | |
4440 | let b: i8x16 = i8x16::new(1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16); | |
4441 | let e: i8x16 = i8x16::new(22, 22, 23, 23, 24, 24, 25, 25, 26, 26, 27, 27, 28, 28, 29, 29); | |
4442 | let r: i8x16 = transmute(vrhaddq_s8(transmute(a), transmute(b))); | |
4443 | assert_eq!(r, e); | |
4444 | } | |
4445 | ||
4446 | #[simd_test(enable = "neon")] | |
4447 | unsafe fn test_vrhadd_s16() { | |
4448 | let a: i16x4 = i16x4::new(42, 42, 42, 42); | |
4449 | let b: i16x4 = i16x4::new(1, 2, 3, 4); | |
4450 | let e: i16x4 = i16x4::new(22, 22, 23, 23); | |
4451 | let r: i16x4 = transmute(vrhadd_s16(transmute(a), transmute(b))); | |
4452 | assert_eq!(r, e); | |
4453 | } | |
4454 | ||
4455 | #[simd_test(enable = "neon")] | |
4456 | unsafe fn test_vrhaddq_s16() { | |
4457 | let a: i16x8 = i16x8::new(42, 42, 42, 42, 42, 42, 42, 42); | |
4458 | let b: i16x8 = i16x8::new(1, 2, 3, 4, 5, 6, 7, 8); | |
4459 | let e: i16x8 = i16x8::new(22, 22, 23, 23, 24, 24, 25, 25); | |
4460 | let r: i16x8 = transmute(vrhaddq_s16(transmute(a), transmute(b))); | |
4461 | assert_eq!(r, e); | |
4462 | } | |
4463 | ||
4464 | #[simd_test(enable = "neon")] | |
4465 | unsafe fn test_vrhadd_s32() { | |
4466 | let a: i32x2 = i32x2::new(42, 42); | |
4467 | let b: i32x2 = i32x2::new(1, 2); | |
4468 | let e: i32x2 = i32x2::new(22, 22); | |
4469 | let r: i32x2 = transmute(vrhadd_s32(transmute(a), transmute(b))); | |
4470 | assert_eq!(r, e); | |
4471 | } | |
4472 | ||
4473 | #[simd_test(enable = "neon")] | |
4474 | unsafe fn test_vrhaddq_s32() { | |
4475 | let a: i32x4 = i32x4::new(42, 42, 42, 42); | |
4476 | let b: i32x4 = i32x4::new(1, 2, 3, 4); | |
4477 | let e: i32x4 = i32x4::new(22, 22, 23, 23); | |
4478 | let r: i32x4 = transmute(vrhaddq_s32(transmute(a), transmute(b))); | |
4479 | assert_eq!(r, e); | |
4480 | } | |
4481 | ||
4482 | #[simd_test(enable = "neon")] | |
4483 | unsafe fn test_vqadd_u8() { | |
4484 | let a: u8x8 = u8x8::new(42, 42, 42, 42, 42, 42, 42, 42); | |
4485 | let b: u8x8 = u8x8::new(1, 2, 3, 4, 5, 6, 7, 8); | |
4486 | let e: u8x8 = u8x8::new(43, 44, 45, 46, 47, 48, 49, 50); | |
4487 | let r: u8x8 = transmute(vqadd_u8(transmute(a), transmute(b))); | |
4488 | assert_eq!(r, e); | |
4489 | } | |
4490 | ||
4491 | #[simd_test(enable = "neon")] | |
4492 | unsafe fn test_vqaddq_u8() { | |
4493 | let a: u8x16 = u8x16::new(42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42); | |
4494 | let b: u8x16 = u8x16::new(1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16); | |
4495 | let e: u8x16 = u8x16::new(43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58); | |
4496 | let r: u8x16 = transmute(vqaddq_u8(transmute(a), transmute(b))); | |
4497 | assert_eq!(r, e); | |
4498 | } | |
4499 | ||
4500 | #[simd_test(enable = "neon")] | |
4501 | unsafe fn test_vqadd_u16() { | |
4502 | let a: u16x4 = u16x4::new(42, 42, 42, 42); | |
4503 | let b: u16x4 = u16x4::new(1, 2, 3, 4); | |
4504 | let e: u16x4 = u16x4::new(43, 44, 45, 46); | |
4505 | let r: u16x4 = transmute(vqadd_u16(transmute(a), transmute(b))); | |
4506 | assert_eq!(r, e); | |
4507 | } | |
4508 | ||
4509 | #[simd_test(enable = "neon")] | |
4510 | unsafe fn test_vqaddq_u16() { | |
4511 | let a: u16x8 = u16x8::new(42, 42, 42, 42, 42, 42, 42, 42); | |
4512 | let b: u16x8 = u16x8::new(1, 2, 3, 4, 5, 6, 7, 8); | |
4513 | let e: u16x8 = u16x8::new(43, 44, 45, 46, 47, 48, 49, 50); | |
4514 | let r: u16x8 = transmute(vqaddq_u16(transmute(a), transmute(b))); | |
4515 | assert_eq!(r, e); | |
4516 | } | |
4517 | ||
4518 | #[simd_test(enable = "neon")] | |
4519 | unsafe fn test_vqadd_u32() { | |
4520 | let a: u32x2 = u32x2::new(42, 42); | |
4521 | let b: u32x2 = u32x2::new(1, 2); | |
4522 | let e: u32x2 = u32x2::new(43, 44); | |
4523 | let r: u32x2 = transmute(vqadd_u32(transmute(a), transmute(b))); | |
4524 | assert_eq!(r, e); | |
4525 | } | |
4526 | ||
4527 | #[simd_test(enable = "neon")] | |
4528 | unsafe fn test_vqaddq_u32() { | |
4529 | let a: u32x4 = u32x4::new(42, 42, 42, 42); | |
4530 | let b: u32x4 = u32x4::new(1, 2, 3, 4); | |
4531 | let e: u32x4 = u32x4::new(43, 44, 45, 46); | |
4532 | let r: u32x4 = transmute(vqaddq_u32(transmute(a), transmute(b))); | |
4533 | assert_eq!(r, e); | |
4534 | } | |
4535 | ||
4536 | #[simd_test(enable = "neon")] | |
4537 | unsafe fn test_vqadd_s8() { | |
4538 | let a: i8x8 = i8x8::new(42, 42, 42, 42, 42, 42, 42, 42); | |
4539 | let b: i8x8 = i8x8::new(1, 2, 3, 4, 5, 6, 7, 8); | |
4540 | let e: i8x8 = i8x8::new(43, 44, 45, 46, 47, 48, 49, 50); | |
4541 | let r: i8x8 = transmute(vqadd_s8(transmute(a), transmute(b))); | |
4542 | assert_eq!(r, e); | |
4543 | } | |
4544 | ||
4545 | #[simd_test(enable = "neon")] | |
4546 | unsafe fn test_vqaddq_s8() { | |
4547 | let a: i8x16 = i8x16::new(42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42, 42); | |
4548 | let b: i8x16 = i8x16::new(1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16); | |
4549 | let e: i8x16 = i8x16::new(43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58); | |
4550 | let r: i8x16 = transmute(vqaddq_s8(transmute(a), transmute(b))); | |
4551 | assert_eq!(r, e); | |
4552 | } | |
4553 | ||
4554 | #[simd_test(enable = "neon")] | |
4555 | unsafe fn test_vqadd_s16() { | |
4556 | let a: i16x4 = i16x4::new(42, 42, 42, 42); | |
4557 | let b: i16x4 = i16x4::new(1, 2, 3, 4); | |
4558 | let e: i16x4 = i16x4::new(43, 44, 45, 46); | |
4559 | let r: i16x4 = transmute(vqadd_s16(transmute(a), transmute(b))); | |
4560 | assert_eq!(r, e); | |
4561 | } | |
4562 | ||
4563 | #[simd_test(enable = "neon")] | |
4564 | unsafe fn test_vqaddq_s16() { | |
4565 | let a: i16x8 = i16x8::new(42, 42, 42, 42, 42, 42, 42, 42); | |
4566 | let b: i16x8 = i16x8::new(1, 2, 3, 4, 5, 6, 7, 8); | |
4567 | let e: i16x8 = i16x8::new(43, 44, 45, 46, 47, 48, 49, 50); | |
4568 | let r: i16x8 = transmute(vqaddq_s16(transmute(a), transmute(b))); | |
4569 | assert_eq!(r, e); | |
4570 | } | |
4571 | ||
4572 | #[simd_test(enable = "neon")] | |
4573 | unsafe fn test_vqadd_s32() { | |
4574 | let a: i32x2 = i32x2::new(42, 42); | |
4575 | let b: i32x2 = i32x2::new(1, 2); | |
4576 | let e: i32x2 = i32x2::new(43, 44); | |
4577 | let r: i32x2 = transmute(vqadd_s32(transmute(a), transmute(b))); | |
4578 | assert_eq!(r, e); | |
4579 | } | |
4580 | ||
4581 | #[simd_test(enable = "neon")] | |
4582 | unsafe fn test_vqaddq_s32() { | |
4583 | let a: i32x4 = i32x4::new(42, 42, 42, 42); | |
4584 | let b: i32x4 = i32x4::new(1, 2, 3, 4); | |
4585 | let e: i32x4 = i32x4::new(43, 44, 45, 46); | |
4586 | let r: i32x4 = transmute(vqaddq_s32(transmute(a), transmute(b))); | |
4587 | assert_eq!(r, e); | |
4588 | } | |
4589 | ||
4590 | #[simd_test(enable = "neon")] | |
4591 | unsafe fn test_vmul_s8() { | |
4592 | let a: i8x8 = i8x8::new(1, 2, 1, 2, 1, 2, 1, 2); | |
4593 | let b: i8x8 = i8x8::new(1, 2, 3, 4, 5, 6, 7, 8); | |
4594 | let e: i8x8 = i8x8::new(1, 4, 3, 8, 5, 12, 7, 16); | |
4595 | let r: i8x8 = transmute(vmul_s8(transmute(a), transmute(b))); | |
4596 | assert_eq!(r, e); | |
4597 | } | |
4598 | ||
4599 | #[simd_test(enable = "neon")] | |
4600 | unsafe fn test_vmulq_s8() { | |
4601 | let a: i8x16 = i8x16::new(1, 2, 1, 2, 1, 2, 1, 2, 1, 2, 1, 2, 1, 2, 1, 2); | |
4602 | let b: i8x16 = i8x16::new(1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16); | |
4603 | let e: i8x16 = i8x16::new(1, 4, 3, 8, 5, 12, 7, 16, 9, 20, 11, 24, 13, 28, 15, 32); | |
4604 | let r: i8x16 = transmute(vmulq_s8(transmute(a), transmute(b))); | |
4605 | assert_eq!(r, e); | |
4606 | } | |
4607 | ||
4608 | #[simd_test(enable = "neon")] | |
4609 | unsafe fn test_vmul_s16() { | |
4610 | let a: i16x4 = i16x4::new(1, 2, 1, 2); | |
4611 | let b: i16x4 = i16x4::new(1, 2, 3, 4); | |
4612 | let e: i16x4 = i16x4::new(1, 4, 3, 8); | |
4613 | let r: i16x4 = transmute(vmul_s16(transmute(a), transmute(b))); | |
4614 | assert_eq!(r, e); | |
4615 | } | |
4616 | ||
4617 | #[simd_test(enable = "neon")] | |
4618 | unsafe fn test_vmulq_s16() { | |
4619 | let a: i16x8 = i16x8::new(1, 2, 1, 2, 1, 2, 1, 2); | |
4620 | let b: i16x8 = i16x8::new(1, 2, 3, 4, 5, 6, 7, 8); | |
4621 | let e: i16x8 = i16x8::new(1, 4, 3, 8, 5, 12, 7, 16); | |
4622 | let r: i16x8 = transmute(vmulq_s16(transmute(a), transmute(b))); | |
4623 | assert_eq!(r, e); | |
4624 | } | |
4625 | ||
4626 | #[simd_test(enable = "neon")] | |
4627 | unsafe fn test_vmul_s32() { | |
4628 | let a: i32x2 = i32x2::new(1, 2); | |
4629 | let b: i32x2 = i32x2::new(1, 2); | |
4630 | let e: i32x2 = i32x2::new(1, 4); | |
4631 | let r: i32x2 = transmute(vmul_s32(transmute(a), transmute(b))); | |
4632 | assert_eq!(r, e); | |
4633 | } | |
4634 | ||
4635 | #[simd_test(enable = "neon")] | |
4636 | unsafe fn test_vmulq_s32() { | |
4637 | let a: i32x4 = i32x4::new(1, 2, 1, 2); | |
4638 | let b: i32x4 = i32x4::new(1, 2, 3, 4); | |
4639 | let e: i32x4 = i32x4::new(1, 4, 3, 8); | |
4640 | let r: i32x4 = transmute(vmulq_s32(transmute(a), transmute(b))); | |
4641 | assert_eq!(r, e); | |
4642 | } | |
4643 | ||
4644 | #[simd_test(enable = "neon")] | |
4645 | unsafe fn test_vmul_u8() { | |
4646 | let a: u8x8 = u8x8::new(1, 2, 1, 2, 1, 2, 1, 2); | |
4647 | let b: u8x8 = u8x8::new(1, 2, 3, 4, 5, 6, 7, 8); | |
4648 | let e: u8x8 = u8x8::new(1, 4, 3, 8, 5, 12, 7, 16); | |
4649 | let r: u8x8 = transmute(vmul_u8(transmute(a), transmute(b))); | |
4650 | assert_eq!(r, e); | |
4651 | } | |
4652 | ||
4653 | #[simd_test(enable = "neon")] | |
4654 | unsafe fn test_vmulq_u8() { | |
4655 | let a: u8x16 = u8x16::new(1, 2, 1, 2, 1, 2, 1, 2, 1, 2, 1, 2, 1, 2, 1, 2); | |
4656 | let b: u8x16 = u8x16::new(1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16); | |
4657 | let e: u8x16 = u8x16::new(1, 4, 3, 8, 5, 12, 7, 16, 9, 20, 11, 24, 13, 28, 15, 32); | |
4658 | let r: u8x16 = transmute(vmulq_u8(transmute(a), transmute(b))); | |
4659 | assert_eq!(r, e); | |
4660 | } | |
4661 | ||
4662 | #[simd_test(enable = "neon")] | |
4663 | unsafe fn test_vmul_u16() { | |
4664 | let a: u16x4 = u16x4::new(1, 2, 1, 2); | |
4665 | let b: u16x4 = u16x4::new(1, 2, 3, 4); | |
4666 | let e: u16x4 = u16x4::new(1, 4, 3, 8); | |
4667 | let r: u16x4 = transmute(vmul_u16(transmute(a), transmute(b))); | |
4668 | assert_eq!(r, e); | |
4669 | } | |
4670 | ||
4671 | #[simd_test(enable = "neon")] | |
4672 | unsafe fn test_vmulq_u16() { | |
4673 | let a: u16x8 = u16x8::new(1, 2, 1, 2, 1, 2, 1, 2); | |
4674 | let b: u16x8 = u16x8::new(1, 2, 3, 4, 5, 6, 7, 8); | |
4675 | let e: u16x8 = u16x8::new(1, 4, 3, 8, 5, 12, 7, 16); | |
4676 | let r: u16x8 = transmute(vmulq_u16(transmute(a), transmute(b))); | |
4677 | assert_eq!(r, e); | |
4678 | } | |
4679 | ||
4680 | #[simd_test(enable = "neon")] | |
4681 | unsafe fn test_vmul_u32() { | |
4682 | let a: u32x2 = u32x2::new(1, 2); | |
4683 | let b: u32x2 = u32x2::new(1, 2); | |
4684 | let e: u32x2 = u32x2::new(1, 4); | |
4685 | let r: u32x2 = transmute(vmul_u32(transmute(a), transmute(b))); | |
4686 | assert_eq!(r, e); | |
4687 | } | |
4688 | ||
4689 | #[simd_test(enable = "neon")] | |
4690 | unsafe fn test_vmulq_u32() { | |
4691 | let a: u32x4 = u32x4::new(1, 2, 1, 2); | |
4692 | let b: u32x4 = u32x4::new(1, 2, 3, 4); | |
4693 | let e: u32x4 = u32x4::new(1, 4, 3, 8); | |
4694 | let r: u32x4 = transmute(vmulq_u32(transmute(a), transmute(b))); | |
4695 | assert_eq!(r, e); | |
4696 | } | |
4697 | ||
4698 | #[simd_test(enable = "neon")] | |
4699 | unsafe fn test_vmul_f32() { | |
4700 | let a: f32x2 = f32x2::new(1.0, 2.0); | |
4701 | let b: f32x2 = f32x2::new(2.0, 3.0); | |
4702 | let e: f32x2 = f32x2::new(2.0, 6.0); | |
4703 | let r: f32x2 = transmute(vmul_f32(transmute(a), transmute(b))); | |
4704 | assert_eq!(r, e); | |
4705 | } | |
4706 | ||
4707 | #[simd_test(enable = "neon")] | |
4708 | unsafe fn test_vmulq_f32() { | |
4709 | let a: f32x4 = f32x4::new(1.0, 2.0, 1.0, 2.0); | |
4710 | let b: f32x4 = f32x4::new(2.0, 3.0, 4.0, 5.0); | |
4711 | let e: f32x4 = f32x4::new(2.0, 6.0, 4.0, 10.0); | |
4712 | let r: f32x4 = transmute(vmulq_f32(transmute(a), transmute(b))); | |
4713 | assert_eq!(r, e); | |
4714 | } | |
4715 | ||
4716 | #[simd_test(enable = "neon")] | |
4717 | unsafe fn test_vsub_s8() { | |
4718 | let a: i8x8 = i8x8::new(1, 2, 3, 4, 5, 6, 7, 8); | |
4719 | let b: i8x8 = i8x8::new(1, 2, 1, 2, 1, 2, 1, 2); | |
4720 | let e: i8x8 = i8x8::new(0, 0, 2, 2, 4, 4, 6, 6); | |
4721 | let r: i8x8 = transmute(vsub_s8(transmute(a), transmute(b))); | |
4722 | assert_eq!(r, e); | |
4723 | } | |
4724 | ||
4725 | #[simd_test(enable = "neon")] | |
4726 | unsafe fn test_vsubq_s8() { | |
4727 | let a: i8x16 = i8x16::new(1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16); | |
4728 | let b: i8x16 = i8x16::new(1, 2, 1, 2, 1, 2, 1, 2, 1, 2, 1, 2, 1, 2, 1, 2); | |
4729 | let e: i8x16 = i8x16::new(0, 0, 2, 2, 4, 4, 6, 6, 8, 8, 10, 10, 12, 12, 14, 14); | |
4730 | let r: i8x16 = transmute(vsubq_s8(transmute(a), transmute(b))); | |
4731 | assert_eq!(r, e); | |
4732 | } | |
4733 | ||
4734 | #[simd_test(enable = "neon")] | |
4735 | unsafe fn test_vsub_s16() { | |
4736 | let a: i16x4 = i16x4::new(1, 2, 3, 4); | |
4737 | let b: i16x4 = i16x4::new(1, 2, 1, 2); | |
4738 | let e: i16x4 = i16x4::new(0, 0, 2, 2); | |
4739 | let r: i16x4 = transmute(vsub_s16(transmute(a), transmute(b))); | |
4740 | assert_eq!(r, e); | |
4741 | } | |
4742 | ||
4743 | #[simd_test(enable = "neon")] | |
4744 | unsafe fn test_vsubq_s16() { | |
4745 | let a: i16x8 = i16x8::new(1, 2, 3, 4, 5, 6, 7, 8); | |
4746 | let b: i16x8 = i16x8::new(1, 2, 1, 2, 1, 2, 1, 2); | |
4747 | let e: i16x8 = i16x8::new(0, 0, 2, 2, 4, 4, 6, 6); | |
4748 | let r: i16x8 = transmute(vsubq_s16(transmute(a), transmute(b))); | |
4749 | assert_eq!(r, e); | |
4750 | } | |
4751 | ||
4752 | #[simd_test(enable = "neon")] | |
4753 | unsafe fn test_vsub_s32() { | |
4754 | let a: i32x2 = i32x2::new(1, 2); | |
4755 | let b: i32x2 = i32x2::new(1, 2); | |
4756 | let e: i32x2 = i32x2::new(0, 0); | |
4757 | let r: i32x2 = transmute(vsub_s32(transmute(a), transmute(b))); | |
4758 | assert_eq!(r, e); | |
4759 | } | |
4760 | ||
4761 | #[simd_test(enable = "neon")] | |
4762 | unsafe fn test_vsubq_s32() { | |
4763 | let a: i32x4 = i32x4::new(1, 2, 3, 4); | |
4764 | let b: i32x4 = i32x4::new(1, 2, 1, 2); | |
4765 | let e: i32x4 = i32x4::new(0, 0, 2, 2); | |
4766 | let r: i32x4 = transmute(vsubq_s32(transmute(a), transmute(b))); | |
4767 | assert_eq!(r, e); | |
4768 | } | |
4769 | ||
4770 | #[simd_test(enable = "neon")] | |
4771 | unsafe fn test_vsub_u8() { | |
4772 | let a: u8x8 = u8x8::new(1, 2, 3, 4, 5, 6, 7, 8); | |
4773 | let b: u8x8 = u8x8::new(1, 2, 1, 2, 1, 2, 1, 2); | |
4774 | let e: u8x8 = u8x8::new(0, 0, 2, 2, 4, 4, 6, 6); | |
4775 | let r: u8x8 = transmute(vsub_u8(transmute(a), transmute(b))); | |
4776 | assert_eq!(r, e); | |
4777 | } | |
4778 | ||
4779 | #[simd_test(enable = "neon")] | |
4780 | unsafe fn test_vsubq_u8() { | |
4781 | let a: u8x16 = u8x16::new(1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16); | |
4782 | let b: u8x16 = u8x16::new(1, 2, 1, 2, 1, 2, 1, 2, 1, 2, 1, 2, 1, 2, 1, 2); | |
4783 | let e: u8x16 = u8x16::new(0, 0, 2, 2, 4, 4, 6, 6, 8, 8, 10, 10, 12, 12, 14, 14); | |
4784 | let r: u8x16 = transmute(vsubq_u8(transmute(a), transmute(b))); | |
4785 | assert_eq!(r, e); | |
4786 | } | |
4787 | ||
4788 | #[simd_test(enable = "neon")] | |
4789 | unsafe fn test_vsub_u16() { | |
4790 | let a: u16x4 = u16x4::new(1, 2, 3, 4); | |
4791 | let b: u16x4 = u16x4::new(1, 2, 1, 2); | |
4792 | let e: u16x4 = u16x4::new(0, 0, 2, 2); | |
4793 | let r: u16x4 = transmute(vsub_u16(transmute(a), transmute(b))); | |
4794 | assert_eq!(r, e); | |
4795 | } | |
4796 | ||
4797 | #[simd_test(enable = "neon")] | |
4798 | unsafe fn test_vsubq_u16() { | |
4799 | let a: u16x8 = u16x8::new(1, 2, 3, 4, 5, 6, 7, 8); | |
4800 | let b: u16x8 = u16x8::new(1, 2, 1, 2, 1, 2, 1, 2); | |
4801 | let e: u16x8 = u16x8::new(0, 0, 2, 2, 4, 4, 6, 6); | |
4802 | let r: u16x8 = transmute(vsubq_u16(transmute(a), transmute(b))); | |
4803 | assert_eq!(r, e); | |
4804 | } | |
4805 | ||
4806 | #[simd_test(enable = "neon")] | |
4807 | unsafe fn test_vsub_u32() { | |
4808 | let a: u32x2 = u32x2::new(1, 2); | |
4809 | let b: u32x2 = u32x2::new(1, 2); | |
4810 | let e: u32x2 = u32x2::new(0, 0); | |
4811 | let r: u32x2 = transmute(vsub_u32(transmute(a), transmute(b))); | |
4812 | assert_eq!(r, e); | |
4813 | } | |
4814 | ||
4815 | #[simd_test(enable = "neon")] | |
4816 | unsafe fn test_vsubq_u32() { | |
4817 | let a: u32x4 = u32x4::new(1, 2, 3, 4); | |
4818 | let b: u32x4 = u32x4::new(1, 2, 1, 2); | |
4819 | let e: u32x4 = u32x4::new(0, 0, 2, 2); | |
4820 | let r: u32x4 = transmute(vsubq_u32(transmute(a), transmute(b))); | |
4821 | assert_eq!(r, e); | |
4822 | } | |
4823 | ||
4824 | #[simd_test(enable = "neon")] | |
4825 | unsafe fn test_vsub_s64() { | |
4826 | let a: i64x1 = i64x1::new(1); | |
4827 | let b: i64x1 = i64x1::new(1); | |
4828 | let e: i64x1 = i64x1::new(0); | |
4829 | let r: i64x1 = transmute(vsub_s64(transmute(a), transmute(b))); | |
4830 | assert_eq!(r, e); | |
4831 | } | |
4832 | ||
4833 | #[simd_test(enable = "neon")] | |
4834 | unsafe fn test_vsubq_s64() { | |
4835 | let a: i64x2 = i64x2::new(1, 2); | |
4836 | let b: i64x2 = i64x2::new(1, 2); | |
4837 | let e: i64x2 = i64x2::new(0, 0); | |
4838 | let r: i64x2 = transmute(vsubq_s64(transmute(a), transmute(b))); | |
4839 | assert_eq!(r, e); | |
4840 | } | |
4841 | ||
4842 | #[simd_test(enable = "neon")] | |
4843 | unsafe fn test_vsub_u64() { | |
4844 | let a: u64x1 = u64x1::new(1); | |
4845 | let b: u64x1 = u64x1::new(1); | |
4846 | let e: u64x1 = u64x1::new(0); | |
4847 | let r: u64x1 = transmute(vsub_u64(transmute(a), transmute(b))); | |
4848 | assert_eq!(r, e); | |
4849 | } | |
4850 | ||
4851 | #[simd_test(enable = "neon")] | |
4852 | unsafe fn test_vsubq_u64() { | |
4853 | let a: u64x2 = u64x2::new(1, 2); | |
4854 | let b: u64x2 = u64x2::new(1, 2); | |
4855 | let e: u64x2 = u64x2::new(0, 0); | |
4856 | let r: u64x2 = transmute(vsubq_u64(transmute(a), transmute(b))); | |
4857 | assert_eq!(r, e); | |
4858 | } | |
4859 | ||
4860 | #[simd_test(enable = "neon")] | |
4861 | unsafe fn test_vsub_f32() { | |
4862 | let a: f32x2 = f32x2::new(1.0, 4.0); | |
4863 | let b: f32x2 = f32x2::new(1.0, 2.0); | |
4864 | let e: f32x2 = f32x2::new(0.0, 2.0); | |
4865 | let r: f32x2 = transmute(vsub_f32(transmute(a), transmute(b))); | |
4866 | assert_eq!(r, e); | |
4867 | } | |
4868 | ||
4869 | #[simd_test(enable = "neon")] | |
4870 | unsafe fn test_vsubq_f32() { | |
4871 | let a: f32x4 = f32x4::new(1.0, 4.0, 3.0, 8.0); | |
4872 | let b: f32x4 = f32x4::new(1.0, 2.0, 3.0, 4.0); | |
4873 | let e: f32x4 = f32x4::new(0.0, 2.0, 0.0, 4.0); | |
4874 | let r: f32x4 = transmute(vsubq_f32(transmute(a), transmute(b))); | |
4875 | assert_eq!(r, e); | |
4876 | } | |
4877 | ||
4878 | #[simd_test(enable = "neon")] | |
4879 | unsafe fn test_vhsub_u8() { | |
4880 | let a: u8x8 = u8x8::new(1, 2, 3, 4, 5, 6, 7, 8); | |
4881 | let b: u8x8 = u8x8::new(1, 2, 1, 2, 1, 2, 1, 2); | |
4882 | let e: u8x8 = u8x8::new(0, 0, 1, 1, 2, 2, 3, 3); | |
4883 | let r: u8x8 = transmute(vhsub_u8(transmute(a), transmute(b))); | |
4884 | assert_eq!(r, e); | |
4885 | } | |
4886 | ||
4887 | #[simd_test(enable = "neon")] | |
4888 | unsafe fn test_vhsubq_u8() { | |
4889 | let a: u8x16 = u8x16::new(1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16); | |
4890 | let b: u8x16 = u8x16::new(1, 2, 1, 2, 1, 2, 1, 2, 1, 2, 1, 2, 1, 2, 1, 2); | |
4891 | let e: u8x16 = u8x16::new(0, 0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7); | |
4892 | let r: u8x16 = transmute(vhsubq_u8(transmute(a), transmute(b))); | |
4893 | assert_eq!(r, e); | |
4894 | } | |
4895 | ||
4896 | #[simd_test(enable = "neon")] | |
4897 | unsafe fn test_vhsub_u16() { | |
4898 | let a: u16x4 = u16x4::new(1, 2, 3, 4); | |
4899 | let b: u16x4 = u16x4::new(1, 2, 1, 2); | |
4900 | let e: u16x4 = u16x4::new(0, 0, 1, 1); | |
4901 | let r: u16x4 = transmute(vhsub_u16(transmute(a), transmute(b))); | |
4902 | assert_eq!(r, e); | |
4903 | } | |
4904 | ||
4905 | #[simd_test(enable = "neon")] | |
4906 | unsafe fn test_vhsubq_u16() { | |
4907 | let a: u16x8 = u16x8::new(1, 2, 3, 4, 5, 6, 7, 8); | |
4908 | let b: u16x8 = u16x8::new(1, 2, 1, 2, 1, 2, 1, 2); | |
4909 | let e: u16x8 = u16x8::new(0, 0, 1, 1, 2, 2, 3, 3); | |
4910 | let r: u16x8 = transmute(vhsubq_u16(transmute(a), transmute(b))); | |
4911 | assert_eq!(r, e); | |
4912 | } | |
4913 | ||
4914 | #[simd_test(enable = "neon")] | |
4915 | unsafe fn test_vhsub_u32() { | |
4916 | let a: u32x2 = u32x2::new(1, 2); | |
4917 | let b: u32x2 = u32x2::new(1, 2); | |
4918 | let e: u32x2 = u32x2::new(0, 0); | |
4919 | let r: u32x2 = transmute(vhsub_u32(transmute(a), transmute(b))); | |
4920 | assert_eq!(r, e); | |
4921 | } | |
4922 | ||
4923 | #[simd_test(enable = "neon")] | |
4924 | unsafe fn test_vhsubq_u32() { | |
4925 | let a: u32x4 = u32x4::new(1, 2, 3, 4); | |
4926 | let b: u32x4 = u32x4::new(1, 2, 1, 2); | |
4927 | let e: u32x4 = u32x4::new(0, 0, 1, 1); | |
4928 | let r: u32x4 = transmute(vhsubq_u32(transmute(a), transmute(b))); | |
4929 | assert_eq!(r, e); | |
4930 | } | |
4931 | ||
4932 | #[simd_test(enable = "neon")] | |
4933 | unsafe fn test_vhsub_s8() { | |
4934 | let a: i8x8 = i8x8::new(1, 2, 3, 4, 5, 6, 7, 8); | |
4935 | let b: i8x8 = i8x8::new(1, 2, 1, 2, 1, 2, 1, 2); | |
4936 | let e: i8x8 = i8x8::new(0, 0, 1, 1, 2, 2, 3, 3); | |
4937 | let r: i8x8 = transmute(vhsub_s8(transmute(a), transmute(b))); | |
4938 | assert_eq!(r, e); | |
4939 | } | |
4940 | ||
4941 | #[simd_test(enable = "neon")] | |
4942 | unsafe fn test_vhsubq_s8() { | |
4943 | let a: i8x16 = i8x16::new(1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16); | |
4944 | let b: i8x16 = i8x16::new(1, 2, 1, 2, 1, 2, 1, 2, 1, 2, 1, 2, 1, 2, 1, 2); | |
4945 | let e: i8x16 = i8x16::new(0, 0, 1, 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7); | |
4946 | let r: i8x16 = transmute(vhsubq_s8(transmute(a), transmute(b))); | |
4947 | assert_eq!(r, e); | |
4948 | } | |
4949 | ||
4950 | #[simd_test(enable = "neon")] | |
4951 | unsafe fn test_vhsub_s16() { | |
4952 | let a: i16x4 = i16x4::new(1, 2, 3, 4); | |
4953 | let b: i16x4 = i16x4::new(1, 2, 1, 2); | |
4954 | let e: i16x4 = i16x4::new(0, 0, 1, 1); | |
4955 | let r: i16x4 = transmute(vhsub_s16(transmute(a), transmute(b))); | |
4956 | assert_eq!(r, e); | |
4957 | } | |
4958 | ||
4959 | #[simd_test(enable = "neon")] | |
4960 | unsafe fn test_vhsubq_s16() { | |
4961 | let a: i16x8 = i16x8::new(1, 2, 3, 4, 5, 6, 7, 8); | |
4962 | let b: i16x8 = i16x8::new(1, 2, 1, 2, 1, 2, 1, 2); | |
4963 | let e: i16x8 = i16x8::new(0, 0, 1, 1, 2, 2, 3, 3); | |
4964 | let r: i16x8 = transmute(vhsubq_s16(transmute(a), transmute(b))); | |
4965 | assert_eq!(r, e); | |
4966 | } | |
4967 | ||
4968 | #[simd_test(enable = "neon")] | |
4969 | unsafe fn test_vhsub_s32() { | |
4970 | let a: i32x2 = i32x2::new(1, 2); | |
4971 | let b: i32x2 = i32x2::new(1, 2); | |
4972 | let e: i32x2 = i32x2::new(0, 0); | |
4973 | let r: i32x2 = transmute(vhsub_s32(transmute(a), transmute(b))); | |
4974 | assert_eq!(r, e); | |
4975 | } | |
4976 | ||
4977 | #[simd_test(enable = "neon")] | |
4978 | unsafe fn test_vhsubq_s32() { | |
4979 | let a: i32x4 = i32x4::new(1, 2, 3, 4); | |
4980 | let b: i32x4 = i32x4::new(1, 2, 1, 2); | |
4981 | let e: i32x4 = i32x4::new(0, 0, 1, 1); | |
4982 | let r: i32x4 = transmute(vhsubq_s32(transmute(a), transmute(b))); | |
4983 | assert_eq!(r, e); | |
4984 | } | |
fc512014 XL |
4985 | |
4986 | #[simd_test(enable = "neon")] | |
4987 | unsafe fn test_vmax_s8() { | |
4988 | let a: i8x8 = i8x8::new(1, 2, 3, 4, 5, 6, 7, 8); | |
4989 | let b: i8x8 = i8x8::new(16, 15, 14, 13, 12, 11, 10, 9); | |
4990 | let e: i8x8 = i8x8::new(16, 15, 14, 13, 12, 11, 10, 9); | |
4991 | let r: i8x8 = transmute(vmax_s8(transmute(a), transmute(b))); | |
4992 | assert_eq!(r, e); | |
4993 | } | |
4994 | ||
4995 | #[simd_test(enable = "neon")] | |
4996 | unsafe fn test_vmaxq_s8() { | |
4997 | let a: i8x16 = i8x16::new(1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16); | |
4998 | let b: i8x16 = i8x16::new(16, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1); | |
4999 | let e: i8x16 = i8x16::new(16, 15, 14, 13, 12, 11, 10, 9, 9, 10, 11, 12, 13, 14, 15, 16); | |
5000 | let r: i8x16 = transmute(vmaxq_s8(transmute(a), transmute(b))); | |
5001 | assert_eq!(r, e); | |
5002 | } | |
5003 | ||
5004 | #[simd_test(enable = "neon")] | |
5005 | unsafe fn test_vmax_s16() { | |
5006 | let a: i16x4 = i16x4::new(1, 2, 3, 4); | |
5007 | let b: i16x4 = i16x4::new(16, 15, 14, 13); | |
5008 | let e: i16x4 = i16x4::new(16, 15, 14, 13); | |
5009 | let r: i16x4 = transmute(vmax_s16(transmute(a), transmute(b))); | |
5010 | assert_eq!(r, e); | |
5011 | } | |
5012 | ||
5013 | #[simd_test(enable = "neon")] | |
5014 | unsafe fn test_vmaxq_s16() { | |
5015 | let a: i16x8 = i16x8::new(1, 2, 3, 4, 5, 6, 7, 8); | |
5016 | let b: i16x8 = i16x8::new(16, 15, 14, 13, 12, 11, 10, 9); | |
5017 | let e: i16x8 = i16x8::new(16, 15, 14, 13, 12, 11, 10, 9); | |
5018 | let r: i16x8 = transmute(vmaxq_s16(transmute(a), transmute(b))); | |
5019 | assert_eq!(r, e); | |
5020 | } | |
5021 | ||
5022 | #[simd_test(enable = "neon")] | |
5023 | unsafe fn test_vmax_s32() { | |
5024 | let a: i32x2 = i32x2::new(1, 2); | |
5025 | let b: i32x2 = i32x2::new(16, 15); | |
5026 | let e: i32x2 = i32x2::new(16, 15); | |
5027 | let r: i32x2 = transmute(vmax_s32(transmute(a), transmute(b))); | |
5028 | assert_eq!(r, e); | |
5029 | } | |
5030 | ||
5031 | #[simd_test(enable = "neon")] | |
5032 | unsafe fn test_vmaxq_s32() { | |
5033 | let a: i32x4 = i32x4::new(1, 2, 3, 4); | |
5034 | let b: i32x4 = i32x4::new(16, 15, 14, 13); | |
5035 | let e: i32x4 = i32x4::new(16, 15, 14, 13); | |
5036 | let r: i32x4 = transmute(vmaxq_s32(transmute(a), transmute(b))); | |
5037 | assert_eq!(r, e); | |
5038 | } | |
5039 | ||
5040 | #[simd_test(enable = "neon")] | |
5041 | unsafe fn test_vmax_u8() { | |
5042 | let a: u8x8 = u8x8::new(1, 2, 3, 4, 5, 6, 7, 8); | |
5043 | let b: u8x8 = u8x8::new(16, 15, 14, 13, 12, 11, 10, 9); | |
5044 | let e: u8x8 = u8x8::new(16, 15, 14, 13, 12, 11, 10, 9); | |
5045 | let r: u8x8 = transmute(vmax_u8(transmute(a), transmute(b))); | |
5046 | assert_eq!(r, e); | |
5047 | } | |
5048 | ||
5049 | #[simd_test(enable = "neon")] | |
5050 | unsafe fn test_vmaxq_u8() { | |
5051 | let a: u8x16 = u8x16::new(1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16); | |
5052 | let b: u8x16 = u8x16::new(16, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1); | |
5053 | let e: u8x16 = u8x16::new(16, 15, 14, 13, 12, 11, 10, 9, 9, 10, 11, 12, 13, 14, 15, 16); | |
5054 | let r: u8x16 = transmute(vmaxq_u8(transmute(a), transmute(b))); | |
5055 | assert_eq!(r, e); | |
5056 | } | |
5057 | ||
5058 | #[simd_test(enable = "neon")] | |
5059 | unsafe fn test_vmax_u16() { | |
5060 | let a: u16x4 = u16x4::new(1, 2, 3, 4); | |
5061 | let b: u16x4 = u16x4::new(16, 15, 14, 13); | |
5062 | let e: u16x4 = u16x4::new(16, 15, 14, 13); | |
5063 | let r: u16x4 = transmute(vmax_u16(transmute(a), transmute(b))); | |
5064 | assert_eq!(r, e); | |
5065 | } | |
5066 | ||
5067 | #[simd_test(enable = "neon")] | |
5068 | unsafe fn test_vmaxq_u16() { | |
5069 | let a: u16x8 = u16x8::new(1, 2, 3, 4, 5, 6, 7, 8); | |
5070 | let b: u16x8 = u16x8::new(16, 15, 14, 13, 12, 11, 10, 9); | |
5071 | let e: u16x8 = u16x8::new(16, 15, 14, 13, 12, 11, 10, 9); | |
5072 | let r: u16x8 = transmute(vmaxq_u16(transmute(a), transmute(b))); | |
5073 | assert_eq!(r, e); | |
5074 | } | |
5075 | ||
5076 | #[simd_test(enable = "neon")] | |
5077 | unsafe fn test_vmax_u32() { | |
5078 | let a: u32x2 = u32x2::new(1, 2); | |
5079 | let b: u32x2 = u32x2::new(16, 15); | |
5080 | let e: u32x2 = u32x2::new(16, 15); | |
5081 | let r: u32x2 = transmute(vmax_u32(transmute(a), transmute(b))); | |
5082 | assert_eq!(r, e); | |
5083 | } | |
5084 | ||
5085 | #[simd_test(enable = "neon")] | |
5086 | unsafe fn test_vmaxq_u32() { | |
5087 | let a: u32x4 = u32x4::new(1, 2, 3, 4); | |
5088 | let b: u32x4 = u32x4::new(16, 15, 14, 13); | |
5089 | let e: u32x4 = u32x4::new(16, 15, 14, 13); | |
5090 | let r: u32x4 = transmute(vmaxq_u32(transmute(a), transmute(b))); | |
5091 | assert_eq!(r, e); | |
5092 | } | |
5093 | ||
5094 | #[simd_test(enable = "neon")] | |
5095 | unsafe fn test_vmax_f32() { | |
5096 | let a: f32x2 = f32x2::new(1.0, -2.0); | |
5097 | let b: f32x2 = f32x2::new(0.0, 3.0); | |
5098 | let e: f32x2 = f32x2::new(1.0, 3.0); | |
5099 | let r: f32x2 = transmute(vmax_f32(transmute(a), transmute(b))); | |
5100 | assert_eq!(r, e); | |
5101 | } | |
5102 | ||
5103 | #[simd_test(enable = "neon")] | |
5104 | unsafe fn test_vmaxq_f32() { | |
5105 | let a: f32x4 = f32x4::new(1.0, -2.0, 3.0, -4.0); | |
5106 | let b: f32x4 = f32x4::new(0.0, 3.0, 2.0, 8.0); | |
5107 | let e: f32x4 = f32x4::new(1.0, 3.0, 3.0, 8.0); | |
5108 | let r: f32x4 = transmute(vmaxq_f32(transmute(a), transmute(b))); | |
5109 | assert_eq!(r, e); | |
5110 | } | |
5111 | ||
5112 | #[simd_test(enable = "neon")] | |
5113 | unsafe fn test_vmin_s8() { | |
5114 | let a: i8x8 = i8x8::new(1, 2, 3, 4, 5, 6, 7, 8); | |
5115 | let b: i8x8 = i8x8::new(16, 15, 14, 13, 12, 11, 10, 9); | |
5116 | let e: i8x8 = i8x8::new(1, 2, 3, 4, 5, 6, 7, 8); | |
5117 | let r: i8x8 = transmute(vmin_s8(transmute(a), transmute(b))); | |
5118 | assert_eq!(r, e); | |
5119 | } | |
5120 | ||
5121 | #[simd_test(enable = "neon")] | |
5122 | unsafe fn test_vminq_s8() { | |
5123 | let a: i8x16 = i8x16::new(1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16); | |
5124 | let b: i8x16 = i8x16::new(16, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1); | |
5125 | let e: i8x16 = i8x16::new(1, 2, 3, 4, 5, 6, 7, 8, 8, 7, 6, 5, 4, 3, 2, 1); | |
5126 | let r: i8x16 = transmute(vminq_s8(transmute(a), transmute(b))); | |
5127 | assert_eq!(r, e); | |
5128 | } | |
5129 | ||
5130 | #[simd_test(enable = "neon")] | |
5131 | unsafe fn test_vmin_s16() { | |
5132 | let a: i16x4 = i16x4::new(1, 2, 3, 4); | |
5133 | let b: i16x4 = i16x4::new(16, 15, 14, 13); | |
5134 | let e: i16x4 = i16x4::new(1, 2, 3, 4); | |
5135 | let r: i16x4 = transmute(vmin_s16(transmute(a), transmute(b))); | |
5136 | assert_eq!(r, e); | |
5137 | } | |
5138 | ||
5139 | #[simd_test(enable = "neon")] | |
5140 | unsafe fn test_vminq_s16() { | |
5141 | let a: i16x8 = i16x8::new(1, 2, 3, 4, 5, 6, 7, 8); | |
5142 | let b: i16x8 = i16x8::new(16, 15, 14, 13, 12, 11, 10, 9); | |
5143 | let e: i16x8 = i16x8::new(1, 2, 3, 4, 5, 6, 7, 8); | |
5144 | let r: i16x8 = transmute(vminq_s16(transmute(a), transmute(b))); | |
5145 | assert_eq!(r, e); | |
5146 | } | |
5147 | ||
5148 | #[simd_test(enable = "neon")] | |
5149 | unsafe fn test_vmin_s32() { | |
5150 | let a: i32x2 = i32x2::new(1, 2); | |
5151 | let b: i32x2 = i32x2::new(16, 15); | |
5152 | let e: i32x2 = i32x2::new(1, 2); | |
5153 | let r: i32x2 = transmute(vmin_s32(transmute(a), transmute(b))); | |
5154 | assert_eq!(r, e); | |
5155 | } | |
5156 | ||
5157 | #[simd_test(enable = "neon")] | |
5158 | unsafe fn test_vminq_s32() { | |
5159 | let a: i32x4 = i32x4::new(1, 2, 3, 4); | |
5160 | let b: i32x4 = i32x4::new(16, 15, 14, 13); | |
5161 | let e: i32x4 = i32x4::new(1, 2, 3, 4); | |
5162 | let r: i32x4 = transmute(vminq_s32(transmute(a), transmute(b))); | |
5163 | assert_eq!(r, e); | |
5164 | } | |
5165 | ||
5166 | #[simd_test(enable = "neon")] | |
5167 | unsafe fn test_vmin_u8() { | |
5168 | let a: u8x8 = u8x8::new(1, 2, 3, 4, 5, 6, 7, 8); | |
5169 | let b: u8x8 = u8x8::new(16, 15, 14, 13, 12, 11, 10, 9); | |
5170 | let e: u8x8 = u8x8::new(1, 2, 3, 4, 5, 6, 7, 8); | |
5171 | let r: u8x8 = transmute(vmin_u8(transmute(a), transmute(b))); | |
5172 | assert_eq!(r, e); | |
5173 | } | |
5174 | ||
5175 | #[simd_test(enable = "neon")] | |
5176 | unsafe fn test_vminq_u8() { | |
5177 | let a: u8x16 = u8x16::new(1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16); | |
5178 | let b: u8x16 = u8x16::new(16, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1); | |
5179 | let e: u8x16 = u8x16::new(1, 2, 3, 4, 5, 6, 7, 8, 8, 7, 6, 5, 4, 3, 2, 1); | |
5180 | let r: u8x16 = transmute(vminq_u8(transmute(a), transmute(b))); | |
5181 | assert_eq!(r, e); | |
5182 | } | |
5183 | ||
5184 | #[simd_test(enable = "neon")] | |
5185 | unsafe fn test_vmin_u16() { | |
5186 | let a: u16x4 = u16x4::new(1, 2, 3, 4); | |
5187 | let b: u16x4 = u16x4::new(16, 15, 14, 13); | |
5188 | let e: u16x4 = u16x4::new(1, 2, 3, 4); | |
5189 | let r: u16x4 = transmute(vmin_u16(transmute(a), transmute(b))); | |
5190 | assert_eq!(r, e); | |
5191 | } | |
5192 | ||
5193 | #[simd_test(enable = "neon")] | |
5194 | unsafe fn test_vminq_u16() { | |
5195 | let a: u16x8 = u16x8::new(1, 2, 3, 4, 5, 6, 7, 8); | |
5196 | let b: u16x8 = u16x8::new(16, 15, 14, 13, 12, 11, 10, 9); | |
5197 | let e: u16x8 = u16x8::new(1, 2, 3, 4, 5, 6, 7, 8); | |
5198 | let r: u16x8 = transmute(vminq_u16(transmute(a), transmute(b))); | |
5199 | assert_eq!(r, e); | |
5200 | } | |
5201 | ||
5202 | #[simd_test(enable = "neon")] | |
5203 | unsafe fn test_vmin_u32() { | |
5204 | let a: u32x2 = u32x2::new(1, 2); | |
5205 | let b: u32x2 = u32x2::new(16, 15); | |
5206 | let e: u32x2 = u32x2::new(1, 2); | |
5207 | let r: u32x2 = transmute(vmin_u32(transmute(a), transmute(b))); | |
5208 | assert_eq!(r, e); | |
5209 | } | |
5210 | ||
5211 | #[simd_test(enable = "neon")] | |
5212 | unsafe fn test_vminq_u32() { | |
5213 | let a: u32x4 = u32x4::new(1, 2, 3, 4); | |
5214 | let b: u32x4 = u32x4::new(16, 15, 14, 13); | |
5215 | let e: u32x4 = u32x4::new(1, 2, 3, 4); | |
5216 | let r: u32x4 = transmute(vminq_u32(transmute(a), transmute(b))); | |
5217 | assert_eq!(r, e); | |
5218 | } | |
5219 | ||
5220 | #[simd_test(enable = "neon")] | |
5221 | unsafe fn test_vmin_f32() { | |
5222 | let a: f32x2 = f32x2::new(1.0, -2.0); | |
5223 | let b: f32x2 = f32x2::new(0.0, 3.0); | |
5224 | let e: f32x2 = f32x2::new(0.0, -2.0); | |
5225 | let r: f32x2 = transmute(vmin_f32(transmute(a), transmute(b))); | |
5226 | assert_eq!(r, e); | |
5227 | } | |
5228 | ||
5229 | #[simd_test(enable = "neon")] | |
5230 | unsafe fn test_vminq_f32() { | |
5231 | let a: f32x4 = f32x4::new(1.0, -2.0, 3.0, -4.0); | |
5232 | let b: f32x4 = f32x4::new(0.0, 3.0, 2.0, 8.0); | |
5233 | let e: f32x4 = f32x4::new(0.0, -2.0, 2.0, -4.0); | |
5234 | let r: f32x4 = transmute(vminq_f32(transmute(a), transmute(b))); | |
5235 | assert_eq!(r, e); | |
5236 | } | |
ba9703b0 | 5237 | } |