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3622634b MA |
1 | #ifndef ARM_TARGET_SYSCALL_H |
2 | #define ARM_TARGET_SYSCALL_H | |
2c0262af FB |
3 | |
4 | /* this struct defines the way the registers are stored on the | |
5 | stack during a system call. */ | |
6 | ||
167e4cdc | 7 | /* uregs[0..15] are r0 to r15; uregs[16] is CPSR; uregs[17] is ORIG_r0 */ |
2c0262af | 8 | struct target_pt_regs { |
992f48a0 | 9 | abi_long uregs[18]; |
2c0262af FB |
10 | }; |
11 | ||
2c0262af | 12 | #define ARM_SYSCALL_BASE 0x900000 |
192c7bd9 | 13 | #define ARM_THUMB_SYSCALL 0 |
6f1f31c0 | 14 | |
fbb4a2e3 | 15 | #define ARM_NR_BASE 0xf0000 |
d5355087 | 16 | #define ARM_NR_breakpoint (ARM_NR_BASE + 1) |
fbb4a2e3 PB |
17 | #define ARM_NR_cacheflush (ARM_NR_BASE + 2) |
18 | #define ARM_NR_set_tls (ARM_NR_BASE + 5) | |
62aaa514 | 19 | #define ARM_NR_get_tls (ARM_NR_BASE + 6) |
cf720db3 | 20 | |
ee3eb3a7 | 21 | #if TARGET_BIG_ENDIAN |
99c475ab | 22 | #define UNAME_MACHINE "armv5teb" |
cf720db3 | 23 | #else |
99c475ab | 24 | #define UNAME_MACHINE "armv5tel" |
cf720db3 | 25 | #endif |
cbc14e6f | 26 | #define UNAME_MINIMUM_RELEASE "2.6.32" |
4ce6243d PM |
27 | |
28 | #define TARGET_CLONE_BACKWARDS | |
0903c8be | 29 | |
02e5d7d7 FB |
30 | #define TARGET_MCL_CURRENT 1 |
31 | #define TARGET_MCL_FUTURE 2 | |
32 | #define TARGET_MCL_ONFAULT 4 | |
33 | ||
5457dc9e | 34 | #define TARGET_WANT_OLD_SYS_SELECT |
460c579f | 35 | |
ee8e7614 PM |
36 | #define TARGET_FORCE_SHMLBA |
37 | ||
38 | static inline abi_ulong target_shmlba(CPUARMState *env) | |
39 | { | |
40 | return 4 * 4096; | |
41 | } | |
42 | ||
3622634b | 43 | #endif /* ARM_TARGET_SYSCALL_H */ |