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fixed case where SS != USER_DS (fixes dosemu DPMI emulation)
[qemu.git] / linux-user / vm86.c
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46ddf551
FB		 1/*
2 * vm86 linux syscall support
3 *
4 * Copyright (c) 2003 Fabrice Bellard
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 */
20#include <stdlib.h>
21#include <stdio.h>
22#include <stdarg.h>
23#include <string.h>
24#include <errno.h>
25#include <unistd.h>
26
27#include "qemu.h"
28
29//#define DEBUG_VM86
30
31#define set_flags(X,new,mask) \
32((X) = ((X) & ~(mask)) | ((new) & (mask)))
33
34#define SAFE_MASK (0xDD5)
35#define RETURN_MASK (0xDFF)
36
37static inline int is_revectored(int nr, struct target_revectored_struct *bitmap)
38{
b333af06 39 return (((uint8_t *)bitmap)[nr >> 3] >> (nr & 7)) & 1;
46ddf551
FB		 40}
41
42static inline void vm_putw(uint8_t *segptr, unsigned int reg16, unsigned int val)
43{
84fa15d8 44 stw(segptr + (reg16 & 0xffff), val);
46ddf551
FB		 45}
46
47static inline void vm_putl(uint8_t *segptr, unsigned int reg16, unsigned int val)
48{
84fa15d8 49 stl(segptr + (reg16 & 0xffff), val);
46ddf551
FB		 50}
51
52static inline unsigned int vm_getw(uint8_t *segptr, unsigned int reg16)
53{
84fa15d8 54 return lduw(segptr + (reg16 & 0xffff));
46ddf551
FB		 55}
56
57static inline unsigned int vm_getl(uint8_t *segptr, unsigned int reg16)
58{
84fa15d8 59 return ldl(segptr + (reg16 & 0xffff));
46ddf551
FB		 60}
61
62void save_v86_state(CPUX86State *env)
63{
64 TaskState *ts = env->opaque;
65
66 /* put the VM86 registers in the userspace register structure */
67 ts->target_v86->regs.eax = tswap32(env->regs[R_EAX]);
68 ts->target_v86->regs.ebx = tswap32(env->regs[R_EBX]);
69 ts->target_v86->regs.ecx = tswap32(env->regs[R_ECX]);
70 ts->target_v86->regs.edx = tswap32(env->regs[R_EDX]);
71 ts->target_v86->regs.esi = tswap32(env->regs[R_ESI]);
72 ts->target_v86->regs.edi = tswap32(env->regs[R_EDI]);
73 ts->target_v86->regs.ebp = tswap32(env->regs[R_EBP]);
74 ts->target_v86->regs.esp = tswap32(env->regs[R_ESP]);
75 ts->target_v86->regs.eip = tswap32(env->eip);
76 ts->target_v86->regs.cs = tswap16(env->segs[R_CS]);
77 ts->target_v86->regs.ss = tswap16(env->segs[R_SS]);
78 ts->target_v86->regs.ds = tswap16(env->segs[R_DS]);
79 ts->target_v86->regs.es = tswap16(env->segs[R_ES]);
80 ts->target_v86->regs.fs = tswap16(env->segs[R_FS]);
81 ts->target_v86->regs.gs = tswap16(env->segs[R_GS]);
82 set_flags(env->eflags, ts->v86flags, VIF_MASK | ts->v86mask);
83 ts->target_v86->regs.eflags = tswap32(env->eflags);
84#ifdef DEBUG_VM86
85 fprintf(logfile, "save_v86_state: eflags=%08x cs:ip=%04x:%04x\n",
86 env->eflags, env->segs[R_CS], env->eip);
87#endif
88
89 /* restore 32 bit registers */
90 env->regs[R_EAX] = ts->vm86_saved_regs.eax;
91 env->regs[R_EBX] = ts->vm86_saved_regs.ebx;
92 env->regs[R_ECX] = ts->vm86_saved_regs.ecx;
93 env->regs[R_EDX] = ts->vm86_saved_regs.edx;
94 env->regs[R_ESI] = ts->vm86_saved_regs.esi;
95 env->regs[R_EDI] = ts->vm86_saved_regs.edi;
96 env->regs[R_EBP] = ts->vm86_saved_regs.ebp;
97 env->regs[R_ESP] = ts->vm86_saved_regs.esp;
98 env->eflags = ts->vm86_saved_regs.eflags;
99 env->eip = ts->vm86_saved_regs.eip;
100
101 cpu_x86_load_seg(env, R_CS, ts->vm86_saved_regs.cs);
102 cpu_x86_load_seg(env, R_SS, ts->vm86_saved_regs.ss);
103 cpu_x86_load_seg(env, R_DS, ts->vm86_saved_regs.ds);
104 cpu_x86_load_seg(env, R_ES, ts->vm86_saved_regs.es);
105 cpu_x86_load_seg(env, R_FS, ts->vm86_saved_regs.fs);
106 cpu_x86_load_seg(env, R_GS, ts->vm86_saved_regs.gs);
107}
108
109/* return from vm86 mode to 32 bit. The vm86() syscall will return
110 'retval' */
111static inline void return_to_32bit(CPUX86State *env, int retval)
112{
113#ifdef DEBUG_VM86
114 fprintf(logfile, "return_to_32bit: ret=0x%x\n", retval);
115#endif
116 save_v86_state(env);
117 env->regs[R_EAX] = retval;
118}
119
120static inline int set_IF(CPUX86State *env)
121{
122 TaskState *ts = env->opaque;
123
124 ts->v86flags |= VIF_MASK;
125 if (ts->v86flags & VIP_MASK) {
126 return_to_32bit(env, TARGET_VM86_STI);
127 return 1;
128 }
129 return 0;
130}
131
132static inline void clear_IF(CPUX86State *env)
133{
134 TaskState *ts = env->opaque;
135
136 ts->v86flags &= ~VIF_MASK;
137}
138
139static inline void clear_TF(CPUX86State *env)
140{
141 env->eflags &= ~TF_MASK;
142}
143
226c9132
FB		 144static inline void clear_AC(CPUX86State *env)
145{
146 env->eflags &= ~AC_MASK;
147}
148
46ddf551
FB		 149static inline int set_vflags_long(unsigned long eflags, CPUX86State *env)
150{
151 TaskState *ts = env->opaque;
152
153 set_flags(ts->v86flags, eflags, ts->v86mask);
154 set_flags(env->eflags, eflags, SAFE_MASK);
155 if (eflags & IF_MASK)
156 return set_IF(env);
226c9132
FB		 157 else
158 clear_IF(env);
46ddf551
FB		 159 return 0;
160}
161
162static inline int set_vflags_short(unsigned short flags, CPUX86State *env)
163{
164 TaskState *ts = env->opaque;
165
166 set_flags(ts->v86flags, flags, ts->v86mask & 0xffff);
167 set_flags(env->eflags, flags, SAFE_MASK);
168 if (flags & IF_MASK)
169 return set_IF(env);
226c9132
FB		 170 else
171 clear_IF(env);
46ddf551
FB		 172 return 0;
173}
174
175static inline unsigned int get_vflags(CPUX86State *env)
176{
177 TaskState *ts = env->opaque;
178 unsigned int flags;
179
180 flags = env->eflags & RETURN_MASK;
181 if (ts->v86flags & VIF_MASK)
182 flags |= IF_MASK;
183 return flags | (ts->v86flags & ts->v86mask);
184}
185
186#define ADD16(reg, val) reg = (reg & ~0xffff) | ((reg + (val)) & 0xffff)
187
188/* handle VM86 interrupt (NOTE: the CPU core currently does not
189 support TSS interrupt revectoring, so this code is always executed) */
447db213 190static void do_int(CPUX86State *env, int intno)
46ddf551
FB		 191{
192 TaskState *ts = env->opaque;
193 uint32_t *int_ptr, segoffs;
194 uint8_t *ssp;
195 unsigned int sp;
196
46ddf551
FB		 197 if (env->segs[R_CS] == TARGET_BIOSSEG)
198 goto cannot_handle;
b333af06 199 if (is_revectored(intno, &ts->vm86plus.int_revectored))
46ddf551
FB		 200 goto cannot_handle;
201 if (intno == 0x21 && is_revectored((env->regs[R_EAX] >> 8) & 0xff,
b333af06 202 &ts->vm86plus.int21_revectored))
46ddf551
FB		 203 goto cannot_handle;
204 int_ptr = (uint32_t *)(intno << 2);
205 segoffs = tswap32(*int_ptr);
206 if ((segoffs >> 16) == TARGET_BIOSSEG)
207 goto cannot_handle;
208#if defined(DEBUG_VM86)
209 fprintf(logfile, "VM86: emulating int 0x%x. CS:IP=%04x:%04x\n",
210 intno, segoffs >> 16, segoffs & 0xffff);
211#endif
212 /* save old state */
213 ssp = (uint8_t *)(env->segs[R_SS] << 4);
214 sp = env->regs[R_ESP] & 0xffff;
215 vm_putw(ssp, sp - 2, get_vflags(env));
216 vm_putw(ssp, sp - 4, env->segs[R_CS]);
217 vm_putw(ssp, sp - 6, env->eip);
218 ADD16(env->regs[R_ESP], -6);
219 /* goto interrupt handler */
220 env->eip = segoffs & 0xffff;
221 cpu_x86_load_seg(env, R_CS, segoffs >> 16);
222 clear_TF(env);
223 clear_IF(env);
226c9132 224 clear_AC(env);
46ddf551
FB		 225 return;
226 cannot_handle:
227#if defined(DEBUG_VM86)
228 fprintf(logfile, "VM86: return to 32 bits int 0x%x\n", intno);
229#endif
230 return_to_32bit(env, TARGET_VM86_INTx | (intno << 8));
231}
232
447db213
FB		 233void handle_vm86_trap(CPUX86State *env, int trapno)
234{
235 if (trapno == 1 || trapno == 3) {
236 return_to_32bit(env, TARGET_VM86_TRAP + (trapno << 8));
237 } else {
238 do_int(env, trapno);
239 }
240}
241
b333af06
FB		 242#define CHECK_IF_IN_TRAP() \
243 if ((ts->vm86plus.vm86plus.flags & TARGET_vm86dbg_active) && \
244 (ts->vm86plus.vm86plus.flags & TARGET_vm86dbg_TFpendig)) \
245 newflags |= TF_MASK
46ddf551
FB		 246
247#define VM86_FAULT_RETURN \
b333af06 248 if ((ts->vm86plus.vm86plus.flags & TARGET_force_return_for_pic) && \
46ddf551
FB		 249 (ts->v86flags & (IF_MASK | VIF_MASK))) \
250 return_to_32bit(env, TARGET_VM86_PICRETURN); \
251 return
252
253void handle_vm86_fault(CPUX86State *env)
254{
255 TaskState *ts = env->opaque;
256 uint8_t *csp, *pc, *ssp;
b333af06
FB		 257 unsigned int ip, sp, newflags, newip, newcs, opcode, intno;
258 int data32, pref_done;
46ddf551
FB		 259
260 csp = (uint8_t *)(env->segs[R_CS] << 4);
261 ip = env->eip & 0xffff;
262 pc = csp + ip;
263
264 ssp = (uint8_t *)(env->segs[R_SS] << 4);
265 sp = env->regs[R_ESP] & 0xffff;
266
267#if defined(DEBUG_VM86)
268 fprintf(logfile, "VM86 exception %04x:%08x %02x %02x\n",
269 env->segs[R_CS], env->eip, pc[0], pc[1]);
270#endif
271
b333af06
FB		 272 data32 = 0;
273 pref_done = 0;
274 do {
275 opcode = csp[ip];
276 ADD16(ip, 1);
277 switch (opcode) {
278 case 0x66: /* 32-bit data */ data32=1; break;
279 case 0x67: /* 32-bit address */ break;
280 case 0x2e: /* CS */ break;
281 case 0x3e: /* DS */ break;
282 case 0x26: /* ES */ break;
283 case 0x36: /* SS */ break;
284 case 0x65: /* GS */ break;
285 case 0x64: /* FS */ break;
286 case 0xf2: /* repnz */ break;
287 case 0xf3: /* rep */ break;
288 default: pref_done = 1;
289 }
290 } while (!pref_done);
291
46ddf551 292 /* VM86 mode */
b333af06
FB		 293 switch(opcode) {
294 case 0x9c: /* pushf */
b333af06 295 if (data32) {
46ddf551 296 vm_putl(ssp, sp - 4, get_vflags(env));
b333af06
FB		 297 ADD16(env->regs[R_ESP], -4);
298 } else {
299 vm_putw(ssp, sp - 2, get_vflags(env));
300 ADD16(env->regs[R_ESP], -2);
301 }
302 env->eip = ip;
303 VM86_FAULT_RETURN;
46ddf551 304
b333af06
FB		 305 case 0x9d: /* popf */
306 if (data32) {
307 newflags = vm_getl(ssp, sp);
46ddf551 308 ADD16(env->regs[R_ESP], 4);
b333af06
FB		 309 } else {
310 newflags = vm_getw(ssp, sp);
311 ADD16(env->regs[R_ESP], 2);
312 }
313 env->eip = ip;
314 CHECK_IF_IN_TRAP();
315 if (data32) {
316 if (set_vflags_long(newflags, env))
46ddf551 317 return;
b333af06
FB		 318 } else {
319 if (set_vflags_short(newflags, env))
46ddf551 320 return;
46ddf551 321 }
46ddf551
FB		 322 VM86_FAULT_RETURN;
323
324 case 0xcd: /* int */
b333af06
FB		 325 intno = csp[ip];
326 ADD16(ip, 1);
327 env->eip = ip;
328 if (ts->vm86plus.vm86plus.flags & TARGET_vm86dbg_active) {
329 if ( (ts->vm86plus.vm86plus.vm86dbg_intxxtab[intno >> 3] >>
330 (intno &7)) & 1) {
331 return_to_32bit(env, TARGET_VM86_INTx + (intno << 8));
332 return;
333 }
334 }
335 do_int(env, intno);
46ddf551
FB		 336 break;
337
338 case 0xcf: /* iret */
b333af06
FB		 339 if (data32) {
340 newip = vm_getl(ssp, sp) & 0xffff;
341 newcs = vm_getl(ssp, sp + 4) & 0xffff;
342 newflags = vm_getl(ssp, sp + 8);
343 ADD16(env->regs[R_ESP], 12);
344 } else {
345 newip = vm_getw(ssp, sp);
346 newcs = vm_getw(ssp, sp + 2);
347 newflags = vm_getw(ssp, sp + 4);
348 ADD16(env->regs[R_ESP], 6);
349 }
350 env->eip = newip;
351 cpu_x86_load_seg(env, R_CS, newcs);
352 CHECK_IF_IN_TRAP();
353 if (data32) {
354 if (set_vflags_long(newflags, env))
355 return;
356 } else {
357 if (set_vflags_short(newflags, env))
358 return;
359 }
46ddf551 360 VM86_FAULT_RETURN;
b333af06 361
46ddf551 362 case 0xfa: /* cli */
b333af06 363 env->eip = ip;
46ddf551
FB		 364 clear_IF(env);
365 VM86_FAULT_RETURN;
366
367 case 0xfb: /* sti */
b333af06 368 env->eip = ip;
46ddf551
FB		 369 if (set_IF(env))
370 return;
371 VM86_FAULT_RETURN;
372
373 default:
46ddf551
FB		 374 /* real VM86 GPF exception */
375 return_to_32bit(env, TARGET_VM86_UNKNOWN);
376 break;
377 }
378}
379
380int do_vm86(CPUX86State *env, long subfunction,
381 struct target_vm86plus_struct * target_v86)
382{
383 TaskState *ts = env->opaque;
384 int ret;
385
386 switch (subfunction) {
387 case TARGET_VM86_REQUEST_IRQ:
388 case TARGET_VM86_FREE_IRQ:
389 case TARGET_VM86_GET_IRQ_BITS:
390 case TARGET_VM86_GET_AND_RESET_IRQ:
391 gemu_log("qemu: unsupported vm86 subfunction (%ld)\n", subfunction);
392 ret = -EINVAL;
393 goto out;
394 case TARGET_VM86_PLUS_INSTALL_CHECK:
395 /* NOTE: on old vm86 stuff this will return the error
396 from verify_area(), because the subfunction is
397 interpreted as (invalid) address to vm86_struct.
398 So the installation check works.
399 */
400 ret = 0;
401 goto out;
402 }
403
404 ts->target_v86 = target_v86;
405 /* save current CPU regs */
406 ts->vm86_saved_regs.eax = 0; /* default vm86 syscall return code */
407 ts->vm86_saved_regs.ebx = env->regs[R_EBX];
408 ts->vm86_saved_regs.ecx = env->regs[R_ECX];
409 ts->vm86_saved_regs.edx = env->regs[R_EDX];
410 ts->vm86_saved_regs.esi = env->regs[R_ESI];
411 ts->vm86_saved_regs.edi = env->regs[R_EDI];
412 ts->vm86_saved_regs.ebp = env->regs[R_EBP];
413 ts->vm86_saved_regs.esp = env->regs[R_ESP];
414 ts->vm86_saved_regs.eflags = env->eflags;
415 ts->vm86_saved_regs.eip = env->eip;
416 ts->vm86_saved_regs.cs = env->segs[R_CS];
417 ts->vm86_saved_regs.ss = env->segs[R_SS];
418 ts->vm86_saved_regs.ds = env->segs[R_DS];
419 ts->vm86_saved_regs.es = env->segs[R_ES];
420 ts->vm86_saved_regs.fs = env->segs[R_FS];
421 ts->vm86_saved_regs.gs = env->segs[R_GS];
422
423 /* build vm86 CPU state */
424 ts->v86flags = tswap32(target_v86->regs.eflags);
425 env->eflags = (env->eflags & ~SAFE_MASK) |
426 (tswap32(target_v86->regs.eflags) & SAFE_MASK) | VM_MASK;
b333af06
FB		 427
428 ts->vm86plus.cpu_type = tswapl(target_v86->cpu_type);
429 switch (ts->vm86plus.cpu_type) {
430 case TARGET_CPU_286:
431 ts->v86mask = 0;
432 break;
433 case TARGET_CPU_386:
434 ts->v86mask = NT_MASK | IOPL_MASK;
435 break;
436 case TARGET_CPU_486:
437 ts->v86mask = AC_MASK | NT_MASK | IOPL_MASK;
438 break;
439 default:
440 ts->v86mask = ID_MASK | AC_MASK | NT_MASK | IOPL_MASK;
441 break;
442 }
46ddf551
FB		 443
444 env->regs[R_EBX] = tswap32(target_v86->regs.ebx);
445 env->regs[R_ECX] = tswap32(target_v86->regs.ecx);
446 env->regs[R_EDX] = tswap32(target_v86->regs.edx);
447 env->regs[R_ESI] = tswap32(target_v86->regs.esi);
448 env->regs[R_EDI] = tswap32(target_v86->regs.edi);
449 env->regs[R_EBP] = tswap32(target_v86->regs.ebp);
450 env->regs[R_ESP] = tswap32(target_v86->regs.esp);
451 env->eip = tswap32(target_v86->regs.eip);
452 cpu_x86_load_seg(env, R_CS, tswap16(target_v86->regs.cs));
453 cpu_x86_load_seg(env, R_SS, tswap16(target_v86->regs.ss));
454 cpu_x86_load_seg(env, R_DS, tswap16(target_v86->regs.ds));
455 cpu_x86_load_seg(env, R_ES, tswap16(target_v86->regs.es));
456 cpu_x86_load_seg(env, R_FS, tswap16(target_v86->regs.fs));
457 cpu_x86_load_seg(env, R_GS, tswap16(target_v86->regs.gs));
458 ret = tswap32(target_v86->regs.eax); /* eax will be restored at
459 the end of the syscall */
b333af06
FB		 460 memcpy(&ts->vm86plus.int_revectored,
461 &target_v86->int_revectored, 32);
462 memcpy(&ts->vm86plus.int21_revectored,
463 &target_v86->int21_revectored, 32);
464 ts->vm86plus.vm86plus.flags = tswapl(target_v86->vm86plus.flags);
465 memcpy(&ts->vm86plus.vm86plus.vm86dbg_intxxtab,
466 target_v86->vm86plus.vm86dbg_intxxtab, 32);
467
46ddf551
FB		 468#ifdef DEBUG_VM86
469 fprintf(logfile, "do_vm86: cs:ip=%04x:%04x\n", env->segs[R_CS], env->eip);
470#endif
471 /* now the virtual CPU is ready for vm86 execution ! */
472 out:
473 return ret;
474}
475
Qemu copy for testing