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dd83b06a AF |
1 | /* |
2 | * QEMU CPU model | |
3 | * | |
4 | * Copyright (c) 2012 SUSE LINUX Products GmbH | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or | |
7 | * modify it under the terms of the GNU General Public License | |
8 | * as published by the Free Software Foundation; either version 2 | |
9 | * of the License, or (at your option) any later version. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License | |
17 | * along with this program; if not, see | |
18 | * <http://www.gnu.org/licenses/gpl-2.0.html> | |
19 | */ | |
20 | ||
14cccb61 | 21 | #include "qom/cpu.h" |
dd83b06a | 22 | #include "qemu-common.h" |
13eed94e | 23 | #include "sysemu/kvm.h" |
066e9b27 IM |
24 | #include "qemu/notify.h" |
25 | #include "sysemu/sysemu.h" | |
26 | ||
69e5ff06 IM |
27 | typedef struct CPUExistsArgs { |
28 | int64_t id; | |
29 | bool found; | |
30 | } CPUExistsArgs; | |
31 | ||
32 | static void cpu_exist_cb(CPUState *cpu, void *data) | |
33 | { | |
34 | CPUClass *klass = CPU_GET_CLASS(cpu); | |
35 | CPUExistsArgs *arg = data; | |
36 | ||
37 | if (klass->get_arch_id(cpu) == arg->id) { | |
38 | arg->found = true; | |
39 | } | |
40 | } | |
41 | ||
42 | bool cpu_exists(int64_t id) | |
43 | { | |
44 | CPUExistsArgs data = { | |
45 | .id = id, | |
46 | .found = false, | |
47 | }; | |
48 | ||
49 | qemu_for_each_cpu(cpu_exist_cb, &data); | |
50 | return data.found; | |
51 | } | |
52 | ||
444d5590 AF |
53 | bool cpu_paging_enabled(const CPUState *cpu) |
54 | { | |
55 | CPUClass *cc = CPU_GET_CLASS(cpu); | |
56 | ||
57 | return cc->get_paging_enabled(cpu); | |
58 | } | |
59 | ||
60 | static bool cpu_common_get_paging_enabled(const CPUState *cpu) | |
61 | { | |
62 | return true; | |
63 | } | |
64 | ||
a23bbfda AF |
65 | void cpu_get_memory_mapping(CPUState *cpu, MemoryMappingList *list, |
66 | Error **errp) | |
67 | { | |
68 | CPUClass *cc = CPU_GET_CLASS(cpu); | |
69 | ||
70 | return cc->get_memory_mapping(cpu, list, errp); | |
71 | } | |
72 | ||
73 | static void cpu_common_get_memory_mapping(CPUState *cpu, | |
74 | MemoryMappingList *list, | |
75 | Error **errp) | |
76 | { | |
77 | error_setg(errp, "Obtaining memory mappings is unsupported on this CPU."); | |
78 | } | |
79 | ||
066e9b27 IM |
80 | /* CPU hot-plug notifiers */ |
81 | static NotifierList cpu_added_notifiers = | |
82 | NOTIFIER_LIST_INITIALIZER(cpu_add_notifiers); | |
83 | ||
84 | void qemu_register_cpu_added_notifier(Notifier *notifier) | |
85 | { | |
86 | notifier_list_add(&cpu_added_notifiers, notifier); | |
87 | } | |
dd83b06a | 88 | |
d8ed887b AF |
89 | void cpu_reset_interrupt(CPUState *cpu, int mask) |
90 | { | |
91 | cpu->interrupt_request &= ~mask; | |
92 | } | |
93 | ||
c72bf468 JF |
94 | int cpu_write_elf32_qemunote(WriteCoreDumpFunction f, CPUState *cpu, |
95 | void *opaque) | |
96 | { | |
97 | CPUClass *cc = CPU_GET_CLASS(cpu); | |
98 | ||
99 | return (*cc->write_elf32_qemunote)(f, cpu, opaque); | |
100 | } | |
101 | ||
102 | static int cpu_common_write_elf32_qemunote(WriteCoreDumpFunction f, | |
103 | CPUState *cpu, void *opaque) | |
104 | { | |
105 | return -1; | |
106 | } | |
107 | ||
108 | int cpu_write_elf32_note(WriteCoreDumpFunction f, CPUState *cpu, | |
109 | int cpuid, void *opaque) | |
110 | { | |
111 | CPUClass *cc = CPU_GET_CLASS(cpu); | |
112 | ||
113 | return (*cc->write_elf32_note)(f, cpu, cpuid, opaque); | |
114 | } | |
115 | ||
116 | static int cpu_common_write_elf32_note(WriteCoreDumpFunction f, | |
117 | CPUState *cpu, int cpuid, | |
118 | void *opaque) | |
119 | { | |
120 | return -1; | |
121 | } | |
122 | ||
123 | int cpu_write_elf64_qemunote(WriteCoreDumpFunction f, CPUState *cpu, | |
124 | void *opaque) | |
125 | { | |
126 | CPUClass *cc = CPU_GET_CLASS(cpu); | |
127 | ||
128 | return (*cc->write_elf64_qemunote)(f, cpu, opaque); | |
129 | } | |
130 | ||
131 | static int cpu_common_write_elf64_qemunote(WriteCoreDumpFunction f, | |
132 | CPUState *cpu, void *opaque) | |
133 | { | |
134 | return -1; | |
135 | } | |
136 | ||
137 | int cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cpu, | |
138 | int cpuid, void *opaque) | |
139 | { | |
140 | CPUClass *cc = CPU_GET_CLASS(cpu); | |
141 | ||
142 | return (*cc->write_elf64_note)(f, cpu, cpuid, opaque); | |
143 | } | |
144 | ||
145 | static int cpu_common_write_elf64_note(WriteCoreDumpFunction f, | |
146 | CPUState *cpu, int cpuid, | |
147 | void *opaque) | |
148 | { | |
149 | return -1; | |
150 | } | |
151 | ||
152 | ||
dd83b06a AF |
153 | void cpu_reset(CPUState *cpu) |
154 | { | |
155 | CPUClass *klass = CPU_GET_CLASS(cpu); | |
156 | ||
157 | if (klass->reset != NULL) { | |
158 | (*klass->reset)(cpu); | |
159 | } | |
160 | } | |
161 | ||
162 | static void cpu_common_reset(CPUState *cpu) | |
163 | { | |
fcd7d003 | 164 | cpu->exit_request = 0; |
259186a7 | 165 | cpu->interrupt_request = 0; |
d77953b9 | 166 | cpu->current_tb = NULL; |
259186a7 | 167 | cpu->halted = 0; |
dd83b06a AF |
168 | } |
169 | ||
2b8c2754 AF |
170 | ObjectClass *cpu_class_by_name(const char *typename, const char *cpu_model) |
171 | { | |
172 | CPUClass *cc = CPU_CLASS(object_class_by_name(typename)); | |
173 | ||
174 | return cc->class_by_name(cpu_model); | |
175 | } | |
176 | ||
177 | static ObjectClass *cpu_common_class_by_name(const char *cpu_model) | |
178 | { | |
179 | return NULL; | |
180 | } | |
181 | ||
4f658099 AF |
182 | static void cpu_common_realizefn(DeviceState *dev, Error **errp) |
183 | { | |
13eed94e IM |
184 | CPUState *cpu = CPU(dev); |
185 | ||
186 | if (dev->hotplugged) { | |
187 | cpu_synchronize_post_init(cpu); | |
066e9b27 | 188 | notifier_list_notify(&cpu_added_notifiers, dev); |
6afb4721 | 189 | cpu_resume(cpu); |
13eed94e | 190 | } |
4f658099 AF |
191 | } |
192 | ||
997395d3 IM |
193 | static int64_t cpu_common_get_arch_id(CPUState *cpu) |
194 | { | |
195 | return cpu->cpu_index; | |
196 | } | |
197 | ||
dd83b06a AF |
198 | static void cpu_class_init(ObjectClass *klass, void *data) |
199 | { | |
961f8395 | 200 | DeviceClass *dc = DEVICE_CLASS(klass); |
dd83b06a AF |
201 | CPUClass *k = CPU_CLASS(klass); |
202 | ||
2b8c2754 | 203 | k->class_by_name = cpu_common_class_by_name; |
dd83b06a | 204 | k->reset = cpu_common_reset; |
997395d3 | 205 | k->get_arch_id = cpu_common_get_arch_id; |
444d5590 | 206 | k->get_paging_enabled = cpu_common_get_paging_enabled; |
a23bbfda | 207 | k->get_memory_mapping = cpu_common_get_memory_mapping; |
c72bf468 JF |
208 | k->write_elf32_qemunote = cpu_common_write_elf32_qemunote; |
209 | k->write_elf32_note = cpu_common_write_elf32_note; | |
210 | k->write_elf64_qemunote = cpu_common_write_elf64_qemunote; | |
211 | k->write_elf64_note = cpu_common_write_elf64_note; | |
4f658099 | 212 | dc->realize = cpu_common_realizefn; |
961f8395 | 213 | dc->no_user = 1; |
dd83b06a AF |
214 | } |
215 | ||
961f8395 | 216 | static const TypeInfo cpu_type_info = { |
dd83b06a | 217 | .name = TYPE_CPU, |
961f8395 | 218 | .parent = TYPE_DEVICE, |
dd83b06a AF |
219 | .instance_size = sizeof(CPUState), |
220 | .abstract = true, | |
221 | .class_size = sizeof(CPUClass), | |
222 | .class_init = cpu_class_init, | |
223 | }; | |
224 | ||
225 | static void cpu_register_types(void) | |
226 | { | |
227 | type_register_static(&cpu_type_info); | |
228 | } | |
229 | ||
230 | type_init(cpu_register_types) |