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Merge tag 'pull-monitor-2023-03-02' of https://repo.or.cz/qemu/armbru into staging
[mirror_qemu.git] / softmmu / memory.c
CommitLineData
093bc2cd
AK
1/*
2 * Physical memory management
3 *
4 * Copyright 2011 Red Hat, Inc. and/or its affiliates
5 *
6 * Authors:
7 * Avi Kivity <avi@redhat.com>
8 *
9 * This work is licensed under the terms of the GNU GPL, version 2. See
10 * the COPYING file in the top-level directory.
11 *
6b620ca3
PB
12 * Contributions after 2012-01-13 are licensed under the terms of the
13 * GNU GPL, version 2 or (at your option) any later version.
093bc2cd
AK
14 */
15
d38ea87a 16#include "qemu/osdep.h"
21786c7e 17#include "qemu/log.h"
da34e65c 18#include "qapi/error.h"
022c62cb 19#include "exec/memory.h"
409ddd01 20#include "qapi/visitor.h"
1de7afc9 21#include "qemu/bitops.h"
8c56c1a5 22#include "qemu/error-report.h"
db725815 23#include "qemu/main-loop.h"
b6b71cb5 24#include "qemu/qemu-print.h"
2c9b15ca 25#include "qom/object.h"
8b7a5507 26#include "trace.h"
093bc2cd 27
022c62cb 28#include "exec/memory-internal.h"
220c3ebd 29#include "exec/ram_addr.h"
8c56c1a5 30#include "sysemu/kvm.h"
54d31236 31#include "sysemu/runstate.h"
14a48c1d 32#include "sysemu/tcg.h"
940e43aa 33#include "qemu/accel.h"
8072aae3 34#include "hw/boards.h"
b08199c6 35#include "migration/vmstate.h"
baa44bce 36#include "exec/address-spaces.h"
67d95c15 37
d197063f
PB
38//#define DEBUG_UNASSIGNED
39
22bde714
JK
40static unsigned memory_region_transaction_depth;
41static bool memory_region_update_pending;
4dc56152 42static bool ioeventfd_update_pending;
63b41db4 43unsigned int global_dirty_tracking;
7664e80c 44
eae3eb3e 45static QTAILQ_HEAD(, MemoryListener) memory_listeners
72e22d2f 46 = QTAILQ_HEAD_INITIALIZER(memory_listeners);
4ef4db86 47
0d673e36
AK
48static QTAILQ_HEAD(, AddressSpace) address_spaces
49 = QTAILQ_HEAD_INITIALIZER(address_spaces);
50
967dc9b1
AK
51static GHashTable *flat_views;
52
093bc2cd
AK
53typedef struct AddrRange AddrRange;
54
8417cebf 55/*
c9cdaa3a 56 * Note that signed integers are needed for negative offsetting in aliases
8417cebf
AK
57 * (large MemoryRegion::alias_offset).
58 */
093bc2cd 59struct AddrRange {
08dafab4
AK
60 Int128 start;
61 Int128 size;
093bc2cd
AK
62};
63
08dafab4 64static AddrRange addrrange_make(Int128 start, Int128 size)
093bc2cd
AK
65{
66 return (AddrRange) { start, size };
67}
68
69static bool addrrange_equal(AddrRange r1, AddrRange r2)
70{
08dafab4 71 return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
093bc2cd
AK
72}
73
08dafab4 74static Int128 addrrange_end(AddrRange r)
093bc2cd 75{
08dafab4 76 return int128_add(r.start, r.size);
093bc2cd
AK
77}
78
08dafab4 79static AddrRange addrrange_shift(AddrRange range, Int128 delta)
093bc2cd 80{
08dafab4 81 int128_addto(&range.start, delta);
093bc2cd
AK
82 return range;
83}
84
08dafab4
AK
85static bool addrrange_contains(AddrRange range, Int128 addr)
86{
87 return int128_ge(addr, range.start)
88 && int128_lt(addr, addrrange_end(range));
89}
90
093bc2cd
AK
91static bool addrrange_intersects(AddrRange r1, AddrRange r2)
92{
08dafab4
AK
93 return addrrange_contains(r1, r2.start)
94 || addrrange_contains(r2, r1.start);
093bc2cd
AK
95}
96
97static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
98{
08dafab4
AK
99 Int128 start = int128_max(r1.start, r2.start);
100 Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
101 return addrrange_make(start, int128_sub(end, start));
093bc2cd
AK
102}
103
0e0d36b4
AK
104enum ListenerDirection { Forward, Reverse };
105
7376e582 106#define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \
0e0d36b4
AK
107 do { \
108 MemoryListener *_listener; \
109 \
110 switch (_direction) { \
111 case Forward: \
112 QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
975aefe0
AK
113 if (_listener->_callback) { \
114 _listener->_callback(_listener, ##_args); \
115 } \
0e0d36b4
AK
116 } \
117 break; \
118 case Reverse: \
eae3eb3e 119 QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, link) { \
975aefe0
AK
120 if (_listener->_callback) { \
121 _listener->_callback(_listener, ##_args); \
122 } \
0e0d36b4
AK
123 } \
124 break; \
125 default: \
126 abort(); \
127 } \
128 } while (0)
129
9a54635d 130#define MEMORY_LISTENER_CALL(_as, _callback, _direction, _section, _args...) \
7376e582
AK
131 do { \
132 MemoryListener *_listener; \
133 \
134 switch (_direction) { \
135 case Forward: \
eae3eb3e 136 QTAILQ_FOREACH(_listener, &(_as)->listeners, link_as) { \
9a54635d 137 if (_listener->_callback) { \
7376e582
AK
138 _listener->_callback(_listener, _section, ##_args); \
139 } \
140 } \
141 break; \
142 case Reverse: \
eae3eb3e 143 QTAILQ_FOREACH_REVERSE(_listener, &(_as)->listeners, link_as) { \
9a54635d 144 if (_listener->_callback) { \
7376e582
AK
145 _listener->_callback(_listener, _section, ##_args); \
146 } \
147 } \
148 break; \
149 default: \
150 abort(); \
151 } \
152 } while (0)
153
dfde4e6e 154/* No need to ref/unref .mr, the FlatRange keeps it alive. */
b2dfd71c 155#define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback, _args...) \
9c1f8f44 156 do { \
16620684
AK
157 MemoryRegionSection mrs = section_from_flat_range(fr, \
158 address_space_to_flatview(as)); \
9a54635d 159 MEMORY_LISTENER_CALL(as, callback, dir, &mrs, ##_args); \
9c1f8f44 160 } while(0)
0e0d36b4 161
093bc2cd
AK
162struct CoalescedMemoryRange {
163 AddrRange addr;
164 QTAILQ_ENTRY(CoalescedMemoryRange) link;
165};
166
3e9d69e7
AK
167struct MemoryRegionIoeventfd {
168 AddrRange addr;
169 bool match_data;
170 uint64_t data;
753d5e14 171 EventNotifier *e;
3e9d69e7
AK
172};
173
73bb753d
TB
174static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd *a,
175 MemoryRegionIoeventfd *b)
3e9d69e7 176{
73bb753d 177 if (int128_lt(a->addr.start, b->addr.start)) {
3e9d69e7 178 return true;
73bb753d 179 } else if (int128_gt(a->addr.start, b->addr.start)) {
3e9d69e7 180 return false;
73bb753d 181 } else if (int128_lt(a->addr.size, b->addr.size)) {
3e9d69e7 182 return true;
73bb753d 183 } else if (int128_gt(a->addr.size, b->addr.size)) {
3e9d69e7 184 return false;
73bb753d 185 } else if (a->match_data < b->match_data) {
3e9d69e7 186 return true;
73bb753d 187 } else if (a->match_data > b->match_data) {
3e9d69e7 188 return false;
73bb753d
TB
189 } else if (a->match_data) {
190 if (a->data < b->data) {
3e9d69e7 191 return true;
73bb753d 192 } else if (a->data > b->data) {
3e9d69e7
AK
193 return false;
194 }
195 }
73bb753d 196 if (a->e < b->e) {
3e9d69e7 197 return true;
73bb753d 198 } else if (a->e > b->e) {
3e9d69e7
AK
199 return false;
200 }
201 return false;
202}
203
73bb753d
TB
204static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd *a,
205 MemoryRegionIoeventfd *b)
3e9d69e7 206{
e6ffd757
EA
207 if (int128_eq(a->addr.start, b->addr.start) &&
208 (!int128_nz(a->addr.size) || !int128_nz(b->addr.size) ||
209 (int128_eq(a->addr.size, b->addr.size) &&
210 (a->match_data == b->match_data) &&
211 ((a->match_data && (a->data == b->data)) || !a->match_data) &&
212 (a->e == b->e))))
213 return true;
214
215 return false;
3e9d69e7
AK
216}
217
093bc2cd
AK
218/* Range of memory in the global map. Addresses are absolute. */
219struct FlatRange {
220 MemoryRegion *mr;
a8170e5e 221 hwaddr offset_in_region;
093bc2cd 222 AddrRange addr;
5a583347 223 uint8_t dirty_log_mask;
b138e654 224 bool romd_mode;
fb1cd6f9 225 bool readonly;
c26763f8 226 bool nonvolatile;
093bc2cd
AK
227};
228
093bc2cd
AK
229#define FOR_EACH_FLAT_RANGE(var, view) \
230 for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
231
9c1f8f44 232static inline MemoryRegionSection
16620684 233section_from_flat_range(FlatRange *fr, FlatView *fv)
9c1f8f44
PB
234{
235 return (MemoryRegionSection) {
236 .mr = fr->mr,
16620684 237 .fv = fv,
9c1f8f44
PB
238 .offset_within_region = fr->offset_in_region,
239 .size = fr->addr.size,
240 .offset_within_address_space = int128_get64(fr->addr.start),
241 .readonly = fr->readonly,
c26763f8 242 .nonvolatile = fr->nonvolatile,
9c1f8f44
PB
243 };
244}
245
093bc2cd
AK
246static bool flatrange_equal(FlatRange *a, FlatRange *b)
247{
248 return a->mr == b->mr
249 && addrrange_equal(a->addr, b->addr)
d0a9b5bc 250 && a->offset_in_region == b->offset_in_region
b138e654 251 && a->romd_mode == b->romd_mode
c26763f8
MAL
252 && a->readonly == b->readonly
253 && a->nonvolatile == b->nonvolatile;
093bc2cd
AK
254}
255
89c177bb 256static FlatView *flatview_new(MemoryRegion *mr_root)
093bc2cd 257{
cc94cd6d
AK
258 FlatView *view;
259
260 view = g_new0(FlatView, 1);
856d7245 261 view->ref = 1;
89c177bb
AK
262 view->root = mr_root;
263 memory_region_ref(mr_root);
02d9651d 264 trace_flatview_new(view, mr_root);
cc94cd6d
AK
265
266 return view;
093bc2cd
AK
267}
268
269/* Insert a range into a given position. Caller is responsible for maintaining
270 * sorting order.
271 */
272static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
273{
274 if (view->nr == view->nr_allocated) {
275 view->nr_allocated = MAX(2 * view->nr, 10);
7267c094 276 view->ranges = g_realloc(view->ranges,
093bc2cd
AK
277 view->nr_allocated * sizeof(*view->ranges));
278 }
279 memmove(view->ranges + pos + 1, view->ranges + pos,
280 (view->nr - pos) * sizeof(FlatRange));
281 view->ranges[pos] = *range;
dfde4e6e 282 memory_region_ref(range->mr);
093bc2cd
AK
283 ++view->nr;
284}
285
286static void flatview_destroy(FlatView *view)
287{
dfde4e6e
PB
288 int i;
289
02d9651d 290 trace_flatview_destroy(view, view->root);
66a6df1d
AK
291 if (view->dispatch) {
292 address_space_dispatch_free(view->dispatch);
293 }
dfde4e6e
PB
294 for (i = 0; i < view->nr; i++) {
295 memory_region_unref(view->ranges[i].mr);
296 }
7267c094 297 g_free(view->ranges);
89c177bb 298 memory_region_unref(view->root);
a9a0c06d 299 g_free(view);
093bc2cd
AK
300}
301
447b0d0b 302static bool flatview_ref(FlatView *view)
856d7245 303{
d73415a3 304 return qatomic_fetch_inc_nonzero(&view->ref) > 0;
856d7245
PB
305}
306
48564041 307void flatview_unref(FlatView *view)
856d7245 308{
d73415a3 309 if (qatomic_fetch_dec(&view->ref) == 1) {
02d9651d 310 trace_flatview_destroy_rcu(view, view->root);
092aa2fc 311 assert(view->root);
66a6df1d 312 call_rcu(view, flatview_destroy, rcu);
856d7245
PB
313 }
314}
315
3d8e6bf9
AK
316static bool can_merge(FlatRange *r1, FlatRange *r2)
317{
08dafab4 318 return int128_eq(addrrange_end(r1->addr), r2->addr.start)
3d8e6bf9 319 && r1->mr == r2->mr
08dafab4
AK
320 && int128_eq(int128_add(int128_make64(r1->offset_in_region),
321 r1->addr.size),
322 int128_make64(r2->offset_in_region))
d0a9b5bc 323 && r1->dirty_log_mask == r2->dirty_log_mask
b138e654 324 && r1->romd_mode == r2->romd_mode
c26763f8
MAL
325 && r1->readonly == r2->readonly
326 && r1->nonvolatile == r2->nonvolatile;
3d8e6bf9
AK
327}
328
8508e024 329/* Attempt to simplify a view by merging adjacent ranges */
3d8e6bf9
AK
330static void flatview_simplify(FlatView *view)
331{
838ec117 332 unsigned i, j, k;
3d8e6bf9
AK
333
334 i = 0;
335 while (i < view->nr) {
336 j = i + 1;
337 while (j < view->nr
338 && can_merge(&view->ranges[j-1], &view->ranges[j])) {
08dafab4 339 int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
3d8e6bf9
AK
340 ++j;
341 }
342 ++i;
838ec117
KW
343 for (k = i; k < j; k++) {
344 memory_region_unref(view->ranges[k].mr);
345 }
3d8e6bf9
AK
346 memmove(&view->ranges[i], &view->ranges[j],
347 (view->nr - j) * sizeof(view->ranges[j]));
348 view->nr -= j - i;
349 }
350}
351
e7342aa3
PB
352static bool memory_region_big_endian(MemoryRegion *mr)
353{
ee3eb3a7 354#if TARGET_BIG_ENDIAN
e7342aa3
PB
355 return mr->ops->endianness != DEVICE_LITTLE_ENDIAN;
356#else
357 return mr->ops->endianness == DEVICE_BIG_ENDIAN;
358#endif
359}
360
9bf825bf 361static void adjust_endianness(MemoryRegion *mr, uint64_t *data, MemOp op)
e11ef3d1 362{
9bf825bf
TN
363 if ((op & MO_BSWAP) != devend_memop(mr->ops->endianness)) {
364 switch (op & MO_SIZE) {
365 case MO_8:
e11ef3d1 366 break;
9bf825bf 367 case MO_16:
e11ef3d1
PB
368 *data = bswap16(*data);
369 break;
9bf825bf 370 case MO_32:
e11ef3d1
PB
371 *data = bswap32(*data);
372 break;
9bf825bf 373 case MO_64:
e11ef3d1
PB
374 *data = bswap64(*data);
375 break;
376 default:
9bf825bf 377 g_assert_not_reached();
e11ef3d1
PB
378 }
379 }
380}
381
3c754a93 382static inline void memory_region_shift_read_access(uint64_t *value,
98f52cdb 383 signed shift,
3c754a93
PMD
384 uint64_t mask,
385 uint64_t tmp)
386{
98f52cdb
PMD
387 if (shift >= 0) {
388 *value |= (tmp & mask) << shift;
389 } else {
390 *value |= (tmp & mask) >> -shift;
391 }
3c754a93
PMD
392}
393
394static inline uint64_t memory_region_shift_write_access(uint64_t *value,
98f52cdb 395 signed shift,
3c754a93
PMD
396 uint64_t mask)
397{
98f52cdb
PMD
398 uint64_t tmp;
399
400 if (shift >= 0) {
401 tmp = (*value >> shift) & mask;
402 } else {
403 tmp = (*value << -shift) & mask;
404 }
405
406 return tmp;
3c754a93
PMD
407}
408
4779dc1d
HB
409static hwaddr memory_region_to_absolute_addr(MemoryRegion *mr, hwaddr offset)
410{
411 MemoryRegion *root;
412 hwaddr abs_addr = offset;
413
414 abs_addr += mr->addr;
415 for (root = mr; root->container; ) {
416 root = root->container;
417 abs_addr += root->addr;
418 }
419
420 return abs_addr;
421}
422
5a68be94
HB
423static int get_cpu_index(void)
424{
425 if (current_cpu) {
426 return current_cpu->cpu_index;
427 }
428 return -1;
429}
430
cc05c43a 431static MemTxResult memory_region_read_accessor(MemoryRegion *mr,
ce5d2f33
PB
432 hwaddr addr,
433 uint64_t *value,
434 unsigned size,
98f52cdb 435 signed shift,
cc05c43a
PM
436 uint64_t mask,
437 MemTxAttrs attrs)
ce5d2f33 438{
ce5d2f33
PB
439 uint64_t tmp;
440
cc05c43a 441 tmp = mr->ops->read(mr->opaque, addr, size);
23d92d68 442 if (mr->subpage) {
5a68be94 443 trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
380ea843 444 } else if (trace_event_get_state_backends(TRACE_MEMORY_REGION_OPS_READ)) {
4779dc1d 445 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
9bb54054
PMD
446 trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size,
447 memory_region_name(mr));
23d92d68 448 }
3c754a93 449 memory_region_shift_read_access(value, shift, mask, tmp);
cc05c43a 450 return MEMTX_OK;
ce5d2f33
PB
451}
452
cc05c43a
PM
453static MemTxResult memory_region_read_with_attrs_accessor(MemoryRegion *mr,
454 hwaddr addr,
455 uint64_t *value,
456 unsigned size,
98f52cdb 457 signed shift,
cc05c43a
PM
458 uint64_t mask,
459 MemTxAttrs attrs)
164a4dcd 460{
cc05c43a
PM
461 uint64_t tmp = 0;
462 MemTxResult r;
164a4dcd 463
cc05c43a 464 r = mr->ops->read_with_attrs(mr->opaque, addr, &tmp, size, attrs);
23d92d68 465 if (mr->subpage) {
5a68be94 466 trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
380ea843 467 } else if (trace_event_get_state_backends(TRACE_MEMORY_REGION_OPS_READ)) {
4779dc1d 468 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
9bb54054
PMD
469 trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size,
470 memory_region_name(mr));
23d92d68 471 }
3c754a93 472 memory_region_shift_read_access(value, shift, mask, tmp);
cc05c43a 473 return r;
164a4dcd
AK
474}
475
cc05c43a
PM
476static MemTxResult memory_region_write_accessor(MemoryRegion *mr,
477 hwaddr addr,
478 uint64_t *value,
479 unsigned size,
98f52cdb 480 signed shift,
cc05c43a
PM
481 uint64_t mask,
482 MemTxAttrs attrs)
164a4dcd 483{
3c754a93 484 uint64_t tmp = memory_region_shift_write_access(value, shift, mask);
164a4dcd 485
23d92d68 486 if (mr->subpage) {
5a68be94 487 trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
380ea843 488 } else if (trace_event_get_state_backends(TRACE_MEMORY_REGION_OPS_WRITE)) {
4779dc1d 489 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
9bb54054
PMD
490 trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size,
491 memory_region_name(mr));
23d92d68 492 }
164a4dcd 493 mr->ops->write(mr->opaque, addr, tmp, size);
cc05c43a 494 return MEMTX_OK;
164a4dcd
AK
495}
496
cc05c43a
PM
497static MemTxResult memory_region_write_with_attrs_accessor(MemoryRegion *mr,
498 hwaddr addr,
499 uint64_t *value,
500 unsigned size,
98f52cdb 501 signed shift,
cc05c43a
PM
502 uint64_t mask,
503 MemTxAttrs attrs)
504{
3c754a93 505 uint64_t tmp = memory_region_shift_write_access(value, shift, mask);
cc05c43a 506
23d92d68 507 if (mr->subpage) {
5a68be94 508 trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
380ea843 509 } else if (trace_event_get_state_backends(TRACE_MEMORY_REGION_OPS_WRITE)) {
4779dc1d 510 hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
9bb54054
PMD
511 trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size,
512 memory_region_name(mr));
23d92d68 513 }
cc05c43a
PM
514 return mr->ops->write_with_attrs(mr->opaque, addr, tmp, size, attrs);
515}
516
517static MemTxResult access_with_adjusted_size(hwaddr addr,
164a4dcd
AK
518 uint64_t *value,
519 unsigned size,
520 unsigned access_size_min,
521 unsigned access_size_max,
05e015f7
KF
522 MemTxResult (*access_fn)
523 (MemoryRegion *mr,
524 hwaddr addr,
525 uint64_t *value,
526 unsigned size,
98f52cdb 527 signed shift,
05e015f7
KF
528 uint64_t mask,
529 MemTxAttrs attrs),
cc05c43a
PM
530 MemoryRegion *mr,
531 MemTxAttrs attrs)
164a4dcd
AK
532{
533 uint64_t access_mask;
534 unsigned access_size;
535 unsigned i;
cc05c43a 536 MemTxResult r = MEMTX_OK;
164a4dcd
AK
537
538 if (!access_size_min) {
539 access_size_min = 1;
540 }
541 if (!access_size_max) {
542 access_size_max = 4;
543 }
ce5d2f33
PB
544
545 /* FIXME: support unaligned access? */
164a4dcd 546 access_size = MAX(MIN(size, access_size_max), access_size_min);
36960b4d 547 access_mask = MAKE_64BIT_MASK(0, access_size * 8);
e7342aa3
PB
548 if (memory_region_big_endian(mr)) {
549 for (i = 0; i < size; i += access_size) {
05e015f7 550 r |= access_fn(mr, addr + i, value, access_size,
cc05c43a 551 (size - access_size - i) * 8, access_mask, attrs);
e7342aa3
PB
552 }
553 } else {
554 for (i = 0; i < size; i += access_size) {
05e015f7 555 r |= access_fn(mr, addr + i, value, access_size, i * 8,
cc05c43a 556 access_mask, attrs);
e7342aa3 557 }
164a4dcd 558 }
cc05c43a 559 return r;
164a4dcd
AK
560}
561
e2177955
AK
562static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
563{
0d673e36
AK
564 AddressSpace *as;
565
feca4ac1
PB
566 while (mr->container) {
567 mr = mr->container;
e2177955 568 }
0d673e36
AK
569 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
570 if (mr == as->root) {
571 return as;
572 }
e2177955 573 }
eed2bacf 574 return NULL;
e2177955
AK
575}
576
093bc2cd
AK
577/* Render a memory region into the global view. Ranges in @view obscure
578 * ranges in @mr.
579 */
580static void render_memory_region(FlatView *view,
581 MemoryRegion *mr,
08dafab4 582 Int128 base,
fb1cd6f9 583 AddrRange clip,
c26763f8
MAL
584 bool readonly,
585 bool nonvolatile)
093bc2cd
AK
586{
587 MemoryRegion *subregion;
588 unsigned i;
a8170e5e 589 hwaddr offset_in_region;
08dafab4
AK
590 Int128 remain;
591 Int128 now;
093bc2cd
AK
592 FlatRange fr;
593 AddrRange tmp;
594
6bba19ba
AK
595 if (!mr->enabled) {
596 return;
597 }
598
08dafab4 599 int128_addto(&base, int128_make64(mr->addr));
fb1cd6f9 600 readonly |= mr->readonly;
c26763f8 601 nonvolatile |= mr->nonvolatile;
093bc2cd
AK
602
603 tmp = addrrange_make(base, mr->size);
604
605 if (!addrrange_intersects(tmp, clip)) {
606 return;
607 }
608
609 clip = addrrange_intersection(tmp, clip);
610
611 if (mr->alias) {
08dafab4
AK
612 int128_subfrom(&base, int128_make64(mr->alias->addr));
613 int128_subfrom(&base, int128_make64(mr->alias_offset));
c26763f8
MAL
614 render_memory_region(view, mr->alias, base, clip,
615 readonly, nonvolatile);
093bc2cd
AK
616 return;
617 }
618
619 /* Render subregions in priority order. */
620 QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
c26763f8
MAL
621 render_memory_region(view, subregion, base, clip,
622 readonly, nonvolatile);
093bc2cd
AK
623 }
624
14a3c10a 625 if (!mr->terminates) {
093bc2cd
AK
626 return;
627 }
628
08dafab4 629 offset_in_region = int128_get64(int128_sub(clip.start, base));
093bc2cd
AK
630 base = clip.start;
631 remain = clip.size;
632
2eb74e1a 633 fr.mr = mr;
6f6a5ef3 634 fr.dirty_log_mask = memory_region_get_dirty_log_mask(mr);
b138e654 635 fr.romd_mode = mr->romd_mode;
2eb74e1a 636 fr.readonly = readonly;
c26763f8 637 fr.nonvolatile = nonvolatile;
2eb74e1a 638
093bc2cd 639 /* Render the region itself into any gaps left by the current view. */
08dafab4
AK
640 for (i = 0; i < view->nr && int128_nz(remain); ++i) {
641 if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
093bc2cd
AK
642 continue;
643 }
08dafab4
AK
644 if (int128_lt(base, view->ranges[i].addr.start)) {
645 now = int128_min(remain,
646 int128_sub(view->ranges[i].addr.start, base));
093bc2cd
AK
647 fr.offset_in_region = offset_in_region;
648 fr.addr = addrrange_make(base, now);
649 flatview_insert(view, i, &fr);
650 ++i;
08dafab4
AK
651 int128_addto(&base, now);
652 offset_in_region += int128_get64(now);
653 int128_subfrom(&remain, now);
093bc2cd 654 }
d26a8cae
AK
655 now = int128_sub(int128_min(int128_add(base, remain),
656 addrrange_end(view->ranges[i].addr)),
657 base);
658 int128_addto(&base, now);
659 offset_in_region += int128_get64(now);
660 int128_subfrom(&remain, now);
093bc2cd 661 }
08dafab4 662 if (int128_nz(remain)) {
093bc2cd
AK
663 fr.offset_in_region = offset_in_region;
664 fr.addr = addrrange_make(base, remain);
665 flatview_insert(view, i, &fr);
666 }
667}
668
fb5ef4ee
AB
669void flatview_for_each_range(FlatView *fv, flatview_cb cb , void *opaque)
670{
671 FlatRange *fr;
672
673 assert(fv);
674 assert(cb);
675
676 FOR_EACH_FLAT_RANGE(fr, fv) {
b3566001
PM
677 if (cb(fr->addr.start, fr->addr.size, fr->mr,
678 fr->offset_in_region, opaque)) {
fb5ef4ee 679 break;
b3566001 680 }
fb5ef4ee
AB
681 }
682}
683
89c177bb
AK
684static MemoryRegion *memory_region_get_flatview_root(MemoryRegion *mr)
685{
e673ba9a
PB
686 while (mr->enabled) {
687 if (mr->alias) {
688 if (!mr->alias_offset && int128_ge(mr->size, mr->alias->size)) {
689 /* The alias is included in its entirety. Use it as
690 * the "real" root, so that we can share more FlatViews.
691 */
692 mr = mr->alias;
693 continue;
694 }
695 } else if (!mr->terminates) {
696 unsigned int found = 0;
697 MemoryRegion *child, *next = NULL;
698 QTAILQ_FOREACH(child, &mr->subregions, subregions_link) {
699 if (child->enabled) {
700 if (++found > 1) {
701 next = NULL;
702 break;
703 }
704 if (!child->addr && int128_ge(mr->size, child->size)) {
705 /* A child is included in its entirety. If it's the only
706 * enabled one, use it in the hope of finding an alias down the
707 * way. This will also let us share FlatViews.
708 */
709 next = child;
710 }
711 }
712 }
092aa2fc
AK
713 if (found == 0) {
714 return NULL;
715 }
e673ba9a
PB
716 if (next) {
717 mr = next;
718 continue;
719 }
720 }
721
092aa2fc 722 return mr;
89c177bb
AK
723 }
724
092aa2fc 725 return NULL;
89c177bb
AK
726}
727
093bc2cd 728/* Render a memory topology into a list of disjoint absolute ranges. */
a9a0c06d 729static FlatView *generate_memory_topology(MemoryRegion *mr)
093bc2cd 730{
9bf561e3 731 int i;
a9a0c06d 732 FlatView *view;
093bc2cd 733
89c177bb 734 view = flatview_new(mr);
093bc2cd 735
83f3c251 736 if (mr) {
a9a0c06d 737 render_memory_region(view, mr, int128_zero(),
c26763f8
MAL
738 addrrange_make(int128_zero(), int128_2_64()),
739 false, false);
83f3c251 740 }
a9a0c06d 741 flatview_simplify(view);
093bc2cd 742
9bf561e3
AK
743 view->dispatch = address_space_dispatch_new(view);
744 for (i = 0; i < view->nr; i++) {
745 MemoryRegionSection mrs =
746 section_from_flat_range(&view->ranges[i], view);
747 flatview_add_to_dispatch(view, &mrs);
748 }
749 address_space_dispatch_compact(view->dispatch);
967dc9b1 750 g_hash_table_replace(flat_views, mr, view);
9bf561e3 751
093bc2cd
AK
752 return view;
753}
754
3e9d69e7
AK
755static void address_space_add_del_ioeventfds(AddressSpace *as,
756 MemoryRegionIoeventfd *fds_new,
757 unsigned fds_new_nb,
758 MemoryRegionIoeventfd *fds_old,
759 unsigned fds_old_nb)
760{
761 unsigned iold, inew;
80a1ea37
AK
762 MemoryRegionIoeventfd *fd;
763 MemoryRegionSection section;
3e9d69e7
AK
764
765 /* Generate a symmetric difference of the old and new fd sets, adding
766 * and deleting as necessary.
767 */
768
769 iold = inew = 0;
770 while (iold < fds_old_nb || inew < fds_new_nb) {
771 if (iold < fds_old_nb
772 && (inew == fds_new_nb
73bb753d
TB
773 || memory_region_ioeventfd_before(&fds_old[iold],
774 &fds_new[inew]))) {
80a1ea37
AK
775 fd = &fds_old[iold];
776 section = (MemoryRegionSection) {
16620684 777 .fv = address_space_to_flatview(as),
80a1ea37 778 .offset_within_address_space = int128_get64(fd->addr.start),
052e87b0 779 .size = fd->addr.size,
80a1ea37 780 };
9a54635d 781 MEMORY_LISTENER_CALL(as, eventfd_del, Forward, &section,
753d5e14 782 fd->match_data, fd->data, fd->e);
3e9d69e7
AK
783 ++iold;
784 } else if (inew < fds_new_nb
785 && (iold == fds_old_nb
73bb753d
TB
786 || memory_region_ioeventfd_before(&fds_new[inew],
787 &fds_old[iold]))) {
80a1ea37
AK
788 fd = &fds_new[inew];
789 section = (MemoryRegionSection) {
16620684 790 .fv = address_space_to_flatview(as),
80a1ea37 791 .offset_within_address_space = int128_get64(fd->addr.start),
052e87b0 792 .size = fd->addr.size,
80a1ea37 793 };
9a54635d 794 MEMORY_LISTENER_CALL(as, eventfd_add, Reverse, &section,
753d5e14 795 fd->match_data, fd->data, fd->e);
3e9d69e7
AK
796 ++inew;
797 } else {
798 ++iold;
799 ++inew;
800 }
801 }
802}
803
48564041 804FlatView *address_space_get_flatview(AddressSpace *as)
856d7245
PB
805{
806 FlatView *view;
807
694ea274 808 RCU_READ_LOCK_GUARD();
447b0d0b 809 do {
16620684 810 view = address_space_to_flatview(as);
447b0d0b
PB
811 /* If somebody has replaced as->current_map concurrently,
812 * flatview_ref returns false.
813 */
814 } while (!flatview_ref(view));
856d7245
PB
815 return view;
816}
817
3e9d69e7
AK
818static void address_space_update_ioeventfds(AddressSpace *as)
819{
99e86347 820 FlatView *view;
3e9d69e7
AK
821 FlatRange *fr;
822 unsigned ioeventfd_nb = 0;
920d557e
SH
823 unsigned ioeventfd_max;
824 MemoryRegionIoeventfd *ioeventfds;
3e9d69e7
AK
825 AddrRange tmp;
826 unsigned i;
827
920d557e
SH
828 /*
829 * It is likely that the number of ioeventfds hasn't changed much, so use
830 * the previous size as the starting value, with some headroom to avoid
831 * gratuitous reallocations.
832 */
833 ioeventfd_max = QEMU_ALIGN_UP(as->ioeventfd_nb, 4);
834 ioeventfds = g_new(MemoryRegionIoeventfd, ioeventfd_max);
835
856d7245 836 view = address_space_get_flatview(as);
99e86347 837 FOR_EACH_FLAT_RANGE(fr, view) {
3e9d69e7
AK
838 for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
839 tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
08dafab4
AK
840 int128_sub(fr->addr.start,
841 int128_make64(fr->offset_in_region)));
3e9d69e7
AK
842 if (addrrange_intersects(fr->addr, tmp)) {
843 ++ioeventfd_nb;
920d557e
SH
844 if (ioeventfd_nb > ioeventfd_max) {
845 ioeventfd_max = MAX(ioeventfd_max * 2, 4);
846 ioeventfds = g_realloc(ioeventfds,
847 ioeventfd_max * sizeof(*ioeventfds));
848 }
3e9d69e7
AK
849 ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
850 ioeventfds[ioeventfd_nb-1].addr = tmp;
851 }
852 }
853 }
854
855 address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
856 as->ioeventfds, as->ioeventfd_nb);
857
7267c094 858 g_free(as->ioeventfds);
3e9d69e7
AK
859 as->ioeventfds = ioeventfds;
860 as->ioeventfd_nb = ioeventfd_nb;
856d7245 861 flatview_unref(view);
3e9d69e7
AK
862}
863
23f1174a
PX
864/*
865 * Notify the memory listeners about the coalesced IO change events of
866 * range `cmr'. Only the part that has intersection of the specified
867 * FlatRange will be sent.
868 */
869static void flat_range_coalesced_io_notify(FlatRange *fr, AddressSpace *as,
870 CoalescedMemoryRange *cmr, bool add)
871{
872 AddrRange tmp;
873
874 tmp = addrrange_shift(cmr->addr,
875 int128_sub(fr->addr.start,
876 int128_make64(fr->offset_in_region)));
877 if (!addrrange_intersects(tmp, fr->addr)) {
878 return;
879 }
880 tmp = addrrange_intersection(tmp, fr->addr);
881
882 if (add) {
883 MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, coalesced_io_add,
884 int128_get64(tmp.start),
885 int128_get64(tmp.size));
886 } else {
887 MEMORY_LISTENER_UPDATE_REGION(fr, as, Reverse, coalesced_io_del,
888 int128_get64(tmp.start),
889 int128_get64(tmp.size));
890 }
891}
892
909bf763
PB
893static void flat_range_coalesced_io_del(FlatRange *fr, AddressSpace *as)
894{
23f1174a
PX
895 CoalescedMemoryRange *cmr;
896
23f1174a
PX
897 QTAILQ_FOREACH(cmr, &fr->mr->coalesced, link) {
898 flat_range_coalesced_io_notify(fr, as, cmr, false);
899 }
909bf763
PB
900}
901
902static void flat_range_coalesced_io_add(FlatRange *fr, AddressSpace *as)
903{
904 MemoryRegion *mr = fr->mr;
905 CoalescedMemoryRange *cmr;
909bf763 906
1f7af804
PB
907 if (QTAILQ_EMPTY(&mr->coalesced)) {
908 return;
909 }
910
909bf763 911 QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
23f1174a 912 flat_range_coalesced_io_notify(fr, as, cmr, true);
909bf763
PB
913 }
914}
915
b8af1afb 916static void address_space_update_topology_pass(AddressSpace *as,
a9a0c06d
PB
917 const FlatView *old_view,
918 const FlatView *new_view,
b8af1afb 919 bool adding)
093bc2cd 920{
093bc2cd
AK
921 unsigned iold, inew;
922 FlatRange *frold, *frnew;
093bc2cd
AK
923
924 /* Generate a symmetric difference of the old and new memory maps.
925 * Kill ranges in the old map, and instantiate ranges in the new map.
926 */
927 iold = inew = 0;
a9a0c06d
PB
928 while (iold < old_view->nr || inew < new_view->nr) {
929 if (iold < old_view->nr) {
930 frold = &old_view->ranges[iold];
093bc2cd
AK
931 } else {
932 frold = NULL;
933 }
a9a0c06d
PB
934 if (inew < new_view->nr) {
935 frnew = &new_view->ranges[inew];
093bc2cd
AK
936 } else {
937 frnew = NULL;
938 }
939
940 if (frold
941 && (!frnew
08dafab4
AK
942 || int128_lt(frold->addr.start, frnew->addr.start)
943 || (int128_eq(frold->addr.start, frnew->addr.start)
093bc2cd 944 && !flatrange_equal(frold, frnew)))) {
41a6e477 945 /* In old but not in new, or in both but attributes changed. */
093bc2cd 946
b8af1afb 947 if (!adding) {
3ac7d43a 948 flat_range_coalesced_io_del(frold, as);
72e22d2f 949 MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del);
b8af1afb
AK
950 }
951
093bc2cd
AK
952 ++iold;
953 } else if (frold && frnew && flatrange_equal(frold, frnew)) {
41a6e477 954 /* In both and unchanged (except logging may have changed) */
093bc2cd 955
4f826024 956 if (adding) {
50c1e149 957 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop);
b2dfd71c
PB
958 if (frnew->dirty_log_mask & ~frold->dirty_log_mask) {
959 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start,
960 frold->dirty_log_mask,
961 frnew->dirty_log_mask);
962 }
963 if (frold->dirty_log_mask & ~frnew->dirty_log_mask) {
964 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop,
965 frold->dirty_log_mask,
966 frnew->dirty_log_mask);
b8af1afb 967 }
5a583347
AK
968 }
969
093bc2cd
AK
970 ++iold;
971 ++inew;
093bc2cd
AK
972 } else {
973 /* In new */
974
b8af1afb 975 if (adding) {
72e22d2f 976 MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add);
3ac7d43a 977 flat_range_coalesced_io_add(frnew, as);
b8af1afb
AK
978 }
979
093bc2cd
AK
980 ++inew;
981 }
982 }
b8af1afb
AK
983}
984
967dc9b1
AK
985static void flatviews_init(void)
986{
092aa2fc
AK
987 static FlatView *empty_view;
988
967dc9b1
AK
989 if (flat_views) {
990 return;
991 }
992
993 flat_views = g_hash_table_new_full(g_direct_hash, g_direct_equal, NULL,
994 (GDestroyNotify) flatview_unref);
092aa2fc
AK
995 if (!empty_view) {
996 empty_view = generate_memory_topology(NULL);
997 /* We keep it alive forever in the global variable. */
998 flatview_ref(empty_view);
999 } else {
1000 g_hash_table_replace(flat_views, NULL, empty_view);
1001 flatview_ref(empty_view);
1002 }
967dc9b1
AK
1003}
1004
1005static void flatviews_reset(void)
1006{
1007 AddressSpace *as;
1008
1009 if (flat_views) {
1010 g_hash_table_unref(flat_views);
1011 flat_views = NULL;
1012 }
1013 flatviews_init();
1014
1015 /* Render unique FVs */
1016 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1017 MemoryRegion *physmr = memory_region_get_flatview_root(as->root);
1018
1019 if (g_hash_table_lookup(flat_views, physmr)) {
1020 continue;
1021 }
1022
1023 generate_memory_topology(physmr);
1024 }
1025}
1026
1027static void address_space_set_flatview(AddressSpace *as)
b8af1afb 1028{
67ace39b 1029 FlatView *old_view = address_space_to_flatview(as);
967dc9b1
AK
1030 MemoryRegion *physmr = memory_region_get_flatview_root(as->root);
1031 FlatView *new_view = g_hash_table_lookup(flat_views, physmr);
1032
1033 assert(new_view);
1034
67ace39b
AK
1035 if (old_view == new_view) {
1036 return;
1037 }
1038
1039 if (old_view) {
1040 flatview_ref(old_view);
1041 }
1042
967dc9b1 1043 flatview_ref(new_view);
9a62e24f
AK
1044
1045 if (!QTAILQ_EMPTY(&as->listeners)) {
67ace39b
AK
1046 FlatView tmpview = { .nr = 0 }, *old_view2 = old_view;
1047
1048 if (!old_view2) {
1049 old_view2 = &tmpview;
1050 }
1051 address_space_update_topology_pass(as, old_view2, new_view, false);
1052 address_space_update_topology_pass(as, old_view2, new_view, true);
9a62e24f 1053 }
b8af1afb 1054
374f2981 1055 /* Writes are protected by the BQL. */
d73415a3 1056 qatomic_rcu_set(&as->current_map, new_view);
67ace39b
AK
1057 if (old_view) {
1058 flatview_unref(old_view);
1059 }
856d7245
PB
1060
1061 /* Note that all the old MemoryRegions are still alive up to this
1062 * point. This relieves most MemoryListeners from the need to
1063 * ref/unref the MemoryRegions they get---unless they use them
1064 * outside the iothread mutex, in which case precise reference
1065 * counting is necessary.
1066 */
67ace39b
AK
1067 if (old_view) {
1068 flatview_unref(old_view);
1069 }
093bc2cd
AK
1070}
1071
202fc01b
AK
1072static void address_space_update_topology(AddressSpace *as)
1073{
1074 MemoryRegion *physmr = memory_region_get_flatview_root(as->root);
1075
1076 flatviews_init();
1077 if (!g_hash_table_lookup(flat_views, physmr)) {
1078 generate_memory_topology(physmr);
1079 }
1080 address_space_set_flatview(as);
1081}
1082
4ef4db86
AK
1083void memory_region_transaction_begin(void)
1084{
bb880ded 1085 qemu_flush_coalesced_mmio_buffer();
4ef4db86
AK
1086 ++memory_region_transaction_depth;
1087}
1088
1089void memory_region_transaction_commit(void)
1090{
0d673e36
AK
1091 AddressSpace *as;
1092
4ef4db86 1093 assert(memory_region_transaction_depth);
8d04fb55
JK
1094 assert(qemu_mutex_iothread_locked());
1095
4ef4db86 1096 --memory_region_transaction_depth;
4dc56152
GA
1097 if (!memory_region_transaction_depth) {
1098 if (memory_region_update_pending) {
967dc9b1
AK
1099 flatviews_reset();
1100
4dc56152 1101 MEMORY_LISTENER_CALL_GLOBAL(begin, Forward);
02e2b95f 1102
4dc56152 1103 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
967dc9b1 1104 address_space_set_flatview(as);
02218487 1105 address_space_update_ioeventfds(as);
4dc56152 1106 }
ade9c1aa 1107 memory_region_update_pending = false;
0b152095 1108 ioeventfd_update_pending = false;
4dc56152
GA
1109 MEMORY_LISTENER_CALL_GLOBAL(commit, Forward);
1110 } else if (ioeventfd_update_pending) {
1111 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
1112 address_space_update_ioeventfds(as);
1113 }
ade9c1aa 1114 ioeventfd_update_pending = false;
4dc56152 1115 }
4dc56152 1116 }
4ef4db86
AK
1117}
1118
545e92e0
AK
1119static void memory_region_destructor_none(MemoryRegion *mr)
1120{
1121}
1122
1123static void memory_region_destructor_ram(MemoryRegion *mr)
1124{
f1060c55 1125 qemu_ram_free(mr->ram_block);
545e92e0
AK
1126}
1127
b4fefef9
PC
1128static bool memory_region_need_escape(char c)
1129{
1130 return c == '/' || c == '[' || c == '\\' || c == ']';
1131}
1132
1133static char *memory_region_escape_name(const char *name)
1134{
1135 const char *p;
1136 char *escaped, *q;
1137 uint8_t c;
1138 size_t bytes = 0;
1139
1140 for (p = name; *p; p++) {
1141 bytes += memory_region_need_escape(*p) ? 4 : 1;
1142 }
1143 if (bytes == p - name) {
1144 return g_memdup(name, bytes + 1);
1145 }
1146
1147 escaped = g_malloc(bytes + 1);
1148 for (p = name, q = escaped; *p; p++) {
1149 c = *p;
1150 if (unlikely(memory_region_need_escape(c))) {
1151 *q++ = '\\';
1152 *q++ = 'x';
1153 *q++ = "0123456789abcdef"[c >> 4];
1154 c = "0123456789abcdef"[c & 15];
1155 }
1156 *q++ = c;
1157 }
1158 *q = 0;
1159 return escaped;
1160}
1161
3df9d748
AK
1162static void memory_region_do_init(MemoryRegion *mr,
1163 Object *owner,
1164 const char *name,
1165 uint64_t size)
093bc2cd 1166{
08dafab4
AK
1167 mr->size = int128_make64(size);
1168 if (size == UINT64_MAX) {
1169 mr->size = int128_2_64();
1170 }
302fa283 1171 mr->name = g_strdup(name);
612263cf 1172 mr->owner = owner;
58eaa217 1173 mr->ram_block = NULL;
b4fefef9
PC
1174
1175 if (name) {
843ef73a
PC
1176 char *escaped_name = memory_region_escape_name(name);
1177 char *name_array = g_strdup_printf("%s[*]", escaped_name);
612263cf
PB
1178
1179 if (!owner) {
1180 owner = container_get(qdev_get_machine(), "/unattached");
1181 }
1182
d2623129 1183 object_property_add_child(owner, name_array, OBJECT(mr));
b4fefef9 1184 object_unref(OBJECT(mr));
843ef73a
PC
1185 g_free(name_array);
1186 g_free(escaped_name);
b4fefef9
PC
1187 }
1188}
1189
3df9d748
AK
1190void memory_region_init(MemoryRegion *mr,
1191 Object *owner,
1192 const char *name,
1193 uint64_t size)
1194{
1195 object_initialize(mr, sizeof(*mr), TYPE_MEMORY_REGION);
1196 memory_region_do_init(mr, owner, name, size);
1197}
1198
d7bce999
EB
1199static void memory_region_get_container(Object *obj, Visitor *v,
1200 const char *name, void *opaque,
1201 Error **errp)
409ddd01
PC
1202{
1203 MemoryRegion *mr = MEMORY_REGION(obj);
ddfb0baa 1204 char *path = (char *)"";
409ddd01
PC
1205
1206 if (mr->container) {
1207 path = object_get_canonical_path(OBJECT(mr->container));
1208 }
51e72bc1 1209 visit_type_str(v, name, &path, errp);
409ddd01
PC
1210 if (mr->container) {
1211 g_free(path);
1212 }
1213}
1214
1215static Object *memory_region_resolve_container(Object *obj, void *opaque,
1216 const char *part)
1217{
1218 MemoryRegion *mr = MEMORY_REGION(obj);
1219
1220 return OBJECT(mr->container);
1221}
1222
d7bce999
EB
1223static void memory_region_get_priority(Object *obj, Visitor *v,
1224 const char *name, void *opaque,
1225 Error **errp)
d33382da
PC
1226{
1227 MemoryRegion *mr = MEMORY_REGION(obj);
1228 int32_t value = mr->priority;
1229
51e72bc1 1230 visit_type_int32(v, name, &value, errp);
d33382da
PC
1231}
1232
d7bce999
EB
1233static void memory_region_get_size(Object *obj, Visitor *v, const char *name,
1234 void *opaque, Error **errp)
52aef7bb
PC
1235{
1236 MemoryRegion *mr = MEMORY_REGION(obj);
1237 uint64_t value = memory_region_size(mr);
1238
51e72bc1 1239 visit_type_uint64(v, name, &value, errp);
52aef7bb
PC
1240}
1241
b4fefef9
PC
1242static void memory_region_initfn(Object *obj)
1243{
1244 MemoryRegion *mr = MEMORY_REGION(obj);
409ddd01 1245 ObjectProperty *op;
b4fefef9
PC
1246
1247 mr->ops = &unassigned_mem_ops;
6bba19ba 1248 mr->enabled = true;
5f9a5ea1 1249 mr->romd_mode = true;
545e92e0 1250 mr->destructor = memory_region_destructor_none;
093bc2cd 1251 QTAILQ_INIT(&mr->subregions);
093bc2cd 1252 QTAILQ_INIT(&mr->coalesced);
409ddd01
PC
1253
1254 op = object_property_add(OBJECT(mr), "container",
1255 "link<" TYPE_MEMORY_REGION ">",
1256 memory_region_get_container,
1257 NULL, /* memory_region_set_container */
d2623129 1258 NULL, NULL);
409ddd01
PC
1259 op->resolve = memory_region_resolve_container;
1260
64a7b8de 1261 object_property_add_uint64_ptr(OBJECT(mr), "addr",
d2623129 1262 &mr->addr, OBJ_PROP_FLAG_READ);
d33382da
PC
1263 object_property_add(OBJECT(mr), "priority", "uint32",
1264 memory_region_get_priority,
1265 NULL, /* memory_region_set_priority */
d2623129 1266 NULL, NULL);
52aef7bb
PC
1267 object_property_add(OBJECT(mr), "size", "uint64",
1268 memory_region_get_size,
1269 NULL, /* memory_region_set_size, */
d2623129 1270 NULL, NULL);
093bc2cd
AK
1271}
1272
3df9d748
AK
1273static void iommu_memory_region_initfn(Object *obj)
1274{
1275 MemoryRegion *mr = MEMORY_REGION(obj);
1276
1277 mr->is_iommu = true;
1278}
1279
b018ddf6
PB
1280static uint64_t unassigned_mem_read(void *opaque, hwaddr addr,
1281 unsigned size)
1282{
1283#ifdef DEBUG_UNASSIGNED
883f2c59 1284 printf("Unassigned mem read " HWADDR_FMT_plx "\n", addr);
b018ddf6 1285#endif
68a7439a 1286 return 0;
b018ddf6
PB
1287}
1288
1289static void unassigned_mem_write(void *opaque, hwaddr addr,
1290 uint64_t val, unsigned size)
1291{
1292#ifdef DEBUG_UNASSIGNED
883f2c59 1293 printf("Unassigned mem write " HWADDR_FMT_plx " = 0x%"PRIx64"\n", addr, val);
b018ddf6 1294#endif
b018ddf6
PB
1295}
1296
d197063f 1297static bool unassigned_mem_accepts(void *opaque, hwaddr addr,
8372d383
PM
1298 unsigned size, bool is_write,
1299 MemTxAttrs attrs)
d197063f
PB
1300{
1301 return false;
1302}
1303
1304const MemoryRegionOps unassigned_mem_ops = {
1305 .valid.accepts = unassigned_mem_accepts,
1306 .endianness = DEVICE_NATIVE_ENDIAN,
1307};
1308
4a2e242b
AW
1309static uint64_t memory_region_ram_device_read(void *opaque,
1310 hwaddr addr, unsigned size)
1311{
1312 MemoryRegion *mr = opaque;
1313 uint64_t data = (uint64_t)~0;
1314
1315 switch (size) {
1316 case 1:
1317 data = *(uint8_t *)(mr->ram_block->host + addr);
1318 break;
1319 case 2:
1320 data = *(uint16_t *)(mr->ram_block->host + addr);
1321 break;
1322 case 4:
1323 data = *(uint32_t *)(mr->ram_block->host + addr);
1324 break;
1325 case 8:
1326 data = *(uint64_t *)(mr->ram_block->host + addr);
1327 break;
1328 }
1329
1330 trace_memory_region_ram_device_read(get_cpu_index(), mr, addr, data, size);
1331
1332 return data;
1333}
1334
1335static void memory_region_ram_device_write(void *opaque, hwaddr addr,
1336 uint64_t data, unsigned size)
1337{
1338 MemoryRegion *mr = opaque;
1339
1340 trace_memory_region_ram_device_write(get_cpu_index(), mr, addr, data, size);
1341
1342 switch (size) {
1343 case 1:
1344 *(uint8_t *)(mr->ram_block->host + addr) = (uint8_t)data;
1345 break;
1346 case 2:
1347 *(uint16_t *)(mr->ram_block->host + addr) = (uint16_t)data;
1348 break;
1349 case 4:
1350 *(uint32_t *)(mr->ram_block->host + addr) = (uint32_t)data;
1351 break;
1352 case 8:
1353 *(uint64_t *)(mr->ram_block->host + addr) = data;
1354 break;
1355 }
1356}
1357
1358static const MemoryRegionOps ram_device_mem_ops = {
1359 .read = memory_region_ram_device_read,
1360 .write = memory_region_ram_device_write,
c99a29e7 1361 .endianness = DEVICE_HOST_ENDIAN,
4a2e242b
AW
1362 .valid = {
1363 .min_access_size = 1,
1364 .max_access_size = 8,
1365 .unaligned = true,
1366 },
1367 .impl = {
1368 .min_access_size = 1,
1369 .max_access_size = 8,
1370 .unaligned = true,
1371 },
1372};
1373
d2702032
PB
1374bool memory_region_access_valid(MemoryRegion *mr,
1375 hwaddr addr,
1376 unsigned size,
6d7b9a6c
PM
1377 bool is_write,
1378 MemTxAttrs attrs)
093bc2cd 1379{
5d971f9e
MT
1380 if (mr->ops->valid.accepts
1381 && !mr->ops->valid.accepts(mr->opaque, addr, size, is_write, attrs)) {
7a7142f0
BZ
1382 qemu_log_mask(LOG_GUEST_ERROR, "Invalid %s at addr 0x%" HWADDR_PRIX
1383 ", size %u, region '%s', reason: rejected\n",
1384 is_write ? "write" : "read",
21786c7e 1385 addr, size, memory_region_name(mr));
093bc2cd
AK
1386 return false;
1387 }
1388
5d971f9e 1389 if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
7a7142f0
BZ
1390 qemu_log_mask(LOG_GUEST_ERROR, "Invalid %s at addr 0x%" HWADDR_PRIX
1391 ", size %u, region '%s', reason: unaligned\n",
1392 is_write ? "write" : "read",
21786c7e 1393 addr, size, memory_region_name(mr));
5d971f9e 1394 return false;
a014ed07
PB
1395 }
1396
5d971f9e 1397 /* Treat zero as compatibility all valid */
a014ed07 1398 if (!mr->ops->valid.max_access_size) {
5d971f9e 1399 return true;
a014ed07
PB
1400 }
1401
5d971f9e
MT
1402 if (size > mr->ops->valid.max_access_size
1403 || size < mr->ops->valid.min_access_size) {
7a7142f0
BZ
1404 qemu_log_mask(LOG_GUEST_ERROR, "Invalid %s at addr 0x%" HWADDR_PRIX
1405 ", size %u, region '%s', reason: invalid size "
1406 "(min:%u max:%u)\n",
1407 is_write ? "write" : "read",
21786c7e
PMD
1408 addr, size, memory_region_name(mr),
1409 mr->ops->valid.min_access_size,
1410 mr->ops->valid.max_access_size);
5d971f9e 1411 return false;
093bc2cd
AK
1412 }
1413 return true;
1414}
1415
cc05c43a
PM
1416static MemTxResult memory_region_dispatch_read1(MemoryRegion *mr,
1417 hwaddr addr,
1418 uint64_t *pval,
1419 unsigned size,
1420 MemTxAttrs attrs)
093bc2cd 1421{
cc05c43a 1422 *pval = 0;
093bc2cd 1423
ce5d2f33 1424 if (mr->ops->read) {
cc05c43a
PM
1425 return access_with_adjusted_size(addr, pval, size,
1426 mr->ops->impl.min_access_size,
1427 mr->ops->impl.max_access_size,
1428 memory_region_read_accessor,
1429 mr, attrs);
62a0db94 1430 } else {
cc05c43a
PM
1431 return access_with_adjusted_size(addr, pval, size,
1432 mr->ops->impl.min_access_size,
1433 mr->ops->impl.max_access_size,
1434 memory_region_read_with_attrs_accessor,
1435 mr, attrs);
74901c3b 1436 }
093bc2cd
AK
1437}
1438
3b643495
PM
1439MemTxResult memory_region_dispatch_read(MemoryRegion *mr,
1440 hwaddr addr,
1441 uint64_t *pval,
e67c9046 1442 MemOp op,
3b643495 1443 MemTxAttrs attrs)
a621f38d 1444{
e67c9046 1445 unsigned size = memop_size(op);
cc05c43a
PM
1446 MemTxResult r;
1447
1a59bdba
PMD
1448 if (mr->alias) {
1449 return memory_region_dispatch_read(mr->alias,
1450 mr->alias_offset + addr,
1451 pval, op, attrs);
1452 }
6d7b9a6c 1453 if (!memory_region_access_valid(mr, addr, size, false, attrs)) {
791af8c8 1454 *pval = unassigned_mem_read(mr, addr, size);
cc05c43a 1455 return MEMTX_DECODE_ERROR;
791af8c8 1456 }
a621f38d 1457
cc05c43a 1458 r = memory_region_dispatch_read1(mr, addr, pval, size, attrs);
9bf825bf 1459 adjust_endianness(mr, pval, op);
cc05c43a 1460 return r;
a621f38d 1461}
093bc2cd 1462
8c56c1a5
PF
1463/* Return true if an eventfd was signalled */
1464static bool memory_region_dispatch_write_eventfds(MemoryRegion *mr,
1465 hwaddr addr,
1466 uint64_t data,
1467 unsigned size,
1468 MemTxAttrs attrs)
1469{
1470 MemoryRegionIoeventfd ioeventfd = {
1471 .addr = addrrange_make(int128_make64(addr), int128_make64(size)),
1472 .data = data,
1473 };
1474 unsigned i;
1475
1476 for (i = 0; i < mr->ioeventfd_nb; i++) {
1477 ioeventfd.match_data = mr->ioeventfds[i].match_data;
1478 ioeventfd.e = mr->ioeventfds[i].e;
1479
73bb753d 1480 if (memory_region_ioeventfd_equal(&ioeventfd, &mr->ioeventfds[i])) {
8c56c1a5
PF
1481 event_notifier_set(ioeventfd.e);
1482 return true;
1483 }
1484 }
1485
1486 return false;
1487}
1488
3b643495
PM
1489MemTxResult memory_region_dispatch_write(MemoryRegion *mr,
1490 hwaddr addr,
1491 uint64_t data,
e67c9046 1492 MemOp op,
3b643495 1493 MemTxAttrs attrs)
a621f38d 1494{
e67c9046
TN
1495 unsigned size = memop_size(op);
1496
1a59bdba
PMD
1497 if (mr->alias) {
1498 return memory_region_dispatch_write(mr->alias,
1499 mr->alias_offset + addr,
1500 data, op, attrs);
1501 }
6d7b9a6c 1502 if (!memory_region_access_valid(mr, addr, size, true, attrs)) {
b018ddf6 1503 unassigned_mem_write(mr, addr, data, size);
cc05c43a 1504 return MEMTX_DECODE_ERROR;
093bc2cd
AK
1505 }
1506
9bf825bf 1507 adjust_endianness(mr, &data, op);
a621f38d 1508
8c56c1a5
PF
1509 if ((!kvm_eventfds_enabled()) &&
1510 memory_region_dispatch_write_eventfds(mr, addr, data, size, attrs)) {
1511 return MEMTX_OK;
1512 }
1513
ce5d2f33 1514 if (mr->ops->write) {
cc05c43a
PM
1515 return access_with_adjusted_size(addr, &data, size,
1516 mr->ops->impl.min_access_size,
1517 mr->ops->impl.max_access_size,
1518 memory_region_write_accessor, mr,
1519 attrs);
62a0db94 1520 } else {
cc05c43a
PM
1521 return
1522 access_with_adjusted_size(addr, &data, size,
1523 mr->ops->impl.min_access_size,
1524 mr->ops->impl.max_access_size,
1525 memory_region_write_with_attrs_accessor,
1526 mr, attrs);
74901c3b 1527 }
093bc2cd
AK
1528}
1529
093bc2cd 1530void memory_region_init_io(MemoryRegion *mr,
2c9b15ca 1531 Object *owner,
093bc2cd
AK
1532 const MemoryRegionOps *ops,
1533 void *opaque,
1534 const char *name,
1535 uint64_t size)
1536{
2c9b15ca 1537 memory_region_init(mr, owner, name, size);
6d6d2abf 1538 mr->ops = ops ? ops : &unassigned_mem_ops;
093bc2cd 1539 mr->opaque = opaque;
14a3c10a 1540 mr->terminates = true;
093bc2cd
AK
1541}
1542
1cfe48c1
PM
1543void memory_region_init_ram_nomigrate(MemoryRegion *mr,
1544 Object *owner,
1545 const char *name,
1546 uint64_t size,
1547 Error **errp)
06329cce 1548{
7f863cba 1549 memory_region_init_ram_flags_nomigrate(mr, owner, name, size, 0, errp);
06329cce
MA
1550}
1551
7f863cba
DH
1552void memory_region_init_ram_flags_nomigrate(MemoryRegion *mr,
1553 Object *owner,
1554 const char *name,
1555 uint64_t size,
1556 uint32_t ram_flags,
1557 Error **errp)
093bc2cd 1558{
1cd3d492 1559 Error *err = NULL;
2c9b15ca 1560 memory_region_init(mr, owner, name, size);
8ea9252a 1561 mr->ram = true;
14a3c10a 1562 mr->terminates = true;
545e92e0 1563 mr->destructor = memory_region_destructor_ram;
ebef62d0 1564 mr->ram_block = qemu_ram_alloc(size, ram_flags, mr, &err);
1cd3d492
IM
1565 if (err) {
1566 mr->size = int128_zero();
1567 object_unparent(OBJECT(mr));
1568 error_propagate(errp, err);
1569 }
0b183fc8
PB
1570}
1571
60786ef3
MT
1572void memory_region_init_resizeable_ram(MemoryRegion *mr,
1573 Object *owner,
1574 const char *name,
1575 uint64_t size,
1576 uint64_t max_size,
1577 void (*resized)(const char*,
1578 uint64_t length,
1579 void *host),
1580 Error **errp)
1581{
1cd3d492 1582 Error *err = NULL;
60786ef3
MT
1583 memory_region_init(mr, owner, name, size);
1584 mr->ram = true;
1585 mr->terminates = true;
1586 mr->destructor = memory_region_destructor_ram;
8e41fb63 1587 mr->ram_block = qemu_ram_alloc_resizeable(size, max_size, resized,
1cd3d492 1588 mr, &err);
1cd3d492
IM
1589 if (err) {
1590 mr->size = int128_zero();
1591 object_unparent(OBJECT(mr));
1592 error_propagate(errp, err);
1593 }
60786ef3
MT
1594}
1595
d5dbde46 1596#ifdef CONFIG_POSIX
0b183fc8 1597void memory_region_init_ram_from_file(MemoryRegion *mr,
d32335e8 1598 Object *owner,
0b183fc8
PB
1599 const char *name,
1600 uint64_t size,
98376843 1601 uint64_t align,
cbfc0171 1602 uint32_t ram_flags,
7f56e740 1603 const char *path,
369d6dc4 1604 bool readonly,
7f56e740 1605 Error **errp)
0b183fc8 1606{
1cd3d492 1607 Error *err = NULL;
0b183fc8
PB
1608 memory_region_init(mr, owner, name, size);
1609 mr->ram = true;
369d6dc4 1610 mr->readonly = readonly;
0b183fc8
PB
1611 mr->terminates = true;
1612 mr->destructor = memory_region_destructor_ram;
98376843 1613 mr->align = align;
369d6dc4
SH
1614 mr->ram_block = qemu_ram_alloc_from_file(size, mr, ram_flags, path,
1615 readonly, &err);
1cd3d492
IM
1616 if (err) {
1617 mr->size = int128_zero();
1618 object_unparent(OBJECT(mr));
1619 error_propagate(errp, err);
1620 }
093bc2cd 1621}
fea617c5
MAL
1622
1623void memory_region_init_ram_from_fd(MemoryRegion *mr,
d32335e8 1624 Object *owner,
fea617c5
MAL
1625 const char *name,
1626 uint64_t size,
d5015b80 1627 uint32_t ram_flags,
fea617c5 1628 int fd,
44a4ff31 1629 ram_addr_t offset,
fea617c5
MAL
1630 Error **errp)
1631{
1cd3d492 1632 Error *err = NULL;
fea617c5
MAL
1633 memory_region_init(mr, owner, name, size);
1634 mr->ram = true;
1635 mr->terminates = true;
1636 mr->destructor = memory_region_destructor_ram;
d5015b80
DH
1637 mr->ram_block = qemu_ram_alloc_from_fd(size, mr, ram_flags, fd, offset,
1638 false, &err);
1cd3d492
IM
1639 if (err) {
1640 mr->size = int128_zero();
1641 object_unparent(OBJECT(mr));
1642 error_propagate(errp, err);
1643 }
fea617c5 1644}
0b183fc8 1645#endif
093bc2cd
AK
1646
1647void memory_region_init_ram_ptr(MemoryRegion *mr,
2c9b15ca 1648 Object *owner,
093bc2cd
AK
1649 const char *name,
1650 uint64_t size,
1651 void *ptr)
1652{
2c9b15ca 1653 memory_region_init(mr, owner, name, size);
8ea9252a 1654 mr->ram = true;
14a3c10a 1655 mr->terminates = true;
fc3e7665 1656 mr->destructor = memory_region_destructor_ram;
ef701d7b
HT
1657
1658 /* qemu_ram_alloc_from_ptr cannot fail with ptr != NULL. */
1659 assert(ptr != NULL);
8e41fb63 1660 mr->ram_block = qemu_ram_alloc_from_ptr(size, ptr, mr, &error_fatal);
093bc2cd
AK
1661}
1662
21e00fa5
AW
1663void memory_region_init_ram_device_ptr(MemoryRegion *mr,
1664 Object *owner,
1665 const char *name,
1666 uint64_t size,
1667 void *ptr)
e4dc3f59 1668{
2ddb89b0
BS
1669 memory_region_init(mr, owner, name, size);
1670 mr->ram = true;
1671 mr->terminates = true;
21e00fa5 1672 mr->ram_device = true;
4a2e242b
AW
1673 mr->ops = &ram_device_mem_ops;
1674 mr->opaque = mr;
2ddb89b0 1675 mr->destructor = memory_region_destructor_ram;
0a2949e0 1676
2ddb89b0
BS
1677 /* qemu_ram_alloc_from_ptr cannot fail with ptr != NULL. */
1678 assert(ptr != NULL);
1679 mr->ram_block = qemu_ram_alloc_from_ptr(size, ptr, mr, &error_fatal);
e4dc3f59
ND
1680}
1681
093bc2cd 1682void memory_region_init_alias(MemoryRegion *mr,
2c9b15ca 1683 Object *owner,
093bc2cd
AK
1684 const char *name,
1685 MemoryRegion *orig,
a8170e5e 1686 hwaddr offset,
093bc2cd
AK
1687 uint64_t size)
1688{
2c9b15ca 1689 memory_region_init(mr, owner, name, size);
093bc2cd
AK
1690 mr->alias = orig;
1691 mr->alias_offset = offset;
1692}
1693
b59821a9 1694void memory_region_init_rom_nomigrate(MemoryRegion *mr,
d32335e8 1695 Object *owner,
b59821a9
PM
1696 const char *name,
1697 uint64_t size,
1698 Error **errp)
a1777f7f 1699{
7f863cba 1700 memory_region_init_ram_flags_nomigrate(mr, owner, name, size, 0, errp);
a1777f7f 1701 mr->readonly = true;
a1777f7f
PM
1702}
1703
b59821a9
PM
1704void memory_region_init_rom_device_nomigrate(MemoryRegion *mr,
1705 Object *owner,
1706 const MemoryRegionOps *ops,
1707 void *opaque,
1708 const char *name,
1709 uint64_t size,
1710 Error **errp)
d0a9b5bc 1711{
1cd3d492 1712 Error *err = NULL;
39e0b03d 1713 assert(ops);
2c9b15ca 1714 memory_region_init(mr, owner, name, size);
7bc2b9cd 1715 mr->ops = ops;
75f5941c 1716 mr->opaque = opaque;
d0a9b5bc 1717 mr->terminates = true;
75c578dc 1718 mr->rom_device = true;
58268c8d 1719 mr->destructor = memory_region_destructor_ram;
ebef62d0 1720 mr->ram_block = qemu_ram_alloc(size, 0, mr, &err);
1cd3d492
IM
1721 if (err) {
1722 mr->size = int128_zero();
1723 object_unparent(OBJECT(mr));
1724 error_propagate(errp, err);
1725 }
d0a9b5bc
AK
1726}
1727
1221a474
AK
1728void memory_region_init_iommu(void *_iommu_mr,
1729 size_t instance_size,
1730 const char *mrtypename,
2c9b15ca 1731 Object *owner,
30951157
AK
1732 const char *name,
1733 uint64_t size)
1734{
1221a474 1735 struct IOMMUMemoryRegion *iommu_mr;
3df9d748
AK
1736 struct MemoryRegion *mr;
1737
1221a474
AK
1738 object_initialize(_iommu_mr, instance_size, mrtypename);
1739 mr = MEMORY_REGION(_iommu_mr);
3df9d748
AK
1740 memory_region_do_init(mr, owner, name, size);
1741 iommu_mr = IOMMU_MEMORY_REGION(mr);
30951157 1742 mr->terminates = true; /* then re-forwards */
3df9d748
AK
1743 QLIST_INIT(&iommu_mr->iommu_notify);
1744 iommu_mr->iommu_notify_flags = IOMMU_NOTIFIER_NONE;
30951157
AK
1745}
1746
b4fefef9 1747static void memory_region_finalize(Object *obj)
093bc2cd 1748{
b4fefef9
PC
1749 MemoryRegion *mr = MEMORY_REGION(obj);
1750
2e2b8eb7
PB
1751 assert(!mr->container);
1752
1753 /* We know the region is not visible in any address space (it
1754 * does not have a container and cannot be a root either because
1755 * it has no references, so we can blindly clear mr->enabled.
1756 * memory_region_set_enabled instead could trigger a transaction
1757 * and cause an infinite loop.
1758 */
1759 mr->enabled = false;
1760 memory_region_transaction_begin();
1761 while (!QTAILQ_EMPTY(&mr->subregions)) {
1762 MemoryRegion *subregion = QTAILQ_FIRST(&mr->subregions);
1763 memory_region_del_subregion(mr, subregion);
1764 }
1765 memory_region_transaction_commit();
1766
545e92e0 1767 mr->destructor(mr);
093bc2cd 1768 memory_region_clear_coalescing(mr);
302fa283 1769 g_free((char *)mr->name);
7267c094 1770 g_free(mr->ioeventfds);
093bc2cd
AK
1771}
1772
803c0816
PB
1773Object *memory_region_owner(MemoryRegion *mr)
1774{
22a893e4
PB
1775 Object *obj = OBJECT(mr);
1776 return obj->parent;
803c0816
PB
1777}
1778
46637be2
PB
1779void memory_region_ref(MemoryRegion *mr)
1780{
22a893e4
PB
1781 /* MMIO callbacks most likely will access data that belongs
1782 * to the owner, hence the need to ref/unref the owner whenever
1783 * the memory region is in use.
1784 *
1785 * The memory region is a child of its owner. As long as the
1786 * owner doesn't call unparent itself on the memory region,
1787 * ref-ing the owner will also keep the memory region alive.
612263cf
PB
1788 * Memory regions without an owner are supposed to never go away;
1789 * we do not ref/unref them because it slows down DMA sensibly.
22a893e4 1790 */
612263cf
PB
1791 if (mr && mr->owner) {
1792 object_ref(mr->owner);
46637be2
PB
1793 }
1794}
1795
1796void memory_region_unref(MemoryRegion *mr)
1797{
612263cf
PB
1798 if (mr && mr->owner) {
1799 object_unref(mr->owner);
46637be2
PB
1800 }
1801}
1802
093bc2cd
AK
1803uint64_t memory_region_size(MemoryRegion *mr)
1804{
08dafab4
AK
1805 if (int128_eq(mr->size, int128_2_64())) {
1806 return UINT64_MAX;
1807 }
1808 return int128_get64(mr->size);
093bc2cd
AK
1809}
1810
5d546d4b 1811const char *memory_region_name(const MemoryRegion *mr)
8991c79b 1812{
d1dd32af
PC
1813 if (!mr->name) {
1814 ((MemoryRegion *)mr)->name =
7a309cc9 1815 g_strdup(object_get_canonical_path_component(OBJECT(mr)));
d1dd32af 1816 }
302fa283 1817 return mr->name;
8991c79b
AK
1818}
1819
21e00fa5 1820bool memory_region_is_ram_device(MemoryRegion *mr)
e4dc3f59 1821{
21e00fa5 1822 return mr->ram_device;
e4dc3f59
ND
1823}
1824
56918a12
SC
1825bool memory_region_is_protected(MemoryRegion *mr)
1826{
1827 return mr->ram && (mr->ram_block->flags & RAM_PROTECTED);
1828}
1829
2d1a35be 1830uint8_t memory_region_get_dirty_log_mask(MemoryRegion *mr)
55043ba3 1831{
6f6a5ef3 1832 uint8_t mask = mr->dirty_log_mask;
1370d61a
ZY
1833 RAMBlock *rb = mr->ram_block;
1834
63b41db4 1835 if (global_dirty_tracking && ((rb && qemu_ram_is_migratable(rb)) ||
1370d61a 1836 memory_region_is_iommu(mr))) {
6f6a5ef3
PB
1837 mask |= (1 << DIRTY_MEMORY_MIGRATION);
1838 }
0a2949e0
PB
1839
1840 if (tcg_enabled() && rb) {
1841 /* TCG only cares about dirty memory logging for RAM, not IOMMU. */
1842 mask |= (1 << DIRTY_MEMORY_CODE);
1843 }
6f6a5ef3 1844 return mask;
55043ba3
AK
1845}
1846
2d1a35be
PB
1847bool memory_region_is_logging(MemoryRegion *mr, uint8_t client)
1848{
1849 return memory_region_get_dirty_log_mask(mr) & (1 << client);
1850}
1851
549d4005
EA
1852static int memory_region_update_iommu_notify_flags(IOMMUMemoryRegion *iommu_mr,
1853 Error **errp)
5bf3d319
PX
1854{
1855 IOMMUNotifierFlag flags = IOMMU_NOTIFIER_NONE;
1856 IOMMUNotifier *iommu_notifier;
1221a474 1857 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
549d4005 1858 int ret = 0;
5bf3d319 1859
3df9d748 1860 IOMMU_NOTIFIER_FOREACH(iommu_notifier, iommu_mr) {
5bf3d319
PX
1861 flags |= iommu_notifier->notifier_flags;
1862 }
1863
1221a474 1864 if (flags != iommu_mr->iommu_notify_flags && imrc->notify_flag_changed) {
549d4005
EA
1865 ret = imrc->notify_flag_changed(iommu_mr,
1866 iommu_mr->iommu_notify_flags,
1867 flags, errp);
5bf3d319
PX
1868 }
1869
549d4005
EA
1870 if (!ret) {
1871 iommu_mr->iommu_notify_flags = flags;
1872 }
1873 return ret;
5bf3d319
PX
1874}
1875
457f8cbb
BB
1876int memory_region_iommu_set_page_size_mask(IOMMUMemoryRegion *iommu_mr,
1877 uint64_t page_size_mask,
1878 Error **errp)
1879{
1880 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1881 int ret = 0;
1882
1883 if (imrc->iommu_set_page_size_mask) {
1884 ret = imrc->iommu_set_page_size_mask(iommu_mr, page_size_mask, errp);
1885 }
1886 return ret;
1887}
1888
549d4005
EA
1889int memory_region_register_iommu_notifier(MemoryRegion *mr,
1890 IOMMUNotifier *n, Error **errp)
06866575 1891{
3df9d748 1892 IOMMUMemoryRegion *iommu_mr;
549d4005 1893 int ret;
3df9d748 1894
efcd38c5 1895 if (mr->alias) {
549d4005 1896 return memory_region_register_iommu_notifier(mr->alias, n, errp);
efcd38c5
JW
1897 }
1898
cdb30812 1899 /* We need to register for at least one bitfield */
3df9d748 1900 iommu_mr = IOMMU_MEMORY_REGION(mr);
cdb30812 1901 assert(n->notifier_flags != IOMMU_NOTIFIER_NONE);
698feb5e 1902 assert(n->start <= n->end);
cb1efcf4
PM
1903 assert(n->iommu_idx >= 0 &&
1904 n->iommu_idx < memory_region_iommu_num_indexes(iommu_mr));
1905
3df9d748 1906 QLIST_INSERT_HEAD(&iommu_mr->iommu_notify, n, node);
549d4005
EA
1907 ret = memory_region_update_iommu_notify_flags(iommu_mr, errp);
1908 if (ret) {
1909 QLIST_REMOVE(n, node);
1910 }
1911 return ret;
06866575
DG
1912}
1913
3df9d748 1914uint64_t memory_region_iommu_get_min_page_size(IOMMUMemoryRegion *iommu_mr)
a788f227 1915{
1221a474
AK
1916 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
1917
1918 if (imrc->get_min_page_size) {
1919 return imrc->get_min_page_size(iommu_mr);
f682e9c2
AK
1920 }
1921 return TARGET_PAGE_SIZE;
1922}
1923
3df9d748 1924void memory_region_iommu_replay(IOMMUMemoryRegion *iommu_mr, IOMMUNotifier *n)
f682e9c2 1925{
3df9d748 1926 MemoryRegion *mr = MEMORY_REGION(iommu_mr);
1221a474 1927 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
f682e9c2 1928 hwaddr addr, granularity;
a788f227
DG
1929 IOMMUTLBEntry iotlb;
1930
faa362e3 1931 /* If the IOMMU has its own replay callback, override */
1221a474
AK
1932 if (imrc->replay) {
1933 imrc->replay(iommu_mr, n);
faa362e3
PX
1934 return;
1935 }
1936
3df9d748 1937 granularity = memory_region_iommu_get_min_page_size(iommu_mr);
f682e9c2 1938
a788f227 1939 for (addr = 0; addr < memory_region_size(mr); addr += granularity) {
2c91bcf2 1940 iotlb = imrc->translate(iommu_mr, addr, IOMMU_NONE, n->iommu_idx);
a788f227
DG
1941 if (iotlb.perm != IOMMU_NONE) {
1942 n->notify(n, &iotlb);
1943 }
1944
1945 /* if (2^64 - MR size) < granularity, it's possible to get an
1946 * infinite loop here. This should catch such a wraparound */
1947 if ((addr + granularity) < addr) {
1948 break;
1949 }
1950 }
1951}
1952
cdb30812
PX
1953void memory_region_unregister_iommu_notifier(MemoryRegion *mr,
1954 IOMMUNotifier *n)
06866575 1955{
3df9d748
AK
1956 IOMMUMemoryRegion *iommu_mr;
1957
efcd38c5
JW
1958 if (mr->alias) {
1959 memory_region_unregister_iommu_notifier(mr->alias, n);
1960 return;
1961 }
cdb30812 1962 QLIST_REMOVE(n, node);
3df9d748 1963 iommu_mr = IOMMU_MEMORY_REGION(mr);
549d4005 1964 memory_region_update_iommu_notify_flags(iommu_mr, NULL);
06866575
DG
1965}
1966
3b5ebf85 1967void memory_region_notify_iommu_one(IOMMUNotifier *notifier,
5039caf3 1968 IOMMUTLBEvent *event)
06866575 1969{
5039caf3 1970 IOMMUTLBEntry *entry = &event->entry;
03c7140c 1971 hwaddr entry_end = entry->iova + entry->addr_mask;
1804857f 1972 IOMMUTLBEntry tmp = *entry;
cdb30812 1973
5039caf3
EP
1974 if (event->type == IOMMU_NOTIFIER_UNMAP) {
1975 assert(entry->perm == IOMMU_NONE);
1976 }
1977
bd2bfa4c
PX
1978 /*
1979 * Skip the notification if the notification does not overlap
1980 * with registered range.
1981 */
03c7140c 1982 if (notifier->start > entry_end || notifier->end < entry->iova) {
bd2bfa4c
PX
1983 return;
1984 }
cdb30812 1985
1804857f
EP
1986 if (notifier->notifier_flags & IOMMU_NOTIFIER_DEVIOTLB_UNMAP) {
1987 /* Crop (iova, addr_mask) to range */
1988 tmp.iova = MAX(tmp.iova, notifier->start);
1989 tmp.addr_mask = MIN(entry_end, notifier->end) - tmp.iova;
1990 } else {
1991 assert(entry->iova >= notifier->start && entry_end <= notifier->end);
1992 }
03c7140c 1993
5039caf3 1994 if (event->type & notifier->notifier_flags) {
1804857f 1995 notifier->notify(notifier, &tmp);
bd2bfa4c
PX
1996 }
1997}
1998
3df9d748 1999void memory_region_notify_iommu(IOMMUMemoryRegion *iommu_mr,
cb1efcf4 2000 int iommu_idx,
5039caf3 2001 IOMMUTLBEvent event)
bd2bfa4c
PX
2002{
2003 IOMMUNotifier *iommu_notifier;
2004
3df9d748 2005 assert(memory_region_is_iommu(MEMORY_REGION(iommu_mr)));
bd2bfa4c 2006
3df9d748 2007 IOMMU_NOTIFIER_FOREACH(iommu_notifier, iommu_mr) {
cb1efcf4 2008 if (iommu_notifier->iommu_idx == iommu_idx) {
5039caf3 2009 memory_region_notify_iommu_one(iommu_notifier, &event);
cb1efcf4 2010 }
cdb30812 2011 }
06866575
DG
2012}
2013
f1334de6
AK
2014int memory_region_iommu_get_attr(IOMMUMemoryRegion *iommu_mr,
2015 enum IOMMUMemoryRegionAttr attr,
2016 void *data)
2017{
2018 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
2019
2020 if (!imrc->get_attr) {
2021 return -EINVAL;
2022 }
2023
2024 return imrc->get_attr(iommu_mr, attr, data);
2025}
2026
21f40209
PM
2027int memory_region_iommu_attrs_to_index(IOMMUMemoryRegion *iommu_mr,
2028 MemTxAttrs attrs)
2029{
2030 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
2031
2032 if (!imrc->attrs_to_index) {
2033 return 0;
2034 }
2035
2036 return imrc->attrs_to_index(iommu_mr, attrs);
2037}
2038
2039int memory_region_iommu_num_indexes(IOMMUMemoryRegion *iommu_mr)
2040{
2041 IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
2042
2043 if (!imrc->num_indexes) {
2044 return 1;
2045 }
2046
2047 return imrc->num_indexes(iommu_mr);
2048}
2049
8947d7fc
DH
2050RamDiscardManager *memory_region_get_ram_discard_manager(MemoryRegion *mr)
2051{
2052 if (!memory_region_is_mapped(mr) || !memory_region_is_ram(mr)) {
2053 return NULL;
2054 }
2055 return mr->rdm;
2056}
2057
2058void memory_region_set_ram_discard_manager(MemoryRegion *mr,
2059 RamDiscardManager *rdm)
2060{
2061 g_assert(memory_region_is_ram(mr) && !memory_region_is_mapped(mr));
2062 g_assert(!rdm || !mr->rdm);
2063 mr->rdm = rdm;
2064}
2065
2066uint64_t ram_discard_manager_get_min_granularity(const RamDiscardManager *rdm,
2067 const MemoryRegion *mr)
2068{
2069 RamDiscardManagerClass *rdmc = RAM_DISCARD_MANAGER_GET_CLASS(rdm);
2070
2071 g_assert(rdmc->get_min_granularity);
2072 return rdmc->get_min_granularity(rdm, mr);
2073}
2074
2075bool ram_discard_manager_is_populated(const RamDiscardManager *rdm,
2076 const MemoryRegionSection *section)
2077{
2078 RamDiscardManagerClass *rdmc = RAM_DISCARD_MANAGER_GET_CLASS(rdm);
2079
2080 g_assert(rdmc->is_populated);
2081 return rdmc->is_populated(rdm, section);
2082}
2083
2084int ram_discard_manager_replay_populated(const RamDiscardManager *rdm,
2085 MemoryRegionSection *section,
2086 ReplayRamPopulate replay_fn,
2087 void *opaque)
2088{
2089 RamDiscardManagerClass *rdmc = RAM_DISCARD_MANAGER_GET_CLASS(rdm);
2090
2091 g_assert(rdmc->replay_populated);
2092 return rdmc->replay_populated(rdm, section, replay_fn, opaque);
2093}
2094
adaf9d92
DH
2095void ram_discard_manager_replay_discarded(const RamDiscardManager *rdm,
2096 MemoryRegionSection *section,
2097 ReplayRamDiscard replay_fn,
2098 void *opaque)
2099{
2100 RamDiscardManagerClass *rdmc = RAM_DISCARD_MANAGER_GET_CLASS(rdm);
2101
2102 g_assert(rdmc->replay_discarded);
2103 rdmc->replay_discarded(rdm, section, replay_fn, opaque);
2104}
2105
8947d7fc
DH
2106void ram_discard_manager_register_listener(RamDiscardManager *rdm,
2107 RamDiscardListener *rdl,
2108 MemoryRegionSection *section)
2109{
2110 RamDiscardManagerClass *rdmc = RAM_DISCARD_MANAGER_GET_CLASS(rdm);
2111
2112 g_assert(rdmc->register_listener);
2113 rdmc->register_listener(rdm, rdl, section);
2114}
2115
2116void ram_discard_manager_unregister_listener(RamDiscardManager *rdm,
2117 RamDiscardListener *rdl)
2118{
2119 RamDiscardManagerClass *rdmc = RAM_DISCARD_MANAGER_GET_CLASS(rdm);
2120
2121 g_assert(rdmc->unregister_listener);
2122 rdmc->unregister_listener(rdm, rdl);
2123}
2124
baa44bce
CL
2125/* Called with rcu_read_lock held. */
2126bool memory_get_xlat_addr(IOMMUTLBEntry *iotlb, void **vaddr,
2127 ram_addr_t *ram_addr, bool *read_only,
2128 bool *mr_has_discard_manager)
2129{
2130 MemoryRegion *mr;
2131 hwaddr xlat;
2132 hwaddr len = iotlb->addr_mask + 1;
2133 bool writable = iotlb->perm & IOMMU_WO;
2134
2135 if (mr_has_discard_manager) {
2136 *mr_has_discard_manager = false;
2137 }
2138 /*
2139 * The IOMMU TLB entry we have just covers translation through
2140 * this IOMMU to its immediate target. We need to translate
2141 * it the rest of the way through to memory.
2142 */
2143 mr = address_space_translate(&address_space_memory, iotlb->translated_addr,
2144 &xlat, &len, writable, MEMTXATTRS_UNSPECIFIED);
2145 if (!memory_region_is_ram(mr)) {
2146 error_report("iommu map to non memory area %" HWADDR_PRIx "", xlat);
2147 return false;
2148 } else if (memory_region_has_ram_discard_manager(mr)) {
2149 RamDiscardManager *rdm = memory_region_get_ram_discard_manager(mr);
2150 MemoryRegionSection tmp = {
2151 .mr = mr,
2152 .offset_within_region = xlat,
2153 .size = int128_make64(len),
2154 };
2155 if (mr_has_discard_manager) {
2156 *mr_has_discard_manager = true;
2157 }
2158 /*
2159 * Malicious VMs can map memory into the IOMMU, which is expected
2160 * to remain discarded. vfio will pin all pages, populating memory.
2161 * Disallow that. vmstate priorities make sure any RamDiscardManager
2162 * were already restored before IOMMUs are restored.
2163 */
2164 if (!ram_discard_manager_is_populated(rdm, &tmp)) {
2165 error_report("iommu map to discarded memory (e.g., unplugged via"
2166 " virtio-mem): %" HWADDR_PRIx "",
2167 iotlb->translated_addr);
2168 return false;
2169 }
2170 }
2171
2172 /*
2173 * Translation truncates length to the IOMMU page size,
2174 * check that it did not truncate too much.
2175 */
2176 if (len & iotlb->addr_mask) {
2177 error_report("iommu has granularity incompatible with target AS");
2178 return false;
2179 }
2180
2181 if (vaddr) {
2182 *vaddr = memory_region_get_ram_ptr(mr) + xlat;
2183 }
2184
2185 if (ram_addr) {
2186 *ram_addr = memory_region_get_ram_addr(mr) + xlat;
2187 }
2188
2189 if (read_only) {
2190 *read_only = !writable || mr->readonly;
2191 }
2192
2193 return true;
2194}
2195
093bc2cd
AK
2196void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
2197{
5a583347 2198 uint8_t mask = 1 << client;
deb809ed 2199 uint8_t old_logging;
5a583347 2200
dbddac6d 2201 assert(client == DIRTY_MEMORY_VGA);
deb809ed
PB
2202 old_logging = mr->vga_logging_count;
2203 mr->vga_logging_count += log ? 1 : -1;
2204 if (!!old_logging == !!mr->vga_logging_count) {
2205 return;
2206 }
2207
59023ef4 2208 memory_region_transaction_begin();
5a583347 2209 mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
22bde714 2210 memory_region_update_pending |= mr->enabled;
59023ef4 2211 memory_region_transaction_commit();
093bc2cd
AK
2212}
2213
a8170e5e
AK
2214void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr,
2215 hwaddr size)
093bc2cd 2216{
8e41fb63
FZ
2217 assert(mr->ram_block);
2218 cpu_physical_memory_set_dirty_range(memory_region_get_ram_addr(mr) + addr,
2219 size,
58d2707e 2220 memory_region_get_dirty_log_mask(mr));
093bc2cd
AK
2221}
2222
b87eaa9b
PX
2223/*
2224 * If memory region `mr' is NULL, do global sync. Otherwise, sync
2225 * dirty bitmap for the specified memory region.
2226 */
0fe1eca7 2227static void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
093bc2cd 2228{
0a752eee 2229 MemoryListener *listener;
0d673e36 2230 AddressSpace *as;
0a752eee 2231 FlatView *view;
5a583347
AK
2232 FlatRange *fr;
2233
0a752eee
PB
2234 /* If the same address space has multiple log_sync listeners, we
2235 * visit that address space's FlatView multiple times. But because
2236 * log_sync listeners are rare, it's still cheaper than walking each
2237 * address space once.
2238 */
2239 QTAILQ_FOREACH(listener, &memory_listeners, link) {
b87eaa9b
PX
2240 if (listener->log_sync) {
2241 as = listener->address_space;
2242 view = address_space_get_flatview(as);
2243 FOR_EACH_FLAT_RANGE(fr, view) {
2244 if (fr->dirty_log_mask && (!mr || fr->mr == mr)) {
2245 MemoryRegionSection mrs = section_from_flat_range(fr, view);
2246 listener->log_sync(listener, &mrs);
2247 }
0d673e36 2248 }
b87eaa9b 2249 flatview_unref(view);
fcb3ab34 2250 trace_memory_region_sync_dirty(mr ? mr->name : "(all)", listener->name, 0);
b87eaa9b
PX
2251 } else if (listener->log_sync_global) {
2252 /*
2253 * No matter whether MR is specified, what we can do here
2254 * is to do a global sync, because we are not capable to
2255 * sync in a finer granularity.
2256 */
2257 listener->log_sync_global(listener);
fcb3ab34 2258 trace_memory_region_sync_dirty(mr ? mr->name : "(all)", listener->name, 1);
5a583347
AK
2259 }
2260 }
093bc2cd
AK
2261}
2262
077874e0
PX
2263void memory_region_clear_dirty_bitmap(MemoryRegion *mr, hwaddr start,
2264 hwaddr len)
2265{
2266 MemoryRegionSection mrs;
2267 MemoryListener *listener;
2268 AddressSpace *as;
2269 FlatView *view;
2270 FlatRange *fr;
2271 hwaddr sec_start, sec_end, sec_size;
2272
2273 QTAILQ_FOREACH(listener, &memory_listeners, link) {
2274 if (!listener->log_clear) {
2275 continue;
2276 }
2277 as = listener->address_space;
2278 view = address_space_get_flatview(as);
2279 FOR_EACH_FLAT_RANGE(fr, view) {
2280 if (!fr->dirty_log_mask || fr->mr != mr) {
2281 /*
2282 * Clear dirty bitmap operation only applies to those
2283 * regions whose dirty logging is at least enabled
2284 */
2285 continue;
2286 }
2287
2288 mrs = section_from_flat_range(fr, view);
2289
2290 sec_start = MAX(mrs.offset_within_region, start);
2291 sec_end = mrs.offset_within_region + int128_get64(mrs.size);
2292 sec_end = MIN(sec_end, start + len);
2293
2294 if (sec_start >= sec_end) {
2295 /*
2296 * If this memory region section has no intersection
2297 * with the requested range, skip.
2298 */
2299 continue;
2300 }
2301
2302 /* Valid case; shrink the section if needed */
2303 mrs.offset_within_address_space +=
2304 sec_start - mrs.offset_within_region;
2305 mrs.offset_within_region = sec_start;
2306 sec_size = sec_end - sec_start;
2307 mrs.size = int128_make64(sec_size);
2308 listener->log_clear(listener, &mrs);
2309 }
2310 flatview_unref(view);
2311 }
2312}
2313
0fe1eca7
PB
2314DirtyBitmapSnapshot *memory_region_snapshot_and_clear_dirty(MemoryRegion *mr,
2315 hwaddr addr,
2316 hwaddr size,
2317 unsigned client)
2318{
9458a9a1 2319 DirtyBitmapSnapshot *snapshot;
0fe1eca7
PB
2320 assert(mr->ram_block);
2321 memory_region_sync_dirty_bitmap(mr);
9458a9a1
PB
2322 snapshot = cpu_physical_memory_snapshot_and_clear_dirty(mr, addr, size, client);
2323 memory_global_after_dirty_log_sync();
2324 return snapshot;
0fe1eca7
PB
2325}
2326
2327bool memory_region_snapshot_get_dirty(MemoryRegion *mr, DirtyBitmapSnapshot *snap,
2328 hwaddr addr, hwaddr size)
2329{
2330 assert(mr->ram_block);
2331 return cpu_physical_memory_snapshot_get_dirty(snap,
2332 memory_region_get_ram_addr(mr) + addr, size);
2333}
2334
093bc2cd
AK
2335void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
2336{
fb1cd6f9 2337 if (mr->readonly != readonly) {
59023ef4 2338 memory_region_transaction_begin();
fb1cd6f9 2339 mr->readonly = readonly;
22bde714 2340 memory_region_update_pending |= mr->enabled;
59023ef4 2341 memory_region_transaction_commit();
fb1cd6f9 2342 }
093bc2cd
AK
2343}
2344
c26763f8
MAL
2345void memory_region_set_nonvolatile(MemoryRegion *mr, bool nonvolatile)
2346{
2347 if (mr->nonvolatile != nonvolatile) {
2348 memory_region_transaction_begin();
2349 mr->nonvolatile = nonvolatile;
2350 memory_region_update_pending |= mr->enabled;
2351 memory_region_transaction_commit();
2352 }
2353}
2354
5f9a5ea1 2355void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode)
d0a9b5bc 2356{
5f9a5ea1 2357 if (mr->romd_mode != romd_mode) {
59023ef4 2358 memory_region_transaction_begin();
5f9a5ea1 2359 mr->romd_mode = romd_mode;
22bde714 2360 memory_region_update_pending |= mr->enabled;
59023ef4 2361 memory_region_transaction_commit();
d0a9b5bc
AK
2362 }
2363}
2364
a8170e5e
AK
2365void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr,
2366 hwaddr size, unsigned client)
093bc2cd 2367{
8e41fb63
FZ
2368 assert(mr->ram_block);
2369 cpu_physical_memory_test_and_clear_dirty(
2370 memory_region_get_ram_addr(mr) + addr, size, client);
093bc2cd
AK
2371}
2372
a35ba7be
PB
2373int memory_region_get_fd(MemoryRegion *mr)
2374{
694ea274 2375 RCU_READ_LOCK_GUARD();
4ff87573
PB
2376 while (mr->alias) {
2377 mr = mr->alias;
a35ba7be 2378 }
66997c42 2379 return mr->ram_block->fd;
4ff87573 2380}
a35ba7be 2381
093bc2cd
AK
2382void *memory_region_get_ram_ptr(MemoryRegion *mr)
2383{
49b24afc 2384 uint64_t offset = 0;
093bc2cd 2385
694ea274 2386 RCU_READ_LOCK_GUARD();
49b24afc
PB
2387 while (mr->alias) {
2388 offset += mr->alias_offset;
2389 mr = mr->alias;
2390 }
8e41fb63 2391 assert(mr->ram_block);
66997c42 2392 return qemu_map_ram_ptr(mr->ram_block, offset);
093bc2cd
AK
2393}
2394
07bdaa41
PB
2395MemoryRegion *memory_region_from_host(void *ptr, ram_addr_t *offset)
2396{
2397 RAMBlock *block;
2398
2399 block = qemu_ram_block_from_host(ptr, false, offset);
2400 if (!block) {
2401 return NULL;
2402 }
2403
2404 return block->mr;
2405}
2406
7ebb2745
FZ
2407ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr)
2408{
2409 return mr->ram_block ? mr->ram_block->offset : RAM_ADDR_INVALID;
2410}
2411
37d7c084
PB
2412void memory_region_ram_resize(MemoryRegion *mr, ram_addr_t newsize, Error **errp)
2413{
8e41fb63 2414 assert(mr->ram_block);
37d7c084 2415
fa53a0e5 2416 qemu_ram_resize(mr->ram_block, newsize, errp);
37d7c084
PB
2417}
2418
9ecc996a
PMD
2419void memory_region_msync(MemoryRegion *mr, hwaddr addr, hwaddr size)
2420{
2421 if (mr->ram_block) {
ab7e41e6 2422 qemu_ram_msync(mr->ram_block, addr, size);
9ecc996a
PMD
2423 }
2424}
61c490e2 2425
4dfe59d1 2426void memory_region_writeback(MemoryRegion *mr, hwaddr addr, hwaddr size)
61c490e2
BM
2427{
2428 /*
2429 * Might be extended case needed to cover
2430 * different types of memory regions
2431 */
9ecc996a
PMD
2432 if (mr->dirty_log_mask) {
2433 memory_region_msync(mr, addr, size);
61c490e2
BM
2434 }
2435}
2436
b960fc17
PX
2437/*
2438 * Call proper memory listeners about the change on the newly
2439 * added/removed CoalescedMemoryRange.
2440 */
2441static void memory_region_update_coalesced_range(MemoryRegion *mr,
2442 CoalescedMemoryRange *cmr,
2443 bool add)
093bc2cd 2444{
b960fc17 2445 AddressSpace *as;
99e86347 2446 FlatView *view;
093bc2cd 2447 FlatRange *fr;
093bc2cd 2448
0d673e36 2449 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
b960fc17
PX
2450 view = address_space_get_flatview(as);
2451 FOR_EACH_FLAT_RANGE(fr, view) {
2452 if (fr->mr == mr) {
2453 flat_range_coalesced_io_notify(fr, as, cmr, add);
2454 }
2455 }
2456 flatview_unref(view);
0d673e36
AK
2457 }
2458}
2459
093bc2cd
AK
2460void memory_region_set_coalescing(MemoryRegion *mr)
2461{
2462 memory_region_clear_coalescing(mr);
08dafab4 2463 memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
093bc2cd
AK
2464}
2465
2466void memory_region_add_coalescing(MemoryRegion *mr,
a8170e5e 2467 hwaddr offset,
093bc2cd
AK
2468 uint64_t size)
2469{
7267c094 2470 CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
093bc2cd 2471
08dafab4 2472 cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
093bc2cd 2473 QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
b960fc17 2474 memory_region_update_coalesced_range(mr, cmr, true);
d410515e 2475 memory_region_set_flush_coalesced(mr);
093bc2cd
AK
2476}
2477
2478void memory_region_clear_coalescing(MemoryRegion *mr)
2479{
2480 CoalescedMemoryRange *cmr;
9c1aa1c2
PX
2481
2482 if (QTAILQ_EMPTY(&mr->coalesced)) {
2483 return;
2484 }
093bc2cd 2485
d410515e
JK
2486 qemu_flush_coalesced_mmio_buffer();
2487 mr->flush_coalesced_mmio = false;
2488
093bc2cd
AK
2489 while (!QTAILQ_EMPTY(&mr->coalesced)) {
2490 cmr = QTAILQ_FIRST(&mr->coalesced);
2491 QTAILQ_REMOVE(&mr->coalesced, cmr, link);
b960fc17 2492 memory_region_update_coalesced_range(mr, cmr, false);
7267c094 2493 g_free(cmr);
ab5b3db5 2494 }
093bc2cd
AK
2495}
2496
d410515e
JK
2497void memory_region_set_flush_coalesced(MemoryRegion *mr)
2498{
2499 mr->flush_coalesced_mmio = true;
2500}
2501
2502void memory_region_clear_flush_coalesced(MemoryRegion *mr)
2503{
2504 qemu_flush_coalesced_mmio_buffer();
2505 if (QTAILQ_EMPTY(&mr->coalesced)) {
2506 mr->flush_coalesced_mmio = false;
2507 }
2508}
2509
8c56c1a5
PF
2510static bool userspace_eventfd_warning;
2511
3e9d69e7 2512void memory_region_add_eventfd(MemoryRegion *mr,
a8170e5e 2513 hwaddr addr,
3e9d69e7
AK
2514 unsigned size,
2515 bool match_data,
2516 uint64_t data,
753d5e14 2517 EventNotifier *e)
3e9d69e7
AK
2518{
2519 MemoryRegionIoeventfd mrfd = {
08dafab4
AK
2520 .addr.start = int128_make64(addr),
2521 .addr.size = int128_make64(size),
3e9d69e7
AK
2522 .match_data = match_data,
2523 .data = data,
753d5e14 2524 .e = e,
3e9d69e7
AK
2525 };
2526 unsigned i;
2527
8c56c1a5
PF
2528 if (kvm_enabled() && (!(kvm_eventfds_enabled() ||
2529 userspace_eventfd_warning))) {
2530 userspace_eventfd_warning = true;
2531 error_report("Using eventfd without MMIO binding in KVM. "
2532 "Suboptimal performance expected");
2533 }
2534
b8aecea2 2535 if (size) {
9bf825bf 2536 adjust_endianness(mr, &mrfd.data, size_memop(size) | MO_TE);
b8aecea2 2537 }
59023ef4 2538 memory_region_transaction_begin();
3e9d69e7 2539 for (i = 0; i < mr->ioeventfd_nb; ++i) {
73bb753d 2540 if (memory_region_ioeventfd_before(&mrfd, &mr->ioeventfds[i])) {
3e9d69e7
AK
2541 break;
2542 }
2543 }
2544 ++mr->ioeventfd_nb;
7267c094 2545 mr->ioeventfds = g_realloc(mr->ioeventfds,
3e9d69e7
AK
2546 sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
2547 memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
2548 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
2549 mr->ioeventfds[i] = mrfd;
4dc56152 2550 ioeventfd_update_pending |= mr->enabled;
59023ef4 2551 memory_region_transaction_commit();
3e9d69e7
AK
2552}
2553
2554void memory_region_del_eventfd(MemoryRegion *mr,
a8170e5e 2555 hwaddr addr,
3e9d69e7
AK
2556 unsigned size,
2557 bool match_data,
2558 uint64_t data,
753d5e14 2559 EventNotifier *e)
3e9d69e7
AK
2560{
2561 MemoryRegionIoeventfd mrfd = {
08dafab4
AK
2562 .addr.start = int128_make64(addr),
2563 .addr.size = int128_make64(size),
3e9d69e7
AK
2564 .match_data = match_data,
2565 .data = data,
753d5e14 2566 .e = e,
3e9d69e7
AK
2567 };
2568 unsigned i;
2569
b8aecea2 2570 if (size) {
9bf825bf 2571 adjust_endianness(mr, &mrfd.data, size_memop(size) | MO_TE);
b8aecea2 2572 }
59023ef4 2573 memory_region_transaction_begin();
3e9d69e7 2574 for (i = 0; i < mr->ioeventfd_nb; ++i) {
73bb753d 2575 if (memory_region_ioeventfd_equal(&mrfd, &mr->ioeventfds[i])) {
3e9d69e7
AK
2576 break;
2577 }
2578 }
2579 assert(i != mr->ioeventfd_nb);
2580 memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
2581 sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
2582 --mr->ioeventfd_nb;
7267c094 2583 mr->ioeventfds = g_realloc(mr->ioeventfds,
3e9d69e7 2584 sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
4dc56152 2585 ioeventfd_update_pending |= mr->enabled;
59023ef4 2586 memory_region_transaction_commit();
3e9d69e7
AK
2587}
2588
feca4ac1 2589static void memory_region_update_container_subregions(MemoryRegion *subregion)
093bc2cd 2590{
feca4ac1 2591 MemoryRegion *mr = subregion->container;
093bc2cd
AK
2592 MemoryRegion *other;
2593
59023ef4
JK
2594 memory_region_transaction_begin();
2595
dfde4e6e 2596 memory_region_ref(subregion);
093bc2cd
AK
2597 QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
2598 if (subregion->priority >= other->priority) {
2599 QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
2600 goto done;
2601 }
2602 }
2603 QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
2604done:
22bde714 2605 memory_region_update_pending |= mr->enabled && subregion->enabled;
59023ef4 2606 memory_region_transaction_commit();
093bc2cd
AK
2607}
2608
0598701a
PC
2609static void memory_region_add_subregion_common(MemoryRegion *mr,
2610 hwaddr offset,
2611 MemoryRegion *subregion)
2612{
5ead6218
DH
2613 MemoryRegion *alias;
2614
feca4ac1
PB
2615 assert(!subregion->container);
2616 subregion->container = mr;
5ead6218
DH
2617 for (alias = subregion->alias; alias; alias = alias->alias) {
2618 alias->mapped_via_alias++;
2619 }
0598701a 2620 subregion->addr = offset;
feca4ac1 2621 memory_region_update_container_subregions(subregion);
0598701a 2622}
093bc2cd
AK
2623
2624void memory_region_add_subregion(MemoryRegion *mr,
a8170e5e 2625 hwaddr offset,
093bc2cd
AK
2626 MemoryRegion *subregion)
2627{
093bc2cd
AK
2628 subregion->priority = 0;
2629 memory_region_add_subregion_common(mr, offset, subregion);
2630}
2631
2632void memory_region_add_subregion_overlap(MemoryRegion *mr,
a8170e5e 2633 hwaddr offset,
093bc2cd 2634 MemoryRegion *subregion,
a1ff8ae0 2635 int priority)
093bc2cd 2636{
093bc2cd
AK
2637 subregion->priority = priority;
2638 memory_region_add_subregion_common(mr, offset, subregion);
2639}
2640
2641void memory_region_del_subregion(MemoryRegion *mr,
2642 MemoryRegion *subregion)
2643{
5ead6218
DH
2644 MemoryRegion *alias;
2645
59023ef4 2646 memory_region_transaction_begin();
feca4ac1
PB
2647 assert(subregion->container == mr);
2648 subregion->container = NULL;
5ead6218
DH
2649 for (alias = subregion->alias; alias; alias = alias->alias) {
2650 alias->mapped_via_alias--;
2651 assert(alias->mapped_via_alias >= 0);
2652 }
093bc2cd 2653 QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
dfde4e6e 2654 memory_region_unref(subregion);
22bde714 2655 memory_region_update_pending |= mr->enabled && subregion->enabled;
59023ef4 2656 memory_region_transaction_commit();
6bba19ba
AK
2657}
2658
2659void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
2660{
2661 if (enabled == mr->enabled) {
2662 return;
2663 }
59023ef4 2664 memory_region_transaction_begin();
6bba19ba 2665 mr->enabled = enabled;
22bde714 2666 memory_region_update_pending = true;
59023ef4 2667 memory_region_transaction_commit();
093bc2cd 2668}
1c0ffa58 2669
e7af4c67
MT
2670void memory_region_set_size(MemoryRegion *mr, uint64_t size)
2671{
2672 Int128 s = int128_make64(size);
2673
2674 if (size == UINT64_MAX) {
2675 s = int128_2_64();
2676 }
2677 if (int128_eq(s, mr->size)) {
2678 return;
2679 }
2680 memory_region_transaction_begin();
2681 mr->size = s;
2682 memory_region_update_pending = true;
2683 memory_region_transaction_commit();
2684}
2685
67891b8a 2686static void memory_region_readd_subregion(MemoryRegion *mr)
2282e1af 2687{
feca4ac1 2688 MemoryRegion *container = mr->container;
2282e1af 2689
feca4ac1 2690 if (container) {
67891b8a
PC
2691 memory_region_transaction_begin();
2692 memory_region_ref(mr);
feca4ac1 2693 memory_region_del_subregion(container, mr);
a8749d7c 2694 memory_region_add_subregion_common(container, mr->addr, mr);
67891b8a
PC
2695 memory_region_unref(mr);
2696 memory_region_transaction_commit();
2282e1af 2697 }
67891b8a 2698}
2282e1af 2699
67891b8a
PC
2700void memory_region_set_address(MemoryRegion *mr, hwaddr addr)
2701{
2702 if (addr != mr->addr) {
2703 mr->addr = addr;
2704 memory_region_readd_subregion(mr);
2705 }
2282e1af
AK
2706}
2707
a8170e5e 2708void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset)
4703359e 2709{
4703359e 2710 assert(mr->alias);
4703359e 2711
59023ef4 2712 if (offset == mr->alias_offset) {
4703359e
AK
2713 return;
2714 }
2715
59023ef4
JK
2716 memory_region_transaction_begin();
2717 mr->alias_offset = offset;
22bde714 2718 memory_region_update_pending |= mr->enabled;
59023ef4 2719 memory_region_transaction_commit();
4703359e
AK
2720}
2721
a2b257d6
IM
2722uint64_t memory_region_get_alignment(const MemoryRegion *mr)
2723{
2724 return mr->align;
2725}
2726
e2177955
AK
2727static int cmp_flatrange_addr(const void *addr_, const void *fr_)
2728{
2729 const AddrRange *addr = addr_;
2730 const FlatRange *fr = fr_;
2731
2732 if (int128_le(addrrange_end(*addr), fr->addr.start)) {
2733 return -1;
2734 } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
2735 return 1;
2736 }
2737 return 0;
2738}
2739
99e86347 2740static FlatRange *flatview_lookup(FlatView *view, AddrRange addr)
e2177955 2741{
99e86347 2742 return bsearch(&addr, view->ranges, view->nr,
e2177955
AK
2743 sizeof(FlatRange), cmp_flatrange_addr);
2744}
2745
eed2bacf
IM
2746bool memory_region_is_mapped(MemoryRegion *mr)
2747{
5ead6218 2748 return !!mr->container || mr->mapped_via_alias;
eed2bacf
IM
2749}
2750
c6742b14
PB
2751/* Same as memory_region_find, but it does not add a reference to the
2752 * returned region. It must be called from an RCU critical section.
2753 */
2754static MemoryRegionSection memory_region_find_rcu(MemoryRegion *mr,
2755 hwaddr addr, uint64_t size)
e2177955 2756{
052e87b0 2757 MemoryRegionSection ret = { .mr = NULL };
73034e9e
PB
2758 MemoryRegion *root;
2759 AddressSpace *as;
2760 AddrRange range;
99e86347 2761 FlatView *view;
73034e9e
PB
2762 FlatRange *fr;
2763
2764 addr += mr->addr;
feca4ac1
PB
2765 for (root = mr; root->container; ) {
2766 root = root->container;
73034e9e
PB
2767 addr += root->addr;
2768 }
e2177955 2769
73034e9e 2770 as = memory_region_to_address_space(root);
eed2bacf
IM
2771 if (!as) {
2772 return ret;
2773 }
73034e9e 2774 range = addrrange_make(int128_make64(addr), int128_make64(size));
99e86347 2775
16620684 2776 view = address_space_to_flatview(as);
99e86347 2777 fr = flatview_lookup(view, range);
e2177955 2778 if (!fr) {
c6742b14 2779 return ret;
e2177955
AK
2780 }
2781
99e86347 2782 while (fr > view->ranges && addrrange_intersects(fr[-1].addr, range)) {
e2177955
AK
2783 --fr;
2784 }
2785
2786 ret.mr = fr->mr;
16620684 2787 ret.fv = view;
e2177955
AK
2788 range = addrrange_intersection(range, fr->addr);
2789 ret.offset_within_region = fr->offset_in_region;
2790 ret.offset_within_region += int128_get64(int128_sub(range.start,
2791 fr->addr.start));
052e87b0 2792 ret.size = range.size;
e2177955 2793 ret.offset_within_address_space = int128_get64(range.start);
7a8499e8 2794 ret.readonly = fr->readonly;
c26763f8 2795 ret.nonvolatile = fr->nonvolatile;
c6742b14
PB
2796 return ret;
2797}
2798
2799MemoryRegionSection memory_region_find(MemoryRegion *mr,
2800 hwaddr addr, uint64_t size)
2801{
2802 MemoryRegionSection ret;
694ea274 2803 RCU_READ_LOCK_GUARD();
c6742b14
PB
2804 ret = memory_region_find_rcu(mr, addr, size);
2805 if (ret.mr) {
2806 memory_region_ref(ret.mr);
2807 }
e2177955
AK
2808 return ret;
2809}
2810
22843838
DH
2811MemoryRegionSection *memory_region_section_new_copy(MemoryRegionSection *s)
2812{
2813 MemoryRegionSection *tmp = g_new(MemoryRegionSection, 1);
2814
2815 *tmp = *s;
2816 if (tmp->mr) {
2817 memory_region_ref(tmp->mr);
2818 }
2819 if (tmp->fv) {
2820 bool ret = flatview_ref(tmp->fv);
2821
2822 g_assert(ret);
2823 }
2824 return tmp;
2825}
2826
2827void memory_region_section_free_copy(MemoryRegionSection *s)
2828{
2829 if (s->fv) {
2830 flatview_unref(s->fv);
2831 }
2832 if (s->mr) {
2833 memory_region_unref(s->mr);
2834 }
2835 g_free(s);
2836}
2837
c6742b14
PB
2838bool memory_region_present(MemoryRegion *container, hwaddr addr)
2839{
2840 MemoryRegion *mr;
2841
694ea274 2842 RCU_READ_LOCK_GUARD();
c6742b14 2843 mr = memory_region_find_rcu(container, addr, 1).mr;
c6742b14
PB
2844 return mr && mr != container;
2845}
2846
9c1f8f44 2847void memory_global_dirty_log_sync(void)
86e775c6 2848{
3ebb1817 2849 memory_region_sync_dirty_bitmap(NULL);
7664e80c
AK
2850}
2851
9458a9a1
PB
2852void memory_global_after_dirty_log_sync(void)
2853{
2854 MEMORY_LISTENER_CALL_GLOBAL(log_global_after_sync, Forward);
2855}
2856
a5c90c61
PX
2857/*
2858 * Dirty track stop flags that are postponed due to VM being stopped. Should
2859 * only be used within vmstate_change hook.
2860 */
2861static unsigned int postponed_stop_flags;
19310760 2862static VMChangeStateEntry *vmstate_change;
a5c90c61 2863static void memory_global_dirty_log_stop_postponed_run(void);
19310760 2864
63b41db4 2865void memory_global_dirty_log_start(unsigned int flags)
7664e80c 2866{
a5c90c61
PX
2867 unsigned int old_flags;
2868
2869 assert(flags && !(flags & (~GLOBAL_DIRTY_MASK)));
7b0538ed 2870
19310760 2871 if (vmstate_change) {
a5c90c61
PX
2872 /* If there is postponed stop(), operate on it first */
2873 postponed_stop_flags &= ~flags;
2874 memory_global_dirty_log_stop_postponed_run();
19310760
JZ
2875 }
2876
a5c90c61
PX
2877 flags &= ~global_dirty_tracking;
2878 if (!flags) {
2879 return;
2880 }
2881
2882 old_flags = global_dirty_tracking;
63b41db4 2883 global_dirty_tracking |= flags;
63b41db4 2884 trace_global_dirty_changed(global_dirty_tracking);
6f6a5ef3 2885
7b0538ed
PX
2886 if (!old_flags) {
2887 MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward);
2888 memory_region_transaction_begin();
2889 memory_region_update_pending = true;
2890 memory_region_transaction_commit();
2891 }
7664e80c
AK
2892}
2893
63b41db4 2894static void memory_global_dirty_log_do_stop(unsigned int flags)
7664e80c 2895{
63b41db4
HH
2896 assert(flags && !(flags & (~GLOBAL_DIRTY_MASK)));
2897 assert((global_dirty_tracking & flags) == flags);
2898 global_dirty_tracking &= ~flags;
2899
2900 trace_global_dirty_changed(global_dirty_tracking);
6f6a5ef3 2901
7b0538ed
PX
2902 if (!global_dirty_tracking) {
2903 memory_region_transaction_begin();
2904 memory_region_update_pending = true;
2905 memory_region_transaction_commit();
2906 MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse);
2907 }
7664e80c
AK
2908}
2909
a5c90c61
PX
2910/*
2911 * Execute the postponed dirty log stop operations if there is, then reset
2912 * everything (including the flags and the vmstate change hook).
2913 */
2914static void memory_global_dirty_log_stop_postponed_run(void)
2915{
2916 /* This must be called with the vmstate handler registered */
2917 assert(vmstate_change);
2918
2919 /* Note: postponed_stop_flags can be cleared in log start routine */
2920 if (postponed_stop_flags) {
2921 memory_global_dirty_log_do_stop(postponed_stop_flags);
2922 postponed_stop_flags = 0;
2923 }
2924
2925 qemu_del_vm_change_state_handler(vmstate_change);
2926 vmstate_change = NULL;
2927}
2928
538f0497 2929static void memory_vm_change_state_handler(void *opaque, bool running,
19310760
JZ
2930 RunState state)
2931{
2932 if (running) {
a5c90c61 2933 memory_global_dirty_log_stop_postponed_run();
19310760
JZ
2934 }
2935}
2936
63b41db4 2937void memory_global_dirty_log_stop(unsigned int flags)
19310760
JZ
2938{
2939 if (!runstate_is_running()) {
a5c90c61 2940 /* Postpone the dirty log stop, e.g., to when VM starts again */
19310760 2941 if (vmstate_change) {
a5c90c61
PX
2942 /* Batch with previous postponed flags */
2943 postponed_stop_flags |= flags;
2944 } else {
2945 postponed_stop_flags = flags;
2946 vmstate_change = qemu_add_vm_change_state_handler(
2947 memory_vm_change_state_handler, NULL);
19310760 2948 }
19310760
JZ
2949 return;
2950 }
2951
63b41db4 2952 memory_global_dirty_log_do_stop(flags);
19310760
JZ
2953}
2954
7664e80c
AK
2955static void listener_add_address_space(MemoryListener *listener,
2956 AddressSpace *as)
2957{
99e86347 2958 FlatView *view;
7664e80c
AK
2959 FlatRange *fr;
2960
680a4783
PB
2961 if (listener->begin) {
2962 listener->begin(listener);
2963 }
63b41db4 2964 if (global_dirty_tracking) {
975aefe0
AK
2965 if (listener->log_global_start) {
2966 listener->log_global_start(listener);
2967 }
7664e80c 2968 }
975aefe0 2969
856d7245 2970 view = address_space_get_flatview(as);
99e86347 2971 FOR_EACH_FLAT_RANGE(fr, view) {
279836f8
DH
2972 MemoryRegionSection section = section_from_flat_range(fr, view);
2973
975aefe0
AK
2974 if (listener->region_add) {
2975 listener->region_add(listener, &section);
2976 }
ae990e6c
DH
2977 if (fr->dirty_log_mask && listener->log_start) {
2978 listener->log_start(listener, &section, 0, fr->dirty_log_mask);
2979 }
7664e80c 2980 }
680a4783
PB
2981 if (listener->commit) {
2982 listener->commit(listener);
2983 }
856d7245 2984 flatview_unref(view);
7664e80c
AK
2985}
2986
d25836ca
PX
2987static void listener_del_address_space(MemoryListener *listener,
2988 AddressSpace *as)
2989{
2990 FlatView *view;
2991 FlatRange *fr;
2992
2993 if (listener->begin) {
2994 listener->begin(listener);
2995 }
2996 view = address_space_get_flatview(as);
2997 FOR_EACH_FLAT_RANGE(fr, view) {
2998 MemoryRegionSection section = section_from_flat_range(fr, view);
2999
3000 if (fr->dirty_log_mask && listener->log_stop) {
3001 listener->log_stop(listener, &section, fr->dirty_log_mask, 0);
3002 }
3003 if (listener->region_del) {
3004 listener->region_del(listener, &section);
3005 }
3006 }
3007 if (listener->commit) {
3008 listener->commit(listener);
3009 }
3010 flatview_unref(view);
3011}
3012
d45fa784 3013void memory_listener_register(MemoryListener *listener, AddressSpace *as)
7664e80c 3014{
72e22d2f
AK
3015 MemoryListener *other = NULL;
3016
b87eaa9b
PX
3017 /* Only one of them can be defined for a listener */
3018 assert(!(listener->log_sync && listener->log_sync_global));
3019
d45fa784 3020 listener->address_space = as;
72e22d2f 3021 if (QTAILQ_EMPTY(&memory_listeners)
eae3eb3e 3022 || listener->priority >= QTAILQ_LAST(&memory_listeners)->priority) {
72e22d2f
AK
3023 QTAILQ_INSERT_TAIL(&memory_listeners, listener, link);
3024 } else {
3025 QTAILQ_FOREACH(other, &memory_listeners, link) {
3026 if (listener->priority < other->priority) {
3027 break;
3028 }
3029 }
3030 QTAILQ_INSERT_BEFORE(other, listener, link);
3031 }
0d673e36 3032
9a54635d 3033 if (QTAILQ_EMPTY(&as->listeners)
eae3eb3e 3034 || listener->priority >= QTAILQ_LAST(&as->listeners)->priority) {
9a54635d
PB
3035 QTAILQ_INSERT_TAIL(&as->listeners, listener, link_as);
3036 } else {
3037 QTAILQ_FOREACH(other, &as->listeners, link_as) {
3038 if (listener->priority < other->priority) {
3039 break;
3040 }
3041 }
3042 QTAILQ_INSERT_BEFORE(other, listener, link_as);
3043 }
3044
d45fa784 3045 listener_add_address_space(listener, as);
7664e80c
AK
3046}
3047
3048void memory_listener_unregister(MemoryListener *listener)
3049{
1d8280c1
PB
3050 if (!listener->address_space) {
3051 return;
3052 }
3053
d25836ca 3054 listener_del_address_space(listener, listener->address_space);
72e22d2f 3055 QTAILQ_REMOVE(&memory_listeners, listener, link);
9a54635d 3056 QTAILQ_REMOVE(&listener->address_space->listeners, listener, link_as);
1d8280c1 3057 listener->address_space = NULL;
86e775c6 3058}
e2177955 3059
a2166410
GK
3060void address_space_remove_listeners(AddressSpace *as)
3061{
3062 while (!QTAILQ_EMPTY(&as->listeners)) {
3063 memory_listener_unregister(QTAILQ_FIRST(&as->listeners));
3064 }
3065}
3066
7dca8043 3067void address_space_init(AddressSpace *as, MemoryRegion *root, const char *name)
1c0ffa58 3068{
ac95190e 3069 memory_region_ref(root);
8786db7c 3070 as->root = root;
67ace39b 3071 as->current_map = NULL;
4c19eb72
AK
3072 as->ioeventfd_nb = 0;
3073 as->ioeventfds = NULL;
9a54635d 3074 QTAILQ_INIT(&as->listeners);
0d673e36 3075 QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link);
7dca8043 3076 as->name = g_strdup(name ? name : "anonymous");
202fc01b
AK
3077 address_space_update_topology(as);
3078 address_space_update_ioeventfds(as);
1c0ffa58 3079}
658b2224 3080
374f2981 3081static void do_address_space_destroy(AddressSpace *as)
83f3c251 3082{
9a54635d 3083 assert(QTAILQ_EMPTY(&as->listeners));
078c44f4 3084
856d7245 3085 flatview_unref(as->current_map);
7dca8043 3086 g_free(as->name);
4c19eb72 3087 g_free(as->ioeventfds);
ac95190e 3088 memory_region_unref(as->root);
83f3c251
AK
3089}
3090
374f2981
PB
3091void address_space_destroy(AddressSpace *as)
3092{
ac95190e
PB
3093 MemoryRegion *root = as->root;
3094
374f2981
PB
3095 /* Flush out anything from MemoryListeners listening in on this */
3096 memory_region_transaction_begin();
3097 as->root = NULL;
3098 memory_region_transaction_commit();
3099 QTAILQ_REMOVE(&address_spaces, as, address_spaces_link);
3100
3101 /* At this point, as->dispatch and as->current_map are dummy
3102 * entries that the guest should never use. Wait for the old
3103 * values to expire before freeing the data.
3104 */
ac95190e 3105 as->root = root;
374f2981
PB
3106 call_rcu(as, do_address_space_destroy, rcu);
3107}
3108
4e831901
PX
3109static const char *memory_region_type(MemoryRegion *mr)
3110{
39fa93c4
PMD
3111 if (mr->alias) {
3112 return memory_region_type(mr->alias);
3113 }
4e831901
PX
3114 if (memory_region_is_ram_device(mr)) {
3115 return "ramd";
3116 } else if (memory_region_is_romd(mr)) {
3117 return "romd";
3118 } else if (memory_region_is_rom(mr)) {
3119 return "rom";
3120 } else if (memory_region_is_ram(mr)) {
3121 return "ram";
3122 } else {
3123 return "i/o";
3124 }
3125}
3126
314e2987
BS
3127typedef struct MemoryRegionList MemoryRegionList;
3128
3129struct MemoryRegionList {
3130 const MemoryRegion *mr;
a16878d2 3131 QTAILQ_ENTRY(MemoryRegionList) mrqueue;
314e2987
BS
3132};
3133
b58deb34 3134typedef QTAILQ_HEAD(, MemoryRegionList) MemoryRegionListHead;
314e2987 3135
4e831901
PX
3136#define MR_SIZE(size) (int128_nz(size) ? (hwaddr)int128_get64( \
3137 int128_sub((size), int128_one())) : 0)
3138#define MTREE_INDENT " "
3139
b6b71cb5 3140static void mtree_expand_owner(const char *label, Object *obj)
fc051ae6
AK
3141{
3142 DeviceState *dev = (DeviceState *) object_dynamic_cast(obj, TYPE_DEVICE);
3143
b6b71cb5 3144 qemu_printf(" %s:{%s", label, dev ? "dev" : "obj");
fc051ae6 3145 if (dev && dev->id) {
b6b71cb5 3146 qemu_printf(" id=%s", dev->id);
fc051ae6 3147 } else {
ddfb0baa 3148 char *canonical_path = object_get_canonical_path(obj);
fc051ae6 3149 if (canonical_path) {
b6b71cb5 3150 qemu_printf(" path=%s", canonical_path);
fc051ae6
AK
3151 g_free(canonical_path);
3152 } else {
b6b71cb5 3153 qemu_printf(" type=%s", object_get_typename(obj));
fc051ae6
AK
3154 }
3155 }
b6b71cb5 3156 qemu_printf("}");
fc051ae6
AK
3157}
3158
b6b71cb5 3159static void mtree_print_mr_owner(const MemoryRegion *mr)
fc051ae6
AK
3160{
3161 Object *owner = mr->owner;
3162 Object *parent = memory_region_owner((MemoryRegion *)mr);
3163
3164 if (!owner && !parent) {
b6b71cb5 3165 qemu_printf(" orphan");
fc051ae6
AK
3166 return;
3167 }
3168 if (owner) {
b6b71cb5 3169 mtree_expand_owner("owner", owner);
fc051ae6
AK
3170 }
3171 if (parent && parent != owner) {
b6b71cb5 3172 mtree_expand_owner("parent", parent);
fc051ae6
AK
3173 }
3174}
3175
b6b71cb5 3176static void mtree_print_mr(const MemoryRegion *mr, unsigned int level,
a8170e5e 3177 hwaddr base,
fc051ae6 3178 MemoryRegionListHead *alias_print_queue,
2261d393 3179 bool owner, bool display_disabled)
314e2987 3180{
9479c57a
JK
3181 MemoryRegionList *new_ml, *ml, *next_ml;
3182 MemoryRegionListHead submr_print_queue;
314e2987
BS
3183 const MemoryRegion *submr;
3184 unsigned int i;
b31f8412 3185 hwaddr cur_start, cur_end;
314e2987 3186
f8a9f720 3187 if (!mr) {
314e2987
BS
3188 return;
3189 }
3190
b31f8412
PX
3191 cur_start = base + mr->addr;
3192 cur_end = cur_start + MR_SIZE(mr->size);
3193
3194 /*
3195 * Try to detect overflow of memory region. This should never
3196 * happen normally. When it happens, we dump something to warn the
3197 * user who is observing this.
3198 */
3199 if (cur_start < base || cur_end < cur_start) {
b6b71cb5 3200 qemu_printf("[DETECTED OVERFLOW!] ");
b31f8412
PX
3201 }
3202
314e2987
BS
3203 if (mr->alias) {
3204 MemoryRegionList *ml;
3205 bool found = false;
3206
3207 /* check if the alias is already in the queue */
a16878d2 3208 QTAILQ_FOREACH(ml, alias_print_queue, mrqueue) {
f54bb15f 3209 if (ml->mr == mr->alias) {
314e2987
BS
3210 found = true;
3211 }
3212 }
3213
3214 if (!found) {
3215 ml = g_new(MemoryRegionList, 1);
3216 ml->mr = mr->alias;
a16878d2 3217 QTAILQ_INSERT_TAIL(alias_print_queue, ml, mrqueue);
314e2987 3218 }
2261d393
PMD
3219 if (mr->enabled || display_disabled) {
3220 for (i = 0; i < level; i++) {
3221 qemu_printf(MTREE_INDENT);
3222 }
883f2c59
PMD
3223 qemu_printf(HWADDR_FMT_plx "-" HWADDR_FMT_plx
3224 " (prio %d, %s%s): alias %s @%s " HWADDR_FMT_plx
3225 "-" HWADDR_FMT_plx "%s",
2261d393
PMD
3226 cur_start, cur_end,
3227 mr->priority,
3228 mr->nonvolatile ? "nv-" : "",
3229 memory_region_type((MemoryRegion *)mr),
3230 memory_region_name(mr),
3231 memory_region_name(mr->alias),
3232 mr->alias_offset,
3233 mr->alias_offset + MR_SIZE(mr->size),
3234 mr->enabled ? "" : " [disabled]");
3235 if (owner) {
3236 mtree_print_mr_owner(mr);
3237 }
3238 qemu_printf("\n");
fc051ae6 3239 }
314e2987 3240 } else {
2261d393
PMD
3241 if (mr->enabled || display_disabled) {
3242 for (i = 0; i < level; i++) {
3243 qemu_printf(MTREE_INDENT);
3244 }
883f2c59 3245 qemu_printf(HWADDR_FMT_plx "-" HWADDR_FMT_plx
2261d393
PMD
3246 " (prio %d, %s%s): %s%s",
3247 cur_start, cur_end,
3248 mr->priority,
3249 mr->nonvolatile ? "nv-" : "",
3250 memory_region_type((MemoryRegion *)mr),
3251 memory_region_name(mr),
3252 mr->enabled ? "" : " [disabled]");
3253 if (owner) {
3254 mtree_print_mr_owner(mr);
3255 }
3256 qemu_printf("\n");
fc051ae6 3257 }
314e2987 3258 }
9479c57a
JK
3259
3260 QTAILQ_INIT(&submr_print_queue);
3261
314e2987 3262 QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
9479c57a
JK
3263 new_ml = g_new(MemoryRegionList, 1);
3264 new_ml->mr = submr;
a16878d2 3265 QTAILQ_FOREACH(ml, &submr_print_queue, mrqueue) {
9479c57a
JK
3266 if (new_ml->mr->addr < ml->mr->addr ||
3267 (new_ml->mr->addr == ml->mr->addr &&
3268 new_ml->mr->priority > ml->mr->priority)) {
a16878d2 3269 QTAILQ_INSERT_BEFORE(ml, new_ml, mrqueue);
9479c57a
JK
3270 new_ml = NULL;
3271 break;
3272 }
3273 }
3274 if (new_ml) {
a16878d2 3275 QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, mrqueue);
9479c57a
JK
3276 }
3277 }
3278
a16878d2 3279 QTAILQ_FOREACH(ml, &submr_print_queue, mrqueue) {
b6b71cb5 3280 mtree_print_mr(ml->mr, level + 1, cur_start,
2261d393 3281 alias_print_queue, owner, display_disabled);
9479c57a
JK
3282 }
3283
a16878d2 3284 QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, mrqueue, next_ml) {
9479c57a 3285 g_free(ml);
314e2987
BS
3286 }
3287}
3288
5e8fd947 3289struct FlatViewInfo {
5e8fd947
AK
3290 int counter;
3291 bool dispatch_tree;
fc051ae6 3292 bool owner;
8072aae3 3293 AccelClass *ac;
5e8fd947
AK
3294};
3295
3296static void mtree_print_flatview(gpointer key, gpointer value,
3297 gpointer user_data)
57bb40c9 3298{
5e8fd947
AK
3299 FlatView *view = key;
3300 GArray *fv_address_spaces = value;
3301 struct FlatViewInfo *fvi = user_data;
57bb40c9
PX
3302 FlatRange *range = &view->ranges[0];
3303 MemoryRegion *mr;
3304 int n = view->nr;
5e8fd947
AK
3305 int i;
3306 AddressSpace *as;
3307
b6b71cb5 3308 qemu_printf("FlatView #%d\n", fvi->counter);
5e8fd947
AK
3309 ++fvi->counter;
3310
3311 for (i = 0; i < fv_address_spaces->len; ++i) {
3312 as = g_array_index(fv_address_spaces, AddressSpace*, i);
b6b71cb5
MA
3313 qemu_printf(" AS \"%s\", root: %s",
3314 as->name, memory_region_name(as->root));
5e8fd947 3315 if (as->root->alias) {
b6b71cb5 3316 qemu_printf(", alias %s", memory_region_name(as->root->alias));
5e8fd947 3317 }
b6b71cb5 3318 qemu_printf("\n");
5e8fd947
AK
3319 }
3320
b6b71cb5 3321 qemu_printf(" Root memory region: %s\n",
5e8fd947 3322 view->root ? memory_region_name(view->root) : "(none)");
57bb40c9
PX
3323
3324 if (n <= 0) {
b6b71cb5 3325 qemu_printf(MTREE_INDENT "No rendered FlatView\n\n");
57bb40c9
PX
3326 return;
3327 }
3328
3329 while (n--) {
3330 mr = range->mr;
377a07aa 3331 if (range->offset_in_region) {
883f2c59
PMD
3332 qemu_printf(MTREE_INDENT HWADDR_FMT_plx "-" HWADDR_FMT_plx
3333 " (prio %d, %s%s): %s @" HWADDR_FMT_plx,
b6b71cb5
MA
3334 int128_get64(range->addr.start),
3335 int128_get64(range->addr.start)
3336 + MR_SIZE(range->addr.size),
3337 mr->priority,
3338 range->nonvolatile ? "nv-" : "",
3339 range->readonly ? "rom" : memory_region_type(mr),
3340 memory_region_name(mr),
3341 range->offset_in_region);
377a07aa 3342 } else {
883f2c59 3343 qemu_printf(MTREE_INDENT HWADDR_FMT_plx "-" HWADDR_FMT_plx
b6b71cb5
MA
3344 " (prio %d, %s%s): %s",
3345 int128_get64(range->addr.start),
3346 int128_get64(range->addr.start)
3347 + MR_SIZE(range->addr.size),
3348 mr->priority,
3349 range->nonvolatile ? "nv-" : "",
3350 range->readonly ? "rom" : memory_region_type(mr),
3351 memory_region_name(mr));
377a07aa 3352 }
fc051ae6 3353 if (fvi->owner) {
b6b71cb5 3354 mtree_print_mr_owner(mr);
fc051ae6 3355 }
8072aae3
AK
3356
3357 if (fvi->ac) {
3358 for (i = 0; i < fv_address_spaces->len; ++i) {
3359 as = g_array_index(fv_address_spaces, AddressSpace*, i);
3360 if (fvi->ac->has_memory(current_machine, as,
3361 int128_get64(range->addr.start),
3362 MR_SIZE(range->addr.size) + 1)) {
53b62bec 3363 qemu_printf(" %s", fvi->ac->name);
8072aae3
AK
3364 }
3365 }
3366 }
b6b71cb5 3367 qemu_printf("\n");
57bb40c9
PX
3368 range++;
3369 }
3370
5e8fd947
AK
3371#if !defined(CONFIG_USER_ONLY)
3372 if (fvi->dispatch_tree && view->root) {
b6b71cb5 3373 mtree_print_dispatch(view->dispatch, view->root);
5e8fd947
AK
3374 }
3375#endif
3376
b6b71cb5 3377 qemu_printf("\n");
5e8fd947
AK
3378}
3379
3380static gboolean mtree_info_flatview_free(gpointer key, gpointer value,
3381 gpointer user_data)
3382{
3383 FlatView *view = key;
3384 GArray *fv_address_spaces = value;
3385
3386 g_array_unref(fv_address_spaces);
57bb40c9 3387 flatview_unref(view);
5e8fd947
AK
3388
3389 return true;
57bb40c9
PX
3390}
3391
670c0780 3392static void mtree_info_flatview(bool dispatch_tree, bool owner)
314e2987 3393{
670c0780
PMD
3394 struct FlatViewInfo fvi = {
3395 .counter = 0,
3396 .dispatch_tree = dispatch_tree,
3397 .owner = owner,
3398 };
0d673e36 3399 AddressSpace *as;
670c0780
PMD
3400 FlatView *view;
3401 GArray *fv_address_spaces;
3402 GHashTable *views = g_hash_table_new(g_direct_hash, g_direct_equal);
3403 AccelClass *ac = ACCEL_GET_CLASS(current_accel());
314e2987 3404
670c0780
PMD
3405 if (ac->has_memory) {
3406 fvi.ac = ac;
3407 }
5e8fd947 3408
670c0780
PMD
3409 /* Gather all FVs in one table */
3410 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
3411 view = address_space_get_flatview(as);
5e8fd947 3412
670c0780
PMD
3413 fv_address_spaces = g_hash_table_lookup(views, view);
3414 if (!fv_address_spaces) {
3415 fv_address_spaces = g_array_new(false, false, sizeof(as));
3416 g_hash_table_insert(views, view, fv_address_spaces);
57bb40c9 3417 }
5e8fd947 3418
670c0780
PMD
3419 g_array_append_val(fv_address_spaces, as);
3420 }
5e8fd947 3421
670c0780
PMD
3422 /* Print */
3423 g_hash_table_foreach(views, mtree_print_flatview, &fvi);
5e8fd947 3424
670c0780
PMD
3425 /* Free */
3426 g_hash_table_foreach_remove(views, mtree_info_flatview_free, 0);
3427 g_hash_table_unref(views);
3428}
3429
7bdbf99a
PMD
3430struct AddressSpaceInfo {
3431 MemoryRegionListHead *ml_head;
3432 bool owner;
3433 bool disabled;
3434};
3435
3436/* Returns negative value if a < b; zero if a = b; positive value if a > b. */
3437static gint address_space_compare_name(gconstpointer a, gconstpointer b)
3438{
3439 const AddressSpace *as_a = a;
3440 const AddressSpace *as_b = b;
3441
3442 return g_strcmp0(as_a->name, as_b->name);
3443}
3444
3445static void mtree_print_as_name(gpointer data, gpointer user_data)
3446{
3447 AddressSpace *as = data;
3448
3449 qemu_printf("address-space: %s\n", as->name);
3450}
3451
3452static void mtree_print_as(gpointer key, gpointer value, gpointer user_data)
3453{
3454 MemoryRegion *mr = key;
3455 GSList *as_same_root_mr_list = value;
3456 struct AddressSpaceInfo *asi = user_data;
3457
3458 g_slist_foreach(as_same_root_mr_list, mtree_print_as_name, NULL);
3459 mtree_print_mr(mr, 1, 0, asi->ml_head, asi->owner, asi->disabled);
3460 qemu_printf("\n");
3461}
3462
3463static gboolean mtree_info_as_free(gpointer key, gpointer value,
3464 gpointer user_data)
3465{
3466 GSList *as_same_root_mr_list = value;
3467
3468 g_slist_free(as_same_root_mr_list);
3469
3470 return true;
3471}
3472
670c0780
PMD
3473static void mtree_info_as(bool dispatch_tree, bool owner, bool disabled)
3474{
3475 MemoryRegionListHead ml_head;
3476 MemoryRegionList *ml, *ml2;
3477 AddressSpace *as;
7bdbf99a
PMD
3478 GHashTable *views = g_hash_table_new(g_direct_hash, g_direct_equal);
3479 GSList *as_same_root_mr_list;
3480 struct AddressSpaceInfo asi = {
3481 .ml_head = &ml_head,
3482 .owner = owner,
3483 .disabled = disabled,
3484 };
57bb40c9 3485
314e2987
BS
3486 QTAILQ_INIT(&ml_head);
3487
0d673e36 3488 QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
7bdbf99a
PMD
3489 /* Create hashtable, key=AS root MR, value = list of AS */
3490 as_same_root_mr_list = g_hash_table_lookup(views, as->root);
3491 as_same_root_mr_list = g_slist_insert_sorted(as_same_root_mr_list, as,
3492 address_space_compare_name);
3493 g_hash_table_insert(views, as->root, as_same_root_mr_list);
b9f9be88
BS
3494 }
3495
7bdbf99a
PMD
3496 /* print address spaces */
3497 g_hash_table_foreach(views, mtree_print_as, &asi);
3498 g_hash_table_foreach_remove(views, mtree_info_as_free, 0);
3499 g_hash_table_unref(views);
3500
314e2987 3501 /* print aliased regions */
a16878d2 3502 QTAILQ_FOREACH(ml, &ml_head, mrqueue) {
b6b71cb5 3503 qemu_printf("memory-region: %s\n", memory_region_name(ml->mr));
2261d393 3504 mtree_print_mr(ml->mr, 1, 0, &ml_head, owner, disabled);
b6b71cb5 3505 qemu_printf("\n");
314e2987
BS
3506 }
3507
a16878d2 3508 QTAILQ_FOREACH_SAFE(ml, &ml_head, mrqueue, ml2) {
88365e47 3509 g_free(ml);
314e2987 3510 }
314e2987 3511}
b4fefef9 3512
670c0780
PMD
3513void mtree_info(bool flatview, bool dispatch_tree, bool owner, bool disabled)
3514{
3515 if (flatview) {
3516 mtree_info_flatview(dispatch_tree, owner);
3517 } else {
3518 mtree_info_as(dispatch_tree, owner, disabled);
3519 }
3520}
3521
b08199c6 3522void memory_region_init_ram(MemoryRegion *mr,
d32335e8 3523 Object *owner,
b08199c6
PM
3524 const char *name,
3525 uint64_t size,
3526 Error **errp)
3527{
3528 DeviceState *owner_dev;
3529 Error *err = NULL;
3530
3531 memory_region_init_ram_nomigrate(mr, owner, name, size, &err);
3532 if (err) {
3533 error_propagate(errp, err);
3534 return;
3535 }
3536 /* This will assert if owner is neither NULL nor a DeviceState.
3537 * We only want the owner here for the purposes of defining a
3538 * unique name for migration. TODO: Ideally we should implement
3539 * a naming scheme for Objects which are not DeviceStates, in
3540 * which case we can relax this restriction.
3541 */
3542 owner_dev = DEVICE(owner);
3543 vmstate_register_ram(mr, owner_dev);
3544}
3545
3546void memory_region_init_rom(MemoryRegion *mr,
d32335e8 3547 Object *owner,
b08199c6
PM
3548 const char *name,
3549 uint64_t size,
3550 Error **errp)
3551{
3552 DeviceState *owner_dev;
3553 Error *err = NULL;
3554
3555 memory_region_init_rom_nomigrate(mr, owner, name, size, &err);
3556 if (err) {
3557 error_propagate(errp, err);
3558 return;
3559 }
3560 /* This will assert if owner is neither NULL nor a DeviceState.
3561 * We only want the owner here for the purposes of defining a
3562 * unique name for migration. TODO: Ideally we should implement
3563 * a naming scheme for Objects which are not DeviceStates, in
3564 * which case we can relax this restriction.
3565 */
3566 owner_dev = DEVICE(owner);
3567 vmstate_register_ram(mr, owner_dev);
3568}
3569
3570void memory_region_init_rom_device(MemoryRegion *mr,
d32335e8 3571 Object *owner,
b08199c6
PM
3572 const MemoryRegionOps *ops,
3573 void *opaque,
3574 const char *name,
3575 uint64_t size,
3576 Error **errp)
3577{
3578 DeviceState *owner_dev;
3579 Error *err = NULL;
3580
3581 memory_region_init_rom_device_nomigrate(mr, owner, ops, opaque,
3582 name, size, &err);
3583 if (err) {
3584 error_propagate(errp, err);
3585 return;
3586 }
3587 /* This will assert if owner is neither NULL nor a DeviceState.
3588 * We only want the owner here for the purposes of defining a
3589 * unique name for migration. TODO: Ideally we should implement
3590 * a naming scheme for Objects which are not DeviceStates, in
3591 * which case we can relax this restriction.
3592 */
3593 owner_dev = DEVICE(owner);
3594 vmstate_register_ram(mr, owner_dev);
3595}
3596
e7d3222e
AB
3597/*
3598 * Support softmmu builds with CONFIG_FUZZ using a weak symbol and a stub for
3599 * the fuzz_dma_read_cb callback
3600 */
3601#ifdef CONFIG_FUZZ
3602void __attribute__((weak)) fuzz_dma_read_cb(size_t addr,
3603 size_t len,
fc1c8344 3604 MemoryRegion *mr)
e7d3222e
AB
3605{
3606}
3607#endif
3608
b4fefef9
PC
3609static const TypeInfo memory_region_info = {
3610 .parent = TYPE_OBJECT,
3611 .name = TYPE_MEMORY_REGION,
1b53ecd9 3612 .class_size = sizeof(MemoryRegionClass),
b4fefef9
PC
3613 .instance_size = sizeof(MemoryRegion),
3614 .instance_init = memory_region_initfn,
3615 .instance_finalize = memory_region_finalize,
3616};
3617
3df9d748
AK
3618static const TypeInfo iommu_memory_region_info = {
3619 .parent = TYPE_MEMORY_REGION,
3620 .name = TYPE_IOMMU_MEMORY_REGION,
1221a474 3621 .class_size = sizeof(IOMMUMemoryRegionClass),
3df9d748
AK
3622 .instance_size = sizeof(IOMMUMemoryRegion),
3623 .instance_init = iommu_memory_region_initfn,
1221a474 3624 .abstract = true,
3df9d748
AK
3625};
3626
8947d7fc
DH
3627static const TypeInfo ram_discard_manager_info = {
3628 .parent = TYPE_INTERFACE,
3629 .name = TYPE_RAM_DISCARD_MANAGER,
3630 .class_size = sizeof(RamDiscardManagerClass),
3631};
3632
b4fefef9
PC
3633static void memory_register_types(void)
3634{
3635 type_register_static(&memory_region_info);
3df9d748 3636 type_register_static(&iommu_memory_region_info);
8947d7fc 3637 type_register_static(&ram_discard_manager_info);
b4fefef9
PC
3638}
3639
3640type_init(memory_register_types)