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Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * azt3328.c - driver for Aztech AZF3328 based soundcards (e.g. PCI168). | |
d91c64c8 | 3 | * Copyright (C) 2002, 2005 by Andreas Mohr <andi AT lisas.de> |
1da177e4 LT |
4 | * |
5 | * Framework borrowed from Bart Hartgers's als4000.c. | |
6 | * Driver developed on PCI168 AP(W) version (PCI rev. 10, subsystem ID 1801), | |
7 | * found in a Fujitsu-Siemens PC ("Cordant", aluminum case). | |
8 | * Other versions are: | |
9 | * PCI168 A(W), sub ID 1800 | |
10 | * PCI168 A/AP, sub ID 8000 | |
11 | * Please give me feedback in case you try my driver with one of these!! | |
12 | * | |
13 | * GPL LICENSE | |
14 | * This program is free software; you can redistribute it and/or modify | |
15 | * it under the terms of the GNU General Public License as published by | |
16 | * the Free Software Foundation; either version 2 of the License, or | |
17 | * (at your option) any later version. | |
18 | * | |
19 | * This program is distributed in the hope that it will be useful, | |
20 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
21 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
22 | * GNU General Public License for more details. | |
23 | ||
24 | * You should have received a copy of the GNU General Public License | |
25 | * along with this program; if not, write to the Free Software | |
26 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
27 | * | |
28 | * NOTES | |
29 | * Since Aztech does not provide any chipset documentation, | |
30 | * even on repeated request to various addresses, | |
31 | * and the answer that was finally given was negative | |
32 | * (and I was stupid enough to manage to get hold of a PCI168 soundcard | |
33 | * in the first place >:-P}), | |
34 | * I was forced to base this driver on reverse engineering | |
35 | * (3 weeks' worth of evenings filled with driver work). | |
36 | * (and no, I did NOT go the easy way: to pick up a PCI128 for 9 Euros) | |
37 | * | |
38 | * The AZF3328 chip (note: AZF3328, *not* AZT3328, that's just the driver name | |
39 | * for compatibility reasons) has the following features: | |
40 | * | |
41 | * - builtin AC97 conformant codec (SNR over 80dB) | |
42 | * (really AC97 compliant?? I really doubt it when looking | |
43 | * at the mixer register layout) | |
44 | * - builtin genuine OPL3 | |
45 | * - full duplex 16bit playback/record at independent sampling rate | |
46 | * - MPU401 (+ legacy address support) FIXME: how to enable legacy addr?? | |
47 | * - game port (legacy address support) | |
48 | * - built-in General DirectX timer having a 20 bits counter | |
d91c64c8 | 49 | * with 1us resolution (see below!) |
1da177e4 LT |
50 | * - I2S serial port for external DAC |
51 | * - supports 33MHz PCI spec 2.1, PCI power management 1.0, compliant with ACPI | |
52 | * - supports hardware volume control | |
53 | * - single chip low cost solution (128 pin QFP) | |
54 | * - supports programmable Sub-vendor and Sub-system ID | |
55 | * required for Microsoft's logo compliance (FIXME: where?) | |
56 | * - PCI168 AP(W) card: power amplifier with 4 Watts/channel at 4 Ohms | |
57 | * | |
d91c64c8 AM |
58 | * Note that this driver now is actually *better* than the Windows driver, |
59 | * since it additionally supports the card's 1MHz DirectX timer - just try | |
60 | * the following snd-seq module parameters etc.: | |
61 | * - options snd-seq seq_default_timer_class=2 seq_default_timer_sclass=0 | |
62 | * seq_default_timer_card=0 seq_client_load=1 seq_default_timer_device=0 | |
63 | * seq_default_timer_subdevice=0 seq_default_timer_resolution=1000000 | |
64 | * - "timidity -iAv -B2,8 -Os -EFreverb=0" | |
65 | * - "pmidi -p 128:0 jazz.mid" | |
66 | * | |
1da177e4 LT |
67 | * Certain PCI versions of this card are susceptible to DMA traffic underruns |
68 | * in some systems (resulting in sound crackling/clicking/popping), | |
69 | * probably because they don't have a DMA FIFO buffer or so. | |
70 | * Overview (PCI ID/PCI subID/PCI rev.): | |
71 | * - no DMA crackling on SiS735: 0x50DC/0x1801/16 | |
72 | * - unknown performance: 0x50DC/0x1801/10 | |
d91c64c8 AM |
73 | * (well, it's not bad on an Athlon 1800 with now very optimized IRQ handler) |
74 | * | |
1da177e4 LT |
75 | * Crackling happens with VIA chipsets or, in my case, an SiS735, which is |
76 | * supposed to be very fast and supposed to get rid of crackling much | |
77 | * better than a VIA, yet ironically I still get crackling, like many other | |
78 | * people with the same chipset. | |
79 | * Possible remedies: | |
80 | * - plug card into a different PCI slot, preferrably one that isn't shared | |
81 | * too much (this helps a lot, but not completely!) | |
82 | * - get rid of PCI VGA card, use AGP instead | |
83 | * - upgrade or downgrade BIOS | |
84 | * - fiddle with PCI latency settings (setpci -v -s BUSID latency_timer=XX) | |
85 | * Not too helpful. | |
86 | * - Disable ACPI/power management/"Auto Detect RAM/PCI Clk" in BIOS | |
87 | * | |
88 | * BUGS | |
d91c64c8 | 89 | * - full-duplex might *still* be problematic, not fully tested recently |
1da177e4 LT |
90 | * |
91 | * TODO | |
92 | * - test MPU401 MIDI playback etc. | |
d91c64c8 | 93 | * - power management. See e.g. intel8x0 or cs4281. |
1da177e4 | 94 | * This would be nice since the chip runs a bit hot, and it's *required* |
d91c64c8 | 95 | * anyway for proper ACPI power management. |
1da177e4 LT |
96 | * - figure out what all unknown port bits are responsible for |
97 | */ | |
98 | ||
99 | #include <sound/driver.h> | |
100 | #include <asm/io.h> | |
101 | #include <linux/init.h> | |
102 | #include <linux/pci.h> | |
103 | #include <linux/delay.h> | |
104 | #include <linux/slab.h> | |
105 | #include <linux/gameport.h> | |
106 | #include <linux/moduleparam.h> | |
107 | #include <sound/core.h> | |
108 | #include <sound/control.h> | |
109 | #include <sound/pcm.h> | |
110 | #include <sound/rawmidi.h> | |
111 | #include <sound/mpu401.h> | |
112 | #include <sound/opl3.h> | |
113 | #include <sound/initval.h> | |
114 | #include "azt3328.h" | |
115 | ||
d91c64c8 | 116 | MODULE_AUTHOR("Andreas Mohr <andi AT lisas.de>"); |
1da177e4 LT |
117 | MODULE_DESCRIPTION("Aztech AZF3328 (PCI168)"); |
118 | MODULE_LICENSE("GPL"); | |
119 | MODULE_SUPPORTED_DEVICE("{{Aztech,AZF3328}}"); | |
120 | ||
121 | #if defined(CONFIG_GAMEPORT) || (defined(MODULE) && defined(CONFIG_GAMEPORT_MODULE)) | |
122 | #define SUPPORT_JOYSTICK 1 | |
123 | #endif | |
124 | ||
125 | #define DEBUG_MISC 0 | |
126 | #define DEBUG_CALLS 0 | |
127 | #define DEBUG_MIXER 0 | |
128 | #define DEBUG_PLAY_REC 0 | |
129 | #define DEBUG_IO 0 | |
d91c64c8 | 130 | #define DEBUG_TIMER 0 |
1da177e4 LT |
131 | #define MIXER_TESTING 0 |
132 | ||
133 | #if DEBUG_MISC | |
134 | #define snd_azf3328_dbgmisc(format, args...) printk(KERN_ERR format, ##args) | |
135 | #else | |
136 | #define snd_azf3328_dbgmisc(format, args...) | |
137 | #endif | |
138 | ||
139 | #if DEBUG_CALLS | |
140 | #define snd_azf3328_dbgcalls(format, args...) printk(format, ##args) | |
d91c64c8 AM |
141 | #define snd_azf3328_dbgcallenter() printk(KERN_ERR "--> %s\n", __FUNCTION__) |
142 | #define snd_azf3328_dbgcallleave() printk(KERN_ERR "<-- %s\n", __FUNCTION__) | |
1da177e4 LT |
143 | #else |
144 | #define snd_azf3328_dbgcalls(format, args...) | |
145 | #define snd_azf3328_dbgcallenter() | |
146 | #define snd_azf3328_dbgcallleave() | |
147 | #endif | |
148 | ||
149 | #if DEBUG_MIXER | |
150 | #define snd_azf3328_dbgmixer(format, args...) printk(format, ##args) | |
151 | #else | |
152 | #define snd_azf3328_dbgmixer(format, args...) | |
153 | #endif | |
154 | ||
155 | #if DEBUG_PLAY_REC | |
156 | #define snd_azf3328_dbgplay(format, args...) printk(KERN_ERR format, ##args) | |
157 | #else | |
158 | #define snd_azf3328_dbgplay(format, args...) | |
159 | #endif | |
160 | ||
d91c64c8 AM |
161 | #if DEBUG_MISC |
162 | #define snd_azf3328_dbgtimer(format, args...) printk(KERN_ERR format, ##args) | |
1da177e4 | 163 | #else |
d91c64c8 AM |
164 | #define snd_azf3328_dbgtimer(format, args...) |
165 | #endif | |
166 | ||
1da177e4 LT |
167 | static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */ |
168 | module_param_array(index, int, NULL, 0444); | |
169 | MODULE_PARM_DESC(index, "Index value for AZF3328 soundcard."); | |
170 | ||
171 | static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */ | |
172 | module_param_array(id, charp, NULL, 0444); | |
173 | MODULE_PARM_DESC(id, "ID string for AZF3328 soundcard."); | |
174 | ||
175 | static int enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */ | |
176 | module_param_array(enable, bool, NULL, 0444); | |
177 | MODULE_PARM_DESC(enable, "Enable AZF3328 soundcard."); | |
178 | ||
179 | #ifdef SUPPORT_JOYSTICK | |
180 | static int joystick[SNDRV_CARDS]; | |
181 | module_param_array(joystick, bool, NULL, 0444); | |
182 | MODULE_PARM_DESC(joystick, "Enable joystick for AZF3328 soundcard."); | |
183 | #endif | |
184 | ||
d91c64c8 AM |
185 | static int seqtimer_scaling = 128; |
186 | module_param(seqtimer_scaling, int, 0444); | |
187 | MODULE_PARM_DESC(seqtimer_scaling, "Set 1024000Hz sequencer timer scale factor (lockup danger!). Default 128."); | |
1da177e4 | 188 | |
95de7766 | 189 | struct snd_azf3328 { |
d91c64c8 | 190 | /* often-used fields towards beginning, then grouped */ |
1da177e4 LT |
191 | unsigned long codec_port; |
192 | unsigned long io2_port; | |
193 | unsigned long mpu_port; | |
194 | unsigned long synth_port; | |
195 | unsigned long mixer_port; | |
196 | ||
d91c64c8 | 197 | spinlock_t reg_lock; |
1da177e4 | 198 | |
95de7766 | 199 | struct snd_timer *timer; |
d91c64c8 | 200 | |
95de7766 TI |
201 | struct snd_pcm *pcm; |
202 | struct snd_pcm_substream *playback_substream; | |
203 | struct snd_pcm_substream *capture_substream; | |
1da177e4 LT |
204 | unsigned int is_playing; |
205 | unsigned int is_recording; | |
206 | ||
95de7766 TI |
207 | struct snd_card *card; |
208 | struct snd_rawmidi *rmidi; | |
d91c64c8 AM |
209 | |
210 | #ifdef SUPPORT_JOYSTICK | |
211 | struct gameport *gameport; | |
212 | #endif | |
1da177e4 | 213 | |
d91c64c8 AM |
214 | struct pci_dev *pci; |
215 | int irq; | |
95de7766 | 216 | }; |
d91c64c8 AM |
217 | |
218 | static const struct pci_device_id snd_azf3328_ids[] = { | |
1da177e4 LT |
219 | { 0x122D, 0x50DC, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* PCI168/3328 */ |
220 | { 0x122D, 0x80DA, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, /* 3328 */ | |
221 | { 0, } | |
222 | }; | |
223 | ||
224 | MODULE_DEVICE_TABLE(pci, snd_azf3328_ids); | |
225 | ||
d91c64c8 | 226 | static inline void |
95de7766 | 227 | snd_azf3328_codec_outb(const struct snd_azf3328 *chip, int reg, u8 value) |
d91c64c8 AM |
228 | { |
229 | outb(value, chip->codec_port + reg); | |
230 | } | |
231 | ||
232 | static inline u8 | |
95de7766 | 233 | snd_azf3328_codec_inb(const struct snd_azf3328 *chip, int reg) |
d91c64c8 AM |
234 | { |
235 | return inb(chip->codec_port + reg); | |
236 | } | |
237 | ||
238 | static inline void | |
95de7766 | 239 | snd_azf3328_codec_outw(const struct snd_azf3328 *chip, int reg, u16 value) |
d91c64c8 AM |
240 | { |
241 | outw(value, chip->codec_port + reg); | |
242 | } | |
243 | ||
244 | static inline u16 | |
95de7766 | 245 | snd_azf3328_codec_inw(const struct snd_azf3328 *chip, int reg) |
d91c64c8 AM |
246 | { |
247 | return inw(chip->codec_port + reg); | |
248 | } | |
249 | ||
250 | static inline void | |
95de7766 | 251 | snd_azf3328_codec_outl(const struct snd_azf3328 *chip, int reg, u32 value) |
d91c64c8 AM |
252 | { |
253 | outl(value, chip->codec_port + reg); | |
254 | } | |
255 | ||
256 | static inline void | |
95de7766 | 257 | snd_azf3328_io2_outb(const struct snd_azf3328 *chip, int reg, u8 value) |
1da177e4 LT |
258 | { |
259 | outb(value, chip->io2_port + reg); | |
260 | } | |
261 | ||
d91c64c8 | 262 | static inline u8 |
95de7766 | 263 | snd_azf3328_io2_inb(const struct snd_azf3328 *chip, int reg) |
1da177e4 LT |
264 | { |
265 | return inb(chip->io2_port + reg); | |
266 | } | |
267 | ||
d91c64c8 | 268 | static inline void |
95de7766 | 269 | snd_azf3328_mixer_outw(const struct snd_azf3328 *chip, int reg, u16 value) |
1da177e4 | 270 | { |
d91c64c8 AM |
271 | outw(value, chip->mixer_port + reg); |
272 | } | |
273 | ||
274 | static inline u16 | |
95de7766 | 275 | snd_azf3328_mixer_inw(const struct snd_azf3328 *chip, int reg) |
d91c64c8 AM |
276 | { |
277 | return inw(chip->mixer_port + reg); | |
1da177e4 LT |
278 | } |
279 | ||
d91c64c8 | 280 | static void |
95de7766 | 281 | snd_azf3328_mixer_set_mute(const struct snd_azf3328 *chip, int reg, int do_mute) |
1da177e4 | 282 | { |
d91c64c8 | 283 | unsigned long portbase = chip->mixer_port + reg + 1; |
1da177e4 LT |
284 | unsigned char oldval; |
285 | ||
286 | /* the mute bit is on the *second* (i.e. right) register of a | |
287 | * left/right channel setting */ | |
d91c64c8 | 288 | oldval = inb(portbase); |
1da177e4 LT |
289 | if (do_mute) |
290 | oldval |= 0x80; | |
291 | else | |
292 | oldval &= ~0x80; | |
d91c64c8 | 293 | outb(oldval, portbase); |
1da177e4 LT |
294 | } |
295 | ||
d91c64c8 | 296 | static void |
95de7766 | 297 | snd_azf3328_mixer_write_volume_gradually(const struct snd_azf3328 *chip, int reg, unsigned char dst_vol_left, unsigned char dst_vol_right, int chan_sel, int delay) |
1da177e4 | 298 | { |
d91c64c8 | 299 | unsigned long portbase = chip->mixer_port + reg; |
1da177e4 LT |
300 | unsigned char curr_vol_left = 0, curr_vol_right = 0; |
301 | int left_done = 0, right_done = 0; | |
302 | ||
303 | snd_azf3328_dbgcallenter(); | |
304 | if (chan_sel & SET_CHAN_LEFT) | |
d91c64c8 | 305 | curr_vol_left = inb(portbase + 1); |
1da177e4 LT |
306 | else |
307 | left_done = 1; | |
308 | if (chan_sel & SET_CHAN_RIGHT) | |
d91c64c8 | 309 | curr_vol_right = inb(portbase + 0); |
1da177e4 LT |
310 | else |
311 | right_done = 1; | |
312 | ||
313 | /* take care of muting flag (0x80) contained in left channel */ | |
314 | if (curr_vol_left & 0x80) | |
315 | dst_vol_left |= 0x80; | |
316 | else | |
317 | dst_vol_left &= ~0x80; | |
318 | ||
319 | do | |
320 | { | |
321 | if (!left_done) | |
322 | { | |
323 | if (curr_vol_left > dst_vol_left) | |
324 | curr_vol_left--; | |
325 | else | |
326 | if (curr_vol_left < dst_vol_left) | |
327 | curr_vol_left++; | |
328 | else | |
329 | left_done = 1; | |
d91c64c8 | 330 | outb(curr_vol_left, portbase + 1); |
1da177e4 LT |
331 | } |
332 | if (!right_done) | |
333 | { | |
334 | if (curr_vol_right > dst_vol_right) | |
335 | curr_vol_right--; | |
336 | else | |
337 | if (curr_vol_right < dst_vol_right) | |
338 | curr_vol_right++; | |
339 | else | |
340 | right_done = 1; | |
341 | /* during volume change, the right channel is crackling | |
342 | * somewhat more than the left channel, unfortunately. | |
343 | * This seems to be a hardware issue. */ | |
d91c64c8 | 344 | outb(curr_vol_right, portbase + 0); |
1da177e4 LT |
345 | } |
346 | if (delay) | |
347 | mdelay(delay); | |
348 | } | |
349 | while ((!left_done) || (!right_done)); | |
350 | snd_azf3328_dbgcallleave(); | |
351 | } | |
352 | ||
353 | /* | |
354 | * general mixer element | |
355 | */ | |
95de7766 | 356 | struct azf3328_mixer_reg { |
1da177e4 LT |
357 | unsigned int reg; |
358 | unsigned int lchan_shift, rchan_shift; | |
359 | unsigned int mask; | |
360 | unsigned int invert: 1; | |
361 | unsigned int stereo: 1; | |
362 | unsigned int enum_c: 4; | |
95de7766 | 363 | }; |
1da177e4 LT |
364 | |
365 | #define COMPOSE_MIXER_REG(reg,lchan_shift,rchan_shift,mask,invert,stereo,enum_c) \ | |
d91c64c8 AM |
366 | ((reg) | (lchan_shift << 8) | (rchan_shift << 12) | \ |
367 | (mask << 16) | \ | |
368 | (invert << 24) | \ | |
369 | (stereo << 25) | \ | |
370 | (enum_c << 26)) | |
1da177e4 | 371 | |
95de7766 | 372 | static void snd_azf3328_mixer_reg_decode(struct azf3328_mixer_reg *r, unsigned long val) |
1da177e4 LT |
373 | { |
374 | r->reg = val & 0xff; | |
375 | r->lchan_shift = (val >> 8) & 0x0f; | |
376 | r->rchan_shift = (val >> 12) & 0x0f; | |
377 | r->mask = (val >> 16) & 0xff; | |
378 | r->invert = (val >> 24) & 1; | |
379 | r->stereo = (val >> 25) & 1; | |
380 | r->enum_c = (val >> 26) & 0x0f; | |
381 | } | |
382 | ||
383 | /* | |
384 | * mixer switches/volumes | |
385 | */ | |
386 | ||
387 | #define AZF3328_MIXER_SWITCH(xname, reg, shift, invert) \ | |
388 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ | |
389 | .info = snd_azf3328_info_mixer, \ | |
390 | .get = snd_azf3328_get_mixer, .put = snd_azf3328_put_mixer, \ | |
391 | .private_value = COMPOSE_MIXER_REG(reg, shift, 0, 0x1, invert, 0, 0), \ | |
392 | } | |
393 | ||
394 | #define AZF3328_MIXER_VOL_STEREO(xname, reg, mask, invert) \ | |
395 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ | |
396 | .info = snd_azf3328_info_mixer, \ | |
397 | .get = snd_azf3328_get_mixer, .put = snd_azf3328_put_mixer, \ | |
398 | .private_value = COMPOSE_MIXER_REG(reg, 8, 0, mask, invert, 1, 0), \ | |
399 | } | |
400 | ||
401 | #define AZF3328_MIXER_VOL_MONO(xname, reg, mask, is_right_chan) \ | |
402 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ | |
403 | .info = snd_azf3328_info_mixer, \ | |
404 | .get = snd_azf3328_get_mixer, .put = snd_azf3328_put_mixer, \ | |
405 | .private_value = COMPOSE_MIXER_REG(reg, is_right_chan ? 0 : 8, 0, mask, 1, 0, 0), \ | |
406 | } | |
407 | ||
408 | #define AZF3328_MIXER_VOL_SPECIAL(xname, reg, mask, shift, invert) \ | |
409 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ | |
410 | .info = snd_azf3328_info_mixer, \ | |
411 | .get = snd_azf3328_get_mixer, .put = snd_azf3328_put_mixer, \ | |
412 | .private_value = COMPOSE_MIXER_REG(reg, shift, 0, mask, invert, 0, 0), \ | |
413 | } | |
414 | ||
415 | #define AZF3328_MIXER_ENUM(xname, reg, enum_c, shift) \ | |
416 | { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, \ | |
417 | .info = snd_azf3328_info_mixer_enum, \ | |
418 | .get = snd_azf3328_get_mixer_enum, .put = snd_azf3328_put_mixer_enum, \ | |
419 | .private_value = COMPOSE_MIXER_REG(reg, shift, 0, 0, 0, 0, enum_c), \ | |
420 | } | |
421 | ||
d91c64c8 | 422 | static int |
95de7766 TI |
423 | snd_azf3328_info_mixer(struct snd_kcontrol *kcontrol, |
424 | struct snd_ctl_elem_info *uinfo) | |
1da177e4 | 425 | { |
95de7766 | 426 | struct azf3328_mixer_reg reg; |
1da177e4 LT |
427 | |
428 | snd_azf3328_dbgcallenter(); | |
429 | snd_azf3328_mixer_reg_decode(®, kcontrol->private_value); | |
d91c64c8 AM |
430 | uinfo->type = reg.mask == 1 ? |
431 | SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER; | |
1da177e4 LT |
432 | uinfo->count = reg.stereo + 1; |
433 | uinfo->value.integer.min = 0; | |
434 | uinfo->value.integer.max = reg.mask; | |
435 | snd_azf3328_dbgcallleave(); | |
436 | return 0; | |
437 | } | |
438 | ||
d91c64c8 | 439 | static int |
95de7766 TI |
440 | snd_azf3328_get_mixer(struct snd_kcontrol *kcontrol, |
441 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 442 | { |
95de7766 TI |
443 | struct snd_azf3328 *chip = snd_kcontrol_chip(kcontrol); |
444 | struct azf3328_mixer_reg reg; | |
1da177e4 LT |
445 | unsigned int oreg, val; |
446 | ||
447 | snd_azf3328_dbgcallenter(); | |
448 | snd_azf3328_mixer_reg_decode(®, kcontrol->private_value); | |
449 | ||
d91c64c8 | 450 | oreg = snd_azf3328_mixer_inw(chip, reg.reg); |
1da177e4 LT |
451 | val = (oreg >> reg.lchan_shift) & reg.mask; |
452 | if (reg.invert) | |
453 | val = reg.mask - val; | |
454 | ucontrol->value.integer.value[0] = val; | |
455 | if (reg.stereo) { | |
456 | val = (oreg >> reg.rchan_shift) & reg.mask; | |
457 | if (reg.invert) | |
458 | val = reg.mask - val; | |
459 | ucontrol->value.integer.value[1] = val; | |
460 | } | |
d91c64c8 AM |
461 | snd_azf3328_dbgmixer("get: %02x is %04x -> vol %02lx|%02lx " |
462 | "(shift %02d|%02d, mask %02x, inv. %d, stereo %d)\n", | |
463 | reg.reg, oreg, | |
464 | ucontrol->value.integer.value[0], ucontrol->value.integer.value[1], | |
465 | reg.lchan_shift, reg.rchan_shift, reg.mask, reg.invert, reg.stereo); | |
1da177e4 LT |
466 | snd_azf3328_dbgcallleave(); |
467 | return 0; | |
468 | } | |
469 | ||
d91c64c8 | 470 | static int |
95de7766 TI |
471 | snd_azf3328_put_mixer(struct snd_kcontrol *kcontrol, |
472 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 473 | { |
95de7766 TI |
474 | struct snd_azf3328 *chip = snd_kcontrol_chip(kcontrol); |
475 | struct azf3328_mixer_reg reg; | |
1da177e4 LT |
476 | unsigned int oreg, nreg, val; |
477 | ||
478 | snd_azf3328_dbgcallenter(); | |
479 | snd_azf3328_mixer_reg_decode(®, kcontrol->private_value); | |
d91c64c8 | 480 | oreg = snd_azf3328_mixer_inw(chip, reg.reg); |
1da177e4 LT |
481 | val = ucontrol->value.integer.value[0] & reg.mask; |
482 | if (reg.invert) | |
483 | val = reg.mask - val; | |
484 | nreg = oreg & ~(reg.mask << reg.lchan_shift); | |
485 | nreg |= (val << reg.lchan_shift); | |
486 | if (reg.stereo) { | |
487 | val = ucontrol->value.integer.value[1] & reg.mask; | |
488 | if (reg.invert) | |
489 | val = reg.mask - val; | |
490 | nreg &= ~(reg.mask << reg.rchan_shift); | |
491 | nreg |= (val << reg.rchan_shift); | |
492 | } | |
493 | if (reg.mask >= 0x07) /* it's a volume control, so better take care */ | |
d91c64c8 AM |
494 | snd_azf3328_mixer_write_volume_gradually( |
495 | chip, reg.reg, nreg >> 8, nreg & 0xff, | |
496 | /* just set both channels, doesn't matter */ | |
497 | SET_CHAN_LEFT|SET_CHAN_RIGHT, | |
498 | 0); | |
1da177e4 | 499 | else |
d91c64c8 | 500 | snd_azf3328_mixer_outw(chip, reg.reg, nreg); |
1da177e4 | 501 | |
d91c64c8 AM |
502 | snd_azf3328_dbgmixer("put: %02x to %02lx|%02lx, " |
503 | "oreg %04x; shift %02d|%02d -> nreg %04x; after: %04x\n", | |
504 | reg.reg, ucontrol->value.integer.value[0], ucontrol->value.integer.value[1], | |
505 | oreg, reg.lchan_shift, reg.rchan_shift, | |
506 | nreg, snd_azf3328_mixer_inw(chip, reg.reg)); | |
1da177e4 LT |
507 | snd_azf3328_dbgcallleave(); |
508 | return (nreg != oreg); | |
509 | } | |
510 | ||
d91c64c8 | 511 | static int |
95de7766 TI |
512 | snd_azf3328_info_mixer_enum(struct snd_kcontrol *kcontrol, |
513 | struct snd_ctl_elem_info *uinfo) | |
1da177e4 | 514 | { |
d91c64c8 AM |
515 | static const char * const texts1[] = { |
516 | "ModemOut1", "ModemOut2" | |
517 | }; | |
518 | static const char * const texts2[] = { | |
519 | "MonoSelectSource1", "MonoSelectSource2" | |
520 | }; | |
521 | static const char * const texts3[] = { | |
522 | "Mic", "CD", "Video", "Aux", | |
523 | "Line", "Mix", "Mix Mono", "Phone" | |
1da177e4 | 524 | }; |
95de7766 | 525 | struct azf3328_mixer_reg reg; |
1da177e4 LT |
526 | |
527 | snd_azf3328_mixer_reg_decode(®, kcontrol->private_value); | |
528 | uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; | |
529 | uinfo->count = (reg.reg == IDX_MIXER_REC_SELECT) ? 2 : 1; | |
530 | uinfo->value.enumerated.items = reg.enum_c; | |
531 | if (uinfo->value.enumerated.item > reg.enum_c - 1U) | |
532 | uinfo->value.enumerated.item = reg.enum_c - 1U; | |
533 | if (reg.reg == IDX_MIXER_ADVCTL2) | |
534 | { | |
535 | if (reg.lchan_shift == 8) /* modem out sel */ | |
536 | strcpy(uinfo->value.enumerated.name, texts1[uinfo->value.enumerated.item]); | |
537 | else /* mono sel source */ | |
538 | strcpy(uinfo->value.enumerated.name, texts2[uinfo->value.enumerated.item]); | |
539 | } | |
540 | else | |
541 | strcpy(uinfo->value.enumerated.name, texts3[uinfo->value.enumerated.item] | |
542 | ); | |
543 | return 0; | |
544 | } | |
545 | ||
d91c64c8 | 546 | static int |
95de7766 TI |
547 | snd_azf3328_get_mixer_enum(struct snd_kcontrol *kcontrol, |
548 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 549 | { |
95de7766 TI |
550 | struct snd_azf3328 *chip = snd_kcontrol_chip(kcontrol); |
551 | struct azf3328_mixer_reg reg; | |
1da177e4 LT |
552 | unsigned short val; |
553 | ||
554 | snd_azf3328_mixer_reg_decode(®, kcontrol->private_value); | |
d91c64c8 | 555 | val = snd_azf3328_mixer_inw(chip, reg.reg); |
1da177e4 LT |
556 | if (reg.reg == IDX_MIXER_REC_SELECT) |
557 | { | |
558 | ucontrol->value.enumerated.item[0] = (val >> 8) & (reg.enum_c - 1); | |
559 | ucontrol->value.enumerated.item[1] = (val >> 0) & (reg.enum_c - 1); | |
560 | } | |
561 | else | |
562 | ucontrol->value.enumerated.item[0] = (val >> reg.lchan_shift) & (reg.enum_c - 1); | |
d91c64c8 AM |
563 | |
564 | snd_azf3328_dbgmixer("get_enum: %02x is %04x -> %d|%d (shift %02d, enum_c %d)\n", | |
565 | reg.reg, val, ucontrol->value.enumerated.item[0], ucontrol->value.enumerated.item[1], | |
566 | reg.lchan_shift, reg.enum_c); | |
1da177e4 LT |
567 | return 0; |
568 | } | |
569 | ||
d91c64c8 | 570 | static int |
95de7766 TI |
571 | snd_azf3328_put_mixer_enum(struct snd_kcontrol *kcontrol, |
572 | struct snd_ctl_elem_value *ucontrol) | |
1da177e4 | 573 | { |
95de7766 TI |
574 | struct snd_azf3328 *chip = snd_kcontrol_chip(kcontrol); |
575 | struct azf3328_mixer_reg reg; | |
1da177e4 LT |
576 | unsigned int oreg, nreg, val; |
577 | ||
578 | snd_azf3328_mixer_reg_decode(®, kcontrol->private_value); | |
d91c64c8 | 579 | oreg = snd_azf3328_mixer_inw(chip, reg.reg); |
1da177e4 LT |
580 | val = oreg; |
581 | if (reg.reg == IDX_MIXER_REC_SELECT) | |
582 | { | |
583 | if (ucontrol->value.enumerated.item[0] > reg.enum_c - 1U || | |
584 | ucontrol->value.enumerated.item[1] > reg.enum_c - 1U) | |
585 | return -EINVAL; | |
586 | val = (ucontrol->value.enumerated.item[0] << 8) | | |
587 | (ucontrol->value.enumerated.item[1] << 0); | |
588 | } | |
589 | else | |
590 | { | |
591 | if (ucontrol->value.enumerated.item[0] > reg.enum_c - 1U) | |
592 | return -EINVAL; | |
593 | val &= ~((reg.enum_c - 1) << reg.lchan_shift); | |
594 | val |= (ucontrol->value.enumerated.item[0] << reg.lchan_shift); | |
595 | } | |
d91c64c8 | 596 | snd_azf3328_mixer_outw(chip, reg.reg, val); |
1da177e4 LT |
597 | nreg = val; |
598 | ||
599 | snd_azf3328_dbgmixer("put_enum: %02x to %04x, oreg %04x\n", reg.reg, val, oreg); | |
600 | return (nreg != oreg); | |
601 | } | |
602 | ||
95de7766 | 603 | static const struct snd_kcontrol_new snd_azf3328_mixer_controls[] __devinitdata = { |
1da177e4 LT |
604 | AZF3328_MIXER_SWITCH("Master Playback Switch", IDX_MIXER_PLAY_MASTER, 15, 1), |
605 | AZF3328_MIXER_VOL_STEREO("Master Playback Volume", IDX_MIXER_PLAY_MASTER, 0x1f, 1), | |
606 | AZF3328_MIXER_SWITCH("Wave Playback Switch", IDX_MIXER_WAVEOUT, 15, 1), | |
607 | AZF3328_MIXER_VOL_STEREO("Wave Playback Volume", IDX_MIXER_WAVEOUT, 0x1f, 1), | |
d91c64c8 | 608 | AZF3328_MIXER_SWITCH("Wave 3D Bypass Playback Switch", IDX_MIXER_ADVCTL2, 7, 1), |
1da177e4 LT |
609 | AZF3328_MIXER_SWITCH("FM Playback Switch", IDX_MIXER_FMSYNTH, 15, 1), |
610 | AZF3328_MIXER_VOL_STEREO("FM Playback Volume", IDX_MIXER_FMSYNTH, 0x1f, 1), | |
611 | AZF3328_MIXER_SWITCH("CD Playback Switch", IDX_MIXER_CDAUDIO, 15, 1), | |
612 | AZF3328_MIXER_VOL_STEREO("CD Playback Volume", IDX_MIXER_CDAUDIO, 0x1f, 1), | |
613 | AZF3328_MIXER_SWITCH("Capture Switch", IDX_MIXER_REC_VOLUME, 15, 1), | |
614 | AZF3328_MIXER_VOL_STEREO("Capture Volume", IDX_MIXER_REC_VOLUME, 0x0f, 0), | |
615 | AZF3328_MIXER_ENUM("Capture Source", IDX_MIXER_REC_SELECT, 8, 0), | |
616 | AZF3328_MIXER_SWITCH("Mic Playback Switch", IDX_MIXER_MIC, 15, 1), | |
617 | AZF3328_MIXER_VOL_MONO("Mic Playback Volume", IDX_MIXER_MIC, 0x1f, 1), | |
618 | AZF3328_MIXER_SWITCH("Mic Boost (+20dB)", IDX_MIXER_MIC, 6, 0), | |
619 | AZF3328_MIXER_SWITCH("Line Playback Switch", IDX_MIXER_LINEIN, 15, 1), | |
620 | AZF3328_MIXER_VOL_STEREO("Line Playback Volume", IDX_MIXER_LINEIN, 0x1f, 1), | |
d91c64c8 AM |
621 | AZF3328_MIXER_SWITCH("PC Speaker Playback Switch", IDX_MIXER_PCBEEP, 15, 1), |
622 | AZF3328_MIXER_VOL_SPECIAL("PC Speaker Playback Volume", IDX_MIXER_PCBEEP, 0x0f, 1, 1), | |
1da177e4 LT |
623 | AZF3328_MIXER_SWITCH("Video Playback Switch", IDX_MIXER_VIDEO, 15, 1), |
624 | AZF3328_MIXER_VOL_STEREO("Video Playback Volume", IDX_MIXER_VIDEO, 0x1f, 1), | |
625 | AZF3328_MIXER_SWITCH("Aux Playback Switch", IDX_MIXER_AUX, 15, 1), | |
626 | AZF3328_MIXER_VOL_STEREO("Aux Playback Volume", IDX_MIXER_AUX, 0x1f, 1), | |
627 | AZF3328_MIXER_SWITCH("Modem Playback Switch", IDX_MIXER_MODEMOUT, 15, 1), | |
628 | AZF3328_MIXER_VOL_MONO("Modem Playback Volume", IDX_MIXER_MODEMOUT, 0x1f, 1), | |
629 | AZF3328_MIXER_SWITCH("Modem Capture Switch", IDX_MIXER_MODEMIN, 15, 1), | |
630 | AZF3328_MIXER_VOL_MONO("Modem Capture Volume", IDX_MIXER_MODEMIN, 0x1f, 1), | |
631 | AZF3328_MIXER_ENUM("Modem Out Select", IDX_MIXER_ADVCTL2, 2, 8), | |
632 | AZF3328_MIXER_ENUM("Mono Select Source", IDX_MIXER_ADVCTL2, 2, 9), | |
633 | AZF3328_MIXER_VOL_SPECIAL("Tone Control - Treble", IDX_MIXER_BASSTREBLE, 0x07, 1, 0), | |
634 | AZF3328_MIXER_VOL_SPECIAL("Tone Control - Bass", IDX_MIXER_BASSTREBLE, 0x07, 9, 0), | |
d91c64c8 AM |
635 | AZF3328_MIXER_SWITCH("3D Control - Switch", IDX_MIXER_ADVCTL2, 13, 0), |
636 | AZF3328_MIXER_VOL_SPECIAL("3D Control - Wide", IDX_MIXER_ADVCTL1, 0x07, 1, 0), /* "3D Width" */ | |
1da177e4 LT |
637 | AZF3328_MIXER_VOL_SPECIAL("3D Control - Space", IDX_MIXER_ADVCTL1, 0x03, 8, 0), /* "Hifi 3D" */ |
638 | #if MIXER_TESTING | |
639 | AZF3328_MIXER_SWITCH("0", IDX_MIXER_ADVCTL2, 0, 0), | |
640 | AZF3328_MIXER_SWITCH("1", IDX_MIXER_ADVCTL2, 1, 0), | |
641 | AZF3328_MIXER_SWITCH("2", IDX_MIXER_ADVCTL2, 2, 0), | |
642 | AZF3328_MIXER_SWITCH("3", IDX_MIXER_ADVCTL2, 3, 0), | |
643 | AZF3328_MIXER_SWITCH("4", IDX_MIXER_ADVCTL2, 4, 0), | |
644 | AZF3328_MIXER_SWITCH("5", IDX_MIXER_ADVCTL2, 5, 0), | |
645 | AZF3328_MIXER_SWITCH("6", IDX_MIXER_ADVCTL2, 6, 0), | |
646 | AZF3328_MIXER_SWITCH("7", IDX_MIXER_ADVCTL2, 7, 0), | |
647 | AZF3328_MIXER_SWITCH("8", IDX_MIXER_ADVCTL2, 8, 0), | |
648 | AZF3328_MIXER_SWITCH("9", IDX_MIXER_ADVCTL2, 9, 0), | |
649 | AZF3328_MIXER_SWITCH("10", IDX_MIXER_ADVCTL2, 10, 0), | |
650 | AZF3328_MIXER_SWITCH("11", IDX_MIXER_ADVCTL2, 11, 0), | |
651 | AZF3328_MIXER_SWITCH("12", IDX_MIXER_ADVCTL2, 12, 0), | |
652 | AZF3328_MIXER_SWITCH("13", IDX_MIXER_ADVCTL2, 13, 0), | |
653 | AZF3328_MIXER_SWITCH("14", IDX_MIXER_ADVCTL2, 14, 0), | |
654 | AZF3328_MIXER_SWITCH("15", IDX_MIXER_ADVCTL2, 15, 0), | |
655 | #endif | |
656 | }; | |
657 | ||
d91c64c8 | 658 | static const u16 __devinitdata snd_azf3328_init_values[][2] = { |
1da177e4 LT |
659 | { IDX_MIXER_PLAY_MASTER, MIXER_MUTE_MASK|0x1f1f }, |
660 | { IDX_MIXER_MODEMOUT, MIXER_MUTE_MASK|0x1f1f }, | |
661 | { IDX_MIXER_BASSTREBLE, 0x0000 }, | |
662 | { IDX_MIXER_PCBEEP, MIXER_MUTE_MASK|0x1f1f }, | |
663 | { IDX_MIXER_MODEMIN, MIXER_MUTE_MASK|0x1f1f }, | |
664 | { IDX_MIXER_MIC, MIXER_MUTE_MASK|0x001f }, | |
665 | { IDX_MIXER_LINEIN, MIXER_MUTE_MASK|0x1f1f }, | |
666 | { IDX_MIXER_CDAUDIO, MIXER_MUTE_MASK|0x1f1f }, | |
667 | { IDX_MIXER_VIDEO, MIXER_MUTE_MASK|0x1f1f }, | |
668 | { IDX_MIXER_AUX, MIXER_MUTE_MASK|0x1f1f }, | |
669 | { IDX_MIXER_WAVEOUT, MIXER_MUTE_MASK|0x1f1f }, | |
670 | { IDX_MIXER_FMSYNTH, MIXER_MUTE_MASK|0x1f1f }, | |
671 | { IDX_MIXER_REC_VOLUME, MIXER_MUTE_MASK|0x0707 }, | |
672 | }; | |
673 | ||
d91c64c8 | 674 | static int __devinit |
95de7766 | 675 | snd_azf3328_mixer_new(struct snd_azf3328 *chip) |
1da177e4 | 676 | { |
95de7766 TI |
677 | struct snd_card *card; |
678 | const struct snd_kcontrol_new *sw; | |
1da177e4 LT |
679 | unsigned int idx; |
680 | int err; | |
681 | ||
682 | snd_azf3328_dbgcallenter(); | |
683 | snd_assert(chip != NULL && chip->card != NULL, return -EINVAL); | |
684 | ||
685 | card = chip->card; | |
686 | ||
687 | /* mixer reset */ | |
d91c64c8 | 688 | snd_azf3328_mixer_outw(chip, IDX_MIXER_RESET, 0x0000); |
1da177e4 LT |
689 | |
690 | /* mute and zero volume channels */ | |
d91c64c8 AM |
691 | for (idx = 0; idx < ARRAY_SIZE(snd_azf3328_init_values); idx++) { |
692 | snd_azf3328_mixer_outw(chip, | |
693 | snd_azf3328_init_values[idx][0], | |
694 | snd_azf3328_init_values[idx][1]); | |
1da177e4 LT |
695 | } |
696 | ||
697 | /* add mixer controls */ | |
698 | sw = snd_azf3328_mixer_controls; | |
699 | for (idx = 0; idx < ARRAY_SIZE(snd_azf3328_mixer_controls); idx++, sw++) { | |
700 | if ((err = snd_ctl_add(chip->card, snd_ctl_new1(sw, chip))) < 0) | |
701 | return err; | |
702 | } | |
703 | snd_component_add(card, "AZF3328 mixer"); | |
704 | strcpy(card->mixername, "AZF3328 mixer"); | |
705 | ||
706 | snd_azf3328_dbgcallleave(); | |
707 | return 0; | |
708 | } | |
709 | ||
d91c64c8 | 710 | static int |
95de7766 TI |
711 | snd_azf3328_hw_params(struct snd_pcm_substream *substream, |
712 | struct snd_pcm_hw_params *hw_params) | |
1da177e4 LT |
713 | { |
714 | int res; | |
715 | snd_azf3328_dbgcallenter(); | |
716 | res = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params)); | |
717 | snd_azf3328_dbgcallleave(); | |
718 | return res; | |
719 | } | |
720 | ||
d91c64c8 | 721 | static int |
95de7766 | 722 | snd_azf3328_hw_free(struct snd_pcm_substream *substream) |
1da177e4 LT |
723 | { |
724 | snd_azf3328_dbgcallenter(); | |
725 | snd_pcm_lib_free_pages(substream); | |
726 | snd_azf3328_dbgcallleave(); | |
727 | return 0; | |
728 | } | |
729 | ||
d91c64c8 | 730 | static void |
95de7766 | 731 | snd_azf3328_setfmt(struct snd_azf3328 *chip, |
1da177e4 LT |
732 | unsigned int reg, |
733 | unsigned int bitrate, | |
734 | unsigned int format_width, | |
735 | unsigned int channels | |
736 | ) | |
737 | { | |
d91c64c8 | 738 | u16 val = 0xff00; |
1da177e4 LT |
739 | unsigned long flags; |
740 | ||
741 | snd_azf3328_dbgcallenter(); | |
742 | switch (bitrate) { | |
d91c64c8 AM |
743 | case 4000: val |= SOUNDFORMAT_FREQ_SUSPECTED_4000; break; |
744 | case 4800: val |= SOUNDFORMAT_FREQ_SUSPECTED_4800; break; | |
745 | case 5512: val |= SOUNDFORMAT_FREQ_5510; break; /* the AZF3328 names it "5510" for some strange reason */ | |
746 | case 6620: val |= SOUNDFORMAT_FREQ_6620; break; | |
747 | case 8000: val |= SOUNDFORMAT_FREQ_8000; break; | |
748 | case 9600: val |= SOUNDFORMAT_FREQ_9600; break; | |
749 | case 11025: val |= SOUNDFORMAT_FREQ_11025; break; | |
750 | case 13240: val |= SOUNDFORMAT_FREQ_SUSPECTED_13240; break; | |
751 | case 16000: val |= SOUNDFORMAT_FREQ_16000; break; | |
752 | case 22050: val |= SOUNDFORMAT_FREQ_22050; break; | |
753 | case 32000: val |= SOUNDFORMAT_FREQ_32000; break; | |
754 | case 44100: val |= SOUNDFORMAT_FREQ_44100; break; | |
755 | case 48000: val |= SOUNDFORMAT_FREQ_48000; break; | |
756 | case 66200: val |= SOUNDFORMAT_FREQ_SUSPECTED_66200; break; | |
1da177e4 | 757 | default: |
99b359ba | 758 | snd_printk(KERN_WARNING "unknown bitrate %d, assuming 44.1kHz!\n", bitrate); |
d91c64c8 | 759 | val |= SOUNDFORMAT_FREQ_44100; |
1da177e4 LT |
760 | break; |
761 | } | |
d91c64c8 AM |
762 | /* val = 0xff07; 3m27.993s (65301Hz; -> 64000Hz???) hmm, 66120, 65967, 66123 */ |
763 | /* val = 0xff09; 17m15.098s (13123,478Hz; -> 12000Hz???) hmm, 13237.2Hz? */ | |
764 | /* val = 0xff0a; 47m30.599s (4764,891Hz; -> 4800Hz???) yup, 4803Hz */ | |
765 | /* val = 0xff0c; 57m0.510s (4010,263Hz; -> 4000Hz???) yup, 4003Hz */ | |
1da177e4 LT |
766 | /* val = 0xff05; 5m11.556s (... -> 44100Hz) */ |
767 | /* val = 0xff03; 10m21.529s (21872,463Hz; -> 22050Hz???) */ | |
768 | /* val = 0xff0f; 20m41.883s (10937,993Hz; -> 11025Hz???) */ | |
769 | /* val = 0xff0d; 41m23.135s (5523,600Hz; -> 5512Hz???) */ | |
770 | /* val = 0xff0e; 28m30.777s (8017Hz; -> 8000Hz???) */ | |
d91c64c8 | 771 | |
1da177e4 LT |
772 | if (channels == 2) |
773 | val |= SOUNDFORMAT_FLAG_2CHANNELS; | |
774 | ||
775 | if (format_width == 16) | |
776 | val |= SOUNDFORMAT_FLAG_16BIT; | |
777 | ||
778 | spin_lock_irqsave(&chip->reg_lock, flags); | |
779 | ||
780 | /* set bitrate/format */ | |
d91c64c8 | 781 | snd_azf3328_codec_outw(chip, reg, val); |
1da177e4 LT |
782 | |
783 | /* changing the bitrate/format settings switches off the | |
784 | * audio output with an annoying click in case of 8/16bit format change | |
785 | * (maybe shutting down DAC/ADC?), thus immediately | |
786 | * do some tweaking to reenable it and get rid of the clicking | |
787 | * (FIXME: yes, it works, but what exactly am I doing here?? :) | |
788 | * FIXME: does this have some side effects for full-duplex | |
789 | * or other dramatic side effects? */ | |
790 | if (reg == IDX_IO_PLAY_SOUNDFORMAT) /* only do it for playback */ | |
d91c64c8 AM |
791 | snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS, |
792 | snd_azf3328_codec_inw(chip, IDX_IO_PLAY_FLAGS) | | |
793 | DMA_PLAY_SOMETHING1 | | |
794 | DMA_PLAY_SOMETHING2 | | |
795 | SOMETHING_ALMOST_ALWAYS_SET | | |
796 | DMA_EPILOGUE_SOMETHING | | |
797 | DMA_SOMETHING_ELSE | |
798 | ); | |
1da177e4 LT |
799 | |
800 | spin_unlock_irqrestore(&chip->reg_lock, flags); | |
801 | snd_azf3328_dbgcallleave(); | |
802 | } | |
803 | ||
d91c64c8 | 804 | static void |
95de7766 | 805 | snd_azf3328_setdmaa(struct snd_azf3328 *chip, |
1da177e4 LT |
806 | long unsigned int addr, |
807 | unsigned int count, | |
808 | unsigned int size, | |
809 | int do_recording) | |
810 | { | |
d91c64c8 AM |
811 | unsigned long flags, portbase; |
812 | unsigned int is_running; | |
1da177e4 LT |
813 | |
814 | snd_azf3328_dbgcallenter(); | |
d91c64c8 AM |
815 | if (do_recording) |
816 | { | |
817 | /* access capture registers, i.e. skip playback reg section */ | |
818 | portbase = chip->codec_port + 0x20; | |
819 | is_running = chip->is_recording; | |
820 | } | |
821 | else | |
822 | { | |
823 | /* access the playback register section */ | |
824 | portbase = chip->codec_port + 0x00; | |
825 | is_running = chip->is_playing; | |
826 | } | |
827 | ||
1da177e4 | 828 | /* AZF3328 uses a two buffer pointer DMA playback approach */ |
d91c64c8 | 829 | if (!is_running) |
1da177e4 | 830 | { |
d91c64c8 AM |
831 | unsigned long addr_area2; |
832 | unsigned long count_areas, count_tmp; /* width 32bit -- overflow!! */ | |
833 | count_areas = size/2; | |
834 | addr_area2 = addr+count_areas; | |
835 | count_areas--; /* max. index */ | |
836 | snd_azf3328_dbgplay("set DMA: buf1 %08lx[%lu], buf2 %08lx[%lu]\n", addr, count_areas, addr_area2, count_areas); | |
837 | ||
838 | /* build combined I/O buffer length word */ | |
839 | count_tmp = count_areas; | |
840 | count_areas |= (count_tmp << 16); | |
1da177e4 | 841 | spin_lock_irqsave(&chip->reg_lock, flags); |
d91c64c8 AM |
842 | outl(addr, portbase + IDX_IO_PLAY_DMA_START_1); |
843 | outl(addr_area2, portbase + IDX_IO_PLAY_DMA_START_2); | |
844 | outl(count_areas, portbase + IDX_IO_PLAY_DMA_LEN_1); | |
1da177e4 LT |
845 | spin_unlock_irqrestore(&chip->reg_lock, flags); |
846 | } | |
847 | snd_azf3328_dbgcallleave(); | |
848 | } | |
849 | ||
d91c64c8 | 850 | static int |
95de7766 | 851 | snd_azf3328_playback_prepare(struct snd_pcm_substream *substream) |
1da177e4 LT |
852 | { |
853 | #if 0 | |
95de7766 TI |
854 | struct snd_azf3328 *chip = snd_pcm_substream_chip(substream); |
855 | struct snd_pcm_runtime *runtime = substream->runtime; | |
1da177e4 LT |
856 | unsigned int size = snd_pcm_lib_buffer_bytes(substream); |
857 | unsigned int count = snd_pcm_lib_period_bytes(substream); | |
858 | #endif | |
859 | ||
860 | snd_azf3328_dbgcallenter(); | |
861 | #if 0 | |
d91c64c8 AM |
862 | snd_azf3328_setfmt(chip, IDX_IO_PLAY_SOUNDFORMAT, |
863 | runtime->rate, | |
864 | snd_pcm_format_width(runtime->format), | |
865 | runtime->channels); | |
1da177e4 LT |
866 | snd_azf3328_setdmaa(chip, runtime->dma_addr, count, size, 0); |
867 | #endif | |
868 | snd_azf3328_dbgcallleave(); | |
869 | return 0; | |
870 | } | |
871 | ||
d91c64c8 | 872 | static int |
95de7766 | 873 | snd_azf3328_capture_prepare(struct snd_pcm_substream *substream) |
1da177e4 LT |
874 | { |
875 | #if 0 | |
95de7766 TI |
876 | struct snd_azf3328 *chip = snd_pcm_substream_chip(substream); |
877 | struct snd_pcm_runtime *runtime = substream->runtime; | |
1da177e4 LT |
878 | unsigned int size = snd_pcm_lib_buffer_bytes(substream); |
879 | unsigned int count = snd_pcm_lib_period_bytes(substream); | |
880 | #endif | |
881 | ||
882 | snd_azf3328_dbgcallenter(); | |
883 | #if 0 | |
d91c64c8 AM |
884 | snd_azf3328_setfmt(chip, IDX_IO_REC_SOUNDFORMAT, |
885 | runtime->rate, | |
886 | snd_pcm_format_width(runtime->format), | |
887 | runtime->channels); | |
1da177e4 LT |
888 | snd_azf3328_setdmaa(chip, runtime->dma_addr, count, size, 1); |
889 | #endif | |
890 | snd_azf3328_dbgcallleave(); | |
891 | return 0; | |
892 | } | |
893 | ||
d91c64c8 | 894 | static int |
95de7766 | 895 | snd_azf3328_playback_trigger(struct snd_pcm_substream *substream, int cmd) |
1da177e4 | 896 | { |
95de7766 TI |
897 | struct snd_azf3328 *chip = snd_pcm_substream_chip(substream); |
898 | struct snd_pcm_runtime *runtime = substream->runtime; | |
1da177e4 LT |
899 | int result = 0; |
900 | unsigned int status1; | |
901 | ||
902 | snd_azf3328_dbgcalls("snd_azf3328_playback_trigger cmd %d\n", cmd); | |
d91c64c8 | 903 | |
1da177e4 LT |
904 | switch (cmd) { |
905 | case SNDRV_PCM_TRIGGER_START: | |
d91c64c8 | 906 | snd_azf3328_dbgplay("START PLAYBACK\n"); |
1da177e4 LT |
907 | |
908 | /* mute WaveOut */ | |
909 | snd_azf3328_mixer_set_mute(chip, IDX_MIXER_WAVEOUT, 1); | |
910 | ||
d91c64c8 AM |
911 | snd_azf3328_setfmt(chip, IDX_IO_PLAY_SOUNDFORMAT, |
912 | runtime->rate, | |
913 | snd_pcm_format_width(runtime->format), | |
914 | runtime->channels); | |
1da177e4 LT |
915 | |
916 | spin_lock(&chip->reg_lock); | |
917 | /* stop playback */ | |
d91c64c8 | 918 | status1 = snd_azf3328_codec_inw(chip, IDX_IO_PLAY_FLAGS); |
1da177e4 | 919 | status1 &= ~DMA_RESUME; |
d91c64c8 | 920 | snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS, status1); |
1da177e4 LT |
921 | |
922 | /* FIXME: clear interrupts or what??? */ | |
d91c64c8 | 923 | snd_azf3328_codec_outw(chip, IDX_IO_PLAY_IRQTYPE, 0xffff); |
1da177e4 LT |
924 | spin_unlock(&chip->reg_lock); |
925 | ||
d91c64c8 AM |
926 | snd_azf3328_setdmaa(chip, runtime->dma_addr, |
927 | snd_pcm_lib_period_bytes(substream), | |
928 | snd_pcm_lib_buffer_bytes(substream), | |
929 | 0); | |
1da177e4 LT |
930 | |
931 | spin_lock(&chip->reg_lock); | |
932 | #ifdef WIN9X | |
933 | /* FIXME: enable playback/recording??? */ | |
934 | status1 |= DMA_PLAY_SOMETHING1 | DMA_PLAY_SOMETHING2; | |
d91c64c8 | 935 | snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS, status1); |
1da177e4 LT |
936 | |
937 | /* start playback again */ | |
938 | /* FIXME: what is this value (0x0010)??? */ | |
939 | status1 |= DMA_RESUME | DMA_EPILOGUE_SOMETHING; | |
d91c64c8 | 940 | snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS, status1); |
1da177e4 | 941 | #else /* NT4 */ |
d91c64c8 AM |
942 | snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS, |
943 | 0x0000); | |
944 | snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS, | |
945 | DMA_PLAY_SOMETHING1); | |
946 | snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS, | |
947 | DMA_PLAY_SOMETHING1 | | |
948 | DMA_PLAY_SOMETHING2); | |
949 | snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS, | |
950 | DMA_RESUME | | |
951 | SOMETHING_ALMOST_ALWAYS_SET | | |
952 | DMA_EPILOGUE_SOMETHING | | |
953 | DMA_SOMETHING_ELSE); | |
1da177e4 LT |
954 | #endif |
955 | spin_unlock(&chip->reg_lock); | |
956 | ||
957 | /* now unmute WaveOut */ | |
958 | snd_azf3328_mixer_set_mute(chip, IDX_MIXER_WAVEOUT, 0); | |
959 | ||
1da177e4 | 960 | chip->is_playing = 1; |
d91c64c8 | 961 | snd_azf3328_dbgplay("STARTED PLAYBACK\n"); |
1da177e4 | 962 | break; |
d91c64c8 AM |
963 | case SNDRV_PCM_TRIGGER_STOP: |
964 | snd_azf3328_dbgplay("STOP PLAYBACK\n"); | |
965 | ||
1da177e4 LT |
966 | /* mute WaveOut */ |
967 | snd_azf3328_mixer_set_mute(chip, IDX_MIXER_WAVEOUT, 1); | |
968 | ||
969 | spin_lock(&chip->reg_lock); | |
970 | /* stop playback */ | |
d91c64c8 | 971 | status1 = snd_azf3328_codec_inw(chip, IDX_IO_PLAY_FLAGS); |
1da177e4 LT |
972 | |
973 | status1 &= ~DMA_RESUME; | |
d91c64c8 | 974 | snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS, status1); |
1da177e4 | 975 | |
d91c64c8 AM |
976 | /* hmm, is this really required? we're resetting the same bit |
977 | * immediately thereafter... */ | |
1da177e4 | 978 | status1 |= DMA_PLAY_SOMETHING1; |
d91c64c8 | 979 | snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS, status1); |
1da177e4 LT |
980 | |
981 | status1 &= ~DMA_PLAY_SOMETHING1; | |
d91c64c8 | 982 | snd_azf3328_codec_outw(chip, IDX_IO_PLAY_FLAGS, status1); |
1da177e4 LT |
983 | spin_unlock(&chip->reg_lock); |
984 | ||
985 | /* now unmute WaveOut */ | |
986 | snd_azf3328_mixer_set_mute(chip, IDX_MIXER_WAVEOUT, 0); | |
987 | chip->is_playing = 0; | |
d91c64c8 | 988 | snd_azf3328_dbgplay("STOPPED PLAYBACK\n"); |
1da177e4 LT |
989 | break; |
990 | case SNDRV_PCM_TRIGGER_PAUSE_PUSH: | |
99b359ba | 991 | snd_printk(KERN_ERR "FIXME: SNDRV_PCM_TRIGGER_PAUSE_PUSH NIY!\n"); |
1da177e4 LT |
992 | break; |
993 | case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: | |
99b359ba | 994 | snd_printk(KERN_ERR "FIXME: SNDRV_PCM_TRIGGER_PAUSE_RELEASE NIY!\n"); |
1da177e4 LT |
995 | break; |
996 | default: | |
997 | return -EINVAL; | |
998 | } | |
999 | ||
1000 | snd_azf3328_dbgcallleave(); | |
1001 | return result; | |
1002 | } | |
1003 | ||
1004 | /* this is just analogous to playback; I'm not quite sure whether recording | |
1005 | * should actually be triggered like that */ | |
d91c64c8 | 1006 | static int |
95de7766 | 1007 | snd_azf3328_capture_trigger(struct snd_pcm_substream *substream, int cmd) |
1da177e4 | 1008 | { |
95de7766 TI |
1009 | struct snd_azf3328 *chip = snd_pcm_substream_chip(substream); |
1010 | struct snd_pcm_runtime *runtime = substream->runtime; | |
1da177e4 LT |
1011 | int result = 0; |
1012 | unsigned int status1; | |
1013 | ||
1014 | snd_azf3328_dbgcalls("snd_azf3328_capture_trigger cmd %d\n", cmd); | |
d91c64c8 | 1015 | |
1da177e4 LT |
1016 | switch (cmd) { |
1017 | case SNDRV_PCM_TRIGGER_START: | |
1018 | ||
d91c64c8 | 1019 | snd_azf3328_dbgplay("START CAPTURE\n"); |
1da177e4 | 1020 | |
d91c64c8 AM |
1021 | snd_azf3328_setfmt(chip, IDX_IO_REC_SOUNDFORMAT, |
1022 | runtime->rate, | |
1023 | snd_pcm_format_width(runtime->format), | |
1024 | runtime->channels); | |
1da177e4 LT |
1025 | |
1026 | spin_lock(&chip->reg_lock); | |
1027 | /* stop recording */ | |
d91c64c8 | 1028 | status1 = snd_azf3328_codec_inw(chip, IDX_IO_REC_FLAGS); |
1da177e4 | 1029 | status1 &= ~DMA_RESUME; |
d91c64c8 | 1030 | snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS, status1); |
1da177e4 LT |
1031 | |
1032 | /* FIXME: clear interrupts or what??? */ | |
d91c64c8 | 1033 | snd_azf3328_codec_outw(chip, IDX_IO_REC_IRQTYPE, 0xffff); |
1da177e4 LT |
1034 | spin_unlock(&chip->reg_lock); |
1035 | ||
d91c64c8 AM |
1036 | snd_azf3328_setdmaa(chip, runtime->dma_addr, |
1037 | snd_pcm_lib_period_bytes(substream), | |
1038 | snd_pcm_lib_buffer_bytes(substream), | |
1039 | 1); | |
1da177e4 LT |
1040 | |
1041 | spin_lock(&chip->reg_lock); | |
1042 | #ifdef WIN9X | |
1043 | /* FIXME: enable playback/recording??? */ | |
1044 | status1 |= DMA_PLAY_SOMETHING1 | DMA_PLAY_SOMETHING2; | |
d91c64c8 | 1045 | snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS, status1); |
1da177e4 | 1046 | |
d91c64c8 | 1047 | /* start capture again */ |
1da177e4 LT |
1048 | /* FIXME: what is this value (0x0010)??? */ |
1049 | status1 |= DMA_RESUME | DMA_EPILOGUE_SOMETHING; | |
d91c64c8 | 1050 | snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS, status1); |
1da177e4 | 1051 | #else |
d91c64c8 AM |
1052 | snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS, |
1053 | 0x0000); | |
1054 | snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS, | |
1055 | DMA_PLAY_SOMETHING1); | |
1056 | snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS, | |
1057 | DMA_PLAY_SOMETHING1 | | |
1058 | DMA_PLAY_SOMETHING2); | |
1059 | snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS, | |
1060 | DMA_RESUME | | |
1061 | SOMETHING_ALMOST_ALWAYS_SET | | |
1062 | DMA_EPILOGUE_SOMETHING | | |
1063 | DMA_SOMETHING_ELSE); | |
1da177e4 LT |
1064 | #endif |
1065 | spin_unlock(&chip->reg_lock); | |
1066 | ||
d91c64c8 AM |
1067 | chip->is_recording = 1; |
1068 | snd_azf3328_dbgplay("STARTED CAPTURE\n"); | |
1da177e4 LT |
1069 | break; |
1070 | case SNDRV_PCM_TRIGGER_STOP: | |
d91c64c8 AM |
1071 | snd_azf3328_dbgplay("STOP CAPTURE\n"); |
1072 | ||
1da177e4 LT |
1073 | spin_lock(&chip->reg_lock); |
1074 | /* stop recording */ | |
d91c64c8 | 1075 | status1 = snd_azf3328_codec_inw(chip, IDX_IO_REC_FLAGS); |
1da177e4 LT |
1076 | |
1077 | status1 &= ~DMA_RESUME; | |
d91c64c8 | 1078 | snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS, status1); |
1da177e4 LT |
1079 | |
1080 | status1 |= DMA_PLAY_SOMETHING1; | |
d91c64c8 | 1081 | snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS, status1); |
1da177e4 LT |
1082 | |
1083 | status1 &= ~DMA_PLAY_SOMETHING1; | |
d91c64c8 | 1084 | snd_azf3328_codec_outw(chip, IDX_IO_REC_FLAGS, status1); |
1da177e4 LT |
1085 | spin_unlock(&chip->reg_lock); |
1086 | ||
d91c64c8 AM |
1087 | chip->is_recording = 0; |
1088 | snd_azf3328_dbgplay("STOPPED CAPTURE\n"); | |
1da177e4 LT |
1089 | break; |
1090 | case SNDRV_PCM_TRIGGER_PAUSE_PUSH: | |
99b359ba | 1091 | snd_printk(KERN_ERR "FIXME: SNDRV_PCM_TRIGGER_PAUSE_PUSH NIY!\n"); |
1da177e4 LT |
1092 | break; |
1093 | case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: | |
99b359ba | 1094 | snd_printk(KERN_ERR "FIXME: SNDRV_PCM_TRIGGER_PAUSE_RELEASE NIY!\n"); |
1da177e4 LT |
1095 | break; |
1096 | default: | |
1097 | return -EINVAL; | |
1098 | } | |
1099 | ||
1100 | snd_azf3328_dbgcallleave(); | |
1101 | return result; | |
1102 | } | |
1103 | ||
d91c64c8 | 1104 | static snd_pcm_uframes_t |
95de7766 | 1105 | snd_azf3328_playback_pointer(struct snd_pcm_substream *substream) |
1da177e4 | 1106 | { |
95de7766 | 1107 | struct snd_azf3328 *chip = snd_pcm_substream_chip(substream); |
d91c64c8 | 1108 | unsigned long bufptr, result; |
1da177e4 LT |
1109 | snd_pcm_uframes_t frmres; |
1110 | ||
1111 | #ifdef QUERY_HARDWARE | |
1112 | bufptr = inl(chip->codec_port+IDX_IO_PLAY_DMA_START_1); | |
1113 | #else | |
1114 | bufptr = substream->runtime->dma_addr; | |
1115 | #endif | |
d91c64c8 | 1116 | result = inl(chip->codec_port+IDX_IO_PLAY_DMA_CURRPOS); |
1da177e4 | 1117 | |
d91c64c8 AM |
1118 | /* calculate offset */ |
1119 | result -= bufptr; | |
1120 | frmres = bytes_to_frames( substream->runtime, result); | |
1121 | snd_azf3328_dbgplay("PLAY @ 0x%8lx, frames %8ld\n", result, frmres); | |
1da177e4 LT |
1122 | return frmres; |
1123 | } | |
1124 | ||
d91c64c8 | 1125 | static snd_pcm_uframes_t |
95de7766 | 1126 | snd_azf3328_capture_pointer(struct snd_pcm_substream *substream) |
1da177e4 | 1127 | { |
95de7766 | 1128 | struct snd_azf3328 *chip = snd_pcm_substream_chip(substream); |
d91c64c8 | 1129 | unsigned long bufptr, result; |
1da177e4 LT |
1130 | snd_pcm_uframes_t frmres; |
1131 | ||
1132 | #ifdef QUERY_HARDWARE | |
1133 | bufptr = inl(chip->codec_port+IDX_IO_REC_DMA_START_1); | |
1134 | #else | |
1135 | bufptr = substream->runtime->dma_addr; | |
1136 | #endif | |
d91c64c8 | 1137 | result = inl(chip->codec_port+IDX_IO_REC_DMA_CURRPOS); |
1da177e4 | 1138 | |
d91c64c8 AM |
1139 | /* calculate offset */ |
1140 | result -= bufptr; | |
1141 | frmres = bytes_to_frames( substream->runtime, result); | |
1142 | snd_azf3328_dbgplay("REC @ 0x%8lx, frames %8ld\n", result, frmres); | |
1da177e4 LT |
1143 | return frmres; |
1144 | } | |
1145 | ||
d91c64c8 AM |
1146 | static irqreturn_t |
1147 | snd_azf3328_interrupt(int irq, void *dev_id, struct pt_regs *regs) | |
1da177e4 | 1148 | { |
95de7766 | 1149 | struct snd_azf3328 *chip = dev_id; |
d91c64c8 AM |
1150 | u8 status, which; |
1151 | static unsigned long irq_count; | |
1da177e4 | 1152 | |
d91c64c8 | 1153 | status = snd_azf3328_codec_inb(chip, IDX_IO_IRQSTATUS); |
1da177e4 LT |
1154 | |
1155 | /* fast path out, to ease interrupt sharing */ | |
d91c64c8 | 1156 | if (!(status & (IRQ_PLAYBACK|IRQ_RECORDING|IRQ_MPU401|IRQ_TIMER))) |
1da177e4 LT |
1157 | return IRQ_NONE; /* must be interrupt for another device */ |
1158 | ||
d91c64c8 AM |
1159 | snd_azf3328_dbgplay("Interrupt %ld!\nIDX_IO_PLAY_FLAGS %04x, IDX_IO_PLAY_IRQTYPE %04x, IDX_IO_IRQSTATUS %04x\n", |
1160 | irq_count, | |
1161 | snd_azf3328_codec_inw(chip, IDX_IO_PLAY_FLAGS), | |
1162 | snd_azf3328_codec_inw(chip, IDX_IO_PLAY_IRQTYPE), | |
1163 | status); | |
1da177e4 | 1164 | |
d91c64c8 AM |
1165 | if (status & IRQ_TIMER) |
1166 | { | |
1167 | /* snd_azf3328_dbgplay("timer %ld\n", inl(chip->codec_port+IDX_IO_TIMER_VALUE) & TIMER_VALUE_MASK); */ | |
1168 | if (chip->timer) | |
1169 | snd_timer_interrupt(chip->timer, chip->timer->sticks); | |
1170 | /* ACK timer */ | |
1171 | spin_lock(&chip->reg_lock); | |
1172 | snd_azf3328_codec_outb(chip, IDX_IO_TIMER_VALUE + 3, 0x07); | |
1173 | spin_unlock(&chip->reg_lock); | |
1174 | snd_azf3328_dbgplay("azt3328: timer IRQ\n"); | |
1175 | } | |
1da177e4 LT |
1176 | if (status & IRQ_PLAYBACK) |
1177 | { | |
1178 | spin_lock(&chip->reg_lock); | |
d91c64c8 AM |
1179 | which = snd_azf3328_codec_inb(chip, IDX_IO_PLAY_IRQTYPE); |
1180 | /* ack all IRQ types immediately */ | |
1181 | snd_azf3328_codec_outb(chip, IDX_IO_PLAY_IRQTYPE, which); | |
1182 | spin_unlock(&chip->reg_lock); | |
1183 | ||
1da177e4 LT |
1184 | if (chip->pcm && chip->playback_substream) |
1185 | { | |
1da177e4 | 1186 | snd_pcm_period_elapsed(chip->playback_substream); |
d91c64c8 AM |
1187 | snd_azf3328_dbgplay("PLAY period done (#%x), @ %x\n", |
1188 | which, | |
1189 | inl(chip->codec_port+IDX_IO_PLAY_DMA_CURRPOS)); | |
1da177e4 LT |
1190 | } |
1191 | else | |
1192 | snd_azf3328_dbgplay("azt3328: ouch, irq handler problem!\n"); | |
d91c64c8 AM |
1193 | if (which & IRQ_PLAY_SOMETHING) |
1194 | snd_azf3328_dbgplay("azt3328: unknown play IRQ type occurred, please report!\n"); | |
1da177e4 LT |
1195 | } |
1196 | if (status & IRQ_RECORDING) | |
1197 | { | |
1198 | spin_lock(&chip->reg_lock); | |
d91c64c8 AM |
1199 | which = snd_azf3328_codec_inb(chip, IDX_IO_REC_IRQTYPE); |
1200 | /* ack all IRQ types immediately */ | |
1201 | snd_azf3328_codec_outb(chip, IDX_IO_REC_IRQTYPE, which); | |
1202 | spin_unlock(&chip->reg_lock); | |
1203 | ||
1da177e4 LT |
1204 | if (chip->pcm && chip->capture_substream) |
1205 | { | |
1da177e4 | 1206 | snd_pcm_period_elapsed(chip->capture_substream); |
d91c64c8 AM |
1207 | snd_azf3328_dbgplay("REC period done (#%x), @ %x\n", |
1208 | which, | |
1209 | inl(chip->codec_port+IDX_IO_REC_DMA_CURRPOS)); | |
1da177e4 | 1210 | } |
d91c64c8 AM |
1211 | else |
1212 | snd_azf3328_dbgplay("azt3328: ouch, irq handler problem!\n"); | |
1213 | if (which & IRQ_REC_SOMETHING) | |
1214 | snd_azf3328_dbgplay("azt3328: unknown rec IRQ type occurred, please report!\n"); | |
1da177e4 | 1215 | } |
d91c64c8 AM |
1216 | /* MPU401 has less critical IRQ requirements |
1217 | * than timer and playback/recording, right? */ | |
1da177e4 | 1218 | if (status & IRQ_MPU401) |
d91c64c8 | 1219 | { |
1da177e4 | 1220 | snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data, regs); |
d91c64c8 AM |
1221 | |
1222 | /* hmm, do we have to ack the IRQ here somehow? | |
1223 | * If so, then I don't know how... */ | |
1224 | snd_azf3328_dbgplay("azt3328: MPU401 IRQ\n"); | |
1225 | } | |
1226 | irq_count++; | |
1da177e4 LT |
1227 | return IRQ_HANDLED; |
1228 | } | |
1229 | ||
1230 | /*****************************************************************/ | |
1231 | ||
95de7766 | 1232 | static const struct snd_pcm_hardware snd_azf3328_playback = |
1da177e4 LT |
1233 | { |
1234 | /* FIXME!! Correct? */ | |
d91c64c8 AM |
1235 | .info = SNDRV_PCM_INFO_MMAP | |
1236 | SNDRV_PCM_INFO_INTERLEAVED | | |
1237 | SNDRV_PCM_INFO_MMAP_VALID, | |
1238 | .formats = SNDRV_PCM_FMTBIT_S8 | | |
1239 | SNDRV_PCM_FMTBIT_U8 | | |
1240 | SNDRV_PCM_FMTBIT_S16_LE | | |
1241 | SNDRV_PCM_FMTBIT_U16_LE, | |
1242 | .rates = SNDRV_PCM_RATE_5512 | | |
1243 | SNDRV_PCM_RATE_8000_48000 | | |
1244 | SNDRV_PCM_RATE_KNOT, | |
1245 | .rate_min = 4000, | |
1246 | .rate_max = 66200, | |
1da177e4 LT |
1247 | .channels_min = 1, |
1248 | .channels_max = 2, | |
1249 | .buffer_bytes_max = 65536, | |
1250 | .period_bytes_min = 64, | |
1251 | .period_bytes_max = 65536, | |
1252 | .periods_min = 1, | |
1253 | .periods_max = 1024, | |
1254 | /* FIXME: maybe that card actually has a FIFO? | |
1255 | * Hmm, it seems newer revisions do have one, but we still don't know | |
1256 | * its size... */ | |
1257 | .fifo_size = 0, | |
1258 | }; | |
1259 | ||
95de7766 | 1260 | static const struct snd_pcm_hardware snd_azf3328_capture = |
1da177e4 LT |
1261 | { |
1262 | /* FIXME */ | |
d91c64c8 AM |
1263 | .info = SNDRV_PCM_INFO_MMAP | |
1264 | SNDRV_PCM_INFO_INTERLEAVED | | |
1265 | SNDRV_PCM_INFO_MMAP_VALID, | |
1266 | .formats = SNDRV_PCM_FMTBIT_S8 | | |
1267 | SNDRV_PCM_FMTBIT_U8 | | |
1268 | SNDRV_PCM_FMTBIT_S16_LE | | |
1269 | SNDRV_PCM_FMTBIT_U16_LE, | |
1270 | .rates = SNDRV_PCM_RATE_5512 | | |
1271 | SNDRV_PCM_RATE_8000_48000 | | |
1272 | SNDRV_PCM_RATE_KNOT, | |
1273 | .rate_min = 4000, | |
1274 | .rate_max = 66200, | |
1da177e4 LT |
1275 | .channels_min = 1, |
1276 | .channels_max = 2, | |
1277 | .buffer_bytes_max = 65536, | |
1278 | .period_bytes_min = 64, | |
1279 | .period_bytes_max = 65536, | |
1280 | .periods_min = 1, | |
1281 | .periods_max = 1024, | |
1282 | .fifo_size = 0, | |
1283 | }; | |
1284 | ||
1285 | ||
1286 | static unsigned int snd_azf3328_fixed_rates[] = { | |
d91c64c8 AM |
1287 | 4000, 4800, 5512, 6620, 8000, 9600, 11025, 13240, 16000, 22050, 32000, |
1288 | 44100, 48000, 66200 }; | |
95de7766 | 1289 | static struct snd_pcm_hw_constraint_list snd_azf3328_hw_constraints_rates = { |
1da177e4 LT |
1290 | .count = ARRAY_SIZE(snd_azf3328_fixed_rates), |
1291 | .list = snd_azf3328_fixed_rates, | |
1292 | .mask = 0, | |
1293 | }; | |
1294 | ||
1295 | /*****************************************************************/ | |
1296 | ||
d91c64c8 | 1297 | static int |
95de7766 | 1298 | snd_azf3328_playback_open(struct snd_pcm_substream *substream) |
1da177e4 | 1299 | { |
95de7766 TI |
1300 | struct snd_azf3328 *chip = snd_pcm_substream_chip(substream); |
1301 | struct snd_pcm_runtime *runtime = substream->runtime; | |
1da177e4 LT |
1302 | |
1303 | snd_azf3328_dbgcallenter(); | |
1304 | chip->playback_substream = substream; | |
1305 | runtime->hw = snd_azf3328_playback; | |
1306 | snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, | |
1307 | &snd_azf3328_hw_constraints_rates); | |
1308 | snd_azf3328_dbgcallleave(); | |
1309 | return 0; | |
1310 | } | |
1311 | ||
d91c64c8 | 1312 | static int |
95de7766 | 1313 | snd_azf3328_capture_open(struct snd_pcm_substream *substream) |
1da177e4 | 1314 | { |
95de7766 TI |
1315 | struct snd_azf3328 *chip = snd_pcm_substream_chip(substream); |
1316 | struct snd_pcm_runtime *runtime = substream->runtime; | |
1da177e4 LT |
1317 | |
1318 | snd_azf3328_dbgcallenter(); | |
1319 | chip->capture_substream = substream; | |
1320 | runtime->hw = snd_azf3328_capture; | |
1321 | snd_pcm_hw_constraint_list(runtime, 0, SNDRV_PCM_HW_PARAM_RATE, | |
1322 | &snd_azf3328_hw_constraints_rates); | |
1323 | snd_azf3328_dbgcallleave(); | |
1324 | return 0; | |
1325 | } | |
1326 | ||
d91c64c8 | 1327 | static int |
95de7766 | 1328 | snd_azf3328_playback_close(struct snd_pcm_substream *substream) |
1da177e4 | 1329 | { |
95de7766 | 1330 | struct snd_azf3328 *chip = snd_pcm_substream_chip(substream); |
1da177e4 LT |
1331 | |
1332 | snd_azf3328_dbgcallenter(); | |
1333 | ||
1334 | chip->playback_substream = NULL; | |
1335 | snd_azf3328_dbgcallleave(); | |
1336 | return 0; | |
1337 | } | |
1338 | ||
d91c64c8 | 1339 | static int |
95de7766 | 1340 | snd_azf3328_capture_close(struct snd_pcm_substream *substream) |
1da177e4 | 1341 | { |
95de7766 | 1342 | struct snd_azf3328 *chip = snd_pcm_substream_chip(substream); |
1da177e4 LT |
1343 | |
1344 | snd_azf3328_dbgcallenter(); | |
1345 | chip->capture_substream = NULL; | |
1346 | snd_azf3328_dbgcallleave(); | |
1347 | return 0; | |
1348 | } | |
1349 | ||
1350 | /******************************************************************/ | |
1351 | ||
95de7766 | 1352 | static struct snd_pcm_ops snd_azf3328_playback_ops = { |
1da177e4 LT |
1353 | .open = snd_azf3328_playback_open, |
1354 | .close = snd_azf3328_playback_close, | |
1355 | .ioctl = snd_pcm_lib_ioctl, | |
1356 | .hw_params = snd_azf3328_hw_params, | |
1357 | .hw_free = snd_azf3328_hw_free, | |
1358 | .prepare = snd_azf3328_playback_prepare, | |
1359 | .trigger = snd_azf3328_playback_trigger, | |
1360 | .pointer = snd_azf3328_playback_pointer | |
1361 | }; | |
1362 | ||
95de7766 | 1363 | static struct snd_pcm_ops snd_azf3328_capture_ops = { |
1da177e4 LT |
1364 | .open = snd_azf3328_capture_open, |
1365 | .close = snd_azf3328_capture_close, | |
1366 | .ioctl = snd_pcm_lib_ioctl, | |
1367 | .hw_params = snd_azf3328_hw_params, | |
1368 | .hw_free = snd_azf3328_hw_free, | |
1369 | .prepare = snd_azf3328_capture_prepare, | |
1370 | .trigger = snd_azf3328_capture_trigger, | |
1371 | .pointer = snd_azf3328_capture_pointer | |
1372 | }; | |
1373 | ||
d91c64c8 | 1374 | static int __devinit |
95de7766 | 1375 | snd_azf3328_pcm(struct snd_azf3328 *chip, int device) |
1da177e4 | 1376 | { |
95de7766 | 1377 | struct snd_pcm *pcm; |
1da177e4 LT |
1378 | int err; |
1379 | ||
1380 | snd_azf3328_dbgcallenter(); | |
1381 | if ((err = snd_pcm_new(chip->card, "AZF3328 DSP", device, 1, 1, &pcm)) < 0) | |
1382 | return err; | |
1383 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_azf3328_playback_ops); | |
1384 | snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_azf3328_capture_ops); | |
1385 | ||
1386 | pcm->private_data = chip; | |
1da177e4 LT |
1387 | pcm->info_flags = 0; |
1388 | strcpy(pcm->name, chip->card->shortname); | |
1389 | chip->pcm = pcm; | |
1390 | ||
1391 | snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV, | |
1392 | snd_dma_pci_data(chip->pci), 64*1024, 64*1024); | |
1393 | ||
1394 | snd_azf3328_dbgcallleave(); | |
1395 | return 0; | |
1396 | } | |
1397 | ||
1398 | /******************************************************************/ | |
1399 | ||
1400 | #ifdef SUPPORT_JOYSTICK | |
d91c64c8 | 1401 | static int __devinit |
95de7766 | 1402 | snd_azf3328_config_joystick(struct snd_azf3328 *chip, int dev) |
1da177e4 LT |
1403 | { |
1404 | struct gameport *gp; | |
1405 | struct resource *r; | |
1406 | ||
1407 | if (!joystick[dev]) | |
1408 | return -ENODEV; | |
1409 | ||
1410 | if (!(r = request_region(0x200, 8, "AZF3328 gameport"))) { | |
1411 | printk(KERN_WARNING "azt3328: cannot reserve joystick ports\n"); | |
1412 | return -EBUSY; | |
1413 | } | |
1414 | ||
1415 | chip->gameport = gp = gameport_allocate_port(); | |
1416 | if (!gp) { | |
1417 | printk(KERN_ERR "azt3328: cannot allocate memory for gameport\n"); | |
b1d5776d | 1418 | release_and_free_resource(r); |
1da177e4 LT |
1419 | return -ENOMEM; |
1420 | } | |
1421 | ||
1422 | gameport_set_name(gp, "AZF3328 Gameport"); | |
1423 | gameport_set_phys(gp, "pci%s/gameport0", pci_name(chip->pci)); | |
1424 | gameport_set_dev_parent(gp, &chip->pci->dev); | |
1425 | gp->io = 0x200; | |
1426 | gameport_set_port_data(gp, r); | |
1427 | ||
d91c64c8 AM |
1428 | snd_azf3328_io2_outb(chip, IDX_IO2_LEGACY_ADDR, |
1429 | snd_azf3328_io2_inb(chip, IDX_IO2_LEGACY_ADDR) | LEGACY_JOY); | |
1da177e4 LT |
1430 | |
1431 | gameport_register_port(chip->gameport); | |
1432 | ||
1433 | return 0; | |
1434 | } | |
1435 | ||
d91c64c8 | 1436 | static void |
95de7766 | 1437 | snd_azf3328_free_joystick(struct snd_azf3328 *chip) |
1da177e4 LT |
1438 | { |
1439 | if (chip->gameport) { | |
1440 | struct resource *r = gameport_get_port_data(chip->gameport); | |
1441 | ||
1442 | gameport_unregister_port(chip->gameport); | |
1443 | chip->gameport = NULL; | |
1444 | /* disable gameport */ | |
d91c64c8 AM |
1445 | snd_azf3328_io2_outb(chip, IDX_IO2_LEGACY_ADDR, |
1446 | snd_azf3328_io2_inb(chip, IDX_IO2_LEGACY_ADDR) & ~LEGACY_JOY); | |
b1d5776d | 1447 | release_and_free_resource(r); |
1da177e4 LT |
1448 | } |
1449 | } | |
1450 | #else | |
d91c64c8 | 1451 | static inline int |
95de7766 | 1452 | snd_azf3328_config_joystick(struct snd_azf3328 *chip, int dev) { return -ENOSYS; } |
d91c64c8 | 1453 | static inline void |
95de7766 | 1454 | snd_azf3328_free_joystick(struct snd_azf3328 *chip) { } |
1da177e4 LT |
1455 | #endif |
1456 | ||
1457 | /******************************************************************/ | |
1458 | ||
d91c64c8 | 1459 | static int |
95de7766 | 1460 | snd_azf3328_free(struct snd_azf3328 *chip) |
1da177e4 LT |
1461 | { |
1462 | if (chip->irq < 0) | |
1463 | goto __end_hw; | |
1464 | ||
1465 | /* reset (close) mixer */ | |
1466 | snd_azf3328_mixer_set_mute(chip, IDX_MIXER_PLAY_MASTER, 1); /* first mute master volume */ | |
d91c64c8 | 1467 | snd_azf3328_mixer_outw(chip, IDX_MIXER_RESET, 0x0000); |
1da177e4 | 1468 | |
d91c64c8 AM |
1469 | /* interrupt setup - mask everything (FIXME!) */ |
1470 | /* well, at least we know how to disable the timer IRQ */ | |
1471 | snd_azf3328_codec_outb(chip, IDX_IO_TIMER_VALUE + 3, 0x00); | |
1da177e4 LT |
1472 | |
1473 | synchronize_irq(chip->irq); | |
d91c64c8 | 1474 | __end_hw: |
1da177e4 LT |
1475 | snd_azf3328_free_joystick(chip); |
1476 | if (chip->irq >= 0) | |
1477 | free_irq(chip->irq, (void *)chip); | |
1478 | pci_release_regions(chip->pci); | |
1479 | pci_disable_device(chip->pci); | |
1480 | ||
1481 | kfree(chip); | |
1482 | return 0; | |
1483 | } | |
1484 | ||
d91c64c8 | 1485 | static int |
95de7766 | 1486 | snd_azf3328_dev_free(struct snd_device *device) |
1da177e4 | 1487 | { |
95de7766 | 1488 | struct snd_azf3328 *chip = device->device_data; |
1da177e4 LT |
1489 | return snd_azf3328_free(chip); |
1490 | } | |
1491 | ||
d91c64c8 AM |
1492 | /******************************************************************/ |
1493 | ||
1494 | /*** NOTE: the physical timer resolution actually is 1024000 ticks per second, | |
1495 | *** but announcing those attributes to user-space would make programs | |
1496 | *** configure the timer to a 1 tick value, resulting in an absolutely fatal | |
1497 | *** timer IRQ storm. | |
1498 | *** Thus I chose to announce a down-scaled virtual timer to the outside and | |
1499 | *** calculate real timer countdown values internally. | |
1500 | *** (the scale factor can be set via module parameter "seqtimer_scaling"). | |
1501 | ***/ | |
1502 | ||
1503 | static int | |
95de7766 | 1504 | snd_azf3328_timer_start(struct snd_timer *timer) |
d91c64c8 | 1505 | { |
95de7766 | 1506 | struct snd_azf3328 *chip; |
d91c64c8 AM |
1507 | unsigned long flags; |
1508 | unsigned int delay; | |
1509 | ||
1510 | snd_azf3328_dbgcallenter(); | |
1511 | chip = snd_timer_chip(timer); | |
1512 | delay = ((timer->sticks * seqtimer_scaling) - 1) & TIMER_VALUE_MASK; | |
1513 | if (delay < 49) | |
1514 | { | |
1515 | /* uhoh, that's not good, since user-space won't know about | |
1516 | * this timing tweak | |
1517 | * (we need to do it to avoid a lockup, though) */ | |
1518 | ||
1519 | snd_azf3328_dbgtimer("delay was too low (%d)!\n", delay); | |
1520 | delay = 49; /* minimum time is 49 ticks */ | |
1521 | } | |
1522 | snd_azf3328_dbgtimer("setting timer countdown value %d, add COUNTDOWN|IRQ\n", delay); | |
1523 | delay |= TIMER_ENABLE_COUNTDOWN | TIMER_ENABLE_IRQ; | |
1524 | spin_lock_irqsave(&chip->reg_lock, flags); | |
1525 | snd_azf3328_codec_outl(chip, IDX_IO_TIMER_VALUE, delay); | |
1526 | spin_unlock_irqrestore(&chip->reg_lock, flags); | |
1527 | snd_azf3328_dbgcallleave(); | |
1528 | return 0; | |
1529 | } | |
1530 | ||
1531 | static int | |
95de7766 | 1532 | snd_azf3328_timer_stop(struct snd_timer *timer) |
d91c64c8 | 1533 | { |
95de7766 | 1534 | struct snd_azf3328 *chip; |
d91c64c8 AM |
1535 | unsigned long flags; |
1536 | ||
1537 | snd_azf3328_dbgcallenter(); | |
1538 | chip = snd_timer_chip(timer); | |
1539 | spin_lock_irqsave(&chip->reg_lock, flags); | |
1540 | /* disable timer countdown and interrupt */ | |
1541 | /* FIXME: should we write TIMER_ACK_IRQ here? */ | |
1542 | snd_azf3328_codec_outb(chip, IDX_IO_TIMER_VALUE + 3, 0); | |
1543 | spin_unlock_irqrestore(&chip->reg_lock, flags); | |
1544 | snd_azf3328_dbgcallleave(); | |
1545 | return 0; | |
1546 | } | |
1547 | ||
1548 | ||
1549 | static int | |
95de7766 | 1550 | snd_azf3328_timer_precise_resolution(struct snd_timer *timer, |
d91c64c8 AM |
1551 | unsigned long *num, unsigned long *den) |
1552 | { | |
1553 | snd_azf3328_dbgcallenter(); | |
1554 | *num = 1; | |
1555 | *den = 1024000 / seqtimer_scaling; | |
1556 | snd_azf3328_dbgcallleave(); | |
1557 | return 0; | |
1558 | } | |
1559 | ||
95de7766 | 1560 | static struct snd_timer_hardware snd_azf3328_timer_hw = { |
d91c64c8 AM |
1561 | .flags = SNDRV_TIMER_HW_AUTO, |
1562 | .resolution = 977, /* 1000000/1024000 = 0.9765625us */ | |
1563 | .ticks = 1024000, /* max tick count, defined by the value register; actually it's not 1024000, but 1048576, but we don't care */ | |
1564 | .start = snd_azf3328_timer_start, | |
1565 | .stop = snd_azf3328_timer_stop, | |
1566 | .precise_resolution = snd_azf3328_timer_precise_resolution, | |
1567 | }; | |
1568 | ||
1569 | static int __devinit | |
95de7766 | 1570 | snd_azf3328_timer(struct snd_azf3328 *chip, int device) |
d91c64c8 | 1571 | { |
95de7766 TI |
1572 | struct snd_timer *timer = NULL; |
1573 | struct snd_timer_id tid; | |
d91c64c8 AM |
1574 | int err; |
1575 | ||
1576 | snd_azf3328_dbgcallenter(); | |
1577 | tid.dev_class = SNDRV_TIMER_CLASS_CARD; | |
1578 | tid.dev_sclass = SNDRV_TIMER_SCLASS_NONE; | |
1579 | tid.card = chip->card->number; | |
1580 | tid.device = device; | |
1581 | tid.subdevice = 0; | |
1582 | ||
1583 | snd_azf3328_timer_hw.resolution *= seqtimer_scaling; | |
1584 | snd_azf3328_timer_hw.ticks /= seqtimer_scaling; | |
1585 | if ((err = snd_timer_new(chip->card, "AZF3328", &tid, &timer)) < 0) { | |
1586 | goto out; | |
1587 | } | |
1588 | ||
1589 | strcpy(timer->name, "AZF3328 timer"); | |
1590 | timer->private_data = chip; | |
1591 | timer->hw = snd_azf3328_timer_hw; | |
1592 | ||
1593 | chip->timer = timer; | |
1594 | ||
1595 | err = 0; | |
1596 | ||
1597 | out: | |
1598 | snd_azf3328_dbgcallleave(); | |
1599 | return err; | |
1600 | } | |
1601 | ||
1602 | /******************************************************************/ | |
1603 | ||
1da177e4 LT |
1604 | #if 0 |
1605 | /* check whether a bit can be modified */ | |
d91c64c8 AM |
1606 | static void |
1607 | snd_azf3328_test_bit(unsigned int reg, int bit) | |
1da177e4 LT |
1608 | { |
1609 | unsigned char val, valoff, valon; | |
1610 | ||
1611 | val = inb(reg); | |
1612 | ||
1613 | outb(val & ~(1 << bit), reg); | |
1614 | valoff = inb(reg); | |
1615 | ||
1616 | outb(val|(1 << bit), reg); | |
1617 | valon = inb(reg); | |
1618 | ||
1619 | outb(val, reg); | |
1620 | ||
1621 | printk(KERN_ERR "reg %04x bit %d: %02x %02x %02x\n", reg, bit, val, valoff, valon); | |
1622 | } | |
1623 | #endif | |
1624 | ||
d91c64c8 | 1625 | static void |
95de7766 | 1626 | snd_azf3328_debug_show_ports(const struct snd_azf3328 *chip) |
d91c64c8 AM |
1627 | { |
1628 | #if DEBUG_MISC | |
1629 | u16 tmp; | |
1630 | ||
1631 | snd_azf3328_dbgmisc("codec_port 0x%lx, io2_port 0x%lx, mpu_port 0x%lx, synth_port 0x%lx, mixer_port 0x%lx, irq %d\n", chip->codec_port, chip->io2_port, chip->mpu_port, chip->synth_port, chip->mixer_port, chip->irq); | |
1632 | ||
1633 | snd_azf3328_dbgmisc("io2 %02x %02x %02x %02x %02x %02x\n", snd_azf3328_io2_inb(chip, 0), snd_azf3328_io2_inb(chip, 1), snd_azf3328_io2_inb(chip, 2), snd_azf3328_io2_inb(chip, 3), snd_azf3328_io2_inb(chip, 4), snd_azf3328_io2_inb(chip, 5)); | |
1634 | ||
1635 | for (tmp=0; tmp <= 0x01; tmp += 1) | |
1636 | snd_azf3328_dbgmisc("0x%02x: opl 0x%04x, mpu300 0x%04x, mpu310 0x%04x, mpu320 0x%04x, mpu330 0x%04x\n", tmp, inb(0x388 + tmp), inb(0x300 + tmp), inb(0x310 + tmp), inb(0x320 + tmp), inb(0x330 + tmp)); | |
1637 | ||
1638 | for (tmp = 0; tmp <= 0x6E; tmp += 2) | |
1639 | snd_azf3328_dbgmisc("0x%02x: 0x%04x\n", tmp, snd_azf3328_codec_inb(chip, tmp)); | |
1640 | #endif | |
1641 | } | |
1642 | ||
1643 | static int __devinit | |
95de7766 | 1644 | snd_azf3328_create(struct snd_card *card, |
1da177e4 LT |
1645 | struct pci_dev *pci, |
1646 | unsigned long device_type, | |
95de7766 | 1647 | struct snd_azf3328 ** rchip) |
1da177e4 | 1648 | { |
95de7766 | 1649 | struct snd_azf3328 *chip; |
1da177e4 | 1650 | int err; |
95de7766 | 1651 | static struct snd_device_ops ops = { |
1da177e4 LT |
1652 | .dev_free = snd_azf3328_dev_free, |
1653 | }; | |
1654 | u16 tmp; | |
1655 | ||
1656 | *rchip = NULL; | |
1657 | ||
1658 | if ((err = pci_enable_device(pci)) < 0) | |
1659 | return err; | |
1660 | ||
e560d8d8 | 1661 | chip = kzalloc(sizeof(*chip), GFP_KERNEL); |
1da177e4 | 1662 | if (chip == NULL) { |
d91c64c8 AM |
1663 | err = -ENOMEM; |
1664 | goto out_err; | |
1da177e4 LT |
1665 | } |
1666 | spin_lock_init(&chip->reg_lock); | |
1667 | chip->card = card; | |
1668 | chip->pci = pci; | |
1669 | chip->irq = -1; | |
1670 | ||
1671 | /* check if we can restrict PCI DMA transfers to 24 bits */ | |
1672 | if (pci_set_dma_mask(pci, 0x00ffffff) < 0 || | |
1673 | pci_set_consistent_dma_mask(pci, 0x00ffffff) < 0) { | |
99b359ba | 1674 | snd_printk(KERN_ERR "architecture does not support 24bit PCI busmaster DMA\n"); |
d91c64c8 AM |
1675 | err = -ENXIO; |
1676 | goto out_err; | |
1da177e4 LT |
1677 | } |
1678 | ||
1679 | if ((err = pci_request_regions(pci, "Aztech AZF3328")) < 0) { | |
d91c64c8 | 1680 | goto out_err; |
1da177e4 LT |
1681 | } |
1682 | ||
1683 | chip->codec_port = pci_resource_start(pci, 0); | |
d91c64c8 AM |
1684 | chip->io2_port = pci_resource_start(pci, 1); |
1685 | chip->mpu_port = pci_resource_start(pci, 2); | |
1da177e4 LT |
1686 | chip->synth_port = pci_resource_start(pci, 3); |
1687 | chip->mixer_port = pci_resource_start(pci, 4); | |
1688 | ||
1689 | if (request_irq(pci->irq, snd_azf3328_interrupt, SA_INTERRUPT|SA_SHIRQ, card->shortname, (void *)chip)) { | |
99b359ba | 1690 | snd_printk(KERN_ERR "unable to grab IRQ %d\n", pci->irq); |
d91c64c8 AM |
1691 | err = -EBUSY; |
1692 | goto out_err; | |
1da177e4 LT |
1693 | } |
1694 | chip->irq = pci->irq; | |
1695 | pci_set_master(pci); | |
1696 | synchronize_irq(chip->irq); | |
1697 | ||
d91c64c8 AM |
1698 | snd_azf3328_debug_show_ports(chip); |
1699 | ||
1da177e4 | 1700 | if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) { |
d91c64c8 | 1701 | goto out_err; |
1da177e4 LT |
1702 | } |
1703 | ||
1704 | /* create mixer interface & switches */ | |
1705 | if ((err = snd_azf3328_mixer_new(chip)) < 0) | |
d91c64c8 | 1706 | goto out_err; |
1da177e4 LT |
1707 | |
1708 | #if 0 | |
1709 | /* set very low bitrate to reduce noise and power consumption? */ | |
1710 | snd_azf3328_setfmt(chip, IDX_IO_PLAY_SOUNDFORMAT, 5512, 8, 1); | |
1711 | #endif | |
1712 | ||
1713 | /* standard chip init stuff */ | |
d91c64c8 AM |
1714 | /* default IRQ init value */ |
1715 | tmp = DMA_PLAY_SOMETHING2|DMA_EPILOGUE_SOMETHING|DMA_SOMETHING_ELSE; | |
1da177e4 | 1716 | |
d91c64c8 AM |
1717 | spin_lock_irq(&chip->reg_lock); |
1718 | snd_azf3328_codec_outb(chip, IDX_IO_PLAY_FLAGS, tmp); | |
1719 | snd_azf3328_codec_outb(chip, IDX_IO_REC_FLAGS, tmp); | |
1720 | snd_azf3328_codec_outb(chip, IDX_IO_SOMETHING_FLAGS, tmp); | |
1721 | snd_azf3328_codec_outb(chip, IDX_IO_TIMER_VALUE + 3, 0x00); /* disable timer */ | |
1da177e4 LT |
1722 | spin_unlock_irq(&chip->reg_lock); |
1723 | ||
1724 | snd_card_set_dev(card, &pci->dev); | |
1725 | ||
1726 | *rchip = chip; | |
d91c64c8 AM |
1727 | |
1728 | err = 0; | |
1729 | goto out; | |
1730 | ||
1731 | out_err: | |
1732 | if (chip) | |
1733 | snd_azf3328_free(chip); | |
1734 | pci_disable_device(pci); | |
1735 | ||
1736 | out: | |
1737 | return err; | |
1da177e4 LT |
1738 | } |
1739 | ||
d91c64c8 AM |
1740 | static int __devinit |
1741 | snd_azf3328_probe(struct pci_dev *pci, const struct pci_device_id *pci_id) | |
1da177e4 LT |
1742 | { |
1743 | static int dev; | |
95de7766 TI |
1744 | struct snd_card *card; |
1745 | struct snd_azf3328 *chip; | |
1746 | struct snd_opl3 *opl3; | |
1da177e4 LT |
1747 | int err; |
1748 | ||
1749 | snd_azf3328_dbgcallenter(); | |
1750 | if (dev >= SNDRV_CARDS) | |
1751 | return -ENODEV; | |
1752 | if (!enable[dev]) { | |
1753 | dev++; | |
1754 | return -ENOENT; | |
1755 | } | |
1756 | ||
1757 | card = snd_card_new(index[dev], id[dev], THIS_MODULE, 0 ); | |
1758 | if (card == NULL) | |
1759 | return -ENOMEM; | |
1760 | ||
1761 | strcpy(card->driver, "AZF3328"); | |
1762 | strcpy(card->shortname, "Aztech AZF3328 (PCI168)"); | |
1763 | ||
1764 | if ((err = snd_azf3328_create(card, pci, pci_id->driver_data, &chip)) < 0) { | |
d91c64c8 | 1765 | goto out_err; |
1da177e4 LT |
1766 | } |
1767 | ||
1768 | if ((err = snd_mpu401_uart_new( card, 0, MPU401_HW_MPU401, | |
1769 | chip->mpu_port, 1, pci->irq, 0, | |
1770 | &chip->rmidi)) < 0) { | |
99b359ba | 1771 | snd_printk(KERN_ERR "azf3328: no MPU-401 device at 0x%lx?\n", chip->mpu_port); |
d91c64c8 AM |
1772 | goto out_err; |
1773 | } | |
1774 | ||
1775 | if ((err = snd_azf3328_timer(chip, 0)) < 0) { | |
1776 | goto out_err; | |
1da177e4 LT |
1777 | } |
1778 | ||
1779 | if ((err = snd_azf3328_pcm(chip, 0)) < 0) { | |
d91c64c8 | 1780 | goto out_err; |
1da177e4 LT |
1781 | } |
1782 | ||
1783 | if (snd_opl3_create(card, chip->synth_port, chip->synth_port+2, | |
1784 | OPL3_HW_AUTO, 1, &opl3) < 0) { | |
99b359ba | 1785 | snd_printk(KERN_ERR "azf3328: no OPL3 device at 0x%lx-0x%lx?\n", |
1da177e4 LT |
1786 | chip->synth_port, chip->synth_port+2 ); |
1787 | } else { | |
1788 | if ((err = snd_opl3_hwdep_new(opl3, 0, 1, NULL)) < 0) { | |
d91c64c8 | 1789 | goto out_err; |
1da177e4 LT |
1790 | } |
1791 | } | |
1792 | ||
1da177e4 LT |
1793 | sprintf(card->longname, "%s at 0x%lx, irq %i", |
1794 | card->shortname, chip->codec_port, chip->irq); | |
1795 | ||
1796 | if ((err = snd_card_register(card)) < 0) { | |
d91c64c8 | 1797 | goto out_err; |
1da177e4 LT |
1798 | } |
1799 | ||
1800 | #ifdef MODULE | |
1801 | printk( | |
d91c64c8 AM |
1802 | "azt3328: Sound driver for Aztech AZF3328-based soundcards such as PCI168\n" |
1803 | "azt3328: (hardware was completely undocumented - ZERO support from Aztech).\n" | |
1804 | "azt3328: Feel free to contact andi AT lisas.de for bug reports etc.!\n" | |
1805 | "azt3328: User-scalable sequencer timer set to %dHz (1024000Hz / %d).\n", | |
1806 | 1024000 / seqtimer_scaling, seqtimer_scaling); | |
1da177e4 LT |
1807 | #endif |
1808 | ||
1809 | if (snd_azf3328_config_joystick(chip, dev) < 0) | |
d91c64c8 AM |
1810 | snd_azf3328_io2_outb(chip, IDX_IO2_LEGACY_ADDR, |
1811 | snd_azf3328_io2_inb(chip, IDX_IO2_LEGACY_ADDR) & ~LEGACY_JOY); | |
1da177e4 LT |
1812 | |
1813 | pci_set_drvdata(pci, card); | |
1814 | dev++; | |
1815 | ||
d91c64c8 AM |
1816 | err = 0; |
1817 | goto out; | |
1818 | ||
1819 | out_err: | |
1820 | snd_card_free(card); | |
1821 | ||
1822 | out: | |
1da177e4 | 1823 | snd_azf3328_dbgcallleave(); |
d91c64c8 | 1824 | return err; |
1da177e4 LT |
1825 | } |
1826 | ||
d91c64c8 AM |
1827 | static void __devexit |
1828 | snd_azf3328_remove(struct pci_dev *pci) | |
1da177e4 LT |
1829 | { |
1830 | snd_azf3328_dbgcallenter(); | |
1831 | snd_card_free(pci_get_drvdata(pci)); | |
1832 | pci_set_drvdata(pci, NULL); | |
1833 | snd_azf3328_dbgcallleave(); | |
1834 | } | |
1835 | ||
1836 | static struct pci_driver driver = { | |
1837 | .name = "AZF3328", | |
1838 | .id_table = snd_azf3328_ids, | |
1839 | .probe = snd_azf3328_probe, | |
1840 | .remove = __devexit_p(snd_azf3328_remove), | |
1841 | }; | |
1842 | ||
d91c64c8 AM |
1843 | static int __init |
1844 | alsa_card_azf3328_init(void) | |
1da177e4 LT |
1845 | { |
1846 | int err; | |
1847 | snd_azf3328_dbgcallenter(); | |
01d25d46 | 1848 | err = pci_register_driver(&driver); |
1da177e4 LT |
1849 | snd_azf3328_dbgcallleave(); |
1850 | return err; | |
1851 | } | |
1852 | ||
d91c64c8 AM |
1853 | static void __exit |
1854 | alsa_card_azf3328_exit(void) | |
1da177e4 LT |
1855 | { |
1856 | snd_azf3328_dbgcallenter(); | |
1857 | pci_unregister_driver(&driver); | |
1858 | snd_azf3328_dbgcallleave(); | |
1859 | } | |
1860 | ||
1861 | module_init(alsa_card_azf3328_init) | |
1862 | module_exit(alsa_card_azf3328_exit) |