]> git.proxmox.com Git - mirror_ubuntu-bionic-kernel.git/blame - sound/soc/codecs/rt5640.c
projects / mirror_ubuntu-bionic-kernel.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
ASoC: add RT5640 CODEC driver
[mirror_ubuntu-bionic-kernel.git] / sound / soc / codecs / rt5640.c
CommitLineData
997b0520
BL		 1/*
2 * rt5640.c -- RT5640 ALSA SoC audio codec driver
3 *
4 * Copyright 2011 Realtek Semiconductor Corp.
5 * Author: Johnny Hsu <johnnyhsu@realtek.com>
6 * Copyright (c) 2013, NVIDIA CORPORATION. All rights reserved.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include <linux/module.h>
14#include <linux/moduleparam.h>
15#include <linux/init.h>
16#include <linux/delay.h>
17#include <linux/pm.h>
18#include <linux/gpio.h>
19#include <linux/i2c.h>
20#include <linux/regmap.h>
21#include <linux/platform_device.h>
22#include <linux/spi/spi.h>
23#include <sound/core.h>
24#include <sound/pcm.h>
25#include <sound/pcm_params.h>
26#include <sound/soc.h>
27#include <sound/soc-dapm.h>
28#include <sound/initval.h>
29#include <sound/tlv.h>
30
31#include "rt5640.h"
32
33#define RT5640_DEVICE_ID 0x6231
34
35#define RT5640_PR_RANGE_BASE (0xff + 1)
36#define RT5640_PR_SPACING 0x100
37
38#define RT5640_PR_BASE (RT5640_PR_RANGE_BASE + (0 * RT5640_PR_SPACING))
39
40static const struct regmap_range_cfg rt5640_ranges[] = {
41 { .name = "PR", .range_min = RT5640_PR_BASE,
42 .range_max = RT5640_PR_BASE + 0xb4,
43 .selector_reg = RT5640_PRIV_INDEX,
44 .selector_mask = 0xff,
45 .selector_shift = 0x0,
46 .window_start = RT5640_PRIV_DATA,
47 .window_len = 0x1, },
48};
49
50static struct reg_default init_list[] = {
51 {RT5640_PR_BASE + 0x3d, 0x3600},
52 {RT5640_PR_BASE + 0x1c, 0x0D21},
53 {RT5640_PR_BASE + 0x1b, 0x0000},
54 {RT5640_PR_BASE + 0x12, 0x0aa8},
55 {RT5640_PR_BASE + 0x14, 0x0aaa},
56 {RT5640_PR_BASE + 0x20, 0x6110},
57 {RT5640_PR_BASE + 0x21, 0xe0e0},
58 {RT5640_PR_BASE + 0x23, 0x1804},
59};
60#define RT5640_INIT_REG_LEN ARRAY_SIZE(init_list)
61
62static const struct reg_default rt5640_reg[RT5640_VENDOR_ID2 + 1] = {
63 { 0x00, 0x000e },
64 { 0x01, 0xc8c8 },
65 { 0x02, 0xc8c8 },
66 { 0x03, 0xc8c8 },
67 { 0x04, 0x8000 },
68 { 0x0d, 0x0000 },
69 { 0x0e, 0x0000 },
70 { 0x0f, 0x0808 },
71 { 0x19, 0xafaf },
72 { 0x1a, 0xafaf },
73 { 0x1b, 0x0000 },
74 { 0x1c, 0x2f2f },
75 { 0x1d, 0x2f2f },
76 { 0x1e, 0x0000 },
77 { 0x27, 0x7060 },
78 { 0x28, 0x7070 },
79 { 0x29, 0x8080 },
80 { 0x2a, 0x5454 },
81 { 0x2b, 0x5454 },
82 { 0x2c, 0xaa00 },
83 { 0x2d, 0x0000 },
84 { 0x2e, 0xa000 },
85 { 0x2f, 0x0000 },
86 { 0x3b, 0x0000 },
87 { 0x3c, 0x007f },
88 { 0x3d, 0x0000 },
89 { 0x3e, 0x007f },
90 { 0x45, 0xe000 },
91 { 0x46, 0x003e },
92 { 0x47, 0x003e },
93 { 0x48, 0xf800 },
94 { 0x49, 0x3800 },
95 { 0x4a, 0x0004 },
96 { 0x4c, 0xfc00 },
97 { 0x4d, 0x0000 },
98 { 0x4f, 0x01ff },
99 { 0x50, 0x0000 },
100 { 0x51, 0x0000 },
101 { 0x52, 0x01ff },
102 { 0x53, 0xf000 },
103 { 0x61, 0x0000 },
104 { 0x62, 0x0000 },
105 { 0x63, 0x00c0 },
106 { 0x64, 0x0000 },
107 { 0x65, 0x0000 },
108 { 0x66, 0x0000 },
109 { 0x6a, 0x0000 },
110 { 0x6c, 0x0000 },
111 { 0x70, 0x8000 },
112 { 0x71, 0x8000 },
113 { 0x72, 0x8000 },
114 { 0x73, 0x1114 },
115 { 0x74, 0x0c00 },
116 { 0x75, 0x1d00 },
117 { 0x80, 0x0000 },
118 { 0x81, 0x0000 },
119 { 0x82, 0x0000 },
120 { 0x83, 0x0000 },
121 { 0x84, 0x0000 },
122 { 0x85, 0x0008 },
123 { 0x89, 0x0000 },
124 { 0x8a, 0x0000 },
125 { 0x8b, 0x0600 },
126 { 0x8c, 0x0228 },
127 { 0x8d, 0xa000 },
128 { 0x8e, 0x0004 },
129 { 0x8f, 0x1100 },
130 { 0x90, 0x0646 },
131 { 0x91, 0x0c00 },
132 { 0x92, 0x0000 },
133 { 0x93, 0x3000 },
134 { 0xb0, 0x2080 },
135 { 0xb1, 0x0000 },
136 { 0xb4, 0x2206 },
137 { 0xb5, 0x1f00 },
138 { 0xb6, 0x0000 },
139 { 0xb8, 0x034b },
140 { 0xb9, 0x0066 },
141 { 0xba, 0x000b },
142 { 0xbb, 0x0000 },
143 { 0xbc, 0x0000 },
144 { 0xbd, 0x0000 },
145 { 0xbe, 0x0000 },
146 { 0xbf, 0x0000 },
147 { 0xc0, 0x0400 },
148 { 0xc2, 0x0000 },
149 { 0xc4, 0x0000 },
150 { 0xc5, 0x0000 },
151 { 0xc6, 0x2000 },
152 { 0xc8, 0x0000 },
153 { 0xc9, 0x0000 },
154 { 0xca, 0x0000 },
155 { 0xcb, 0x0000 },
156 { 0xcc, 0x0000 },
157 { 0xcf, 0x0013 },
158 { 0xd0, 0x0680 },
159 { 0xd1, 0x1c17 },
160 { 0xd2, 0x8c00 },
161 { 0xd3, 0xaa20 },
162 { 0xd6, 0x0400 },
163 { 0xd9, 0x0809 },
164 { 0xfe, 0x10ec },
165 { 0xff, 0x6231 },
166};
167
168static int rt5640_reset(struct snd_soc_codec *codec)
169{
170 return snd_soc_write(codec, RT5640_RESET, 0);
171}
172
173static bool rt5640_volatile_register(struct device *dev, unsigned int reg)
174{
175 int i;
176
177 for (i = 0; i < ARRAY_SIZE(rt5640_ranges); i++)
178 if ((reg >= rt5640_ranges[i].window_start &&
179 reg <= rt5640_ranges[i].window_start +
180 rt5640_ranges[i].window_len) ||
181 (reg >= rt5640_ranges[i].range_min &&
182 reg <= rt5640_ranges[i].range_max))
183 return true;
184
185 switch (reg) {
186 case RT5640_RESET:
187 case RT5640_ASRC_5:
188 case RT5640_EQ_CTRL1:
189 case RT5640_DRC_AGC_1:
190 case RT5640_ANC_CTRL1:
191 case RT5640_IRQ_CTRL2:
192 case RT5640_INT_IRQ_ST:
193 case RT5640_DSP_CTRL2:
194 case RT5640_DSP_CTRL3:
195 case RT5640_PRIV_INDEX:
196 case RT5640_PRIV_DATA:
197 case RT5640_PGM_REG_ARR1:
198 case RT5640_PGM_REG_ARR3:
199 case RT5640_VENDOR_ID:
200 case RT5640_VENDOR_ID1:
201 case RT5640_VENDOR_ID2:
202 return true;
203 default:
204 return false;
205 }
206}
207
208static bool rt5640_readable_register(struct device *dev, unsigned int reg)
209{
210 int i;
211
212 for (i = 0; i < ARRAY_SIZE(rt5640_ranges); i++)
213 if ((reg >= rt5640_ranges[i].window_start &&
214 reg <= rt5640_ranges[i].window_start +
215 rt5640_ranges[i].window_len) ||
216 (reg >= rt5640_ranges[i].range_min &&
217 reg <= rt5640_ranges[i].range_max))
218 return true;
219
220 switch (reg) {
221 case RT5640_RESET:
222 case RT5640_SPK_VOL:
223 case RT5640_HP_VOL:
224 case RT5640_OUTPUT:
225 case RT5640_MONO_OUT:
226 case RT5640_IN1_IN2:
227 case RT5640_IN3_IN4:
228 case RT5640_INL_INR_VOL:
229 case RT5640_DAC1_DIG_VOL:
230 case RT5640_DAC2_DIG_VOL:
231 case RT5640_DAC2_CTRL:
232 case RT5640_ADC_DIG_VOL:
233 case RT5640_ADC_DATA:
234 case RT5640_ADC_BST_VOL:
235 case RT5640_STO_ADC_MIXER:
236 case RT5640_MONO_ADC_MIXER:
237 case RT5640_AD_DA_MIXER:
238 case RT5640_STO_DAC_MIXER:
239 case RT5640_MONO_DAC_MIXER:
240 case RT5640_DIG_MIXER:
241 case RT5640_DSP_PATH1:
242 case RT5640_DSP_PATH2:
243 case RT5640_DIG_INF_DATA:
244 case RT5640_REC_L1_MIXER:
245 case RT5640_REC_L2_MIXER:
246 case RT5640_REC_R1_MIXER:
247 case RT5640_REC_R2_MIXER:
248 case RT5640_HPO_MIXER:
249 case RT5640_SPK_L_MIXER:
250 case RT5640_SPK_R_MIXER:
251 case RT5640_SPO_L_MIXER:
252 case RT5640_SPO_R_MIXER:
253 case RT5640_SPO_CLSD_RATIO:
254 case RT5640_MONO_MIXER:
255 case RT5640_OUT_L1_MIXER:
256 case RT5640_OUT_L2_MIXER:
257 case RT5640_OUT_L3_MIXER:
258 case RT5640_OUT_R1_MIXER:
259 case RT5640_OUT_R2_MIXER:
260 case RT5640_OUT_R3_MIXER:
261 case RT5640_LOUT_MIXER:
262 case RT5640_PWR_DIG1:
263 case RT5640_PWR_DIG2:
264 case RT5640_PWR_ANLG1:
265 case RT5640_PWR_ANLG2:
266 case RT5640_PWR_MIXER:
267 case RT5640_PWR_VOL:
268 case RT5640_PRIV_INDEX:
269 case RT5640_PRIV_DATA:
270 case RT5640_I2S1_SDP:
271 case RT5640_I2S2_SDP:
272 case RT5640_ADDA_CLK1:
273 case RT5640_ADDA_CLK2:
274 case RT5640_DMIC:
275 case RT5640_GLB_CLK:
276 case RT5640_PLL_CTRL1:
277 case RT5640_PLL_CTRL2:
278 case RT5640_ASRC_1:
279 case RT5640_ASRC_2:
280 case RT5640_ASRC_3:
281 case RT5640_ASRC_4:
282 case RT5640_ASRC_5:
283 case RT5640_HP_OVCD:
284 case RT5640_CLS_D_OVCD:
285 case RT5640_CLS_D_OUT:
286 case RT5640_DEPOP_M1:
287 case RT5640_DEPOP_M2:
288 case RT5640_DEPOP_M3:
289 case RT5640_CHARGE_PUMP:
290 case RT5640_PV_DET_SPK_G:
291 case RT5640_MICBIAS:
292 case RT5640_EQ_CTRL1:
293 case RT5640_EQ_CTRL2:
294 case RT5640_WIND_FILTER:
295 case RT5640_DRC_AGC_1:
296 case RT5640_DRC_AGC_2:
297 case RT5640_DRC_AGC_3:
298 case RT5640_SVOL_ZC:
299 case RT5640_ANC_CTRL1:
300 case RT5640_ANC_CTRL2:
301 case RT5640_ANC_CTRL3:
302 case RT5640_JD_CTRL:
303 case RT5640_ANC_JD:
304 case RT5640_IRQ_CTRL1:
305 case RT5640_IRQ_CTRL2:
306 case RT5640_INT_IRQ_ST:
307 case RT5640_GPIO_CTRL1:
308 case RT5640_GPIO_CTRL2:
309 case RT5640_GPIO_CTRL3:
310 case RT5640_DSP_CTRL1:
311 case RT5640_DSP_CTRL2:
312 case RT5640_DSP_CTRL3:
313 case RT5640_DSP_CTRL4:
314 case RT5640_PGM_REG_ARR1:
315 case RT5640_PGM_REG_ARR2:
316 case RT5640_PGM_REG_ARR3:
317 case RT5640_PGM_REG_ARR4:
318 case RT5640_PGM_REG_ARR5:
319 case RT5640_SCB_FUNC:
320 case RT5640_SCB_CTRL:
321 case RT5640_BASE_BACK:
322 case RT5640_MP3_PLUS1:
323 case RT5640_MP3_PLUS2:
324 case RT5640_3D_HP:
325 case RT5640_ADJ_HPF:
326 case RT5640_HP_CALIB_AMP_DET:
327 case RT5640_HP_CALIB2:
328 case RT5640_SV_ZCD1:
329 case RT5640_SV_ZCD2:
330 case RT5640_DUMMY1:
331 case RT5640_DUMMY2:
332 case RT5640_DUMMY3:
333 case RT5640_VENDOR_ID:
334 case RT5640_VENDOR_ID1:
335 case RT5640_VENDOR_ID2:
336 return true;
337 default:
338 return false;
339 }
340}
341
342static const DECLARE_TLV_DB_SCALE(out_vol_tlv, -4650, 150, 0);
343static const DECLARE_TLV_DB_SCALE(dac_vol_tlv, -65625, 375, 0);
344static const DECLARE_TLV_DB_SCALE(in_vol_tlv, -3450, 150, 0);
345static const DECLARE_TLV_DB_SCALE(adc_vol_tlv, -17625, 375, 0);
346static const DECLARE_TLV_DB_SCALE(adc_bst_tlv, 0, 1200, 0);
347
348/* {0, +20, +24, +30, +35, +40, +44, +50, +52} dB */
349static unsigned int bst_tlv[] = {
350 TLV_DB_RANGE_HEAD(7),
351 0, 0, TLV_DB_SCALE_ITEM(0, 0, 0),
352 1, 1, TLV_DB_SCALE_ITEM(2000, 0, 0),
353 2, 2, TLV_DB_SCALE_ITEM(2400, 0, 0),
354 3, 5, TLV_DB_SCALE_ITEM(3000, 500, 0),
355 6, 6, TLV_DB_SCALE_ITEM(4400, 0, 0),
356 7, 7, TLV_DB_SCALE_ITEM(5000, 0, 0),
357 8, 8, TLV_DB_SCALE_ITEM(5200, 0, 0),
358};
359
360/* Interface data select */
361static const char * const rt5640_data_select[] = {
362 "Normal", "left copy to right", "right copy to left", "Swap"};
363
364static const SOC_ENUM_SINGLE_DECL(rt5640_if1_dac_enum, RT5640_DIG_INF_DATA,
365 RT5640_IF1_DAC_SEL_SFT, rt5640_data_select);
366
367static const SOC_ENUM_SINGLE_DECL(rt5640_if1_adc_enum, RT5640_DIG_INF_DATA,
368 RT5640_IF1_ADC_SEL_SFT, rt5640_data_select);
369
370static const SOC_ENUM_SINGLE_DECL(rt5640_if2_dac_enum, RT5640_DIG_INF_DATA,
371 RT5640_IF2_DAC_SEL_SFT, rt5640_data_select);
372
373static const SOC_ENUM_SINGLE_DECL(rt5640_if2_adc_enum, RT5640_DIG_INF_DATA,
374 RT5640_IF2_ADC_SEL_SFT, rt5640_data_select);
375
376/* Class D speaker gain ratio */
377static const char * const rt5640_clsd_spk_ratio[] = {"1.66x", "1.83x", "1.94x",
378 "2x", "2.11x", "2.22x", "2.33x", "2.44x", "2.55x", "2.66x", "2.77x"};
379
380static const SOC_ENUM_SINGLE_DECL(
381 rt5640_clsd_spk_ratio_enum, RT5640_CLS_D_OUT,
382 RT5640_CLSD_RATIO_SFT, rt5640_clsd_spk_ratio);
383
384static const struct snd_kcontrol_new rt5640_snd_controls[] = {
385 /* Speaker Output Volume */
386 SOC_DOUBLE("Speaker Playback Switch", RT5640_SPK_VOL,
387 RT5640_L_MUTE_SFT, RT5640_R_MUTE_SFT, 1, 1),
388 SOC_DOUBLE("Speaker Channel Switch", RT5640_SPK_VOL,
389 RT5640_VOL_L_SFT, RT5640_VOL_R_SFT, 1, 1),
390 SOC_DOUBLE_TLV("Speaker Playback Volume", RT5640_SPK_VOL,
391 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT, 39, 1, out_vol_tlv),
392 /* Headphone Output Volume */
393 SOC_DOUBLE("HP Playback Switch", RT5640_HP_VOL,
394 RT5640_L_MUTE_SFT, RT5640_R_MUTE_SFT, 1, 1),
395 SOC_DOUBLE("HP Channel Switch", RT5640_HP_VOL,
396 RT5640_VOL_L_SFT, RT5640_VOL_R_SFT, 1, 1),
397 SOC_DOUBLE_TLV("HP Playback Volume", RT5640_HP_VOL,
398 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT, 39, 1, out_vol_tlv),
399 /* OUTPUT Control */
400 SOC_DOUBLE("OUT Playback Switch", RT5640_OUTPUT,
401 RT5640_L_MUTE_SFT, RT5640_R_MUTE_SFT, 1, 1),
402 SOC_DOUBLE("OUT Channel Switch", RT5640_OUTPUT,
403 RT5640_VOL_L_SFT, RT5640_VOL_R_SFT, 1, 1),
404 SOC_DOUBLE_TLV("OUT Playback Volume", RT5640_OUTPUT,
405 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT, 39, 1, out_vol_tlv),
406 /* MONO Output Control */
407 SOC_SINGLE("Mono Playback Switch", RT5640_MONO_OUT,
408 RT5640_L_MUTE_SFT, 1, 1),
409 /* DAC Digital Volume */
410 SOC_DOUBLE("DAC2 Playback Switch", RT5640_DAC2_CTRL,
411 RT5640_M_DAC_L2_VOL_SFT, RT5640_M_DAC_R2_VOL_SFT, 1, 1),
412 SOC_DOUBLE_TLV("DAC1 Playback Volume", RT5640_DAC1_DIG_VOL,
413 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT,
414 175, 0, dac_vol_tlv),
415 SOC_DOUBLE_TLV("Mono DAC Playback Volume", RT5640_DAC2_DIG_VOL,
416 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT,
417 175, 0, dac_vol_tlv),
418 /* IN1/IN2 Control */
419 SOC_SINGLE_TLV("IN1 Boost", RT5640_IN1_IN2,
420 RT5640_BST_SFT1, 8, 0, bst_tlv),
421 SOC_SINGLE_TLV("IN2 Boost", RT5640_IN3_IN4,
422 RT5640_BST_SFT2, 8, 0, bst_tlv),
423 /* INL/INR Volume Control */
424 SOC_DOUBLE_TLV("IN Capture Volume", RT5640_INL_INR_VOL,
425 RT5640_INL_VOL_SFT, RT5640_INR_VOL_SFT,
426 31, 1, in_vol_tlv),
427 /* ADC Digital Volume Control */
428 SOC_DOUBLE("ADC Capture Switch", RT5640_ADC_DIG_VOL,
429 RT5640_L_MUTE_SFT, RT5640_R_MUTE_SFT, 1, 1),
430 SOC_DOUBLE_TLV("ADC Capture Volume", RT5640_ADC_DIG_VOL,
431 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT,
432 127, 0, adc_vol_tlv),
433 SOC_DOUBLE_TLV("Mono ADC Capture Volume", RT5640_ADC_DATA,
434 RT5640_L_VOL_SFT, RT5640_R_VOL_SFT,
435 127, 0, adc_vol_tlv),
436 /* ADC Boost Volume Control */
437 SOC_DOUBLE_TLV("ADC Boost Gain", RT5640_ADC_BST_VOL,
438 RT5640_ADC_L_BST_SFT, RT5640_ADC_R_BST_SFT,
439 3, 0, adc_bst_tlv),
440 /* Class D speaker gain ratio */
441 SOC_ENUM("Class D SPK Ratio Control", rt5640_clsd_spk_ratio_enum),
442
443 SOC_ENUM("ADC IF1 Data Switch", rt5640_if1_adc_enum),
444 SOC_ENUM("DAC IF1 Data Switch", rt5640_if1_dac_enum),
445 SOC_ENUM("ADC IF2 Data Switch", rt5640_if2_adc_enum),
446 SOC_ENUM("DAC IF2 Data Switch", rt5640_if2_dac_enum),
447};
448
449/**
450 * set_dmic_clk - Set parameter of dmic.
451 *
452 * @w: DAPM widget.
453 * @kcontrol: The kcontrol of this widget.
454 * @event: Event id.
455 *
456 * Choose dmic clock between 1MHz and 3MHz.
457 * It is better for clock to approximate 3MHz.
458 */
459static int set_dmic_clk(struct snd_soc_dapm_widget *w,
460 struct snd_kcontrol *kcontrol, int event)
461{
462 struct snd_soc_codec *codec = w->codec;
463 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
464 int div[] = {2, 3, 4, 6, 8, 12};
465 int idx = -EINVAL, i;
466 int rate, red, bound, temp;
467
468 rate = rt5640->sysclk;
469 red = 3000000 * 12;
470 for (i = 0; i < ARRAY_SIZE(div); i++) {
471 bound = div[i] * 3000000;
472 if (rate > bound)
473 continue;
474 temp = bound - rate;
475 if (temp < red) {
476 red = temp;
477 idx = i;
478 }
479 }
480 if (idx < 0)
481 dev_err(codec->dev, "Failed to set DMIC clock\n");
482 else
483 snd_soc_update_bits(codec, RT5640_DMIC, RT5640_DMIC_CLK_MASK,
484 idx << RT5640_DMIC_CLK_SFT);
485 return idx;
486}
487
488static int check_sysclk1_source(struct snd_soc_dapm_widget *source,
489 struct snd_soc_dapm_widget *sink)
490{
491 unsigned int val;
492
493 val = snd_soc_read(source->codec, RT5640_GLB_CLK);
494 val &= RT5640_SCLK_SRC_MASK;
495 if (val == RT5640_SCLK_SRC_PLL1 || val == RT5640_SCLK_SRC_PLL1T)
496 return 1;
497 else
498 return 0;
499}
500
501/* Digital Mixer */
502static const struct snd_kcontrol_new rt5640_sto_adc_l_mix[] = {
503 SOC_DAPM_SINGLE("ADC1 Switch", RT5640_STO_ADC_MIXER,
504 RT5640_M_ADC_L1_SFT, 1, 1),
505 SOC_DAPM_SINGLE("ADC2 Switch", RT5640_STO_ADC_MIXER,
506 RT5640_M_ADC_L2_SFT, 1, 1),
507};
508
509static const struct snd_kcontrol_new rt5640_sto_adc_r_mix[] = {
510 SOC_DAPM_SINGLE("ADC1 Switch", RT5640_STO_ADC_MIXER,
511 RT5640_M_ADC_R1_SFT, 1, 1),
512 SOC_DAPM_SINGLE("ADC2 Switch", RT5640_STO_ADC_MIXER,
513 RT5640_M_ADC_R2_SFT, 1, 1),
514};
515
516static const struct snd_kcontrol_new rt5640_mono_adc_l_mix[] = {
517 SOC_DAPM_SINGLE("ADC1 Switch", RT5640_MONO_ADC_MIXER,
518 RT5640_M_MONO_ADC_L1_SFT, 1, 1),
519 SOC_DAPM_SINGLE("ADC2 Switch", RT5640_MONO_ADC_MIXER,
520 RT5640_M_MONO_ADC_L2_SFT, 1, 1),
521};
522
523static const struct snd_kcontrol_new rt5640_mono_adc_r_mix[] = {
524 SOC_DAPM_SINGLE("ADC1 Switch", RT5640_MONO_ADC_MIXER,
525 RT5640_M_MONO_ADC_R1_SFT, 1, 1),
526 SOC_DAPM_SINGLE("ADC2 Switch", RT5640_MONO_ADC_MIXER,
527 RT5640_M_MONO_ADC_R2_SFT, 1, 1),
528};
529
530static const struct snd_kcontrol_new rt5640_dac_l_mix[] = {
531 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5640_AD_DA_MIXER,
532 RT5640_M_ADCMIX_L_SFT, 1, 1),
533 SOC_DAPM_SINGLE("INF1 Switch", RT5640_AD_DA_MIXER,
534 RT5640_M_IF1_DAC_L_SFT, 1, 1),
535};
536
537static const struct snd_kcontrol_new rt5640_dac_r_mix[] = {
538 SOC_DAPM_SINGLE("Stereo ADC Switch", RT5640_AD_DA_MIXER,
539 RT5640_M_ADCMIX_R_SFT, 1, 1),
540 SOC_DAPM_SINGLE("INF1 Switch", RT5640_AD_DA_MIXER,
541 RT5640_M_IF1_DAC_R_SFT, 1, 1),
542};
543
544static const struct snd_kcontrol_new rt5640_sto_dac_l_mix[] = {
545 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_STO_DAC_MIXER,
546 RT5640_M_DAC_L1_SFT, 1, 1),
547 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_STO_DAC_MIXER,
548 RT5640_M_DAC_L2_SFT, 1, 1),
549 SOC_DAPM_SINGLE("ANC Switch", RT5640_STO_DAC_MIXER,
550 RT5640_M_ANC_DAC_L_SFT, 1, 1),
551};
552
553static const struct snd_kcontrol_new rt5640_sto_dac_r_mix[] = {
554 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_STO_DAC_MIXER,
555 RT5640_M_DAC_R1_SFT, 1, 1),
556 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_STO_DAC_MIXER,
557 RT5640_M_DAC_R2_SFT, 1, 1),
558 SOC_DAPM_SINGLE("ANC Switch", RT5640_STO_DAC_MIXER,
559 RT5640_M_ANC_DAC_R_SFT, 1, 1),
560};
561
562static const struct snd_kcontrol_new rt5640_mono_dac_l_mix[] = {
563 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_MONO_DAC_MIXER,
564 RT5640_M_DAC_L1_MONO_L_SFT, 1, 1),
565 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_MONO_DAC_MIXER,
566 RT5640_M_DAC_L2_MONO_L_SFT, 1, 1),
567 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_MONO_DAC_MIXER,
568 RT5640_M_DAC_R2_MONO_L_SFT, 1, 1),
569};
570
571static const struct snd_kcontrol_new rt5640_mono_dac_r_mix[] = {
572 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_MONO_DAC_MIXER,
573 RT5640_M_DAC_R1_MONO_R_SFT, 1, 1),
574 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_MONO_DAC_MIXER,
575 RT5640_M_DAC_R2_MONO_R_SFT, 1, 1),
576 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_MONO_DAC_MIXER,
577 RT5640_M_DAC_L2_MONO_R_SFT, 1, 1),
578};
579
580static const struct snd_kcontrol_new rt5640_dig_l_mix[] = {
581 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_DIG_MIXER,
582 RT5640_M_STO_L_DAC_L_SFT, 1, 1),
583 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_DIG_MIXER,
584 RT5640_M_DAC_L2_DAC_L_SFT, 1, 1),
585};
586
587static const struct snd_kcontrol_new rt5640_dig_r_mix[] = {
588 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_DIG_MIXER,
589 RT5640_M_STO_R_DAC_R_SFT, 1, 1),
590 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_DIG_MIXER,
591 RT5640_M_DAC_R2_DAC_R_SFT, 1, 1),
592};
593
594/* Analog Input Mixer */
595static const struct snd_kcontrol_new rt5640_rec_l_mix[] = {
596 SOC_DAPM_SINGLE("HPOL Switch", RT5640_REC_L2_MIXER,
597 RT5640_M_HP_L_RM_L_SFT, 1, 1),
598 SOC_DAPM_SINGLE("INL Switch", RT5640_REC_L2_MIXER,
599 RT5640_M_IN_L_RM_L_SFT, 1, 1),
600 SOC_DAPM_SINGLE("BST2 Switch", RT5640_REC_L2_MIXER,
601 RT5640_M_BST4_RM_L_SFT, 1, 1),
602 SOC_DAPM_SINGLE("BST1 Switch", RT5640_REC_L2_MIXER,
603 RT5640_M_BST1_RM_L_SFT, 1, 1),
604 SOC_DAPM_SINGLE("OUT MIXL Switch", RT5640_REC_L2_MIXER,
605 RT5640_M_OM_L_RM_L_SFT, 1, 1),
606};
607
608static const struct snd_kcontrol_new rt5640_rec_r_mix[] = {
609 SOC_DAPM_SINGLE("HPOR Switch", RT5640_REC_R2_MIXER,
610 RT5640_M_HP_R_RM_R_SFT, 1, 1),
611 SOC_DAPM_SINGLE("INR Switch", RT5640_REC_R2_MIXER,
612 RT5640_M_IN_R_RM_R_SFT, 1, 1),
613 SOC_DAPM_SINGLE("BST2 Switch", RT5640_REC_R2_MIXER,
614 RT5640_M_BST4_RM_R_SFT, 1, 1),
615 SOC_DAPM_SINGLE("BST1 Switch", RT5640_REC_R2_MIXER,
616 RT5640_M_BST1_RM_R_SFT, 1, 1),
617 SOC_DAPM_SINGLE("OUT MIXR Switch", RT5640_REC_R2_MIXER,
618 RT5640_M_OM_R_RM_R_SFT, 1, 1),
619};
620
621/* Analog Output Mixer */
622static const struct snd_kcontrol_new rt5640_spk_l_mix[] = {
623 SOC_DAPM_SINGLE("REC MIXL Switch", RT5640_SPK_L_MIXER,
624 RT5640_M_RM_L_SM_L_SFT, 1, 1),
625 SOC_DAPM_SINGLE("INL Switch", RT5640_SPK_L_MIXER,
626 RT5640_M_IN_L_SM_L_SFT, 1, 1),
627 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_SPK_L_MIXER,
628 RT5640_M_DAC_L1_SM_L_SFT, 1, 1),
629 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_SPK_L_MIXER,
630 RT5640_M_DAC_L2_SM_L_SFT, 1, 1),
631 SOC_DAPM_SINGLE("OUT MIXL Switch", RT5640_SPK_L_MIXER,
632 RT5640_M_OM_L_SM_L_SFT, 1, 1),
633};
634
635static const struct snd_kcontrol_new rt5640_spk_r_mix[] = {
636 SOC_DAPM_SINGLE("REC MIXR Switch", RT5640_SPK_R_MIXER,
637 RT5640_M_RM_R_SM_R_SFT, 1, 1),
638 SOC_DAPM_SINGLE("INR Switch", RT5640_SPK_R_MIXER,
639 RT5640_M_IN_R_SM_R_SFT, 1, 1),
640 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_SPK_R_MIXER,
641 RT5640_M_DAC_R1_SM_R_SFT, 1, 1),
642 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_SPK_R_MIXER,
643 RT5640_M_DAC_R2_SM_R_SFT, 1, 1),
644 SOC_DAPM_SINGLE("OUT MIXR Switch", RT5640_SPK_R_MIXER,
645 RT5640_M_OM_R_SM_R_SFT, 1, 1),
646};
647
648static const struct snd_kcontrol_new rt5640_out_l_mix[] = {
649 SOC_DAPM_SINGLE("SPK MIXL Switch", RT5640_OUT_L3_MIXER,
650 RT5640_M_SM_L_OM_L_SFT, 1, 1),
651 SOC_DAPM_SINGLE("BST1 Switch", RT5640_OUT_L3_MIXER,
652 RT5640_M_BST1_OM_L_SFT, 1, 1),
653 SOC_DAPM_SINGLE("INL Switch", RT5640_OUT_L3_MIXER,
654 RT5640_M_IN_L_OM_L_SFT, 1, 1),
655 SOC_DAPM_SINGLE("REC MIXL Switch", RT5640_OUT_L3_MIXER,
656 RT5640_M_RM_L_OM_L_SFT, 1, 1),
657 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_OUT_L3_MIXER,
658 RT5640_M_DAC_R2_OM_L_SFT, 1, 1),
659 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_OUT_L3_MIXER,
660 RT5640_M_DAC_L2_OM_L_SFT, 1, 1),
661 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_OUT_L3_MIXER,
662 RT5640_M_DAC_L1_OM_L_SFT, 1, 1),
663};
664
665static const struct snd_kcontrol_new rt5640_out_r_mix[] = {
666 SOC_DAPM_SINGLE("SPK MIXR Switch", RT5640_OUT_R3_MIXER,
667 RT5640_M_SM_L_OM_R_SFT, 1, 1),
668 SOC_DAPM_SINGLE("BST2 Switch", RT5640_OUT_R3_MIXER,
669 RT5640_M_BST4_OM_R_SFT, 1, 1),
670 SOC_DAPM_SINGLE("BST1 Switch", RT5640_OUT_R3_MIXER,
671 RT5640_M_BST1_OM_R_SFT, 1, 1),
672 SOC_DAPM_SINGLE("INR Switch", RT5640_OUT_R3_MIXER,
673 RT5640_M_IN_R_OM_R_SFT, 1, 1),
674 SOC_DAPM_SINGLE("REC MIXR Switch", RT5640_OUT_R3_MIXER,
675 RT5640_M_RM_R_OM_R_SFT, 1, 1),
676 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_OUT_R3_MIXER,
677 RT5640_M_DAC_L2_OM_R_SFT, 1, 1),
678 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_OUT_R3_MIXER,
679 RT5640_M_DAC_R2_OM_R_SFT, 1, 1),
680 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_OUT_R3_MIXER,
681 RT5640_M_DAC_R1_OM_R_SFT, 1, 1),
682};
683
684static const struct snd_kcontrol_new rt5640_spo_l_mix[] = {
685 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_SPO_L_MIXER,
686 RT5640_M_DAC_R1_SPM_L_SFT, 1, 1),
687 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_SPO_L_MIXER,
688 RT5640_M_DAC_L1_SPM_L_SFT, 1, 1),
689 SOC_DAPM_SINGLE("SPKVOL R Switch", RT5640_SPO_L_MIXER,
690 RT5640_M_SV_R_SPM_L_SFT, 1, 1),
691 SOC_DAPM_SINGLE("SPKVOL L Switch", RT5640_SPO_L_MIXER,
692 RT5640_M_SV_L_SPM_L_SFT, 1, 1),
693 SOC_DAPM_SINGLE("BST1 Switch", RT5640_SPO_L_MIXER,
694 RT5640_M_BST1_SPM_L_SFT, 1, 1),
695};
696
697static const struct snd_kcontrol_new rt5640_spo_r_mix[] = {
698 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_SPO_R_MIXER,
699 RT5640_M_DAC_R1_SPM_R_SFT, 1, 1),
700 SOC_DAPM_SINGLE("SPKVOL R Switch", RT5640_SPO_R_MIXER,
701 RT5640_M_SV_R_SPM_R_SFT, 1, 1),
702 SOC_DAPM_SINGLE("BST1 Switch", RT5640_SPO_R_MIXER,
703 RT5640_M_BST1_SPM_R_SFT, 1, 1),
704};
705
706static const struct snd_kcontrol_new rt5640_hpo_mix[] = {
707 SOC_DAPM_SINGLE("HPO MIX DAC2 Switch", RT5640_HPO_MIXER,
708 RT5640_M_DAC2_HM_SFT, 1, 1),
709 SOC_DAPM_SINGLE("HPO MIX DAC1 Switch", RT5640_HPO_MIXER,
710 RT5640_M_DAC1_HM_SFT, 1, 1),
711 SOC_DAPM_SINGLE("HPO MIX HPVOL Switch", RT5640_HPO_MIXER,
712 RT5640_M_HPVOL_HM_SFT, 1, 1),
713};
714
715static const struct snd_kcontrol_new rt5640_lout_mix[] = {
716 SOC_DAPM_SINGLE("DAC L1 Switch", RT5640_LOUT_MIXER,
717 RT5640_M_DAC_L1_LM_SFT, 1, 1),
718 SOC_DAPM_SINGLE("DAC R1 Switch", RT5640_LOUT_MIXER,
719 RT5640_M_DAC_R1_LM_SFT, 1, 1),
720 SOC_DAPM_SINGLE("OUTVOL L Switch", RT5640_LOUT_MIXER,
721 RT5640_M_OV_L_LM_SFT, 1, 1),
722 SOC_DAPM_SINGLE("OUTVOL R Switch", RT5640_LOUT_MIXER,
723 RT5640_M_OV_R_LM_SFT, 1, 1),
724};
725
726static const struct snd_kcontrol_new rt5640_mono_mix[] = {
727 SOC_DAPM_SINGLE("DAC R2 Switch", RT5640_MONO_MIXER,
728 RT5640_M_DAC_R2_MM_SFT, 1, 1),
729 SOC_DAPM_SINGLE("DAC L2 Switch", RT5640_MONO_MIXER,
730 RT5640_M_DAC_L2_MM_SFT, 1, 1),
731 SOC_DAPM_SINGLE("OUTVOL R Switch", RT5640_MONO_MIXER,
732 RT5640_M_OV_R_MM_SFT, 1, 1),
733 SOC_DAPM_SINGLE("OUTVOL L Switch", RT5640_MONO_MIXER,
734 RT5640_M_OV_L_MM_SFT, 1, 1),
735 SOC_DAPM_SINGLE("BST1 Switch", RT5640_MONO_MIXER,
736 RT5640_M_BST1_MM_SFT, 1, 1),
737};
738
739/* INL/R source */
740static const char * const rt5640_inl_src[] = {
741 "IN2P", "MONOP"
742};
743
744static const SOC_ENUM_SINGLE_DECL(
745 rt5640_inl_enum, RT5640_INL_INR_VOL,
746 RT5640_INL_SEL_SFT, rt5640_inl_src);
747
748static const struct snd_kcontrol_new rt5640_inl_mux =
749 SOC_DAPM_ENUM("INL source", rt5640_inl_enum);
750
751static const char * const rt5640_inr_src[] = {
752 "IN2N", "MONON"
753};
754
755static const SOC_ENUM_SINGLE_DECL(
756 rt5640_inr_enum, RT5640_INL_INR_VOL,
757 RT5640_INR_SEL_SFT, rt5640_inr_src);
758
759static const struct snd_kcontrol_new rt5640_inr_mux =
760 SOC_DAPM_ENUM("INR source", rt5640_inr_enum);
761
762/* Stereo ADC source */
763static const char * const rt5640_stereo_adc1_src[] = {
764 "DIG MIX", "ADC"
765};
766
767static const SOC_ENUM_SINGLE_DECL(
768 rt5640_stereo_adc1_enum, RT5640_STO_ADC_MIXER,
769 RT5640_ADC_1_SRC_SFT, rt5640_stereo_adc1_src);
770
771static const struct snd_kcontrol_new rt5640_sto_adc_1_mux =
772 SOC_DAPM_ENUM("Stereo ADC1 Mux", rt5640_stereo_adc1_enum);
773
774static const char * const rt5640_stereo_adc2_src[] = {
775 "DMIC1", "DMIC2", "DIG MIX"
776};
777
778static const SOC_ENUM_SINGLE_DECL(
779 rt5640_stereo_adc2_enum, RT5640_STO_ADC_MIXER,
780 RT5640_ADC_2_SRC_SFT, rt5640_stereo_adc2_src);
781
782static const struct snd_kcontrol_new rt5640_sto_adc_2_mux =
783 SOC_DAPM_ENUM("Stereo ADC2 Mux", rt5640_stereo_adc2_enum);
784
785/* Mono ADC source */
786static const char * const rt5640_mono_adc_l1_src[] = {
787 "Mono DAC MIXL", "ADCL"
788};
789
790static const SOC_ENUM_SINGLE_DECL(
791 rt5640_mono_adc_l1_enum, RT5640_MONO_ADC_MIXER,
792 RT5640_MONO_ADC_L1_SRC_SFT, rt5640_mono_adc_l1_src);
793
794static const struct snd_kcontrol_new rt5640_mono_adc_l1_mux =
795 SOC_DAPM_ENUM("Mono ADC1 left source", rt5640_mono_adc_l1_enum);
796
797static const char * const rt5640_mono_adc_l2_src[] = {
798 "DMIC L1", "DMIC L2", "Mono DAC MIXL"
799};
800
801static const SOC_ENUM_SINGLE_DECL(
802 rt5640_mono_adc_l2_enum, RT5640_MONO_ADC_MIXER,
803 RT5640_MONO_ADC_L2_SRC_SFT, rt5640_mono_adc_l2_src);
804
805static const struct snd_kcontrol_new rt5640_mono_adc_l2_mux =
806 SOC_DAPM_ENUM("Mono ADC2 left source", rt5640_mono_adc_l2_enum);
807
808static const char * const rt5640_mono_adc_r1_src[] = {
809 "Mono DAC MIXR", "ADCR"
810};
811
812static const SOC_ENUM_SINGLE_DECL(
813 rt5640_mono_adc_r1_enum, RT5640_MONO_ADC_MIXER,
814 RT5640_MONO_ADC_R1_SRC_SFT, rt5640_mono_adc_r1_src);
815
816static const struct snd_kcontrol_new rt5640_mono_adc_r1_mux =
817 SOC_DAPM_ENUM("Mono ADC1 right source", rt5640_mono_adc_r1_enum);
818
819static const char * const rt5640_mono_adc_r2_src[] = {
820 "DMIC R1", "DMIC R2", "Mono DAC MIXR"
821};
822
823static const SOC_ENUM_SINGLE_DECL(
824 rt5640_mono_adc_r2_enum, RT5640_MONO_ADC_MIXER,
825 RT5640_MONO_ADC_R2_SRC_SFT, rt5640_mono_adc_r2_src);
826
827static const struct snd_kcontrol_new rt5640_mono_adc_r2_mux =
828 SOC_DAPM_ENUM("Mono ADC2 right source", rt5640_mono_adc_r2_enum);
829
830/* DAC2 channel source */
831static const char * const rt5640_dac_l2_src[] = {
832 "IF2", "Base L/R"
833};
834
835static int rt5640_dac_l2_values[] = {
836 0,
837 3,
838};
839
840static const SOC_VALUE_ENUM_SINGLE_DECL(
841 rt5640_dac_l2_enum, RT5640_DSP_PATH2, RT5640_DAC_L2_SEL_SFT,
842 0x3, rt5640_dac_l2_src, rt5640_dac_l2_values);
843
844static const struct snd_kcontrol_new rt5640_dac_l2_mux =
845 SOC_DAPM_VALUE_ENUM("DAC2 left channel source", rt5640_dac_l2_enum);
846
847static const char * const rt5640_dac_r2_src[] = {
848 "IF2",
849};
850
851static int rt5640_dac_r2_values[] = {
852 0,
853};
854
855static const SOC_VALUE_ENUM_SINGLE_DECL(
856 rt5640_dac_r2_enum, RT5640_DSP_PATH2, RT5640_DAC_R2_SEL_SFT,
857 0x3, rt5640_dac_r2_src, rt5640_dac_r2_values);
858
859static const struct snd_kcontrol_new rt5640_dac_r2_mux =
860 SOC_DAPM_ENUM("DAC2 right channel source", rt5640_dac_r2_enum);
861
862/* digital interface and iis interface map */
863static const char * const rt5640_dai_iis_map[] = {
864 "1:1|2:2", "1:2|2:1", "1:1|2:1", "1:2|2:2"
865};
866
867static int rt5640_dai_iis_map_values[] = {
868 0,
869 5,
870 6,
871 7,
872};
873
874static const SOC_VALUE_ENUM_SINGLE_DECL(
875 rt5640_dai_iis_map_enum, RT5640_I2S1_SDP, RT5640_I2S_IF_SFT,
876 0x7, rt5640_dai_iis_map, rt5640_dai_iis_map_values);
877
878static const struct snd_kcontrol_new rt5640_dai_mux =
879 SOC_DAPM_VALUE_ENUM("DAI select", rt5640_dai_iis_map_enum);
880
881/* SDI select */
882static const char * const rt5640_sdi_sel[] = {
883 "IF1", "IF2"
884};
885
886static const SOC_ENUM_SINGLE_DECL(
887 rt5640_sdi_sel_enum, RT5640_I2S2_SDP,
888 RT5640_I2S2_SDI_SFT, rt5640_sdi_sel);
889
890static const struct snd_kcontrol_new rt5640_sdi_mux =
891 SOC_DAPM_ENUM("SDI select", rt5640_sdi_sel_enum);
892
893static int spk_event(struct snd_soc_dapm_widget *w,
894 struct snd_kcontrol *kcontrol, int event)
895{
896 struct snd_soc_codec *codec = w->codec;
897 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
898
899 switch (event) {
900 case SND_SOC_DAPM_POST_PMU:
901 regmap_update_bits(rt5640->regmap, RT5640_PWR_DIG1,
902 0x0001, 0x0001);
903 regmap_update_bits(rt5640->regmap, RT5640_PR_BASE + 0x1c,
904 0xf000, 0xf000);
905 break;
906
907 case SND_SOC_DAPM_PRE_PMD:
908 regmap_update_bits(rt5640->regmap, RT5640_PR_BASE + 0x1c,
909 0xf000, 0x0000);
910 regmap_update_bits(rt5640->regmap, RT5640_PWR_DIG1,
911 0x0001, 0x0000);
912 break;
913
914 default:
915 return 0;
916 }
917 return 0;
918}
919
920static int rt5640_set_dmic1_event(struct snd_soc_dapm_widget *w,
921 struct snd_kcontrol *kcontrol, int event)
922{
923 struct snd_soc_codec *codec = w->codec;
924
925 switch (event) {
926 case SND_SOC_DAPM_PRE_PMU:
927 snd_soc_update_bits(codec, RT5640_GPIO_CTRL1,
928 RT5640_GP2_PIN_MASK | RT5640_GP3_PIN_MASK,
929 RT5640_GP2_PIN_DMIC1_SCL | RT5640_GP3_PIN_DMIC1_SDA);
930 snd_soc_update_bits(codec, RT5640_DMIC,
931 RT5640_DMIC_1L_LH_MASK | RT5640_DMIC_1R_LH_MASK |
932 RT5640_DMIC_1_DP_MASK,
933 RT5640_DMIC_1L_LH_FALLING | RT5640_DMIC_1R_LH_RISING |
934 RT5640_DMIC_1_DP_IN1P);
935 break;
936
937 default:
938 return 0;
939 }
940
941 return 0;
942}
943
944static int rt5640_set_dmic2_event(struct snd_soc_dapm_widget *w,
945 struct snd_kcontrol *kcontrol, int event)
946{
947 struct snd_soc_codec *codec = w->codec;
948
949 switch (event) {
950 case SND_SOC_DAPM_PRE_PMU:
951 snd_soc_update_bits(codec, RT5640_GPIO_CTRL1,
952 RT5640_GP2_PIN_MASK | RT5640_GP4_PIN_MASK,
953 RT5640_GP2_PIN_DMIC1_SCL | RT5640_GP4_PIN_DMIC2_SDA);
954 snd_soc_update_bits(codec, RT5640_DMIC,
955 RT5640_DMIC_2L_LH_MASK | RT5640_DMIC_2R_LH_MASK |
956 RT5640_DMIC_2_DP_MASK,
957 RT5640_DMIC_2L_LH_FALLING | RT5640_DMIC_2R_LH_RISING |
958 RT5640_DMIC_2_DP_IN1N);
959 break;
960
961 default:
962 return 0;
963 }
964
965 return 0;
966}
967
968static const struct snd_soc_dapm_widget rt5640_dapm_widgets[] = {
969 SND_SOC_DAPM_SUPPLY("PLL1", RT5640_PWR_ANLG2,
970 RT5640_PWR_PLL_BIT, 0, NULL, 0),
971 /* Input Side */
972 /* micbias */
973 SND_SOC_DAPM_SUPPLY("LDO2", RT5640_PWR_ANLG1,
974 RT5640_PWR_LDO2_BIT, 0, NULL, 0),
975 SND_SOC_DAPM_SUPPLY("MICBIAS1", RT5640_PWR_ANLG2,
976 RT5640_PWR_MB1_BIT, 0, 0, 0),
977 /* Input Lines */
978 SND_SOC_DAPM_INPUT("DMIC1"),
979 SND_SOC_DAPM_INPUT("DMIC2"),
980 SND_SOC_DAPM_INPUT("IN1P"),
981 SND_SOC_DAPM_INPUT("IN1N"),
982 SND_SOC_DAPM_INPUT("IN2P"),
983 SND_SOC_DAPM_INPUT("IN2N"),
984 SND_SOC_DAPM_PGA("DMIC L1", SND_SOC_NOPM, 0, 0, NULL, 0),
985 SND_SOC_DAPM_PGA("DMIC R1", SND_SOC_NOPM, 0, 0, NULL, 0),
986 SND_SOC_DAPM_PGA("DMIC L2", SND_SOC_NOPM, 0, 0, NULL, 0),
987 SND_SOC_DAPM_PGA("DMIC R2", SND_SOC_NOPM, 0, 0, NULL, 0),
988
989 SND_SOC_DAPM_SUPPLY("DMIC CLK", SND_SOC_NOPM, 0, 0,
990 set_dmic_clk, SND_SOC_DAPM_PRE_PMU),
991 SND_SOC_DAPM_SUPPLY("DMIC1 Power", RT5640_DMIC,
992 RT5640_DMIC_1_EN_SFT, 0, rt5640_set_dmic1_event,
993 SND_SOC_DAPM_PRE_PMU),
994 SND_SOC_DAPM_SUPPLY("DMIC2 Power", RT5640_DMIC,
995 RT5640_DMIC_2_EN_SFT, 0, rt5640_set_dmic2_event,
996 SND_SOC_DAPM_PRE_PMU),
997 /* Boost */
998 SND_SOC_DAPM_PGA("BST1", RT5640_PWR_ANLG2,
999 RT5640_PWR_BST1_BIT, 0, NULL, 0),
1000 SND_SOC_DAPM_PGA("BST2", RT5640_PWR_ANLG2,
1001 RT5640_PWR_BST4_BIT, 0, NULL, 0),
1002 /* Input Volume */
1003 SND_SOC_DAPM_PGA("INL VOL", RT5640_PWR_VOL,
1004 RT5640_PWR_IN_L_BIT, 0, NULL, 0),
1005 SND_SOC_DAPM_PGA("INR VOL", RT5640_PWR_VOL,
1006 RT5640_PWR_IN_R_BIT, 0, NULL, 0),
1007 /* IN Mux */
1008 SND_SOC_DAPM_MUX("INL Mux", SND_SOC_NOPM, 0, 0, &rt5640_inl_mux),
1009 SND_SOC_DAPM_MUX("INR Mux", SND_SOC_NOPM, 0, 0, &rt5640_inr_mux),
1010 /* REC Mixer */
1011 SND_SOC_DAPM_MIXER("RECMIXL", RT5640_PWR_MIXER, RT5640_PWR_RM_L_BIT, 0,
1012 rt5640_rec_l_mix, ARRAY_SIZE(rt5640_rec_l_mix)),
1013 SND_SOC_DAPM_MIXER("RECMIXR", RT5640_PWR_MIXER, RT5640_PWR_RM_R_BIT, 0,
1014 rt5640_rec_r_mix, ARRAY_SIZE(rt5640_rec_r_mix)),
1015 /* ADCs */
1016 SND_SOC_DAPM_ADC("ADC L", NULL, RT5640_PWR_DIG1,
1017 RT5640_PWR_ADC_L_BIT, 0),
1018 SND_SOC_DAPM_ADC("ADC R", NULL, RT5640_PWR_DIG1,
1019 RT5640_PWR_ADC_R_BIT, 0),
1020 /* ADC Mux */
1021 SND_SOC_DAPM_MUX("Stereo ADC L2 Mux", SND_SOC_NOPM, 0, 0,
1022 &rt5640_sto_adc_2_mux),
1023 SND_SOC_DAPM_MUX("Stereo ADC R2 Mux", SND_SOC_NOPM, 0, 0,
1024 &rt5640_sto_adc_2_mux),
1025 SND_SOC_DAPM_MUX("Stereo ADC L1 Mux", SND_SOC_NOPM, 0, 0,
1026 &rt5640_sto_adc_1_mux),
1027 SND_SOC_DAPM_MUX("Stereo ADC R1 Mux", SND_SOC_NOPM, 0, 0,
1028 &rt5640_sto_adc_1_mux),
1029 SND_SOC_DAPM_MUX("Mono ADC L2 Mux", SND_SOC_NOPM, 0, 0,
1030 &rt5640_mono_adc_l2_mux),
1031 SND_SOC_DAPM_MUX("Mono ADC L1 Mux", SND_SOC_NOPM, 0, 0,
1032 &rt5640_mono_adc_l1_mux),
1033 SND_SOC_DAPM_MUX("Mono ADC R1 Mux", SND_SOC_NOPM, 0, 0,
1034 &rt5640_mono_adc_r1_mux),
1035 SND_SOC_DAPM_MUX("Mono ADC R2 Mux", SND_SOC_NOPM, 0, 0,
1036 &rt5640_mono_adc_r2_mux),
1037 /* ADC Mixer */
1038 SND_SOC_DAPM_SUPPLY("Stereo Filter", RT5640_PWR_DIG2,
1039 RT5640_PWR_ADC_SF_BIT, 0, NULL, 0),
1040 SND_SOC_DAPM_MIXER("Stereo ADC MIXL", SND_SOC_NOPM, 0, 0,
1041 rt5640_sto_adc_l_mix, ARRAY_SIZE(rt5640_sto_adc_l_mix)),
1042 SND_SOC_DAPM_MIXER("Stereo ADC MIXR", SND_SOC_NOPM, 0, 0,
1043 rt5640_sto_adc_r_mix, ARRAY_SIZE(rt5640_sto_adc_r_mix)),
1044 SND_SOC_DAPM_SUPPLY("Mono Left Filter", RT5640_PWR_DIG2,
1045 RT5640_PWR_ADC_MF_L_BIT, 0, NULL, 0),
1046 SND_SOC_DAPM_MIXER("Mono ADC MIXL", SND_SOC_NOPM, 0, 0,
1047 rt5640_mono_adc_l_mix, ARRAY_SIZE(rt5640_mono_adc_l_mix)),
1048 SND_SOC_DAPM_SUPPLY("Mono Right Filter", RT5640_PWR_DIG2,
1049 RT5640_PWR_ADC_MF_R_BIT, 0, NULL, 0),
1050 SND_SOC_DAPM_MIXER("Mono ADC MIXR", SND_SOC_NOPM, 0, 0,
1051 rt5640_mono_adc_r_mix, ARRAY_SIZE(rt5640_mono_adc_r_mix)),
1052
1053 /* Digital Interface */
1054 SND_SOC_DAPM_SUPPLY("I2S1", RT5640_PWR_DIG1,
1055 RT5640_PWR_I2S1_BIT, 0, NULL, 0),
1056 SND_SOC_DAPM_PGA("IF1 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
1057 SND_SOC_DAPM_PGA("IF1 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1058 SND_SOC_DAPM_PGA("IF1 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1059 SND_SOC_DAPM_PGA("IF1 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1060 SND_SOC_DAPM_PGA("IF1 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1061 SND_SOC_DAPM_PGA("IF1 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1062 SND_SOC_DAPM_SUPPLY("I2S2", RT5640_PWR_DIG1,
1063 RT5640_PWR_I2S2_BIT, 0, NULL, 0),
1064 SND_SOC_DAPM_PGA("IF2 DAC", SND_SOC_NOPM, 0, 0, NULL, 0),
1065 SND_SOC_DAPM_PGA("IF2 DAC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1066 SND_SOC_DAPM_PGA("IF2 DAC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1067 SND_SOC_DAPM_PGA("IF2 ADC", SND_SOC_NOPM, 0, 0, NULL, 0),
1068 SND_SOC_DAPM_PGA("IF2 ADC L", SND_SOC_NOPM, 0, 0, NULL, 0),
1069 SND_SOC_DAPM_PGA("IF2 ADC R", SND_SOC_NOPM, 0, 0, NULL, 0),
1070 /* Digital Interface Select */
1071 SND_SOC_DAPM_MUX("DAI1 RX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1072 SND_SOC_DAPM_MUX("DAI1 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1073 SND_SOC_DAPM_MUX("DAI1 IF1 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1074 SND_SOC_DAPM_MUX("DAI1 IF2 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1075 SND_SOC_DAPM_MUX("SDI1 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_sdi_mux),
1076 SND_SOC_DAPM_MUX("DAI2 RX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1077 SND_SOC_DAPM_MUX("DAI2 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1078 SND_SOC_DAPM_MUX("DAI2 IF1 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1079 SND_SOC_DAPM_MUX("DAI2 IF2 Mux", SND_SOC_NOPM, 0, 0, &rt5640_dai_mux),
1080 SND_SOC_DAPM_MUX("SDI2 TX Mux", SND_SOC_NOPM, 0, 0, &rt5640_sdi_mux),
1081 /* Audio Interface */
1082 SND_SOC_DAPM_AIF_IN("AIF1RX", "AIF1 Playback", 0, SND_SOC_NOPM, 0, 0),
1083 SND_SOC_DAPM_AIF_OUT("AIF1TX", "AIF1 Capture", 0, SND_SOC_NOPM, 0, 0),
1084 SND_SOC_DAPM_AIF_IN("AIF2RX", "AIF2 Playback", 0, SND_SOC_NOPM, 0, 0),
1085 SND_SOC_DAPM_AIF_OUT("AIF2TX", "AIF2 Capture", 0, SND_SOC_NOPM, 0, 0),
1086 /* Audio DSP */
1087 SND_SOC_DAPM_PGA("Audio DSP", SND_SOC_NOPM, 0, 0, NULL, 0),
1088 /* ANC */
1089 SND_SOC_DAPM_PGA("ANC", SND_SOC_NOPM, 0, 0, NULL, 0),
1090 /* Output Side */
1091 /* DAC mixer before sound effect */
1092 SND_SOC_DAPM_MIXER("DAC MIXL", SND_SOC_NOPM, 0, 0,
1093 rt5640_dac_l_mix, ARRAY_SIZE(rt5640_dac_l_mix)),
1094 SND_SOC_DAPM_MIXER("DAC MIXR", SND_SOC_NOPM, 0, 0,
1095 rt5640_dac_r_mix, ARRAY_SIZE(rt5640_dac_r_mix)),
1096 /* DAC2 channel Mux */
1097 SND_SOC_DAPM_MUX("DAC L2 Mux", SND_SOC_NOPM, 0, 0,
1098 &rt5640_dac_l2_mux),
1099 SND_SOC_DAPM_MUX("DAC R2 Mux", SND_SOC_NOPM, 0, 0,
1100 &rt5640_dac_r2_mux),
1101 /* DAC Mixer */
1102 SND_SOC_DAPM_MIXER("Stereo DAC MIXL", SND_SOC_NOPM, 0, 0,
1103 rt5640_sto_dac_l_mix, ARRAY_SIZE(rt5640_sto_dac_l_mix)),
1104 SND_SOC_DAPM_MIXER("Stereo DAC MIXR", SND_SOC_NOPM, 0, 0,
1105 rt5640_sto_dac_r_mix, ARRAY_SIZE(rt5640_sto_dac_r_mix)),
1106 SND_SOC_DAPM_MIXER("Mono DAC MIXL", SND_SOC_NOPM, 0, 0,
1107 rt5640_mono_dac_l_mix, ARRAY_SIZE(rt5640_mono_dac_l_mix)),
1108 SND_SOC_DAPM_MIXER("Mono DAC MIXR", SND_SOC_NOPM, 0, 0,
1109 rt5640_mono_dac_r_mix, ARRAY_SIZE(rt5640_mono_dac_r_mix)),
1110 SND_SOC_DAPM_MIXER("DIG MIXL", SND_SOC_NOPM, 0, 0,
1111 rt5640_dig_l_mix, ARRAY_SIZE(rt5640_dig_l_mix)),
1112 SND_SOC_DAPM_MIXER("DIG MIXR", SND_SOC_NOPM, 0, 0,
1113 rt5640_dig_r_mix, ARRAY_SIZE(rt5640_dig_r_mix)),
1114 /* DACs */
1115 SND_SOC_DAPM_DAC("DAC L1", NULL, RT5640_PWR_DIG1,
1116 RT5640_PWR_DAC_L1_BIT, 0),
1117 SND_SOC_DAPM_DAC("DAC L2", NULL, RT5640_PWR_DIG1,
1118 RT5640_PWR_DAC_L2_BIT, 0),
1119 SND_SOC_DAPM_DAC("DAC R1", NULL, RT5640_PWR_DIG1,
1120 RT5640_PWR_DAC_R1_BIT, 0),
1121 SND_SOC_DAPM_DAC("DAC R2", NULL, RT5640_PWR_DIG1,
1122 RT5640_PWR_DAC_R2_BIT, 0),
1123 /* SPK/OUT Mixer */
1124 SND_SOC_DAPM_MIXER("SPK MIXL", RT5640_PWR_MIXER, RT5640_PWR_SM_L_BIT,
1125 0, rt5640_spk_l_mix, ARRAY_SIZE(rt5640_spk_l_mix)),
1126 SND_SOC_DAPM_MIXER("SPK MIXR", RT5640_PWR_MIXER, RT5640_PWR_SM_R_BIT,
1127 0, rt5640_spk_r_mix, ARRAY_SIZE(rt5640_spk_r_mix)),
1128 SND_SOC_DAPM_MIXER("OUT MIXL", RT5640_PWR_MIXER, RT5640_PWR_OM_L_BIT,
1129 0, rt5640_out_l_mix, ARRAY_SIZE(rt5640_out_l_mix)),
1130 SND_SOC_DAPM_MIXER("OUT MIXR", RT5640_PWR_MIXER, RT5640_PWR_OM_R_BIT,
1131 0, rt5640_out_r_mix, ARRAY_SIZE(rt5640_out_r_mix)),
1132 /* Ouput Volume */
1133 SND_SOC_DAPM_PGA("SPKVOL L", RT5640_PWR_VOL,
1134 RT5640_PWR_SV_L_BIT, 0, NULL, 0),
1135 SND_SOC_DAPM_PGA("SPKVOL R", RT5640_PWR_VOL,
1136 RT5640_PWR_SV_R_BIT, 0, NULL, 0),
1137 SND_SOC_DAPM_PGA("OUTVOL L", RT5640_PWR_VOL,
1138 RT5640_PWR_OV_L_BIT, 0, NULL, 0),
1139 SND_SOC_DAPM_PGA("OUTVOL R", RT5640_PWR_VOL,
1140 RT5640_PWR_OV_R_BIT, 0, NULL, 0),
1141 SND_SOC_DAPM_PGA("HPOVOL L", RT5640_PWR_VOL,
1142 RT5640_PWR_HV_L_BIT, 0, NULL, 0),
1143 SND_SOC_DAPM_PGA("HPOVOL R", RT5640_PWR_VOL,
1144 RT5640_PWR_HV_R_BIT, 0, NULL, 0),
1145 /* SPO/HPO/LOUT/Mono Mixer */
1146 SND_SOC_DAPM_MIXER("SPOL MIX", SND_SOC_NOPM, 0,
1147 0, rt5640_spo_l_mix, ARRAY_SIZE(rt5640_spo_l_mix)),
1148 SND_SOC_DAPM_MIXER("SPOR MIX", SND_SOC_NOPM, 0,
1149 0, rt5640_spo_r_mix, ARRAY_SIZE(rt5640_spo_r_mix)),
1150 SND_SOC_DAPM_MIXER("HPO MIX L", SND_SOC_NOPM, 0, 0,
1151 rt5640_hpo_mix, ARRAY_SIZE(rt5640_hpo_mix)),
1152 SND_SOC_DAPM_MIXER("HPO MIX R", SND_SOC_NOPM, 0, 0,
1153 rt5640_hpo_mix, ARRAY_SIZE(rt5640_hpo_mix)),
1154 SND_SOC_DAPM_MIXER("LOUT MIX", RT5640_PWR_ANLG1, RT5640_PWR_LM_BIT, 0,
1155 rt5640_lout_mix, ARRAY_SIZE(rt5640_lout_mix)),
1156 SND_SOC_DAPM_MIXER("Mono MIX", RT5640_PWR_ANLG1, RT5640_PWR_MM_BIT, 0,
1157 rt5640_mono_mix, ARRAY_SIZE(rt5640_mono_mix)),
1158 SND_SOC_DAPM_SUPPLY("Improve MONO Amp Drv", RT5640_PWR_ANLG1,
1159 RT5640_PWR_MA_BIT, 0, NULL, 0),
1160 SND_SOC_DAPM_SUPPLY("Improve HP Amp Drv", RT5640_PWR_ANLG1,
1161 SND_SOC_NOPM, 0, NULL, 0),
1162 SND_SOC_DAPM_PGA("HP L Amp", RT5640_PWR_ANLG1,
1163 RT5640_PWR_HP_L_BIT, 0, NULL, 0),
1164 SND_SOC_DAPM_PGA("HP R Amp", RT5640_PWR_ANLG1,
1165 RT5640_PWR_HP_R_BIT, 0, NULL, 0),
1166 SND_SOC_DAPM_SUPPLY("Improve SPK Amp Drv", RT5640_PWR_DIG1,
1167 SND_SOC_NOPM, 0, spk_event,
1168 SND_SOC_DAPM_PRE_PMD | SND_SOC_DAPM_POST_PMU),
1169 /* Output Lines */
1170 SND_SOC_DAPM_OUTPUT("SPOLP"),
1171 SND_SOC_DAPM_OUTPUT("SPOLN"),
1172 SND_SOC_DAPM_OUTPUT("SPORP"),
1173 SND_SOC_DAPM_OUTPUT("SPORN"),
1174 SND_SOC_DAPM_OUTPUT("HPOL"),
1175 SND_SOC_DAPM_OUTPUT("HPOR"),
1176 SND_SOC_DAPM_OUTPUT("LOUTL"),
1177 SND_SOC_DAPM_OUTPUT("LOUTR"),
1178 SND_SOC_DAPM_OUTPUT("MONOP"),
1179 SND_SOC_DAPM_OUTPUT("MONON"),
1180};
1181
1182static const struct snd_soc_dapm_route rt5640_dapm_routes[] = {
1183 {"IN1P", NULL, "LDO2"},
1184 {"IN2P", NULL, "LDO2"},
1185
1186 {"DMIC L1", NULL, "DMIC1"},
1187 {"DMIC R1", NULL, "DMIC1"},
1188 {"DMIC L2", NULL, "DMIC2"},
1189 {"DMIC R2", NULL, "DMIC2"},
1190
1191 {"BST1", NULL, "IN1P"},
1192 {"BST1", NULL, "IN1N"},
1193 {"BST2", NULL, "IN2P"},
1194 {"BST2", NULL, "IN2N"},
1195
1196 {"INL VOL", NULL, "IN2P"},
1197 {"INR VOL", NULL, "IN2N"},
1198
1199 {"RECMIXL", "HPOL Switch", "HPOL"},
1200 {"RECMIXL", "INL Switch", "INL VOL"},
1201 {"RECMIXL", "BST2 Switch", "BST2"},
1202 {"RECMIXL", "BST1 Switch", "BST1"},
1203 {"RECMIXL", "OUT MIXL Switch", "OUT MIXL"},
1204
1205 {"RECMIXR", "HPOR Switch", "HPOR"},
1206 {"RECMIXR", "INR Switch", "INR VOL"},
1207 {"RECMIXR", "BST2 Switch", "BST2"},
1208 {"RECMIXR", "BST1 Switch", "BST1"},
1209 {"RECMIXR", "OUT MIXR Switch", "OUT MIXR"},
1210
1211 {"ADC L", NULL, "RECMIXL"},
1212 {"ADC R", NULL, "RECMIXR"},
1213
1214 {"DMIC L1", NULL, "DMIC CLK"},
1215 {"DMIC L1", NULL, "DMIC1 Power"},
1216 {"DMIC R1", NULL, "DMIC CLK"},
1217 {"DMIC R1", NULL, "DMIC1 Power"},
1218 {"DMIC L2", NULL, "DMIC CLK"},
1219 {"DMIC L2", NULL, "DMIC2 Power"},
1220 {"DMIC R2", NULL, "DMIC CLK"},
1221 {"DMIC R2", NULL, "DMIC2 Power"},
1222
1223 {"Stereo ADC L2 Mux", "DMIC1", "DMIC L1"},
1224 {"Stereo ADC L2 Mux", "DMIC2", "DMIC L2"},
1225 {"Stereo ADC L2 Mux", "DIG MIX", "DIG MIXL"},
1226 {"Stereo ADC L1 Mux", "ADC", "ADC L"},
1227 {"Stereo ADC L1 Mux", "DIG MIX", "DIG MIXL"},
1228
1229 {"Stereo ADC R1 Mux", "ADC", "ADC R"},
1230 {"Stereo ADC R1 Mux", "DIG MIX", "DIG MIXR"},
1231 {"Stereo ADC R2 Mux", "DMIC1", "DMIC R1"},
1232 {"Stereo ADC R2 Mux", "DMIC2", "DMIC R2"},
1233 {"Stereo ADC R2 Mux", "DIG MIX", "DIG MIXR"},
1234
1235 {"Mono ADC L2 Mux", "DMIC L1", "DMIC L1"},
1236 {"Mono ADC L2 Mux", "DMIC L2", "DMIC L2"},
1237 {"Mono ADC L2 Mux", "Mono DAC MIXL", "Mono DAC MIXL"},
1238 {"Mono ADC L1 Mux", "Mono DAC MIXL", "Mono DAC MIXL"},
1239 {"Mono ADC L1 Mux", "ADCL", "ADC L"},
1240
1241 {"Mono ADC R1 Mux", "Mono DAC MIXR", "Mono DAC MIXR"},
1242 {"Mono ADC R1 Mux", "ADCR", "ADC R"},
1243 {"Mono ADC R2 Mux", "DMIC R1", "DMIC R1"},
1244 {"Mono ADC R2 Mux", "DMIC R2", "DMIC R2"},
1245 {"Mono ADC R2 Mux", "Mono DAC MIXR", "Mono DAC MIXR"},
1246
1247 {"Stereo ADC MIXL", "ADC1 Switch", "Stereo ADC L1 Mux"},
1248 {"Stereo ADC MIXL", "ADC2 Switch", "Stereo ADC L2 Mux"},
1249 {"Stereo ADC MIXL", NULL, "Stereo Filter"},
1250 {"Stereo Filter", NULL, "PLL1", check_sysclk1_source},
1251
1252 {"Stereo ADC MIXR", "ADC1 Switch", "Stereo ADC R1 Mux"},
1253 {"Stereo ADC MIXR", "ADC2 Switch", "Stereo ADC R2 Mux"},
1254 {"Stereo ADC MIXR", NULL, "Stereo Filter"},
1255 {"Stereo Filter", NULL, "PLL1", check_sysclk1_source},
1256
1257 {"Mono ADC MIXL", "ADC1 Switch", "Mono ADC L1 Mux"},
1258 {"Mono ADC MIXL", "ADC2 Switch", "Mono ADC L2 Mux"},
1259 {"Mono ADC MIXL", NULL, "Mono Left Filter"},
1260 {"Mono Left Filter", NULL, "PLL1", check_sysclk1_source},
1261
1262 {"Mono ADC MIXR", "ADC1 Switch", "Mono ADC R1 Mux"},
1263 {"Mono ADC MIXR", "ADC2 Switch", "Mono ADC R2 Mux"},
1264 {"Mono ADC MIXR", NULL, "Mono Right Filter"},
1265 {"Mono Right Filter", NULL, "PLL1", check_sysclk1_source},
1266
1267 {"IF2 ADC L", NULL, "Mono ADC MIXL"},
1268 {"IF2 ADC R", NULL, "Mono ADC MIXR"},
1269 {"IF1 ADC L", NULL, "Stereo ADC MIXL"},
1270 {"IF1 ADC R", NULL, "Stereo ADC MIXR"},
1271
1272 {"IF1 ADC", NULL, "I2S1"},
1273 {"IF1 ADC", NULL, "IF1 ADC L"},
1274 {"IF1 ADC", NULL, "IF1 ADC R"},
1275 {"IF2 ADC", NULL, "I2S2"},
1276 {"IF2 ADC", NULL, "IF2 ADC L"},
1277 {"IF2 ADC", NULL, "IF2 ADC R"},
1278
1279 {"DAI1 TX Mux", "1:1|2:2", "IF1 ADC"},
1280 {"DAI1 TX Mux", "1:2|2:1", "IF2 ADC"},
1281 {"DAI1 IF1 Mux", "1:1|2:1", "IF1 ADC"},
1282 {"DAI1 IF2 Mux", "1:1|2:1", "IF2 ADC"},
1283 {"SDI1 TX Mux", "IF1", "DAI1 IF1 Mux"},
1284 {"SDI1 TX Mux", "IF2", "DAI1 IF2 Mux"},
1285
1286 {"DAI2 TX Mux", "1:2|2:1", "IF1 ADC"},
1287 {"DAI2 TX Mux", "1:1|2:2", "IF2 ADC"},
1288 {"DAI2 IF1 Mux", "1:2|2:2", "IF1 ADC"},
1289 {"DAI2 IF2 Mux", "1:2|2:2", "IF2 ADC"},
1290 {"SDI2 TX Mux", "IF1", "DAI2 IF1 Mux"},
1291 {"SDI2 TX Mux", "IF2", "DAI2 IF2 Mux"},
1292
1293 {"AIF1TX", NULL, "DAI1 TX Mux"},
1294 {"AIF1TX", NULL, "SDI1 TX Mux"},
1295 {"AIF2TX", NULL, "DAI2 TX Mux"},
1296 {"AIF2TX", NULL, "SDI2 TX Mux"},
1297
1298 {"DAI1 RX Mux", "1:1|2:2", "AIF1RX"},
1299 {"DAI1 RX Mux", "1:1|2:1", "AIF1RX"},
1300 {"DAI1 RX Mux", "1:2|2:1", "AIF2RX"},
1301 {"DAI1 RX Mux", "1:2|2:2", "AIF2RX"},
1302
1303 {"DAI2 RX Mux", "1:2|2:1", "AIF1RX"},
1304 {"DAI2 RX Mux", "1:1|2:1", "AIF1RX"},
1305 {"DAI2 RX Mux", "1:1|2:2", "AIF2RX"},
1306 {"DAI2 RX Mux", "1:2|2:2", "AIF2RX"},
1307
1308 {"IF1 DAC", NULL, "I2S1"},
1309 {"IF1 DAC", NULL, "DAI1 RX Mux"},
1310 {"IF2 DAC", NULL, "I2S2"},
1311 {"IF2 DAC", NULL, "DAI2 RX Mux"},
1312
1313 {"IF1 DAC L", NULL, "IF1 DAC"},
1314 {"IF1 DAC R", NULL, "IF1 DAC"},
1315 {"IF2 DAC L", NULL, "IF2 DAC"},
1316 {"IF2 DAC R", NULL, "IF2 DAC"},
1317
1318 {"DAC MIXL", "Stereo ADC Switch", "Stereo ADC MIXL"},
1319 {"DAC MIXL", "INF1 Switch", "IF1 DAC L"},
1320 {"DAC MIXR", "Stereo ADC Switch", "Stereo ADC MIXR"},
1321 {"DAC MIXR", "INF1 Switch", "IF1 DAC R"},
1322
1323 {"ANC", NULL, "Stereo ADC MIXL"},
1324 {"ANC", NULL, "Stereo ADC MIXR"},
1325
1326 {"Audio DSP", NULL, "DAC MIXL"},
1327 {"Audio DSP", NULL, "DAC MIXR"},
1328
1329 {"DAC L2 Mux", "IF2", "IF2 DAC L"},
1330 {"DAC L2 Mux", "Base L/R", "Audio DSP"},
1331
1332 {"DAC R2 Mux", "IF2", "IF2 DAC R"},
1333
1334 {"Stereo DAC MIXL", "DAC L1 Switch", "DAC MIXL"},
1335 {"Stereo DAC MIXL", "DAC L2 Switch", "DAC L2 Mux"},
1336 {"Stereo DAC MIXL", "ANC Switch", "ANC"},
1337 {"Stereo DAC MIXR", "DAC R1 Switch", "DAC MIXR"},
1338 {"Stereo DAC MIXR", "DAC R2 Switch", "DAC R2 Mux"},
1339 {"Stereo DAC MIXR", "ANC Switch", "ANC"},
1340
1341 {"Mono DAC MIXL", "DAC L1 Switch", "DAC MIXL"},
1342 {"Mono DAC MIXL", "DAC L2 Switch", "DAC L2 Mux"},
1343 {"Mono DAC MIXL", "DAC R2 Switch", "DAC R2 Mux"},
1344 {"Mono DAC MIXR", "DAC R1 Switch", "DAC MIXR"},
1345 {"Mono DAC MIXR", "DAC R2 Switch", "DAC R2 Mux"},
1346 {"Mono DAC MIXR", "DAC L2 Switch", "DAC L2 Mux"},
1347
1348 {"DIG MIXL", "DAC L1 Switch", "DAC MIXL"},
1349 {"DIG MIXL", "DAC L2 Switch", "DAC L2 Mux"},
1350 {"DIG MIXR", "DAC R1 Switch", "DAC MIXR"},
1351 {"DIG MIXR", "DAC R2 Switch", "DAC R2 Mux"},
1352
1353 {"DAC L1", NULL, "Stereo DAC MIXL"},
1354 {"DAC L1", NULL, "PLL1", check_sysclk1_source},
1355 {"DAC R1", NULL, "Stereo DAC MIXR"},
1356 {"DAC R1", NULL, "PLL1", check_sysclk1_source},
1357 {"DAC L2", NULL, "Mono DAC MIXL"},
1358 {"DAC L2", NULL, "PLL1", check_sysclk1_source},
1359 {"DAC R2", NULL, "Mono DAC MIXR"},
1360 {"DAC R2", NULL, "PLL1", check_sysclk1_source},
1361
1362 {"SPK MIXL", "REC MIXL Switch", "RECMIXL"},
1363 {"SPK MIXL", "INL Switch", "INL VOL"},
1364 {"SPK MIXL", "DAC L1 Switch", "DAC L1"},
1365 {"SPK MIXL", "DAC L2 Switch", "DAC L2"},
1366 {"SPK MIXL", "OUT MIXL Switch", "OUT MIXL"},
1367 {"SPK MIXR", "REC MIXR Switch", "RECMIXR"},
1368 {"SPK MIXR", "INR Switch", "INR VOL"},
1369 {"SPK MIXR", "DAC R1 Switch", "DAC R1"},
1370 {"SPK MIXR", "DAC R2 Switch", "DAC R2"},
1371 {"SPK MIXR", "OUT MIXR Switch", "OUT MIXR"},
1372
1373 {"OUT MIXL", "SPK MIXL Switch", "SPK MIXL"},
1374 {"OUT MIXL", "BST1 Switch", "BST1"},
1375 {"OUT MIXL", "INL Switch", "INL VOL"},
1376 {"OUT MIXL", "REC MIXL Switch", "RECMIXL"},
1377 {"OUT MIXL", "DAC R2 Switch", "DAC R2"},
1378 {"OUT MIXL", "DAC L2 Switch", "DAC L2"},
1379 {"OUT MIXL", "DAC L1 Switch", "DAC L1"},
1380
1381 {"OUT MIXR", "SPK MIXR Switch", "SPK MIXR"},
1382 {"OUT MIXR", "BST2 Switch", "BST2"},
1383 {"OUT MIXR", "BST1 Switch", "BST1"},
1384 {"OUT MIXR", "INR Switch", "INR VOL"},
1385 {"OUT MIXR", "REC MIXR Switch", "RECMIXR"},
1386 {"OUT MIXR", "DAC L2 Switch", "DAC L2"},
1387 {"OUT MIXR", "DAC R2 Switch", "DAC R2"},
1388 {"OUT MIXR", "DAC R1 Switch", "DAC R1"},
1389
1390 {"SPKVOL L", NULL, "SPK MIXL"},
1391 {"SPKVOL R", NULL, "SPK MIXR"},
1392 {"HPOVOL L", NULL, "OUT MIXL"},
1393 {"HPOVOL R", NULL, "OUT MIXR"},
1394 {"OUTVOL L", NULL, "OUT MIXL"},
1395 {"OUTVOL R", NULL, "OUT MIXR"},
1396
1397 {"SPOL MIX", "DAC R1 Switch", "DAC R1"},
1398 {"SPOL MIX", "DAC L1 Switch", "DAC L1"},
1399 {"SPOL MIX", "SPKVOL R Switch", "SPKVOL R"},
1400 {"SPOL MIX", "SPKVOL L Switch", "SPKVOL L"},
1401 {"SPOL MIX", "BST1 Switch", "BST1"},
1402 {"SPOR MIX", "DAC R1 Switch", "DAC R1"},
1403 {"SPOR MIX", "SPKVOL R Switch", "SPKVOL R"},
1404 {"SPOR MIX", "BST1 Switch", "BST1"},
1405
1406 {"HPO MIX L", "HPO MIX DAC2 Switch", "DAC L2"},
1407 {"HPO MIX L", "HPO MIX DAC1 Switch", "DAC L1"},
1408 {"HPO MIX L", "HPO MIX HPVOL Switch", "HPOVOL L"},
1409 {"HPO MIX R", "HPO MIX DAC2 Switch", "DAC R2"},
1410 {"HPO MIX R", "HPO MIX DAC1 Switch", "DAC R1"},
1411 {"HPO MIX R", "HPO MIX HPVOL Switch", "HPOVOL R"},
1412
1413 {"LOUT MIX", "DAC L1 Switch", "DAC L1"},
1414 {"LOUT MIX", "DAC R1 Switch", "DAC R1"},
1415 {"LOUT MIX", "OUTVOL L Switch", "OUTVOL L"},
1416 {"LOUT MIX", "OUTVOL R Switch", "OUTVOL R"},
1417
1418 {"Mono MIX", "DAC R2 Switch", "DAC R2"},
1419 {"Mono MIX", "DAC L2 Switch", "DAC L2"},
1420 {"Mono MIX", "OUTVOL R Switch", "OUTVOL R"},
1421 {"Mono MIX", "OUTVOL L Switch", "OUTVOL L"},
1422 {"Mono MIX", "BST1 Switch", "BST1"},
1423
1424 {"HP L Amp", NULL, "HPO MIX L"},
1425 {"HP R Amp", NULL, "HPO MIX R"},
1426
1427 {"SPOLP", NULL, "SPOL MIX"},
1428 {"SPOLN", NULL, "SPOL MIX"},
1429 {"SPORP", NULL, "SPOR MIX"},
1430 {"SPORN", NULL, "SPOR MIX"},
1431
1432 {"SPOLP", NULL, "Improve SPK Amp Drv"},
1433 {"SPOLN", NULL, "Improve SPK Amp Drv"},
1434 {"SPORP", NULL, "Improve SPK Amp Drv"},
1435 {"SPORN", NULL, "Improve SPK Amp Drv"},
1436
1437 {"HPOL", NULL, "Improve HP Amp Drv"},
1438 {"HPOR", NULL, "Improve HP Amp Drv"},
1439
1440 {"HPOL", NULL, "HP L Amp"},
1441 {"HPOR", NULL, "HP R Amp"},
1442 {"LOUTL", NULL, "LOUT MIX"},
1443 {"LOUTR", NULL, "LOUT MIX"},
1444 {"MONOP", NULL, "Mono MIX"},
1445 {"MONON", NULL, "Mono MIX"},
1446 {"MONOP", NULL, "Improve MONO Amp Drv"},
1447};
1448
1449static int get_sdp_info(struct snd_soc_codec *codec, int dai_id)
1450{
1451 int ret = 0, val;
1452
1453 if (codec == NULL)
1454 return -EINVAL;
1455
1456 val = snd_soc_read(codec, RT5640_I2S1_SDP);
1457 val = (val & RT5640_I2S_IF_MASK) >> RT5640_I2S_IF_SFT;
1458 switch (dai_id) {
1459 case RT5640_AIF1:
1460 switch (val) {
1461 case RT5640_IF_123:
1462 case RT5640_IF_132:
1463 ret |= RT5640_U_IF1;
1464 break;
1465 case RT5640_IF_113:
1466 ret |= RT5640_U_IF1;
1467 case RT5640_IF_312:
1468 case RT5640_IF_213:
1469 ret |= RT5640_U_IF2;
1470 break;
1471 }
1472 break;
1473
1474 case RT5640_AIF2:
1475 switch (val) {
1476 case RT5640_IF_231:
1477 case RT5640_IF_213:
1478 ret |= RT5640_U_IF1;
1479 break;
1480 case RT5640_IF_223:
1481 ret |= RT5640_U_IF1;
1482 case RT5640_IF_123:
1483 case RT5640_IF_321:
1484 ret |= RT5640_U_IF2;
1485 break;
1486 }
1487 break;
1488
1489 default:
1490 ret = -EINVAL;
1491 break;
1492 }
1493
1494 return ret;
1495}
1496
1497static int get_clk_info(int sclk, int rate)
1498{
1499 int i, pd[] = {1, 2, 3, 4, 6, 8, 12, 16};
1500
1501 if (sclk <= 0 || rate <= 0)
1502 return -EINVAL;
1503
1504 rate = rate << 8;
1505 for (i = 0; i < ARRAY_SIZE(pd); i++)
1506 if (sclk == rate * pd[i])
1507 return i;
1508
1509 return -EINVAL;
1510}
1511
1512static int rt5640_hw_params(struct snd_pcm_substream *substream,
1513 struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
1514{
1515 struct snd_soc_pcm_runtime *rtd = substream->private_data;
1516 struct snd_soc_codec *codec = rtd->codec;
1517 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
1518 unsigned int val_len = 0, val_clk, mask_clk, dai_sel;
1519 int pre_div, bclk_ms, frame_size;
1520
1521 rt5640->lrck[dai->id] = params_rate(params);
1522 pre_div = get_clk_info(rt5640->sysclk, rt5640->lrck[dai->id]);
1523 if (pre_div < 0) {
1524 dev_err(codec->dev, "Unsupported clock setting\n");
1525 return -EINVAL;
1526 }
1527 frame_size = snd_soc_params_to_frame_size(params);
1528 if (frame_size < 0) {
1529 dev_err(codec->dev, "Unsupported frame size: %d\n", frame_size);
1530 return frame_size;
1531 }
1532 if (frame_size > 32)
1533 bclk_ms = 1;
1534 else
1535 bclk_ms = 0;
1536 rt5640->bclk[dai->id] = rt5640->lrck[dai->id] * (32 << bclk_ms);
1537
1538 dev_dbg(dai->dev, "bclk is %dHz and lrck is %dHz\n",
1539 rt5640->bclk[dai->id], rt5640->lrck[dai->id]);
1540 dev_dbg(dai->dev, "bclk_ms is %d and pre_div is %d for iis %d\n",
1541 bclk_ms, pre_div, dai->id);
1542
1543 switch (params_format(params)) {
1544 case SNDRV_PCM_FORMAT_S16_LE:
1545 break;
1546 case SNDRV_PCM_FORMAT_S20_3LE:
1547 val_len |= RT5640_I2S_DL_20;
1548 break;
1549 case SNDRV_PCM_FORMAT_S24_LE:
1550 val_len |= RT5640_I2S_DL_24;
1551 break;
1552 case SNDRV_PCM_FORMAT_S8:
1553 val_len |= RT5640_I2S_DL_8;
1554 break;
1555 default:
1556 return -EINVAL;
1557 }
1558
1559 dai_sel = get_sdp_info(codec, dai->id);
1560 if (dai_sel < 0) {
1561 dev_err(codec->dev, "Failed to get sdp info: %d\n", dai_sel);
1562 return -EINVAL;
1563 }
1564 if (dai_sel & RT5640_U_IF1) {
1565 mask_clk = RT5640_I2S_BCLK_MS1_MASK | RT5640_I2S_PD1_MASK;
1566 val_clk = bclk_ms << RT5640_I2S_BCLK_MS1_SFT |
1567 pre_div << RT5640_I2S_PD1_SFT;
1568 snd_soc_update_bits(codec, RT5640_I2S1_SDP,
1569 RT5640_I2S_DL_MASK, val_len);
1570 snd_soc_update_bits(codec, RT5640_ADDA_CLK1, mask_clk, val_clk);
1571 }
1572 if (dai_sel & RT5640_U_IF2) {
1573 mask_clk = RT5640_I2S_BCLK_MS2_MASK | RT5640_I2S_PD2_MASK;
1574 val_clk = bclk_ms << RT5640_I2S_BCLK_MS2_SFT |
1575 pre_div << RT5640_I2S_PD2_SFT;
1576 snd_soc_update_bits(codec, RT5640_I2S2_SDP,
1577 RT5640_I2S_DL_MASK, val_len);
1578 snd_soc_update_bits(codec, RT5640_ADDA_CLK1, mask_clk, val_clk);
1579 }
1580
1581 return 0;
1582}
1583
1584static int rt5640_set_dai_fmt(struct snd_soc_dai *dai, unsigned int fmt)
1585{
1586 struct snd_soc_codec *codec = dai->codec;
1587 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
1588 unsigned int reg_val = 0, dai_sel;
1589
1590 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
1591 case SND_SOC_DAIFMT_CBM_CFM:
1592 rt5640->master[dai->id] = 1;
1593 break;
1594 case SND_SOC_DAIFMT_CBS_CFS:
1595 reg_val |= RT5640_I2S_MS_S;
1596 rt5640->master[dai->id] = 0;
1597 break;
1598 default:
1599 return -EINVAL;
1600 }
1601
1602 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
1603 case SND_SOC_DAIFMT_NB_NF:
1604 break;
1605 case SND_SOC_DAIFMT_IB_NF:
1606 reg_val |= RT5640_I2S_BP_INV;
1607 break;
1608 default:
1609 return -EINVAL;
1610 }
1611
1612 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
1613 case SND_SOC_DAIFMT_I2S:
1614 break;
1615 case SND_SOC_DAIFMT_LEFT_J:
1616 reg_val |= RT5640_I2S_DF_LEFT;
1617 break;
1618 case SND_SOC_DAIFMT_DSP_A:
1619 reg_val |= RT5640_I2S_DF_PCM_A;
1620 break;
1621 case SND_SOC_DAIFMT_DSP_B:
1622 reg_val |= RT5640_I2S_DF_PCM_B;
1623 break;
1624 default:
1625 return -EINVAL;
1626 }
1627
1628 dai_sel = get_sdp_info(codec, dai->id);
1629 if (dai_sel < 0) {
1630 dev_err(codec->dev, "Failed to get sdp info: %d\n", dai_sel);
1631 return -EINVAL;
1632 }
1633 if (dai_sel & RT5640_U_IF1) {
1634 snd_soc_update_bits(codec, RT5640_I2S1_SDP,
1635 RT5640_I2S_MS_MASK | RT5640_I2S_BP_MASK |
1636 RT5640_I2S_DF_MASK, reg_val);
1637 }
1638 if (dai_sel & RT5640_U_IF2) {
1639 snd_soc_update_bits(codec, RT5640_I2S2_SDP,
1640 RT5640_I2S_MS_MASK | RT5640_I2S_BP_MASK |
1641 RT5640_I2S_DF_MASK, reg_val);
1642 }
1643
1644 return 0;
1645}
1646
1647static int rt5640_set_dai_sysclk(struct snd_soc_dai *dai,
1648 int clk_id, unsigned int freq, int dir)
1649{
1650 struct snd_soc_codec *codec = dai->codec;
1651 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
1652 unsigned int reg_val = 0;
1653
1654 if (freq == rt5640->sysclk && clk_id == rt5640->sysclk_src)
1655 return 0;
1656
1657 switch (clk_id) {
1658 case RT5640_SCLK_S_MCLK:
1659 reg_val |= RT5640_SCLK_SRC_MCLK;
1660 break;
1661 case RT5640_SCLK_S_PLL1:
1662 reg_val |= RT5640_SCLK_SRC_PLL1;
1663 break;
1664 case RT5640_SCLK_S_PLL1_TK:
1665 reg_val |= RT5640_SCLK_SRC_PLL1T;
1666 break;
1667 case RT5640_SCLK_S_RCCLK:
1668 reg_val |= RT5640_SCLK_SRC_RCCLK;
1669 break;
1670 default:
1671 dev_err(codec->dev, "Invalid clock id (%d)\n", clk_id);
1672 return -EINVAL;
1673 }
1674 snd_soc_update_bits(codec, RT5640_GLB_CLK,
1675 RT5640_SCLK_SRC_MASK, reg_val);
1676 rt5640->sysclk = freq;
1677 rt5640->sysclk_src = clk_id;
1678
1679 dev_dbg(dai->dev, "Sysclk is %dHz and clock id is %d\n", freq, clk_id);
1680 return 0;
1681}
1682
1683/**
1684 * rt5640_pll_calc - Calculate PLL M/N/K code.
1685 * @freq_in: external clock provided to codec.
1686 * @freq_out: target clock which codec works on.
1687 * @pll_code: Pointer to structure with M, N, K and bypass flag.
1688 *
1689 * Calculate M/N/K code to configure PLL for codec. And K is assigned to 2
1690 * which make calculation more efficiently.
1691 *
1692 * Returns 0 for success or negative error code.
1693 */
1694static int rt5640_pll_calc(const unsigned int freq_in,
1695 const unsigned int freq_out, struct rt5640_pll_code *pll_code)
1696{
1697 int max_n = RT5640_PLL_N_MAX, max_m = RT5640_PLL_M_MAX;
1698 int n = 0, m = 0, red, n_t, m_t, in_t, out_t;
1699 int red_t = abs(freq_out - freq_in);
1700 bool bypass = false;
1701
1702 if (RT5640_PLL_INP_MAX < freq_in || RT5640_PLL_INP_MIN > freq_in)
1703 return -EINVAL;
1704
1705 for (n_t = 0; n_t <= max_n; n_t++) {
1706 in_t = (freq_in >> 1) + (freq_in >> 2) * n_t;
1707 if (in_t < 0)
1708 continue;
1709 if (in_t == freq_out) {
1710 bypass = true;
1711 n = n_t;
1712 goto code_find;
1713 }
1714 for (m_t = 0; m_t <= max_m; m_t++) {
1715 out_t = in_t / (m_t + 2);
1716 red = abs(out_t - freq_out);
1717 if (red < red_t) {
1718 n = n_t;
1719 m = m_t;
1720 if (red == 0)
1721 goto code_find;
1722 red_t = red;
1723 }
1724 }
1725 }
1726 pr_debug("Only get approximation about PLL\n");
1727
1728code_find:
1729 pll_code->m_bp = bypass;
1730 pll_code->m_code = m;
1731 pll_code->n_code = n;
1732 pll_code->k_code = 2;
1733 return 0;
1734}
1735
1736static int rt5640_set_dai_pll(struct snd_soc_dai *dai, int pll_id, int source,
1737 unsigned int freq_in, unsigned int freq_out)
1738{
1739 struct snd_soc_codec *codec = dai->codec;
1740 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
1741 struct rt5640_pll_code *pll_code = &rt5640->pll_code;
1742 int ret, dai_sel;
1743
1744 if (source == rt5640->pll_src && freq_in == rt5640->pll_in &&
1745 freq_out == rt5640->pll_out)
1746 return 0;
1747
1748 if (!freq_in || !freq_out) {
1749 dev_dbg(codec->dev, "PLL disabled\n");
1750
1751 rt5640->pll_in = 0;
1752 rt5640->pll_out = 0;
1753 snd_soc_update_bits(codec, RT5640_GLB_CLK,
1754 RT5640_SCLK_SRC_MASK, RT5640_SCLK_SRC_MCLK);
1755 return 0;
1756 }
1757
1758 switch (source) {
1759 case RT5640_PLL1_S_MCLK:
1760 snd_soc_update_bits(codec, RT5640_GLB_CLK,
1761 RT5640_PLL1_SRC_MASK, RT5640_PLL1_SRC_MCLK);
1762 break;
1763 case RT5640_PLL1_S_BCLK1:
1764 case RT5640_PLL1_S_BCLK2:
1765 dai_sel = get_sdp_info(codec, dai->id);
1766 if (dai_sel < 0) {
1767 dev_err(codec->dev,
1768 "Failed to get sdp info: %d\n", dai_sel);
1769 return -EINVAL;
1770 }
1771 if (dai_sel & RT5640_U_IF1) {
1772 snd_soc_update_bits(codec, RT5640_GLB_CLK,
1773 RT5640_PLL1_SRC_MASK, RT5640_PLL1_SRC_BCLK1);
1774 }
1775 if (dai_sel & RT5640_U_IF2) {
1776 snd_soc_update_bits(codec, RT5640_GLB_CLK,
1777 RT5640_PLL1_SRC_MASK, RT5640_PLL1_SRC_BCLK2);
1778 }
1779 break;
1780 default:
1781 dev_err(codec->dev, "Unknown PLL source %d\n", source);
1782 return -EINVAL;
1783 }
1784
1785 ret = rt5640_pll_calc(freq_in, freq_out, pll_code);
1786 if (ret < 0) {
1787 dev_err(codec->dev, "Unsupport input clock %d\n", freq_in);
1788 return ret;
1789 }
1790
1791 dev_dbg(codec->dev, "bypass=%d m=%d n=%d k=2\n", pll_code->m_bp,
1792 (pll_code->m_bp ? 0 : pll_code->m_code), pll_code->n_code);
1793
1794 snd_soc_write(codec, RT5640_PLL_CTRL1,
1795 pll_code->n_code << RT5640_PLL_N_SFT | pll_code->k_code);
1796 snd_soc_write(codec, RT5640_PLL_CTRL2,
1797 (pll_code->m_bp ? 0 : pll_code->m_code) << RT5640_PLL_M_SFT |
1798 pll_code->m_bp << RT5640_PLL_M_BP_SFT);
1799
1800 rt5640->pll_in = freq_in;
1801 rt5640->pll_out = freq_out;
1802 rt5640->pll_src = source;
1803
1804 return 0;
1805}
1806
1807static int rt5640_set_bias_level(struct snd_soc_codec *codec,
1808 enum snd_soc_bias_level level)
1809{
1810 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
1811 switch (level) {
1812 case SND_SOC_BIAS_STANDBY:
1813 if (SND_SOC_BIAS_OFF == codec->dapm.bias_level) {
1814 regcache_cache_only(rt5640->regmap, false);
1815 snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
1816 RT5640_PWR_VREF1 | RT5640_PWR_MB |
1817 RT5640_PWR_BG | RT5640_PWR_VREF2,
1818 RT5640_PWR_VREF1 | RT5640_PWR_MB |
1819 RT5640_PWR_BG | RT5640_PWR_VREF2);
1820 mdelay(10);
1821 snd_soc_update_bits(codec, RT5640_PWR_ANLG1,
1822 RT5640_PWR_FV1 | RT5640_PWR_FV2,
1823 RT5640_PWR_FV1 | RT5640_PWR_FV2);
1824 regcache_sync(rt5640->regmap);
1825 snd_soc_update_bits(codec, RT5640_DUMMY1,
1826 0x0301, 0x0301);
1827 snd_soc_update_bits(codec, RT5640_DEPOP_M1,
1828 0x001d, 0x0019);
1829 snd_soc_update_bits(codec, RT5640_DEPOP_M2,
1830 0x2000, 0x2000);
1831 snd_soc_update_bits(codec, RT5640_MICBIAS,
1832 0x0030, 0x0030);
1833 }
1834 break;
1835
1836 case SND_SOC_BIAS_OFF:
1837 snd_soc_write(codec, RT5640_DEPOP_M1, 0x0004);
1838 snd_soc_write(codec, RT5640_DEPOP_M2, 0x1100);
1839 snd_soc_update_bits(codec, RT5640_DUMMY1, 0x1, 0);
1840 snd_soc_write(codec, RT5640_PWR_DIG1, 0x0000);
1841 snd_soc_write(codec, RT5640_PWR_DIG2, 0x0000);
1842 snd_soc_write(codec, RT5640_PWR_VOL, 0x0000);
1843 snd_soc_write(codec, RT5640_PWR_MIXER, 0x0000);
1844 snd_soc_write(codec, RT5640_PWR_ANLG1, 0x0000);
1845 snd_soc_write(codec, RT5640_PWR_ANLG2, 0x0000);
1846 break;
1847
1848 default:
1849 break;
1850 }
1851 codec->dapm.bias_level = level;
1852
1853 return 0;
1854}
1855
1856static int rt5640_probe(struct snd_soc_codec *codec)
1857{
1858 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
1859 int ret;
1860
1861 rt5640->codec = codec;
1862 codec->control_data = rt5640->regmap;
1863
1864 ret = snd_soc_codec_set_cache_io(codec, 8, 16, SND_SOC_REGMAP);
1865 if (ret != 0) {
1866 dev_err(codec->dev, "Failed to set cache I/O: %d\n", ret);
1867 return ret;
1868 }
1869
1870 codec->dapm.idle_bias_off = 1;
1871 rt5640_set_bias_level(codec, SND_SOC_BIAS_OFF);
1872
1873 snd_soc_update_bits(codec, RT5640_DUMMY1, 0x0301, 0x0301);
1874 snd_soc_update_bits(codec, RT5640_DEPOP_M1, 0x001d, 0x0019);
1875 snd_soc_update_bits(codec, RT5640_DEPOP_M2, 0x2000, 0x2000);
1876 snd_soc_update_bits(codec, RT5640_MICBIAS, 0x0030, 0x0030);
1877 snd_soc_update_bits(codec, RT5640_DSP_PATH2, 0xfc00, 0x0c00);
1878
1879 return 0;
1880}
1881
1882static int rt5640_remove(struct snd_soc_codec *codec)
1883{
1884 rt5640_reset(codec);
1885
1886 return 0;
1887}
1888
1889#ifdef CONFIG_PM
1890static int rt5640_suspend(struct snd_soc_codec *codec)
1891{
1892 struct rt5640_priv *rt5640 = snd_soc_codec_get_drvdata(codec);
1893
1894 rt5640_set_bias_level(codec, SND_SOC_BIAS_OFF);
1895 rt5640_reset(codec);
1896 regcache_cache_only(rt5640->regmap, true);
1897 regcache_mark_dirty(rt5640->regmap);
1898
1899 return 0;
1900}
1901
1902static int rt5640_resume(struct snd_soc_codec *codec)
1903{
1904 rt5640_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
1905
1906 return 0;
1907}
1908#else
1909#define rt5640_suspend NULL
1910#define rt5640_resume NULL
1911#endif
1912
1913#define RT5640_STEREO_RATES SNDRV_PCM_RATE_8000_96000
1914#define RT5640_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3LE | \
1915 SNDRV_PCM_FMTBIT_S24_LE | SNDRV_PCM_FMTBIT_S8)
1916
1917struct snd_soc_dai_ops rt5640_aif_dai_ops = {
1918 .hw_params = rt5640_hw_params,
1919 .set_fmt = rt5640_set_dai_fmt,
1920 .set_sysclk = rt5640_set_dai_sysclk,
1921 .set_pll = rt5640_set_dai_pll,
1922};
1923
1924struct snd_soc_dai_driver rt5640_dai[] = {
1925 {
1926 .name = "rt5640-aif1",
1927 .id = RT5640_AIF1,
1928 .playback = {
1929 .stream_name = "AIF1 Playback",
1930 .channels_min = 1,
1931 .channels_max = 2,
1932 .rates = RT5640_STEREO_RATES,
1933 .formats = RT5640_FORMATS,
1934 },
1935 .capture = {
1936 .stream_name = "AIF1 Capture",
1937 .channels_min = 1,
1938 .channels_max = 2,
1939 .rates = RT5640_STEREO_RATES,
1940 .formats = RT5640_FORMATS,
1941 },
1942 .ops = &rt5640_aif_dai_ops,
1943 },
1944 {
1945 .name = "rt5640-aif2",
1946 .id = RT5640_AIF2,
1947 .playback = {
1948 .stream_name = "AIF2 Playback",
1949 .channels_min = 1,
1950 .channels_max = 2,
1951 .rates = RT5640_STEREO_RATES,
1952 .formats = RT5640_FORMATS,
1953 },
1954 .capture = {
1955 .stream_name = "AIF2 Capture",
1956 .channels_min = 1,
1957 .channels_max = 2,
1958 .rates = RT5640_STEREO_RATES,
1959 .formats = RT5640_FORMATS,
1960 },
1961 .ops = &rt5640_aif_dai_ops,
1962 },
1963};
1964
1965static struct snd_soc_codec_driver soc_codec_dev_rt5640 = {
1966 .probe = rt5640_probe,
1967 .remove = rt5640_remove,
1968 .suspend = rt5640_suspend,
1969 .resume = rt5640_resume,
1970 .set_bias_level = rt5640_set_bias_level,
1971 .controls = rt5640_snd_controls,
1972 .num_controls = ARRAY_SIZE(rt5640_snd_controls),
1973 .dapm_widgets = rt5640_dapm_widgets,
1974 .num_dapm_widgets = ARRAY_SIZE(rt5640_dapm_widgets),
1975 .dapm_routes = rt5640_dapm_routes,
1976 .num_dapm_routes = ARRAY_SIZE(rt5640_dapm_routes),
1977};
1978
1979static const struct regmap_config rt5640_regmap = {
1980 .reg_bits = 8,
1981 .val_bits = 16,
1982
1983 .max_register = RT5640_VENDOR_ID2 + 1 + (ARRAY_SIZE(rt5640_ranges) *
1984 RT5640_PR_SPACING),
1985 .volatile_reg = rt5640_volatile_register,
1986 .readable_reg = rt5640_readable_register,
1987
1988 .cache_type = REGCACHE_RBTREE,
1989 .reg_defaults = rt5640_reg,
1990 .num_reg_defaults = ARRAY_SIZE(rt5640_reg),
1991 .ranges = rt5640_ranges,
1992 .num_ranges = ARRAY_SIZE(rt5640_ranges),
1993};
1994
1995static const struct i2c_device_id rt5640_i2c_id[] = {
1996 { "rt5640", 0 },
1997 { }
1998};
1999MODULE_DEVICE_TABLE(i2c, rt5640_i2c_id);
2000
2001static int rt5640_i2c_probe(struct i2c_client *i2c,
2002 const struct i2c_device_id *id)
2003{
2004 struct rt5640_platform_data *pdata = dev_get_platdata(&i2c->dev);
2005 struct rt5640_priv *rt5640;
2006 int ret;
2007 unsigned int val;
2008
2009 rt5640 = devm_kzalloc(&i2c->dev,
2010 sizeof(struct rt5640_priv),
2011 GFP_KERNEL);
2012 if (NULL == rt5640)
2013 return -ENOMEM;
2014
2015 rt5640->regmap = devm_regmap_init_i2c(i2c, &rt5640_regmap);
2016 if (IS_ERR(rt5640->regmap)) {
2017 ret = PTR_ERR(rt5640->regmap);
2018 dev_err(&i2c->dev, "Failed to allocate register map: %d\n",
2019 ret);
2020 return ret;
2021 }
2022
2023 if (pdata)
2024 rt5640->pdata = *pdata;
2025
2026 i2c_set_clientdata(i2c, rt5640);
2027
2028 if (rt5640->pdata.ldo1_en) {
2029 ret = devm_gpio_request_one(&i2c->dev, rt5640->pdata.ldo1_en,
2030 GPIOF_OUT_INIT_HIGH,
2031 "RT5640 LDO1_EN");
2032 if (ret < 0) {
2033 dev_err(&i2c->dev, "Failed to request LDO1_EN %d: %d\n",
2034 rt5640->pdata.ldo1_en, ret);
2035 return ret;
2036 }
2037 msleep(400);
2038 }
2039
2040 regmap_read(rt5640->regmap, RT5640_VENDOR_ID2, &val);
2041 if ((val != RT5640_DEVICE_ID)) {
2042 dev_err(&i2c->dev,
2043 "Device with ID register %x is not rt5640/39\n", val);
2044 return -ENODEV;
2045 }
2046
2047 regmap_write(rt5640->regmap, RT5640_RESET, 0);
2048
2049 ret = regmap_register_patch(rt5640->regmap, init_list,
2050 ARRAY_SIZE(init_list));
2051 if (ret != 0)
2052 dev_warn(&i2c->dev, "Failed to apply regmap patch: %d\n", ret);
2053
2054 if (rt5640->pdata.in1_diff)
2055 regmap_update_bits(rt5640->regmap, RT5640_IN1_IN2,
2056 RT5640_IN_DF1, RT5640_IN_DF1);
2057
2058 if (rt5640->pdata.in2_diff)
2059 regmap_update_bits(rt5640->regmap, RT5640_IN3_IN4,
2060 RT5640_IN_DF2, RT5640_IN_DF2);
2061
2062 ret = snd_soc_register_codec(&i2c->dev, &soc_codec_dev_rt5640,
2063 rt5640_dai, ARRAY_SIZE(rt5640_dai));
2064 if (ret < 0)
2065 goto err;
2066
2067 return 0;
2068err:
2069 return ret;
2070}
2071
2072static int rt5640_i2c_remove(struct i2c_client *i2c)
2073{
2074 snd_soc_unregister_codec(&i2c->dev);
2075
2076 return 0;
2077}
2078
2079struct i2c_driver rt5640_i2c_driver = {
2080 .driver = {
2081 .name = "rt5640",
2082 .owner = THIS_MODULE,
2083 },
2084 .probe = rt5640_i2c_probe,
2085 .remove = rt5640_i2c_remove,
2086 .id_table = rt5640_i2c_id,
2087};
2088module_i2c_driver(rt5640_i2c_driver);
2089
2090MODULE_DESCRIPTION("ASoC RT5640 driver");
2091MODULE_AUTHOR("Johnny Hsu <johnnyhsu@realtek.com>");
2092MODULE_LICENSE("GPL v2");
ubuntu-bionic-kernel mirror