]>
Commit | Line | Data |
---|---|---|
4c9649a9 JM |
1 | /* |
2 | * Alpha emulation cpu micro-operations helpers for qemu. | |
5fafdf24 | 3 | * |
4c9649a9 JM |
4 | * Copyright (c) 2007 Jocelyn Mayer |
5 | * | |
6 | * This library is free software; you can redistribute it and/or | |
7 | * modify it under the terms of the GNU Lesser General Public | |
8 | * License as published by the Free Software Foundation; either | |
9 | * version 2 of the License, or (at your option) any later version. | |
10 | * | |
11 | * This library is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
14 | * Lesser General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU Lesser General Public | |
8167ee88 | 17 | * License along with this library; if not, see <http://www.gnu.org/licenses/>. |
4c9649a9 JM |
18 | */ |
19 | ||
20 | #include "exec.h" | |
603fccce | 21 | #include "host-utils.h" |
4c9649a9 | 22 | #include "softfloat.h" |
a7812ae4 | 23 | #include "helper.h" |
4c9649a9 | 24 | |
4c9649a9 JM |
25 | void helper_tb_flush (void) |
26 | { | |
75fc9c0c | 27 | tb_flush(env); |
4c9649a9 JM |
28 | } |
29 | ||
4c9649a9 JM |
30 | /*****************************************************************************/ |
31 | /* Exceptions processing helpers */ | |
6ad02592 | 32 | void helper_excp (int excp, int error) |
4c9649a9 JM |
33 | { |
34 | env->exception_index = excp; | |
35 | env->error_code = error; | |
36 | cpu_loop_exit(); | |
37 | } | |
38 | ||
6ad02592 | 39 | uint64_t helper_load_pcc (void) |
4c9649a9 JM |
40 | { |
41 | /* XXX: TODO */ | |
6ad02592 | 42 | return 0; |
4c9649a9 JM |
43 | } |
44 | ||
f18cd223 | 45 | uint64_t helper_load_fpcr (void) |
4c9649a9 | 46 | { |
f18cd223 | 47 | uint64_t ret = 0; |
4c9649a9 | 48 | #ifdef CONFIG_SOFTFLOAT |
f18cd223 | 49 | ret |= env->fp_status.float_exception_flags << 52; |
4c9649a9 | 50 | if (env->fp_status.float_exception_flags) |
f18cd223 | 51 | ret |= 1ULL << 63; |
4c9649a9 JM |
52 | env->ipr[IPR_EXC_SUM] &= ~0x3E: |
53 | env->ipr[IPR_EXC_SUM] |= env->fp_status.float_exception_flags << 1; | |
54 | #endif | |
55 | switch (env->fp_status.float_rounding_mode) { | |
56 | case float_round_nearest_even: | |
f18cd223 | 57 | ret |= 2ULL << 58; |
4c9649a9 JM |
58 | break; |
59 | case float_round_down: | |
f18cd223 | 60 | ret |= 1ULL << 58; |
4c9649a9 JM |
61 | break; |
62 | case float_round_up: | |
f18cd223 | 63 | ret |= 3ULL << 58; |
4c9649a9 JM |
64 | break; |
65 | case float_round_to_zero: | |
66 | break; | |
67 | } | |
f18cd223 | 68 | return ret; |
4c9649a9 JM |
69 | } |
70 | ||
f18cd223 | 71 | void helper_store_fpcr (uint64_t val) |
4c9649a9 JM |
72 | { |
73 | #ifdef CONFIG_SOFTFLOAT | |
f18cd223 | 74 | set_float_exception_flags((val >> 52) & 0x3F, &FP_STATUS); |
4c9649a9 | 75 | #endif |
f18cd223 | 76 | switch ((val >> 58) & 3) { |
4c9649a9 JM |
77 | case 0: |
78 | set_float_rounding_mode(float_round_to_zero, &FP_STATUS); | |
79 | break; | |
80 | case 1: | |
81 | set_float_rounding_mode(float_round_down, &FP_STATUS); | |
82 | break; | |
83 | case 2: | |
84 | set_float_rounding_mode(float_round_nearest_even, &FP_STATUS); | |
85 | break; | |
86 | case 3: | |
87 | set_float_rounding_mode(float_round_up, &FP_STATUS); | |
88 | break; | |
89 | } | |
90 | } | |
91 | ||
6ad02592 | 92 | spinlock_t intr_cpu_lock = SPIN_LOCK_UNLOCKED; |
4c9649a9 | 93 | |
6ad02592 | 94 | uint64_t helper_rs(void) |
4c9649a9 | 95 | { |
6ad02592 AJ |
96 | uint64_t tmp; |
97 | ||
98 | spin_lock(&intr_cpu_lock); | |
99 | tmp = env->intr_flag; | |
100 | env->intr_flag = 1; | |
101 | spin_unlock(&intr_cpu_lock); | |
102 | ||
103 | return tmp; | |
4c9649a9 JM |
104 | } |
105 | ||
6ad02592 | 106 | uint64_t helper_rc(void) |
4c9649a9 | 107 | { |
6ad02592 AJ |
108 | uint64_t tmp; |
109 | ||
110 | spin_lock(&intr_cpu_lock); | |
111 | tmp = env->intr_flag; | |
112 | env->intr_flag = 0; | |
113 | spin_unlock(&intr_cpu_lock); | |
114 | ||
115 | return tmp; | |
4c9649a9 JM |
116 | } |
117 | ||
04acd307 | 118 | uint64_t helper_addqv (uint64_t op1, uint64_t op2) |
4c9649a9 | 119 | { |
04acd307 AJ |
120 | uint64_t tmp = op1; |
121 | op1 += op2; | |
122 | if (unlikely((tmp ^ op2 ^ (-1ULL)) & (tmp ^ op1) & (1ULL << 63))) { | |
4c9649a9 JM |
123 | helper_excp(EXCP_ARITH, EXCP_ARITH_OVERFLOW); |
124 | } | |
04acd307 | 125 | return op1; |
4c9649a9 JM |
126 | } |
127 | ||
04acd307 | 128 | uint64_t helper_addlv (uint64_t op1, uint64_t op2) |
4c9649a9 | 129 | { |
04acd307 AJ |
130 | uint64_t tmp = op1; |
131 | op1 = (uint32_t)(op1 + op2); | |
132 | if (unlikely((tmp ^ op2 ^ (-1UL)) & (tmp ^ op1) & (1UL << 31))) { | |
4c9649a9 JM |
133 | helper_excp(EXCP_ARITH, EXCP_ARITH_OVERFLOW); |
134 | } | |
04acd307 | 135 | return op1; |
4c9649a9 JM |
136 | } |
137 | ||
04acd307 | 138 | uint64_t helper_subqv (uint64_t op1, uint64_t op2) |
4c9649a9 | 139 | { |
ecbb5ea1 AJ |
140 | uint64_t res; |
141 | res = op1 - op2; | |
142 | if (unlikely((op1 ^ op2) & (res ^ op1) & (1ULL << 63))) { | |
4c9649a9 JM |
143 | helper_excp(EXCP_ARITH, EXCP_ARITH_OVERFLOW); |
144 | } | |
ecbb5ea1 | 145 | return res; |
4c9649a9 JM |
146 | } |
147 | ||
04acd307 | 148 | uint64_t helper_sublv (uint64_t op1, uint64_t op2) |
4c9649a9 | 149 | { |
ecbb5ea1 AJ |
150 | uint32_t res; |
151 | res = op1 - op2; | |
152 | if (unlikely((op1 ^ op2) & (res ^ op1) & (1UL << 31))) { | |
4c9649a9 JM |
153 | helper_excp(EXCP_ARITH, EXCP_ARITH_OVERFLOW); |
154 | } | |
ecbb5ea1 | 155 | return res; |
4c9649a9 JM |
156 | } |
157 | ||
04acd307 | 158 | uint64_t helper_mullv (uint64_t op1, uint64_t op2) |
4c9649a9 | 159 | { |
04acd307 | 160 | int64_t res = (int64_t)op1 * (int64_t)op2; |
4c9649a9 JM |
161 | |
162 | if (unlikely((int32_t)res != res)) { | |
163 | helper_excp(EXCP_ARITH, EXCP_ARITH_OVERFLOW); | |
164 | } | |
04acd307 | 165 | return (int64_t)((int32_t)res); |
4c9649a9 JM |
166 | } |
167 | ||
04acd307 | 168 | uint64_t helper_mulqv (uint64_t op1, uint64_t op2) |
4c9649a9 | 169 | { |
e14fe0a9 JM |
170 | uint64_t tl, th; |
171 | ||
04acd307 | 172 | muls64(&tl, &th, op1, op2); |
e14fe0a9 JM |
173 | /* If th != 0 && th != -1, then we had an overflow */ |
174 | if (unlikely((th + 1) > 1)) { | |
4c9649a9 JM |
175 | helper_excp(EXCP_ARITH, EXCP_ARITH_OVERFLOW); |
176 | } | |
04acd307 AJ |
177 | return tl; |
178 | } | |
179 | ||
180 | uint64_t helper_umulh (uint64_t op1, uint64_t op2) | |
181 | { | |
182 | uint64_t tl, th; | |
183 | ||
184 | mulu64(&tl, &th, op1, op2); | |
185 | return th; | |
4c9649a9 JM |
186 | } |
187 | ||
ae8ecd42 | 188 | uint64_t helper_ctpop (uint64_t arg) |
4c9649a9 | 189 | { |
ae8ecd42 | 190 | return ctpop64(arg); |
4c9649a9 JM |
191 | } |
192 | ||
ae8ecd42 | 193 | uint64_t helper_ctlz (uint64_t arg) |
4c9649a9 | 194 | { |
ae8ecd42 | 195 | return clz64(arg); |
4c9649a9 JM |
196 | } |
197 | ||
ae8ecd42 | 198 | uint64_t helper_cttz (uint64_t arg) |
4c9649a9 | 199 | { |
ae8ecd42 | 200 | return ctz64(arg); |
4c9649a9 JM |
201 | } |
202 | ||
f071b4d3 | 203 | static always_inline uint64_t byte_zap (uint64_t op, uint8_t mskb) |
4c9649a9 JM |
204 | { |
205 | uint64_t mask; | |
206 | ||
207 | mask = 0; | |
208 | mask |= ((mskb >> 0) & 1) * 0x00000000000000FFULL; | |
209 | mask |= ((mskb >> 1) & 1) * 0x000000000000FF00ULL; | |
210 | mask |= ((mskb >> 2) & 1) * 0x0000000000FF0000ULL; | |
211 | mask |= ((mskb >> 3) & 1) * 0x00000000FF000000ULL; | |
212 | mask |= ((mskb >> 4) & 1) * 0x000000FF00000000ULL; | |
213 | mask |= ((mskb >> 5) & 1) * 0x0000FF0000000000ULL; | |
214 | mask |= ((mskb >> 6) & 1) * 0x00FF000000000000ULL; | |
215 | mask |= ((mskb >> 7) & 1) * 0xFF00000000000000ULL; | |
216 | ||
217 | return op & ~mask; | |
218 | } | |
219 | ||
b3249f63 | 220 | uint64_t helper_mskbl(uint64_t val, uint64_t mask) |
4c9649a9 | 221 | { |
b3249f63 | 222 | return byte_zap(val, 0x01 << (mask & 7)); |
4c9649a9 JM |
223 | } |
224 | ||
b3249f63 | 225 | uint64_t helper_insbl(uint64_t val, uint64_t mask) |
4c9649a9 | 226 | { |
b3249f63 AJ |
227 | val <<= (mask & 7) * 8; |
228 | return byte_zap(val, ~(0x01 << (mask & 7))); | |
4c9649a9 JM |
229 | } |
230 | ||
b3249f63 | 231 | uint64_t helper_mskwl(uint64_t val, uint64_t mask) |
4c9649a9 | 232 | { |
b3249f63 | 233 | return byte_zap(val, 0x03 << (mask & 7)); |
4c9649a9 JM |
234 | } |
235 | ||
b3249f63 | 236 | uint64_t helper_inswl(uint64_t val, uint64_t mask) |
4c9649a9 | 237 | { |
b3249f63 AJ |
238 | val <<= (mask & 7) * 8; |
239 | return byte_zap(val, ~(0x03 << (mask & 7))); | |
4c9649a9 JM |
240 | } |
241 | ||
b3249f63 | 242 | uint64_t helper_mskll(uint64_t val, uint64_t mask) |
4c9649a9 | 243 | { |
b3249f63 | 244 | return byte_zap(val, 0x0F << (mask & 7)); |
4c9649a9 JM |
245 | } |
246 | ||
b3249f63 | 247 | uint64_t helper_insll(uint64_t val, uint64_t mask) |
4c9649a9 | 248 | { |
b3249f63 AJ |
249 | val <<= (mask & 7) * 8; |
250 | return byte_zap(val, ~(0x0F << (mask & 7))); | |
4c9649a9 JM |
251 | } |
252 | ||
b3249f63 | 253 | uint64_t helper_zap(uint64_t val, uint64_t mask) |
4c9649a9 | 254 | { |
b3249f63 | 255 | return byte_zap(val, mask); |
4c9649a9 JM |
256 | } |
257 | ||
b3249f63 | 258 | uint64_t helper_zapnot(uint64_t val, uint64_t mask) |
4c9649a9 | 259 | { |
b3249f63 | 260 | return byte_zap(val, ~mask); |
4c9649a9 JM |
261 | } |
262 | ||
b3249f63 | 263 | uint64_t helper_mskql(uint64_t val, uint64_t mask) |
4c9649a9 | 264 | { |
b3249f63 | 265 | return byte_zap(val, 0xFF << (mask & 7)); |
4c9649a9 JM |
266 | } |
267 | ||
b3249f63 | 268 | uint64_t helper_insql(uint64_t val, uint64_t mask) |
4c9649a9 | 269 | { |
b3249f63 AJ |
270 | val <<= (mask & 7) * 8; |
271 | return byte_zap(val, ~(0xFF << (mask & 7))); | |
4c9649a9 JM |
272 | } |
273 | ||
b3249f63 | 274 | uint64_t helper_mskwh(uint64_t val, uint64_t mask) |
4c9649a9 | 275 | { |
b3249f63 | 276 | return byte_zap(val, (0x03 << (mask & 7)) >> 8); |
4c9649a9 JM |
277 | } |
278 | ||
b3249f63 | 279 | uint64_t helper_inswh(uint64_t val, uint64_t mask) |
4c9649a9 | 280 | { |
b3249f63 AJ |
281 | val >>= 64 - ((mask & 7) * 8); |
282 | return byte_zap(val, ~((0x03 << (mask & 7)) >> 8)); | |
4c9649a9 JM |
283 | } |
284 | ||
b3249f63 | 285 | uint64_t helper_msklh(uint64_t val, uint64_t mask) |
4c9649a9 | 286 | { |
b3249f63 | 287 | return byte_zap(val, (0x0F << (mask & 7)) >> 8); |
4c9649a9 JM |
288 | } |
289 | ||
b3249f63 | 290 | uint64_t helper_inslh(uint64_t val, uint64_t mask) |
4c9649a9 | 291 | { |
b3249f63 AJ |
292 | val >>= 64 - ((mask & 7) * 8); |
293 | return byte_zap(val, ~((0x0F << (mask & 7)) >> 8)); | |
4c9649a9 JM |
294 | } |
295 | ||
b3249f63 | 296 | uint64_t helper_mskqh(uint64_t val, uint64_t mask) |
4c9649a9 | 297 | { |
b3249f63 | 298 | return byte_zap(val, (0xFF << (mask & 7)) >> 8); |
4c9649a9 JM |
299 | } |
300 | ||
b3249f63 | 301 | uint64_t helper_insqh(uint64_t val, uint64_t mask) |
4c9649a9 | 302 | { |
b3249f63 AJ |
303 | val >>= 64 - ((mask & 7) * 8); |
304 | return byte_zap(val, ~((0xFF << (mask & 7)) >> 8)); | |
4c9649a9 JM |
305 | } |
306 | ||
04acd307 | 307 | uint64_t helper_cmpbge (uint64_t op1, uint64_t op2) |
4c9649a9 JM |
308 | { |
309 | uint8_t opa, opb, res; | |
310 | int i; | |
311 | ||
312 | res = 0; | |
970d622e | 313 | for (i = 0; i < 8; i++) { |
04acd307 AJ |
314 | opa = op1 >> (i * 8); |
315 | opb = op2 >> (i * 8); | |
4c9649a9 JM |
316 | if (opa >= opb) |
317 | res |= 1 << i; | |
318 | } | |
04acd307 | 319 | return res; |
4c9649a9 JM |
320 | } |
321 | ||
f18cd223 AJ |
322 | /* Floating point helpers */ |
323 | ||
324 | /* F floating (VAX) */ | |
325 | static always_inline uint64_t float32_to_f (float32 fa) | |
4c9649a9 | 326 | { |
f18cd223 | 327 | uint64_t r, exp, mant, sig; |
e2eb2798 | 328 | CPU_FloatU a; |
f18cd223 | 329 | |
e2eb2798 AJ |
330 | a.f = fa; |
331 | sig = ((uint64_t)a.l & 0x80000000) << 32; | |
332 | exp = (a.l >> 23) & 0xff; | |
333 | mant = ((uint64_t)a.l & 0x007fffff) << 29; | |
f18cd223 AJ |
334 | |
335 | if (exp == 255) { | |
336 | /* NaN or infinity */ | |
337 | r = 1; /* VAX dirty zero */ | |
338 | } else if (exp == 0) { | |
339 | if (mant == 0) { | |
340 | /* Zero */ | |
341 | r = 0; | |
342 | } else { | |
343 | /* Denormalized */ | |
344 | r = sig | ((exp + 1) << 52) | mant; | |
345 | } | |
346 | } else { | |
347 | if (exp >= 253) { | |
348 | /* Overflow */ | |
349 | r = 1; /* VAX dirty zero */ | |
350 | } else { | |
351 | r = sig | ((exp + 2) << 52); | |
352 | } | |
353 | } | |
354 | ||
355 | return r; | |
4c9649a9 JM |
356 | } |
357 | ||
f18cd223 | 358 | static always_inline float32 f_to_float32 (uint64_t a) |
4c9649a9 | 359 | { |
e2eb2798 AJ |
360 | uint32_t exp, mant_sig; |
361 | CPU_FloatU r; | |
f18cd223 AJ |
362 | |
363 | exp = ((a >> 55) & 0x80) | ((a >> 52) & 0x7f); | |
364 | mant_sig = ((a >> 32) & 0x80000000) | ((a >> 29) & 0x007fffff); | |
365 | ||
366 | if (unlikely(!exp && mant_sig)) { | |
367 | /* Reserved operands / Dirty zero */ | |
368 | helper_excp(EXCP_OPCDEC, 0); | |
369 | } | |
370 | ||
371 | if (exp < 3) { | |
372 | /* Underflow */ | |
e2eb2798 | 373 | r.l = 0; |
f18cd223 | 374 | } else { |
e2eb2798 | 375 | r.l = ((exp - 2) << 23) | mant_sig; |
f18cd223 AJ |
376 | } |
377 | ||
e2eb2798 | 378 | return r.f; |
4c9649a9 JM |
379 | } |
380 | ||
f18cd223 | 381 | uint32_t helper_f_to_memory (uint64_t a) |
4c9649a9 | 382 | { |
f18cd223 AJ |
383 | uint32_t r; |
384 | r = (a & 0x00001fffe0000000ull) >> 13; | |
385 | r |= (a & 0x07ffe00000000000ull) >> 45; | |
386 | r |= (a & 0xc000000000000000ull) >> 48; | |
387 | return r; | |
388 | } | |
4c9649a9 | 389 | |
f18cd223 AJ |
390 | uint64_t helper_memory_to_f (uint32_t a) |
391 | { | |
392 | uint64_t r; | |
393 | r = ((uint64_t)(a & 0x0000c000)) << 48; | |
394 | r |= ((uint64_t)(a & 0x003fffff)) << 45; | |
395 | r |= ((uint64_t)(a & 0xffff0000)) << 13; | |
396 | if (!(a & 0x00004000)) | |
397 | r |= 0x7ll << 59; | |
398 | return r; | |
4c9649a9 JM |
399 | } |
400 | ||
f18cd223 | 401 | uint64_t helper_addf (uint64_t a, uint64_t b) |
4c9649a9 | 402 | { |
f18cd223 | 403 | float32 fa, fb, fr; |
4c9649a9 | 404 | |
f18cd223 AJ |
405 | fa = f_to_float32(a); |
406 | fb = f_to_float32(b); | |
407 | fr = float32_add(fa, fb, &FP_STATUS); | |
408 | return float32_to_f(fr); | |
4c9649a9 JM |
409 | } |
410 | ||
f18cd223 | 411 | uint64_t helper_subf (uint64_t a, uint64_t b) |
4c9649a9 | 412 | { |
f18cd223 | 413 | float32 fa, fb, fr; |
4c9649a9 | 414 | |
f18cd223 AJ |
415 | fa = f_to_float32(a); |
416 | fb = f_to_float32(b); | |
417 | fr = float32_sub(fa, fb, &FP_STATUS); | |
418 | return float32_to_f(fr); | |
4c9649a9 JM |
419 | } |
420 | ||
f18cd223 | 421 | uint64_t helper_mulf (uint64_t a, uint64_t b) |
4c9649a9 | 422 | { |
f18cd223 | 423 | float32 fa, fb, fr; |
4c9649a9 | 424 | |
f18cd223 AJ |
425 | fa = f_to_float32(a); |
426 | fb = f_to_float32(b); | |
427 | fr = float32_mul(fa, fb, &FP_STATUS); | |
428 | return float32_to_f(fr); | |
4c9649a9 JM |
429 | } |
430 | ||
f18cd223 | 431 | uint64_t helper_divf (uint64_t a, uint64_t b) |
4c9649a9 | 432 | { |
f18cd223 | 433 | float32 fa, fb, fr; |
4c9649a9 | 434 | |
f18cd223 AJ |
435 | fa = f_to_float32(a); |
436 | fb = f_to_float32(b); | |
437 | fr = float32_div(fa, fb, &FP_STATUS); | |
438 | return float32_to_f(fr); | |
4c9649a9 JM |
439 | } |
440 | ||
f18cd223 | 441 | uint64_t helper_sqrtf (uint64_t t) |
4c9649a9 | 442 | { |
f18cd223 AJ |
443 | float32 ft, fr; |
444 | ||
445 | ft = f_to_float32(t); | |
446 | fr = float32_sqrt(ft, &FP_STATUS); | |
447 | return float32_to_f(fr); | |
4c9649a9 JM |
448 | } |
449 | ||
f18cd223 AJ |
450 | |
451 | /* G floating (VAX) */ | |
452 | static always_inline uint64_t float64_to_g (float64 fa) | |
4c9649a9 | 453 | { |
e2eb2798 AJ |
454 | uint64_t r, exp, mant, sig; |
455 | CPU_DoubleU a; | |
4c9649a9 | 456 | |
e2eb2798 AJ |
457 | a.d = fa; |
458 | sig = a.ll & 0x8000000000000000ull; | |
459 | exp = (a.ll >> 52) & 0x7ff; | |
460 | mant = a.ll & 0x000fffffffffffffull; | |
f18cd223 AJ |
461 | |
462 | if (exp == 2047) { | |
463 | /* NaN or infinity */ | |
464 | r = 1; /* VAX dirty zero */ | |
465 | } else if (exp == 0) { | |
466 | if (mant == 0) { | |
467 | /* Zero */ | |
468 | r = 0; | |
469 | } else { | |
470 | /* Denormalized */ | |
471 | r = sig | ((exp + 1) << 52) | mant; | |
472 | } | |
473 | } else { | |
474 | if (exp >= 2045) { | |
475 | /* Overflow */ | |
476 | r = 1; /* VAX dirty zero */ | |
477 | } else { | |
478 | r = sig | ((exp + 2) << 52); | |
479 | } | |
480 | } | |
481 | ||
482 | return r; | |
4c9649a9 JM |
483 | } |
484 | ||
f18cd223 | 485 | static always_inline float64 g_to_float64 (uint64_t a) |
4c9649a9 | 486 | { |
e2eb2798 AJ |
487 | uint64_t exp, mant_sig; |
488 | CPU_DoubleU r; | |
f18cd223 AJ |
489 | |
490 | exp = (a >> 52) & 0x7ff; | |
491 | mant_sig = a & 0x800fffffffffffffull; | |
492 | ||
493 | if (!exp && mant_sig) { | |
494 | /* Reserved operands / Dirty zero */ | |
495 | helper_excp(EXCP_OPCDEC, 0); | |
496 | } | |
4c9649a9 | 497 | |
f18cd223 AJ |
498 | if (exp < 3) { |
499 | /* Underflow */ | |
e2eb2798 | 500 | r.ll = 0; |
f18cd223 | 501 | } else { |
e2eb2798 | 502 | r.ll = ((exp - 2) << 52) | mant_sig; |
f18cd223 AJ |
503 | } |
504 | ||
e2eb2798 | 505 | return r.d; |
4c9649a9 JM |
506 | } |
507 | ||
f18cd223 | 508 | uint64_t helper_g_to_memory (uint64_t a) |
4c9649a9 | 509 | { |
f18cd223 AJ |
510 | uint64_t r; |
511 | r = (a & 0x000000000000ffffull) << 48; | |
512 | r |= (a & 0x00000000ffff0000ull) << 16; | |
513 | r |= (a & 0x0000ffff00000000ull) >> 16; | |
514 | r |= (a & 0xffff000000000000ull) >> 48; | |
515 | return r; | |
516 | } | |
4c9649a9 | 517 | |
f18cd223 AJ |
518 | uint64_t helper_memory_to_g (uint64_t a) |
519 | { | |
520 | uint64_t r; | |
521 | r = (a & 0x000000000000ffffull) << 48; | |
522 | r |= (a & 0x00000000ffff0000ull) << 16; | |
523 | r |= (a & 0x0000ffff00000000ull) >> 16; | |
524 | r |= (a & 0xffff000000000000ull) >> 48; | |
525 | return r; | |
4c9649a9 JM |
526 | } |
527 | ||
f18cd223 | 528 | uint64_t helper_addg (uint64_t a, uint64_t b) |
4c9649a9 | 529 | { |
f18cd223 | 530 | float64 fa, fb, fr; |
4c9649a9 | 531 | |
f18cd223 AJ |
532 | fa = g_to_float64(a); |
533 | fb = g_to_float64(b); | |
534 | fr = float64_add(fa, fb, &FP_STATUS); | |
535 | return float64_to_g(fr); | |
4c9649a9 JM |
536 | } |
537 | ||
f18cd223 | 538 | uint64_t helper_subg (uint64_t a, uint64_t b) |
4c9649a9 | 539 | { |
f18cd223 | 540 | float64 fa, fb, fr; |
4c9649a9 | 541 | |
f18cd223 AJ |
542 | fa = g_to_float64(a); |
543 | fb = g_to_float64(b); | |
544 | fr = float64_sub(fa, fb, &FP_STATUS); | |
545 | return float64_to_g(fr); | |
4c9649a9 JM |
546 | } |
547 | ||
f18cd223 | 548 | uint64_t helper_mulg (uint64_t a, uint64_t b) |
4c9649a9 | 549 | { |
f18cd223 | 550 | float64 fa, fb, fr; |
4c9649a9 | 551 | |
f18cd223 AJ |
552 | fa = g_to_float64(a); |
553 | fb = g_to_float64(b); | |
554 | fr = float64_mul(fa, fb, &FP_STATUS); | |
555 | return float64_to_g(fr); | |
4c9649a9 JM |
556 | } |
557 | ||
f18cd223 | 558 | uint64_t helper_divg (uint64_t a, uint64_t b) |
4c9649a9 | 559 | { |
f18cd223 | 560 | float64 fa, fb, fr; |
4c9649a9 | 561 | |
f18cd223 AJ |
562 | fa = g_to_float64(a); |
563 | fb = g_to_float64(b); | |
564 | fr = float64_div(fa, fb, &FP_STATUS); | |
565 | return float64_to_g(fr); | |
566 | } | |
567 | ||
568 | uint64_t helper_sqrtg (uint64_t a) | |
569 | { | |
570 | float64 fa, fr; | |
4c9649a9 | 571 | |
f18cd223 AJ |
572 | fa = g_to_float64(a); |
573 | fr = float64_sqrt(fa, &FP_STATUS); | |
574 | return float64_to_g(fr); | |
4c9649a9 JM |
575 | } |
576 | ||
f18cd223 AJ |
577 | |
578 | /* S floating (single) */ | |
579 | static always_inline uint64_t float32_to_s (float32 fa) | |
4c9649a9 | 580 | { |
e2eb2798 | 581 | CPU_FloatU a; |
f18cd223 | 582 | uint64_t r; |
4c9649a9 | 583 | |
e2eb2798 | 584 | a.f = fa; |
4c9649a9 | 585 | |
e2eb2798 AJ |
586 | r = (((uint64_t)(a.l & 0xc0000000)) << 32) | (((uint64_t)(a.l & 0x3fffffff)) << 29); |
587 | if (((a.l & 0x7f800000) != 0x7f800000) && (!(a.l & 0x40000000))) | |
f18cd223 AJ |
588 | r |= 0x7ll << 59; |
589 | return r; | |
4c9649a9 JM |
590 | } |
591 | ||
f18cd223 | 592 | static always_inline float32 s_to_float32 (uint64_t a) |
4c9649a9 | 593 | { |
e2eb2798 AJ |
594 | CPU_FloatU r; |
595 | r.l = ((a >> 32) & 0xc0000000) | ((a >> 29) & 0x3fffffff); | |
596 | return r.f; | |
f18cd223 | 597 | } |
4c9649a9 | 598 | |
f18cd223 AJ |
599 | uint32_t helper_s_to_memory (uint64_t a) |
600 | { | |
601 | /* Memory format is the same as float32 */ | |
602 | float32 fa = s_to_float32(a); | |
603 | return *(uint32_t*)(&fa); | |
604 | } | |
4c9649a9 | 605 | |
f18cd223 AJ |
606 | uint64_t helper_memory_to_s (uint32_t a) |
607 | { | |
608 | /* Memory format is the same as float32 */ | |
609 | return float32_to_s(*(float32*)(&a)); | |
4c9649a9 JM |
610 | } |
611 | ||
f18cd223 | 612 | uint64_t helper_adds (uint64_t a, uint64_t b) |
4c9649a9 | 613 | { |
f18cd223 | 614 | float32 fa, fb, fr; |
4c9649a9 | 615 | |
f18cd223 AJ |
616 | fa = s_to_float32(a); |
617 | fb = s_to_float32(b); | |
618 | fr = float32_add(fa, fb, &FP_STATUS); | |
619 | return float32_to_s(fr); | |
4c9649a9 JM |
620 | } |
621 | ||
f18cd223 | 622 | uint64_t helper_subs (uint64_t a, uint64_t b) |
4c9649a9 | 623 | { |
f18cd223 | 624 | float32 fa, fb, fr; |
4c9649a9 | 625 | |
f18cd223 AJ |
626 | fa = s_to_float32(a); |
627 | fb = s_to_float32(b); | |
628 | fr = float32_sub(fa, fb, &FP_STATUS); | |
629 | return float32_to_s(fr); | |
4c9649a9 JM |
630 | } |
631 | ||
f18cd223 | 632 | uint64_t helper_muls (uint64_t a, uint64_t b) |
4c9649a9 | 633 | { |
f18cd223 | 634 | float32 fa, fb, fr; |
4c9649a9 | 635 | |
f18cd223 AJ |
636 | fa = s_to_float32(a); |
637 | fb = s_to_float32(b); | |
638 | fr = float32_mul(fa, fb, &FP_STATUS); | |
639 | return float32_to_s(fr); | |
4c9649a9 JM |
640 | } |
641 | ||
f18cd223 | 642 | uint64_t helper_divs (uint64_t a, uint64_t b) |
4c9649a9 | 643 | { |
f18cd223 | 644 | float32 fa, fb, fr; |
4c9649a9 | 645 | |
f18cd223 AJ |
646 | fa = s_to_float32(a); |
647 | fb = s_to_float32(b); | |
648 | fr = float32_div(fa, fb, &FP_STATUS); | |
649 | return float32_to_s(fr); | |
4c9649a9 JM |
650 | } |
651 | ||
f18cd223 | 652 | uint64_t helper_sqrts (uint64_t a) |
4c9649a9 | 653 | { |
f18cd223 | 654 | float32 fa, fr; |
4c9649a9 | 655 | |
f18cd223 AJ |
656 | fa = s_to_float32(a); |
657 | fr = float32_sqrt(fa, &FP_STATUS); | |
658 | return float32_to_s(fr); | |
4c9649a9 JM |
659 | } |
660 | ||
f18cd223 AJ |
661 | |
662 | /* T floating (double) */ | |
663 | static always_inline float64 t_to_float64 (uint64_t a) | |
4c9649a9 | 664 | { |
f18cd223 | 665 | /* Memory format is the same as float64 */ |
e2eb2798 AJ |
666 | CPU_DoubleU r; |
667 | r.ll = a; | |
668 | return r.d; | |
4c9649a9 JM |
669 | } |
670 | ||
f18cd223 | 671 | static always_inline uint64_t float64_to_t (float64 fa) |
4c9649a9 | 672 | { |
f18cd223 | 673 | /* Memory format is the same as float64 */ |
e2eb2798 AJ |
674 | CPU_DoubleU r; |
675 | r.d = fa; | |
676 | return r.ll; | |
f18cd223 | 677 | } |
4c9649a9 | 678 | |
f18cd223 AJ |
679 | uint64_t helper_addt (uint64_t a, uint64_t b) |
680 | { | |
681 | float64 fa, fb, fr; | |
4c9649a9 | 682 | |
f18cd223 AJ |
683 | fa = t_to_float64(a); |
684 | fb = t_to_float64(b); | |
685 | fr = float64_add(fa, fb, &FP_STATUS); | |
686 | return float64_to_t(fr); | |
4c9649a9 JM |
687 | } |
688 | ||
f18cd223 | 689 | uint64_t helper_subt (uint64_t a, uint64_t b) |
4c9649a9 | 690 | { |
f18cd223 | 691 | float64 fa, fb, fr; |
4c9649a9 | 692 | |
f18cd223 AJ |
693 | fa = t_to_float64(a); |
694 | fb = t_to_float64(b); | |
695 | fr = float64_sub(fa, fb, &FP_STATUS); | |
696 | return float64_to_t(fr); | |
4c9649a9 JM |
697 | } |
698 | ||
f18cd223 | 699 | uint64_t helper_mult (uint64_t a, uint64_t b) |
4c9649a9 | 700 | { |
f18cd223 | 701 | float64 fa, fb, fr; |
4c9649a9 | 702 | |
f18cd223 AJ |
703 | fa = t_to_float64(a); |
704 | fb = t_to_float64(b); | |
705 | fr = float64_mul(fa, fb, &FP_STATUS); | |
706 | return float64_to_t(fr); | |
4c9649a9 JM |
707 | } |
708 | ||
f18cd223 | 709 | uint64_t helper_divt (uint64_t a, uint64_t b) |
4c9649a9 | 710 | { |
f18cd223 | 711 | float64 fa, fb, fr; |
4c9649a9 | 712 | |
f18cd223 AJ |
713 | fa = t_to_float64(a); |
714 | fb = t_to_float64(b); | |
715 | fr = float64_div(fa, fb, &FP_STATUS); | |
716 | return float64_to_t(fr); | |
4c9649a9 JM |
717 | } |
718 | ||
f18cd223 | 719 | uint64_t helper_sqrtt (uint64_t a) |
4c9649a9 | 720 | { |
f18cd223 | 721 | float64 fa, fr; |
4c9649a9 | 722 | |
f18cd223 AJ |
723 | fa = t_to_float64(a); |
724 | fr = float64_sqrt(fa, &FP_STATUS); | |
725 | return float64_to_t(fr); | |
4c9649a9 JM |
726 | } |
727 | ||
4c9649a9 | 728 | |
f18cd223 AJ |
729 | /* Sign copy */ |
730 | uint64_t helper_cpys(uint64_t a, uint64_t b) | |
731 | { | |
732 | return (a & 0x8000000000000000ULL) | (b & ~0x8000000000000000ULL); | |
4c9649a9 JM |
733 | } |
734 | ||
f18cd223 | 735 | uint64_t helper_cpysn(uint64_t a, uint64_t b) |
4c9649a9 | 736 | { |
f18cd223 AJ |
737 | return ((~a) & 0x8000000000000000ULL) | (b & ~0x8000000000000000ULL); |
738 | } | |
4c9649a9 | 739 | |
f18cd223 AJ |
740 | uint64_t helper_cpyse(uint64_t a, uint64_t b) |
741 | { | |
742 | return (a & 0xFFF0000000000000ULL) | (b & ~0xFFF0000000000000ULL); | |
4c9649a9 JM |
743 | } |
744 | ||
f18cd223 AJ |
745 | |
746 | /* Comparisons */ | |
747 | uint64_t helper_cmptun (uint64_t a, uint64_t b) | |
4c9649a9 | 748 | { |
f18cd223 | 749 | float64 fa, fb; |
4c9649a9 | 750 | |
f18cd223 AJ |
751 | fa = t_to_float64(a); |
752 | fb = t_to_float64(b); | |
753 | ||
754 | if (float64_is_nan(fa) || float64_is_nan(fb)) | |
755 | return 0x4000000000000000ULL; | |
756 | else | |
757 | return 0; | |
4c9649a9 JM |
758 | } |
759 | ||
f18cd223 | 760 | uint64_t helper_cmpteq(uint64_t a, uint64_t b) |
4c9649a9 | 761 | { |
f18cd223 | 762 | float64 fa, fb; |
4c9649a9 | 763 | |
f18cd223 AJ |
764 | fa = t_to_float64(a); |
765 | fb = t_to_float64(b); | |
766 | ||
767 | if (float64_eq(fa, fb, &FP_STATUS)) | |
768 | return 0x4000000000000000ULL; | |
769 | else | |
770 | return 0; | |
4c9649a9 JM |
771 | } |
772 | ||
f18cd223 | 773 | uint64_t helper_cmptle(uint64_t a, uint64_t b) |
4c9649a9 | 774 | { |
f18cd223 | 775 | float64 fa, fb; |
4c9649a9 | 776 | |
f18cd223 AJ |
777 | fa = t_to_float64(a); |
778 | fb = t_to_float64(b); | |
779 | ||
780 | if (float64_le(fa, fb, &FP_STATUS)) | |
781 | return 0x4000000000000000ULL; | |
782 | else | |
783 | return 0; | |
4c9649a9 JM |
784 | } |
785 | ||
f18cd223 | 786 | uint64_t helper_cmptlt(uint64_t a, uint64_t b) |
4c9649a9 | 787 | { |
f18cd223 | 788 | float64 fa, fb; |
4c9649a9 | 789 | |
f18cd223 AJ |
790 | fa = t_to_float64(a); |
791 | fb = t_to_float64(b); | |
792 | ||
793 | if (float64_lt(fa, fb, &FP_STATUS)) | |
794 | return 0x4000000000000000ULL; | |
795 | else | |
796 | return 0; | |
4c9649a9 JM |
797 | } |
798 | ||
f18cd223 | 799 | uint64_t helper_cmpgeq(uint64_t a, uint64_t b) |
4c9649a9 | 800 | { |
f18cd223 | 801 | float64 fa, fb; |
4c9649a9 | 802 | |
f18cd223 AJ |
803 | fa = g_to_float64(a); |
804 | fb = g_to_float64(b); | |
805 | ||
806 | if (float64_eq(fa, fb, &FP_STATUS)) | |
807 | return 0x4000000000000000ULL; | |
808 | else | |
809 | return 0; | |
4c9649a9 JM |
810 | } |
811 | ||
f18cd223 | 812 | uint64_t helper_cmpgle(uint64_t a, uint64_t b) |
4c9649a9 | 813 | { |
f18cd223 AJ |
814 | float64 fa, fb; |
815 | ||
816 | fa = g_to_float64(a); | |
817 | fb = g_to_float64(b); | |
4c9649a9 | 818 | |
f18cd223 AJ |
819 | if (float64_le(fa, fb, &FP_STATUS)) |
820 | return 0x4000000000000000ULL; | |
821 | else | |
822 | return 0; | |
4c9649a9 JM |
823 | } |
824 | ||
f18cd223 | 825 | uint64_t helper_cmpglt(uint64_t a, uint64_t b) |
4c9649a9 | 826 | { |
f18cd223 AJ |
827 | float64 fa, fb; |
828 | ||
829 | fa = g_to_float64(a); | |
830 | fb = g_to_float64(b); | |
4c9649a9 | 831 | |
f18cd223 AJ |
832 | if (float64_lt(fa, fb, &FP_STATUS)) |
833 | return 0x4000000000000000ULL; | |
834 | else | |
835 | return 0; | |
4c9649a9 JM |
836 | } |
837 | ||
f18cd223 | 838 | uint64_t helper_cmpfeq (uint64_t a) |
4c9649a9 | 839 | { |
f18cd223 | 840 | return !(a & 0x7FFFFFFFFFFFFFFFULL); |
4c9649a9 JM |
841 | } |
842 | ||
f18cd223 | 843 | uint64_t helper_cmpfne (uint64_t a) |
4c9649a9 | 844 | { |
f18cd223 AJ |
845 | return (a & 0x7FFFFFFFFFFFFFFFULL); |
846 | } | |
4c9649a9 | 847 | |
f18cd223 AJ |
848 | uint64_t helper_cmpflt (uint64_t a) |
849 | { | |
850 | return (a & 0x8000000000000000ULL) && (a & 0x7FFFFFFFFFFFFFFFULL); | |
4c9649a9 JM |
851 | } |
852 | ||
f18cd223 | 853 | uint64_t helper_cmpfle (uint64_t a) |
4c9649a9 | 854 | { |
f18cd223 | 855 | return (a & 0x8000000000000000ULL) || !(a & 0x7FFFFFFFFFFFFFFFULL); |
4c9649a9 JM |
856 | } |
857 | ||
f18cd223 | 858 | uint64_t helper_cmpfgt (uint64_t a) |
4c9649a9 | 859 | { |
f18cd223 AJ |
860 | return !(a & 0x8000000000000000ULL) && (a & 0x7FFFFFFFFFFFFFFFULL); |
861 | } | |
4c9649a9 | 862 | |
f18cd223 AJ |
863 | uint64_t helper_cmpfge (uint64_t a) |
864 | { | |
865 | return !(a & 0x8000000000000000ULL) || !(a & 0x7FFFFFFFFFFFFFFFULL); | |
4c9649a9 JM |
866 | } |
867 | ||
f18cd223 AJ |
868 | |
869 | /* Floating point format conversion */ | |
870 | uint64_t helper_cvtts (uint64_t a) | |
4c9649a9 | 871 | { |
f18cd223 AJ |
872 | float64 fa; |
873 | float32 fr; | |
4c9649a9 | 874 | |
f18cd223 AJ |
875 | fa = t_to_float64(a); |
876 | fr = float64_to_float32(fa, &FP_STATUS); | |
877 | return float32_to_s(fr); | |
4c9649a9 JM |
878 | } |
879 | ||
f18cd223 | 880 | uint64_t helper_cvtst (uint64_t a) |
4c9649a9 | 881 | { |
f18cd223 AJ |
882 | float32 fa; |
883 | float64 fr; | |
884 | ||
885 | fa = s_to_float32(a); | |
886 | fr = float32_to_float64(fa, &FP_STATUS); | |
887 | return float64_to_t(fr); | |
4c9649a9 JM |
888 | } |
889 | ||
f18cd223 | 890 | uint64_t helper_cvtqs (uint64_t a) |
4c9649a9 | 891 | { |
f18cd223 AJ |
892 | float32 fr = int64_to_float32(a, &FP_STATUS); |
893 | return float32_to_s(fr); | |
4c9649a9 JM |
894 | } |
895 | ||
f18cd223 | 896 | uint64_t helper_cvttq (uint64_t a) |
4c9649a9 | 897 | { |
f18cd223 AJ |
898 | float64 fa = t_to_float64(a); |
899 | return float64_to_int64_round_to_zero(fa, &FP_STATUS); | |
900 | } | |
4c9649a9 | 901 | |
f18cd223 AJ |
902 | uint64_t helper_cvtqt (uint64_t a) |
903 | { | |
904 | float64 fr = int64_to_float64(a, &FP_STATUS); | |
905 | return float64_to_t(fr); | |
4c9649a9 JM |
906 | } |
907 | ||
f18cd223 | 908 | uint64_t helper_cvtqf (uint64_t a) |
4c9649a9 | 909 | { |
f18cd223 AJ |
910 | float32 fr = int64_to_float32(a, &FP_STATUS); |
911 | return float32_to_f(fr); | |
4c9649a9 JM |
912 | } |
913 | ||
f18cd223 | 914 | uint64_t helper_cvtgf (uint64_t a) |
4c9649a9 | 915 | { |
f18cd223 AJ |
916 | float64 fa; |
917 | float32 fr; | |
918 | ||
919 | fa = g_to_float64(a); | |
920 | fr = float64_to_float32(fa, &FP_STATUS); | |
921 | return float32_to_f(fr); | |
4c9649a9 JM |
922 | } |
923 | ||
f18cd223 | 924 | uint64_t helper_cvtgq (uint64_t a) |
4c9649a9 | 925 | { |
f18cd223 AJ |
926 | float64 fa = g_to_float64(a); |
927 | return float64_to_int64_round_to_zero(fa, &FP_STATUS); | |
4c9649a9 JM |
928 | } |
929 | ||
f18cd223 | 930 | uint64_t helper_cvtqg (uint64_t a) |
4c9649a9 | 931 | { |
f18cd223 AJ |
932 | float64 fr; |
933 | fr = int64_to_float64(a, &FP_STATUS); | |
934 | return float64_to_g(fr); | |
4c9649a9 JM |
935 | } |
936 | ||
f18cd223 | 937 | uint64_t helper_cvtlq (uint64_t a) |
4c9649a9 | 938 | { |
f18cd223 | 939 | return (int64_t)((int32_t)((a >> 32) | ((a >> 29) & 0x3FFFFFFF))); |
4c9649a9 JM |
940 | } |
941 | ||
f18cd223 | 942 | static always_inline uint64_t __helper_cvtql (uint64_t a, int s, int v) |
4c9649a9 | 943 | { |
f18cd223 AJ |
944 | uint64_t r; |
945 | ||
946 | r = ((uint64_t)(a & 0xC0000000)) << 32; | |
947 | r |= ((uint64_t)(a & 0x7FFFFFFF)) << 29; | |
948 | ||
949 | if (v && (int64_t)((int32_t)r) != (int64_t)r) { | |
950 | helper_excp(EXCP_ARITH, EXCP_ARITH_OVERFLOW); | |
951 | } | |
952 | if (s) { | |
953 | /* TODO */ | |
954 | } | |
955 | return r; | |
4c9649a9 JM |
956 | } |
957 | ||
f18cd223 | 958 | uint64_t helper_cvtql (uint64_t a) |
4c9649a9 | 959 | { |
f18cd223 | 960 | return __helper_cvtql(a, 0, 0); |
4c9649a9 JM |
961 | } |
962 | ||
f18cd223 | 963 | uint64_t helper_cvtqlv (uint64_t a) |
4c9649a9 | 964 | { |
f18cd223 | 965 | return __helper_cvtql(a, 0, 1); |
4c9649a9 JM |
966 | } |
967 | ||
f18cd223 | 968 | uint64_t helper_cvtqlsv (uint64_t a) |
4c9649a9 | 969 | { |
f18cd223 | 970 | return __helper_cvtql(a, 1, 1); |
4c9649a9 JM |
971 | } |
972 | ||
8bb6e981 | 973 | /* PALcode support special instructions */ |
4c9649a9 | 974 | #if !defined (CONFIG_USER_ONLY) |
8bb6e981 AJ |
975 | void helper_hw_rei (void) |
976 | { | |
977 | env->pc = env->ipr[IPR_EXC_ADDR] & ~3; | |
978 | env->ipr[IPR_EXC_ADDR] = env->ipr[IPR_EXC_ADDR] & 1; | |
979 | /* XXX: re-enable interrupts and memory mapping */ | |
980 | } | |
981 | ||
982 | void helper_hw_ret (uint64_t a) | |
983 | { | |
984 | env->pc = a & ~3; | |
985 | env->ipr[IPR_EXC_ADDR] = a & 1; | |
986 | /* XXX: re-enable interrupts and memory mapping */ | |
987 | } | |
988 | ||
989 | uint64_t helper_mfpr (int iprn, uint64_t val) | |
990 | { | |
991 | uint64_t tmp; | |
992 | ||
993 | if (cpu_alpha_mfpr(env, iprn, &tmp) == 0) | |
994 | val = tmp; | |
995 | ||
996 | return val; | |
997 | } | |
998 | ||
999 | void helper_mtpr (int iprn, uint64_t val) | |
4c9649a9 | 1000 | { |
8bb6e981 AJ |
1001 | cpu_alpha_mtpr(env, iprn, val, NULL); |
1002 | } | |
4c9649a9 | 1003 | |
8bb6e981 AJ |
1004 | void helper_set_alt_mode (void) |
1005 | { | |
1006 | env->saved_mode = env->ps & 0xC; | |
1007 | env->ps = (env->ps & ~0xC) | (env->ipr[IPR_ALT_MODE] & 0xC); | |
4c9649a9 JM |
1008 | } |
1009 | ||
8bb6e981 | 1010 | void helper_restore_mode (void) |
4c9649a9 | 1011 | { |
8bb6e981 | 1012 | env->ps = (env->ps & ~0xC) | env->saved_mode; |
4c9649a9 | 1013 | } |
8bb6e981 | 1014 | |
4c9649a9 JM |
1015 | #endif |
1016 | ||
1017 | /*****************************************************************************/ | |
1018 | /* Softmmu support */ | |
1019 | #if !defined (CONFIG_USER_ONLY) | |
1020 | ||
4c9649a9 JM |
1021 | /* XXX: the two following helpers are pure hacks. |
1022 | * Hopefully, we emulate the PALcode, then we should never see | |
1023 | * HW_LD / HW_ST instructions. | |
1024 | */ | |
8bb6e981 | 1025 | uint64_t helper_ld_virt_to_phys (uint64_t virtaddr) |
4c9649a9 JM |
1026 | { |
1027 | uint64_t tlb_addr, physaddr; | |
6ebbf390 | 1028 | int index, mmu_idx; |
4c9649a9 JM |
1029 | void *retaddr; |
1030 | ||
6ebbf390 | 1031 | mmu_idx = cpu_mmu_index(env); |
8bb6e981 | 1032 | index = (virtaddr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1); |
4c9649a9 | 1033 | redo: |
6ebbf390 | 1034 | tlb_addr = env->tlb_table[mmu_idx][index].addr_read; |
8bb6e981 | 1035 | if ((virtaddr & TARGET_PAGE_MASK) == |
4c9649a9 | 1036 | (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) { |
8bb6e981 | 1037 | physaddr = virtaddr + env->tlb_table[mmu_idx][index].addend; |
4c9649a9 JM |
1038 | } else { |
1039 | /* the page is not in the TLB : fill it */ | |
1040 | retaddr = GETPC(); | |
8bb6e981 | 1041 | tlb_fill(virtaddr, 0, mmu_idx, retaddr); |
4c9649a9 JM |
1042 | goto redo; |
1043 | } | |
8bb6e981 | 1044 | return physaddr; |
4c9649a9 JM |
1045 | } |
1046 | ||
8bb6e981 | 1047 | uint64_t helper_st_virt_to_phys (uint64_t virtaddr) |
4c9649a9 JM |
1048 | { |
1049 | uint64_t tlb_addr, physaddr; | |
6ebbf390 | 1050 | int index, mmu_idx; |
4c9649a9 JM |
1051 | void *retaddr; |
1052 | ||
6ebbf390 | 1053 | mmu_idx = cpu_mmu_index(env); |
8bb6e981 | 1054 | index = (virtaddr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1); |
4c9649a9 | 1055 | redo: |
6ebbf390 | 1056 | tlb_addr = env->tlb_table[mmu_idx][index].addr_write; |
8bb6e981 | 1057 | if ((virtaddr & TARGET_PAGE_MASK) == |
4c9649a9 | 1058 | (tlb_addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK))) { |
8bb6e981 | 1059 | physaddr = virtaddr + env->tlb_table[mmu_idx][index].addend; |
4c9649a9 JM |
1060 | } else { |
1061 | /* the page is not in the TLB : fill it */ | |
1062 | retaddr = GETPC(); | |
8bb6e981 | 1063 | tlb_fill(virtaddr, 1, mmu_idx, retaddr); |
4c9649a9 JM |
1064 | goto redo; |
1065 | } | |
8bb6e981 AJ |
1066 | return physaddr; |
1067 | } | |
1068 | ||
1069 | void helper_ldl_raw(uint64_t t0, uint64_t t1) | |
1070 | { | |
1071 | ldl_raw(t1, t0); | |
1072 | } | |
1073 | ||
1074 | void helper_ldq_raw(uint64_t t0, uint64_t t1) | |
1075 | { | |
1076 | ldq_raw(t1, t0); | |
1077 | } | |
1078 | ||
1079 | void helper_ldl_l_raw(uint64_t t0, uint64_t t1) | |
1080 | { | |
1081 | env->lock = t1; | |
1082 | ldl_raw(t1, t0); | |
1083 | } | |
1084 | ||
1085 | void helper_ldq_l_raw(uint64_t t0, uint64_t t1) | |
1086 | { | |
1087 | env->lock = t1; | |
1088 | ldl_raw(t1, t0); | |
1089 | } | |
1090 | ||
1091 | void helper_ldl_kernel(uint64_t t0, uint64_t t1) | |
1092 | { | |
1093 | ldl_kernel(t1, t0); | |
1094 | } | |
1095 | ||
1096 | void helper_ldq_kernel(uint64_t t0, uint64_t t1) | |
1097 | { | |
1098 | ldq_kernel(t1, t0); | |
1099 | } | |
1100 | ||
1101 | void helper_ldl_data(uint64_t t0, uint64_t t1) | |
1102 | { | |
1103 | ldl_data(t1, t0); | |
1104 | } | |
1105 | ||
1106 | void helper_ldq_data(uint64_t t0, uint64_t t1) | |
1107 | { | |
1108 | ldq_data(t1, t0); | |
1109 | } | |
1110 | ||
1111 | void helper_stl_raw(uint64_t t0, uint64_t t1) | |
1112 | { | |
1113 | stl_raw(t1, t0); | |
1114 | } | |
1115 | ||
1116 | void helper_stq_raw(uint64_t t0, uint64_t t1) | |
1117 | { | |
1118 | stq_raw(t1, t0); | |
1119 | } | |
1120 | ||
1121 | uint64_t helper_stl_c_raw(uint64_t t0, uint64_t t1) | |
1122 | { | |
1123 | uint64_t ret; | |
1124 | ||
1125 | if (t1 == env->lock) { | |
1126 | stl_raw(t1, t0); | |
1127 | ret = 0; | |
1128 | } else | |
1129 | ret = 1; | |
1130 | ||
1131 | env->lock = 1; | |
1132 | ||
1133 | return ret; | |
1134 | } | |
1135 | ||
1136 | uint64_t helper_stq_c_raw(uint64_t t0, uint64_t t1) | |
1137 | { | |
1138 | uint64_t ret; | |
1139 | ||
1140 | if (t1 == env->lock) { | |
1141 | stq_raw(t1, t0); | |
1142 | ret = 0; | |
1143 | } else | |
1144 | ret = 1; | |
1145 | ||
1146 | env->lock = 1; | |
1147 | ||
1148 | return ret; | |
4c9649a9 JM |
1149 | } |
1150 | ||
1151 | #define MMUSUFFIX _mmu | |
1152 | ||
1153 | #define SHIFT 0 | |
1154 | #include "softmmu_template.h" | |
1155 | ||
1156 | #define SHIFT 1 | |
1157 | #include "softmmu_template.h" | |
1158 | ||
1159 | #define SHIFT 2 | |
1160 | #include "softmmu_template.h" | |
1161 | ||
1162 | #define SHIFT 3 | |
1163 | #include "softmmu_template.h" | |
1164 | ||
1165 | /* try to fill the TLB and return an exception if error. If retaddr is | |
1166 | NULL, it means that the function was called in C code (i.e. not | |
1167 | from generated code or from helper.c) */ | |
1168 | /* XXX: fix it to restore all registers */ | |
6ebbf390 | 1169 | void tlb_fill (target_ulong addr, int is_write, int mmu_idx, void *retaddr) |
4c9649a9 JM |
1170 | { |
1171 | TranslationBlock *tb; | |
1172 | CPUState *saved_env; | |
44f8625d | 1173 | unsigned long pc; |
4c9649a9 JM |
1174 | int ret; |
1175 | ||
1176 | /* XXX: hack to restore env in all cases, even if not called from | |
1177 | generated code */ | |
1178 | saved_env = env; | |
1179 | env = cpu_single_env; | |
6ebbf390 | 1180 | ret = cpu_alpha_handle_mmu_fault(env, addr, is_write, mmu_idx, 1); |
4c9649a9 JM |
1181 | if (!likely(ret == 0)) { |
1182 | if (likely(retaddr)) { | |
1183 | /* now we have a real cpu fault */ | |
44f8625d | 1184 | pc = (unsigned long)retaddr; |
4c9649a9 JM |
1185 | tb = tb_find_pc(pc); |
1186 | if (likely(tb)) { | |
1187 | /* the PC is inside the translated code. It means that we have | |
1188 | a virtual CPU fault */ | |
1189 | cpu_restore_state(tb, env, pc, NULL); | |
1190 | } | |
1191 | } | |
1192 | /* Exception index and error code are already set */ | |
1193 | cpu_loop_exit(); | |
1194 | } | |
1195 | env = saved_env; | |
1196 | } | |
1197 | ||
1198 | #endif |