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correct handling of saved host registers
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1/*
2 * i386 execution defines
3 *
4 * Copyright (c) 2003 Fabrice Bellard
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License as published by the Free Software Foundation; either
9 * version 2 of the License, or (at your option) any later version.
10 *
11 * This library is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14 * Lesser General Public License for more details.
15 *
16 * You should have received a copy of the GNU Lesser General Public
17 * License along with this library; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */
7d3505c5 20#include "config.h"
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21#include "dyngen-exec.h"
22
0d1a29f9 23/* at least 4 register variables are defined */
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24register struct CPUX86State *env asm(AREG0);
25register uint32_t T0 asm(AREG1);
26register uint32_t T1 asm(AREG2);
27register uint32_t T2 asm(AREG3);
28
29#define A0 T2
30
31/* if more registers are available, we define some registers too */
32#ifdef AREG4
33register uint32_t EAX asm(AREG4);
34#define reg_EAX
35#endif
36
37#ifdef AREG5
38register uint32_t ESP asm(AREG5);
39#define reg_ESP
40#endif
41
42#ifdef AREG6
43register uint32_t EBP asm(AREG6);
44#define reg_EBP
45#endif
46
47#ifdef AREG7
48register uint32_t ECX asm(AREG7);
49#define reg_ECX
50#endif
51
52#ifdef AREG8
53register uint32_t EDX asm(AREG8);
54#define reg_EDX
55#endif
56
57#ifdef AREG9
58register uint32_t EBX asm(AREG9);
59#define reg_EBX
60#endif
61
62#ifdef AREG10
63register uint32_t ESI asm(AREG10);
64#define reg_ESI
65#endif
66
67#ifdef AREG11
68register uint32_t EDI asm(AREG11);
69#define reg_EDI
70#endif
71
72extern FILE *logfile;
73extern int loglevel;
74
75#ifndef reg_EAX
76#define EAX (env->regs[R_EAX])
77#endif
78#ifndef reg_ECX
79#define ECX (env->regs[R_ECX])
80#endif
81#ifndef reg_EDX
82#define EDX (env->regs[R_EDX])
83#endif
84#ifndef reg_EBX
85#define EBX (env->regs[R_EBX])
86#endif
87#ifndef reg_ESP
88#define ESP (env->regs[R_ESP])
89#endif
90#ifndef reg_EBP
91#define EBP (env->regs[R_EBP])
92#endif
93#ifndef reg_ESI
94#define ESI (env->regs[R_ESI])
95#endif
96#ifndef reg_EDI
97#define EDI (env->regs[R_EDI])
98#endif
99#define EIP (env->eip)
100#define DF (env->df)
101
102#define CC_SRC (env->cc_src)
103#define CC_DST (env->cc_dst)
104#define CC_OP (env->cc_op)
105
106/* float macros */
107#define FT0 (env->ft0)
108#define ST0 (env->fpregs[env->fpstt])
109#define ST(n) (env->fpregs[(env->fpstt + (n)) & 7])
110#define ST1 ST(1)
111
112#ifdef USE_FP_CONVERT
113#define FP_CONVERT (env->fp_convert)
114#endif
115
116#include "cpu.h"
117#include "exec-all.h"
118
119typedef struct CCTable {
120 int (*compute_all)(void); /* return all the flags */
121 int (*compute_c)(void); /* return the C flag */
122} CCTable;
123
124extern CCTable cc_table[];
125
8e682019 126void load_seg(int seg_reg, int selector);
08cea4ee 127void helper_ljmp_protected_T0_T1(int next_eip);
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128void helper_lcall_real_T0_T1(int shift, int next_eip);
129void helper_lcall_protected_T0_T1(int shift, int next_eip);
130void helper_iret_real(int shift);
08cea4ee 131void helper_iret_protected(int shift, int next_eip);
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132void helper_lret_protected(int shift, int addend);
133void helper_lldt_T0(void);
134void helper_ltr_T0(void);
135void helper_movl_crN_T0(int reg);
136void helper_movl_drN_T0(int reg);
137void helper_invlpg(unsigned int addr);
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138void cpu_x86_update_cr0(CPUX86State *env, uint32_t new_cr0);
139void cpu_x86_update_cr3(CPUX86State *env, uint32_t new_cr3);
140void cpu_x86_update_cr4(CPUX86State *env, uint32_t new_cr4);
2c0262af 141void cpu_x86_flush_tlb(CPUX86State *env, uint32_t addr);
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142int cpu_x86_handle_mmu_fault(CPUX86State *env, uint32_t addr,
143 int is_write, int is_user, int is_softmmu);
144void tlb_fill(unsigned long addr, int is_write, int is_user,
145 void *retaddr);
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146void __hidden cpu_lock(void);
147void __hidden cpu_unlock(void);
148void do_interrupt(int intno, int is_int, int error_code,
149 unsigned int next_eip, int is_hw);
150void do_interrupt_user(int intno, int is_int, int error_code,
151 unsigned int next_eip);
152void raise_interrupt(int intno, int is_int, int error_code,
153 unsigned int next_eip);
154void raise_exception_err(int exception_index, int error_code);
155void raise_exception(int exception_index);
156void __hidden cpu_loop_exit(void);
157void helper_fsave(uint8_t *ptr, int data32);
158void helper_frstor(uint8_t *ptr, int data32);
159
160void OPPROTO op_movl_eflags_T0(void);
161void OPPROTO op_movl_T0_eflags(void);
162void raise_interrupt(int intno, int is_int, int error_code,
163 unsigned int next_eip);
164void raise_exception_err(int exception_index, int error_code);
165void raise_exception(int exception_index);
166void helper_divl_EAX_T0(uint32_t eip);
167void helper_idivl_EAX_T0(uint32_t eip);
168void helper_cmpxchg8b(void);
169void helper_cpuid(void);
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170void helper_sysenter(void);
171void helper_sysexit(void);
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172void helper_rdtsc(void);
173void helper_rdmsr(void);
174void helper_wrmsr(void);
175void helper_lsl(void);
176void helper_lar(void);
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177void helper_verr(void);
178void helper_verw(void);
2c0262af 179
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180void check_iob_T0(void);
181void check_iow_T0(void);
182void check_iol_T0(void);
183void check_iob_DX(void);
184void check_iow_DX(void);
185void check_iol_DX(void);
186
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187/* XXX: move that to a generic header */
188#if !defined(CONFIG_USER_ONLY)
189
190#define ldul_user ldl_user
191#define ldul_kernel ldl_kernel
192
193#define ACCESS_TYPE 0
194#define MEMSUFFIX _kernel
195#define DATA_SIZE 1
196#include "softmmu_header.h"
197
198#define DATA_SIZE 2
199#include "softmmu_header.h"
200
201#define DATA_SIZE 4
202#include "softmmu_header.h"
203
204#define DATA_SIZE 8
205#include "softmmu_header.h"
206#undef ACCESS_TYPE
207#undef MEMSUFFIX
208
209#define ACCESS_TYPE 1
210#define MEMSUFFIX _user
211#define DATA_SIZE 1
212#include "softmmu_header.h"
213
214#define DATA_SIZE 2
215#include "softmmu_header.h"
216
217#define DATA_SIZE 4
218#include "softmmu_header.h"
219
220#define DATA_SIZE 8
221#include "softmmu_header.h"
222#undef ACCESS_TYPE
223#undef MEMSUFFIX
224
225/* these access are slower, they must be as rare as possible */
226#define ACCESS_TYPE 2
227#define MEMSUFFIX _data
228#define DATA_SIZE 1
229#include "softmmu_header.h"
230
231#define DATA_SIZE 2
232#include "softmmu_header.h"
233
234#define DATA_SIZE 4
235#include "softmmu_header.h"
236
237#define DATA_SIZE 8
238#include "softmmu_header.h"
239#undef ACCESS_TYPE
240#undef MEMSUFFIX
241
242#define ldub(p) ldub_data(p)
243#define ldsb(p) ldsb_data(p)
244#define lduw(p) lduw_data(p)
245#define ldsw(p) ldsw_data(p)
246#define ldl(p) ldl_data(p)
247#define ldq(p) ldq_data(p)
248
249#define stb(p, v) stb_data(p, v)
250#define stw(p, v) stw_data(p, v)
251#define stl(p, v) stl_data(p, v)
252#define stq(p, v) stq_data(p, v)
253
254static inline double ldfq(void *ptr)
255{
256 union {
257 double d;
258 uint64_t i;
259 } u;
260 u.i = ldq(ptr);
261 return u.d;
262}
263
264static inline void stfq(void *ptr, double v)
265{
266 union {
267 double d;
268 uint64_t i;
269 } u;
270 u.d = v;
271 stq(ptr, u.i);
272}
273
274static inline float ldfl(void *ptr)
275{
276 union {
277 float f;
278 uint32_t i;
279 } u;
280 u.i = ldl(ptr);
281 return u.f;
282}
283
284static inline void stfl(void *ptr, float v)
285{
286 union {
287 float f;
288 uint32_t i;
289 } u;
290 u.f = v;
291 stl(ptr, u.i);
292}
293
294#endif /* !defined(CONFIG_USER_ONLY) */
295
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296#ifdef USE_X86LDOUBLE
297/* use long double functions */
298#define lrint lrintl
299#define llrint llrintl
300#define fabs fabsl
301#define sin sinl
302#define cos cosl
303#define sqrt sqrtl
304#define pow powl
305#define log logl
306#define tan tanl
307#define atan2 atan2l
308#define floor floorl
309#define ceil ceill
310#define rint rintl
311#endif
312
7d3505c5 313#if !defined(_BSD)
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314extern int lrint(CPU86_LDouble x);
315extern int64_t llrint(CPU86_LDouble x);
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316#else
317#define lrint(d) ((int)rint(d))
318#define llrint(d) ((int)rint(d))
319#endif
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320extern CPU86_LDouble fabs(CPU86_LDouble x);
321extern CPU86_LDouble sin(CPU86_LDouble x);
322extern CPU86_LDouble cos(CPU86_LDouble x);
323extern CPU86_LDouble sqrt(CPU86_LDouble x);
324extern CPU86_LDouble pow(CPU86_LDouble, CPU86_LDouble);
325extern CPU86_LDouble log(CPU86_LDouble x);
326extern CPU86_LDouble tan(CPU86_LDouble x);
327extern CPU86_LDouble atan2(CPU86_LDouble, CPU86_LDouble);
328extern CPU86_LDouble floor(CPU86_LDouble x);
329extern CPU86_LDouble ceil(CPU86_LDouble x);
330extern CPU86_LDouble rint(CPU86_LDouble x);
331
332#define RC_MASK 0xc00
333#define RC_NEAR 0x000
334#define RC_DOWN 0x400
335#define RC_UP 0x800
336#define RC_CHOP 0xc00
337
338#define MAXTAN 9223372036854775808.0
339
340#ifdef __arm__
341/* we have no way to do correct rounding - a FPU emulator is needed */
342#define FE_DOWNWARD FE_TONEAREST
343#define FE_UPWARD FE_TONEAREST
344#define FE_TOWARDZERO FE_TONEAREST
345#endif
346
347#ifdef USE_X86LDOUBLE
348
349/* only for x86 */
350typedef union {
351 long double d;
352 struct {
353 unsigned long long lower;
354 unsigned short upper;
355 } l;
356} CPU86_LDoubleU;
357
358/* the following deal with x86 long double-precision numbers */
359#define MAXEXPD 0x7fff
360#define EXPBIAS 16383
361#define EXPD(fp) (fp.l.upper & 0x7fff)
362#define SIGND(fp) ((fp.l.upper) & 0x8000)
363#define MANTD(fp) (fp.l.lower)
364#define BIASEXPONENT(fp) fp.l.upper = (fp.l.upper & ~(0x7fff)) | EXPBIAS
365
366#else
367
368/* NOTE: arm is horrible as double 32 bit words are stored in big endian ! */
369typedef union {
370 double d;
371#if !defined(WORDS_BIGENDIAN) && !defined(__arm__)
372 struct {
373 uint32_t lower;
374 int32_t upper;
375 } l;
376#else
377 struct {
378 int32_t upper;
379 uint32_t lower;
380 } l;
381#endif
382#ifndef __arm__
383 int64_t ll;
384#endif
385} CPU86_LDoubleU;
386
387/* the following deal with IEEE double-precision numbers */
388#define MAXEXPD 0x7ff
389#define EXPBIAS 1023
390#define EXPD(fp) (((fp.l.upper) >> 20) & 0x7FF)
391#define SIGND(fp) ((fp.l.upper) & 0x80000000)
392#ifdef __arm__
393#define MANTD(fp) (fp.l.lower | ((uint64_t)(fp.l.upper & ((1 << 20) - 1)) << 32))
394#else
395#define MANTD(fp) (fp.ll & ((1LL << 52) - 1))
396#endif
397#define BIASEXPONENT(fp) fp.l.upper = (fp.l.upper & ~(0x7ff << 20)) | (EXPBIAS << 20)
398#endif
399
400static inline void fpush(void)
401{
402 env->fpstt = (env->fpstt - 1) & 7;
403 env->fptags[env->fpstt] = 0; /* validate stack entry */
404}
405
406static inline void fpop(void)
407{
408 env->fptags[env->fpstt] = 1; /* invvalidate stack entry */
409 env->fpstt = (env->fpstt + 1) & 7;
410}
411
412#ifndef USE_X86LDOUBLE
413static inline CPU86_LDouble helper_fldt(uint8_t *ptr)
414{
415 CPU86_LDoubleU temp;
416 int upper, e;
417 uint64_t ll;
418
419 /* mantissa */
420 upper = lduw(ptr + 8);
421 /* XXX: handle overflow ? */
422 e = (upper & 0x7fff) - 16383 + EXPBIAS; /* exponent */
423 e |= (upper >> 4) & 0x800; /* sign */
424 ll = (ldq(ptr) >> 11) & ((1LL << 52) - 1);
425#ifdef __arm__
426 temp.l.upper = (e << 20) | (ll >> 32);
427 temp.l.lower = ll;
428#else
429 temp.ll = ll | ((uint64_t)e << 52);
430#endif
431 return temp.d;
432}
433
434static inline void helper_fstt(CPU86_LDouble f, uint8_t *ptr)
435{
436 CPU86_LDoubleU temp;
437 int e;
438
439 temp.d = f;
440 /* mantissa */
441 stq(ptr, (MANTD(temp) << 11) | (1LL << 63));
442 /* exponent + sign */
443 e = EXPD(temp) - EXPBIAS + 16383;
444 e |= SIGND(temp) >> 16;
445 stw(ptr + 8, e);
446}
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447#else
448
449/* XXX: same endianness assumed */
450
451#ifdef CONFIG_USER_ONLY
452
453static inline CPU86_LDouble helper_fldt(uint8_t *ptr)
454{
455 return *(CPU86_LDouble *)ptr;
456}
457
458static inline void helper_fstt(CPU86_LDouble f, uint8_t *ptr)
459{
460 *(CPU86_LDouble *)ptr = f;
461}
462
463#else
464
465/* we use memory access macros */
466
467static inline CPU86_LDouble helper_fldt(uint8_t *ptr)
468{
469 CPU86_LDoubleU temp;
470
471 temp.l.lower = ldq(ptr);
472 temp.l.upper = lduw(ptr + 8);
473 return temp.d;
474}
475
476static inline void helper_fstt(CPU86_LDouble f, uint8_t *ptr)
477{
478 CPU86_LDoubleU temp;
479
480 temp.d = f;
481 stq(ptr, temp.l.lower);
482 stw(ptr + 8, temp.l.upper);
483}
484
485#endif /* !CONFIG_USER_ONLY */
486
487#endif /* USE_X86LDOUBLE */
2c0262af 488
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489#define FPUS_IE (1 << 0)
490#define FPUS_DE (1 << 1)
491#define FPUS_ZE (1 << 2)
492#define FPUS_OE (1 << 3)
493#define FPUS_UE (1 << 4)
494#define FPUS_PE (1 << 5)
495#define FPUS_SF (1 << 6)
496#define FPUS_SE (1 << 7)
497#define FPUS_B (1 << 15)
498
499#define FPUC_EM 0x3f
500
83fb7adf 501extern const CPU86_LDouble f15rk[7];
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502
503void helper_fldt_ST0_A0(void);
504void helper_fstt_ST0_A0(void);
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505void fpu_raise_exception(void);
506CPU86_LDouble helper_fdiv(CPU86_LDouble a, CPU86_LDouble b);
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507void helper_fbld_ST0_A0(void);
508void helper_fbst_ST0_A0(void);
509void helper_f2xm1(void);
510void helper_fyl2x(void);
511void helper_fptan(void);
512void helper_fpatan(void);
513void helper_fxtract(void);
514void helper_fprem1(void);
515void helper_fprem(void);
516void helper_fyl2xp1(void);
517void helper_fsqrt(void);
518void helper_fsincos(void);
519void helper_frndint(void);
520void helper_fscale(void);
521void helper_fsin(void);
522void helper_fcos(void);
523void helper_fxam_ST0(void);
524void helper_fstenv(uint8_t *ptr, int data32);
525void helper_fldenv(uint8_t *ptr, int data32);
526void helper_fsave(uint8_t *ptr, int data32);
527void helper_frstor(uint8_t *ptr, int data32);
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528void restore_native_fp_state(CPUState *env);
529void save_native_fp_state(CPUState *env);
2c0262af 530
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531extern const uint8_t parity_table[256];
532extern const uint8_t rclw_table[32];
533extern const uint8_t rclb_table[32];
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534
535static inline uint32_t compute_eflags(void)
536{
537 return env->eflags | cc_table[CC_OP].compute_all() | (DF & DF_MASK);
538}
539
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540/* NOTE: CC_OP must be modified manually to CC_OP_EFLAGS */
541static inline void load_eflags(int eflags, int update_mask)
542{
543 CC_SRC = eflags & (CC_O | CC_S | CC_Z | CC_A | CC_P | CC_C);
544 DF = 1 - (2 * ((eflags >> 10) & 1));
545 env->eflags = (env->eflags & ~update_mask) |
546 (eflags & update_mask);
547}
548
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549static inline void env_to_regs(void)
550{
551#ifdef reg_EAX
552 EAX = env->regs[R_EAX];
553#endif
554#ifdef reg_ECX
555 ECX = env->regs[R_ECX];
556#endif
557#ifdef reg_EDX
558 EDX = env->regs[R_EDX];
559#endif
560#ifdef reg_EBX
561 EBX = env->regs[R_EBX];
562#endif
563#ifdef reg_ESP
564 ESP = env->regs[R_ESP];
565#endif
566#ifdef reg_EBP
567 EBP = env->regs[R_EBP];
568#endif
569#ifdef reg_ESI
570 ESI = env->regs[R_ESI];
571#endif
572#ifdef reg_EDI
573 EDI = env->regs[R_EDI];
574#endif
575}
576
577static inline void regs_to_env(void)
578{
579#ifdef reg_EAX
580 env->regs[R_EAX] = EAX;
581#endif
582#ifdef reg_ECX
583 env->regs[R_ECX] = ECX;
584#endif
585#ifdef reg_EDX
586 env->regs[R_EDX] = EDX;
587#endif
588#ifdef reg_EBX
589 env->regs[R_EBX] = EBX;
590#endif
591#ifdef reg_ESP
592 env->regs[R_ESP] = ESP;
593#endif
594#ifdef reg_EBP
595 env->regs[R_EBP] = EBP;
596#endif
597#ifdef reg_ESI
598 env->regs[R_ESI] = ESI;
599#endif
600#ifdef reg_EDI
601 env->regs[R_EDI] = EDI;
602#endif
603}