[qemu.git] / target-mips / mips-defs.h

#if !defined (__QEMU_MIPS_DEFS_H__)
#define __QEMU_MIPS_DEFS_H__

/* If we want to use host float regs... */
//#define USE_HOST_FLOAT_REGS

/* real pages are variable size... */
#define TARGET_PAGE_BITS 12
#define MIPS_TLB_MAX 128

#ifdef TARGET_MIPS64
#define TARGET_LONG_BITS 64
#else
#define TARGET_LONG_BITS 32
#endif

/* Strictly follow the architecture standard:
   - Disallow "special" instruction handling for PMON/SPIM.
   Note that we still maintain Count/Compare to match the host clock. */
//#define MIPS_STRICT_STANDARD 1

#endif /* !defined (__QEMU_MIPS_DEFS_H__) */
Commit	Line	Data
6af0bf9c FB	1	#if !defined (__QEMU_MIPS_DEFS_H__)
	2	#define __QEMU_MIPS_DEFS_H__
	3
6af0bf9c FB	4	/* If we want to use host float regs... */
	5	//#define USE_HOST_FLOAT_REGS
	6
6af0bf9c FB	7	/* real pages are variable size... */
6af0bf9c FB	8	#define TARGET_PAGE_BITS 12
814b9a47	9	#define MIPS_TLB_MAX 128
6af0bf9c	10
60aa19ab	11	#ifdef TARGET_MIPS64
c570fd16 TS	12	#define TARGET_LONG_BITS 64
	13	#else
	14	#define TARGET_LONG_BITS 32
	15	#endif
	16
19221bda TS	17	/* Strictly follow the architecture standard:
	18	- Disallow "special" instruction handling for PMON/SPIM.
	19	Note that we still maintain Count/Compare to match the host clock. */
b48cfdff TS	20	//#define MIPS_STRICT_STANDARD 1
b48cfdff TS	21
6af0bf9c	22	#endif /* !defined (__QEMU_MIPS_DEFS_H__) */