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Commit | Line | Data |
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79aceca5 | 1 | /* |
3fc6c082 | 2 | * PowerPC emulation micro-operations for qemu. |
5fafdf24 | 3 | * |
76a66253 | 4 | * Copyright (c) 2003-2007 Jocelyn Mayer |
79aceca5 FB |
5 | * |
6 | * This library is free software; you can redistribute it and/or | |
7 | * modify it under the terms of the GNU Lesser General Public | |
8 | * License as published by the Free Software Foundation; either | |
9 | * version 2 of the License, or (at your option) any later version. | |
10 | * | |
11 | * This library is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
14 | * Lesser General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU Lesser General Public | |
17 | * License along with this library; if not, write to the Free Software | |
18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
19 | */ | |
20 | ||
a541f297 FB |
21 | //#define DEBUG_OP |
22 | ||
79aceca5 FB |
23 | #include "config.h" |
24 | #include "exec.h" | |
76a66253 | 25 | #include "op_helper.h" |
79aceca5 | 26 | |
28b6751f FB |
27 | #define REG 0 |
28 | #include "op_template.h" | |
29 | ||
30 | #define REG 1 | |
31 | #include "op_template.h" | |
32 | ||
33 | #define REG 2 | |
34 | #include "op_template.h" | |
35 | ||
36 | #define REG 3 | |
37 | #include "op_template.h" | |
38 | ||
39 | #define REG 4 | |
40 | #include "op_template.h" | |
41 | ||
42 | #define REG 5 | |
43 | #include "op_template.h" | |
44 | ||
45 | #define REG 6 | |
46 | #include "op_template.h" | |
47 | ||
48 | #define REG 7 | |
49 | #include "op_template.h" | |
50 | ||
51 | #define REG 8 | |
52 | #include "op_template.h" | |
53 | ||
54 | #define REG 9 | |
55 | #include "op_template.h" | |
56 | ||
57 | #define REG 10 | |
58 | #include "op_template.h" | |
59 | ||
60 | #define REG 11 | |
61 | #include "op_template.h" | |
62 | ||
63 | #define REG 12 | |
64 | #include "op_template.h" | |
65 | ||
66 | #define REG 13 | |
67 | #include "op_template.h" | |
68 | ||
69 | #define REG 14 | |
70 | #include "op_template.h" | |
71 | ||
72 | #define REG 15 | |
73 | #include "op_template.h" | |
74 | ||
75 | #define REG 16 | |
76 | #include "op_template.h" | |
77 | ||
78 | #define REG 17 | |
79 | #include "op_template.h" | |
80 | ||
81 | #define REG 18 | |
82 | #include "op_template.h" | |
83 | ||
84 | #define REG 19 | |
85 | #include "op_template.h" | |
86 | ||
87 | #define REG 20 | |
88 | #include "op_template.h" | |
89 | ||
90 | #define REG 21 | |
91 | #include "op_template.h" | |
92 | ||
93 | #define REG 22 | |
94 | #include "op_template.h" | |
95 | ||
96 | #define REG 23 | |
97 | #include "op_template.h" | |
98 | ||
99 | #define REG 24 | |
100 | #include "op_template.h" | |
101 | ||
102 | #define REG 25 | |
103 | #include "op_template.h" | |
104 | ||
105 | #define REG 26 | |
106 | #include "op_template.h" | |
107 | ||
108 | #define REG 27 | |
109 | #include "op_template.h" | |
110 | ||
111 | #define REG 28 | |
112 | #include "op_template.h" | |
113 | ||
114 | #define REG 29 | |
115 | #include "op_template.h" | |
116 | ||
117 | #define REG 30 | |
118 | #include "op_template.h" | |
119 | ||
120 | #define REG 31 | |
121 | #include "op_template.h" | |
122 | ||
a496775f JM |
123 | void OPPROTO op_print_mem_EA (void) |
124 | { | |
125 | do_print_mem_EA(T0); | |
126 | RETURN(); | |
127 | } | |
128 | ||
3fc6c082 | 129 | /* PowerPC state maintenance operations */ |
79aceca5 | 130 | /* set_Rc0 */ |
36081602 | 131 | void OPPROTO op_set_Rc0 (void) |
79aceca5 | 132 | { |
966439a6 | 133 | env->crf[0] = T0 | xer_so; |
79aceca5 FB |
134 | RETURN(); |
135 | } | |
136 | ||
fb0eaffc | 137 | /* Set Rc1 (for floating point arithmetic) */ |
36081602 | 138 | void OPPROTO op_set_Rc1 (void) |
fb0eaffc | 139 | { |
36081602 | 140 | env->crf[1] = env->fpscr[7]; |
fb0eaffc FB |
141 | RETURN(); |
142 | } | |
143 | ||
9a64fbe4 | 144 | /* Constants load */ |
76a66253 JM |
145 | void OPPROTO op_reset_T0 (void) |
146 | { | |
147 | T0 = 0; | |
148 | RETURN(); | |
149 | } | |
150 | ||
36081602 | 151 | void OPPROTO op_set_T0 (void) |
79aceca5 | 152 | { |
d9bce9d9 | 153 | T0 = (uint32_t)PARAM1; |
79aceca5 FB |
154 | RETURN(); |
155 | } | |
156 | ||
d9bce9d9 JM |
157 | #if defined(TARGET_PPC64) |
158 | void OPPROTO op_set_T0_64 (void) | |
159 | { | |
160 | T0 = ((uint64_t)PARAM1 << 32) | (uint64_t)PARAM2; | |
161 | RETURN(); | |
162 | } | |
163 | #endif | |
164 | ||
36081602 | 165 | void OPPROTO op_set_T1 (void) |
79aceca5 | 166 | { |
d9bce9d9 JM |
167 | T1 = (uint32_t)PARAM1; |
168 | RETURN(); | |
169 | } | |
170 | ||
171 | #if defined(TARGET_PPC64) | |
172 | void OPPROTO op_set_T1_64 (void) | |
173 | { | |
174 | T1 = ((uint64_t)PARAM1 << 32) | (uint64_t)PARAM2; | |
79aceca5 FB |
175 | RETURN(); |
176 | } | |
d9bce9d9 | 177 | #endif |
79aceca5 | 178 | |
76a66253 | 179 | #if 0 // unused |
36081602 | 180 | void OPPROTO op_set_T2 (void) |
79aceca5 | 181 | { |
2f401176 | 182 | T2 = (uint32_t)PARAM1; |
79aceca5 FB |
183 | RETURN(); |
184 | } | |
76a66253 | 185 | #endif |
79aceca5 | 186 | |
76a66253 | 187 | void OPPROTO op_move_T1_T0 (void) |
79aceca5 | 188 | { |
76a66253 JM |
189 | T1 = T0; |
190 | RETURN(); | |
9a64fbe4 FB |
191 | } |
192 | ||
d9bce9d9 JM |
193 | void OPPROTO op_move_T2_T0 (void) |
194 | { | |
195 | T2 = T0; | |
196 | RETURN(); | |
197 | } | |
198 | ||
76a66253 | 199 | /* Generate exceptions */ |
36081602 | 200 | void OPPROTO op_raise_exception_err (void) |
9a64fbe4 | 201 | { |
36081602 | 202 | do_raise_exception_err(PARAM1, PARAM2); |
9a64fbe4 FB |
203 | } |
204 | ||
36081602 | 205 | void OPPROTO op_update_nip (void) |
9a64fbe4 | 206 | { |
d9bce9d9 | 207 | env->nip = (uint32_t)PARAM1; |
76a66253 | 208 | RETURN(); |
9a64fbe4 FB |
209 | } |
210 | ||
d9bce9d9 JM |
211 | #if defined(TARGET_PPC64) |
212 | void OPPROTO op_update_nip_64 (void) | |
213 | { | |
214 | env->nip = ((uint64_t)PARAM1 << 32) | (uint64_t)PARAM2; | |
215 | RETURN(); | |
216 | } | |
217 | #endif | |
218 | ||
36081602 | 219 | void OPPROTO op_debug (void) |
ea4e754f FB |
220 | { |
221 | do_raise_exception(EXCP_DEBUG); | |
222 | } | |
223 | ||
36081602 | 224 | void OPPROTO op_exit_tb (void) |
9a64fbe4 | 225 | { |
76a66253 | 226 | EXIT_TB(); |
9a64fbe4 FB |
227 | } |
228 | ||
76a66253 | 229 | /* Load/store special registers */ |
36081602 | 230 | void OPPROTO op_load_cr (void) |
9a64fbe4 | 231 | { |
76a66253 | 232 | do_load_cr(); |
79aceca5 FB |
233 | RETURN(); |
234 | } | |
235 | ||
36081602 | 236 | void OPPROTO op_store_cr (void) |
79aceca5 | 237 | { |
36081602 | 238 | do_store_cr(PARAM1); |
79aceca5 FB |
239 | RETURN(); |
240 | } | |
241 | ||
76a66253 | 242 | void OPPROTO op_load_cro (void) |
79aceca5 | 243 | { |
76a66253 | 244 | T0 = env->crf[PARAM1]; |
79aceca5 FB |
245 | RETURN(); |
246 | } | |
247 | ||
76a66253 | 248 | void OPPROTO op_store_cro (void) |
79aceca5 | 249 | { |
76a66253 | 250 | env->crf[PARAM1] = T0; |
79aceca5 FB |
251 | RETURN(); |
252 | } | |
253 | ||
36081602 | 254 | void OPPROTO op_load_xer_cr (void) |
79aceca5 FB |
255 | { |
256 | T0 = (xer_so << 3) | (xer_ov << 2) | (xer_ca << 1); | |
257 | RETURN(); | |
258 | } | |
259 | ||
36081602 | 260 | void OPPROTO op_clear_xer_ov (void) |
79aceca5 FB |
261 | { |
262 | xer_so = 0; | |
263 | xer_ov = 0; | |
e864cabd JM |
264 | RETURN(); |
265 | } | |
266 | ||
36081602 | 267 | void OPPROTO op_clear_xer_ca (void) |
e864cabd | 268 | { |
79aceca5 FB |
269 | xer_ca = 0; |
270 | RETURN(); | |
271 | } | |
272 | ||
36081602 | 273 | void OPPROTO op_load_xer_bc (void) |
79aceca5 | 274 | { |
9a64fbe4 | 275 | T1 = xer_bc; |
79aceca5 FB |
276 | RETURN(); |
277 | } | |
278 | ||
76a66253 JM |
279 | void OPPROTO op_store_xer_bc (void) |
280 | { | |
281 | xer_bc = T0; | |
282 | RETURN(); | |
283 | } | |
284 | ||
36081602 | 285 | void OPPROTO op_load_xer (void) |
79aceca5 | 286 | { |
76a66253 | 287 | do_load_xer(); |
79aceca5 FB |
288 | RETURN(); |
289 | } | |
290 | ||
36081602 | 291 | void OPPROTO op_store_xer (void) |
79aceca5 | 292 | { |
76a66253 JM |
293 | do_store_xer(); |
294 | RETURN(); | |
295 | } | |
296 | ||
c80f84e3 JM |
297 | #if defined(TARGET_PPC64) |
298 | void OPPROTO op_store_pri (void) | |
299 | { | |
300 | do_store_pri(PARAM1); | |
301 | RETURN(); | |
302 | } | |
303 | #endif | |
304 | ||
76a66253 JM |
305 | #if !defined(CONFIG_USER_ONLY) |
306 | /* Segment registers load and store */ | |
36081602 | 307 | void OPPROTO op_load_sr (void) |
76a66253 | 308 | { |
36081602 | 309 | T0 = env->sr[T1]; |
76a66253 JM |
310 | RETURN(); |
311 | } | |
312 | ||
36081602 | 313 | void OPPROTO op_store_sr (void) |
76a66253 JM |
314 | { |
315 | do_store_sr(env, T1, T0); | |
316 | RETURN(); | |
317 | } | |
318 | ||
12de9a39 JM |
319 | #if defined(TARGET_PPC64) |
320 | void OPPROTO op_load_slb (void) | |
321 | { | |
322 | T0 = ppc_load_slb(env, T1); | |
323 | RETURN(); | |
324 | } | |
325 | ||
326 | void OPPROTO op_store_slb (void) | |
327 | { | |
328 | ppc_store_slb(env, T1, T0); | |
329 | RETURN(); | |
330 | } | |
331 | #endif /* defined(TARGET_PPC64) */ | |
332 | ||
36081602 | 333 | void OPPROTO op_load_sdr1 (void) |
76a66253 | 334 | { |
36081602 | 335 | T0 = env->sdr1; |
76a66253 JM |
336 | RETURN(); |
337 | } | |
338 | ||
36081602 | 339 | void OPPROTO op_store_sdr1 (void) |
76a66253 JM |
340 | { |
341 | do_store_sdr1(env, T0); | |
79aceca5 FB |
342 | RETURN(); |
343 | } | |
344 | ||
d9bce9d9 JM |
345 | #if defined (TARGET_PPC64) |
346 | void OPPROTO op_load_asr (void) | |
347 | { | |
348 | T0 = env->asr; | |
349 | RETURN(); | |
350 | } | |
351 | ||
352 | void OPPROTO op_store_asr (void) | |
353 | { | |
354 | ppc_store_asr(env, T0); | |
355 | RETURN(); | |
356 | } | |
357 | #endif | |
358 | ||
36081602 | 359 | void OPPROTO op_load_msr (void) |
79aceca5 | 360 | { |
3fc6c082 | 361 | T0 = do_load_msr(env); |
79aceca5 FB |
362 | RETURN(); |
363 | } | |
364 | ||
36081602 | 365 | void OPPROTO op_store_msr (void) |
79aceca5 | 366 | { |
a97fed52 JM |
367 | if (do_store_msr(env, T0)) { |
368 | env->halted = 1; | |
369 | do_raise_exception(EXCP_HLT); | |
370 | } | |
9a64fbe4 FB |
371 | RETURN(); |
372 | } | |
d9bce9d9 | 373 | |
be147d08 JM |
374 | void OPPROTO op_update_riee (void) |
375 | { | |
376 | msr_ri = (T0 >> MSR_RI) & 1; | |
377 | msr_ee = (T0 >> MSR_EE) & 1; | |
378 | RETURN(); | |
379 | } | |
380 | ||
d9bce9d9 JM |
381 | #if defined (TARGET_PPC64) |
382 | void OPPROTO op_store_msr_32 (void) | |
383 | { | |
a97fed52 JM |
384 | if (ppc_store_msr_32(env, T0)) { |
385 | env->halted = 1; | |
386 | do_raise_exception(EXCP_HLT); | |
387 | } | |
d9bce9d9 JM |
388 | RETURN(); |
389 | } | |
390 | #endif | |
76a66253 | 391 | #endif |
9a64fbe4 FB |
392 | |
393 | /* SPR */ | |
a496775f JM |
394 | void OPPROTO op_load_spr (void) |
395 | { | |
396 | T0 = env->spr[PARAM1]; | |
397 | RETURN(); | |
398 | } | |
399 | ||
400 | void OPPROTO op_store_spr (void) | |
401 | { | |
402 | env->spr[PARAM1] = T0; | |
403 | RETURN(); | |
404 | } | |
405 | ||
406 | void OPPROTO op_load_dump_spr (void) | |
407 | { | |
408 | T0 = ppc_load_dump_spr(PARAM1); | |
409 | RETURN(); | |
410 | } | |
411 | ||
412 | void OPPROTO op_store_dump_spr (void) | |
9a64fbe4 | 413 | { |
a496775f | 414 | ppc_store_dump_spr(PARAM1, T0); |
9a64fbe4 FB |
415 | RETURN(); |
416 | } | |
417 | ||
a496775f | 418 | void OPPROTO op_mask_spr (void) |
9a64fbe4 | 419 | { |
a496775f | 420 | env->spr[PARAM1] &= ~T0; |
79aceca5 FB |
421 | RETURN(); |
422 | } | |
423 | ||
36081602 | 424 | void OPPROTO op_load_lr (void) |
79aceca5 | 425 | { |
36081602 | 426 | T0 = env->lr; |
9a64fbe4 FB |
427 | RETURN(); |
428 | } | |
429 | ||
36081602 | 430 | void OPPROTO op_store_lr (void) |
9a64fbe4 | 431 | { |
36081602 | 432 | env->lr = T0; |
9a64fbe4 FB |
433 | RETURN(); |
434 | } | |
435 | ||
36081602 | 436 | void OPPROTO op_load_ctr (void) |
9a64fbe4 | 437 | { |
36081602 | 438 | T0 = env->ctr; |
9a64fbe4 FB |
439 | RETURN(); |
440 | } | |
441 | ||
36081602 | 442 | void OPPROTO op_store_ctr (void) |
9a64fbe4 | 443 | { |
36081602 | 444 | env->ctr = T0; |
9a64fbe4 FB |
445 | RETURN(); |
446 | } | |
447 | ||
36081602 | 448 | void OPPROTO op_load_tbl (void) |
9a64fbe4 | 449 | { |
36081602 | 450 | T0 = cpu_ppc_load_tbl(env); |
9a64fbe4 FB |
451 | RETURN(); |
452 | } | |
453 | ||
36081602 | 454 | void OPPROTO op_load_tbu (void) |
9a64fbe4 | 455 | { |
36081602 | 456 | T0 = cpu_ppc_load_tbu(env); |
9a64fbe4 FB |
457 | RETURN(); |
458 | } | |
459 | ||
a062e36c JM |
460 | void OPPROTO op_load_atbl (void) |
461 | { | |
462 | T0 = cpu_ppc_load_atbl(env); | |
463 | RETURN(); | |
464 | } | |
465 | ||
466 | void OPPROTO op_load_atbu (void) | |
467 | { | |
468 | T0 = cpu_ppc_load_atbu(env); | |
469 | RETURN(); | |
470 | } | |
471 | ||
76a66253 | 472 | #if !defined(CONFIG_USER_ONLY) |
36081602 | 473 | void OPPROTO op_store_tbl (void) |
9a64fbe4 | 474 | { |
36081602 | 475 | cpu_ppc_store_tbl(env, T0); |
79aceca5 FB |
476 | RETURN(); |
477 | } | |
478 | ||
36081602 | 479 | void OPPROTO op_store_tbu (void) |
9a64fbe4 | 480 | { |
36081602 | 481 | cpu_ppc_store_tbu(env, T0); |
9a64fbe4 FB |
482 | RETURN(); |
483 | } | |
484 | ||
a062e36c JM |
485 | void OPPROTO op_store_atbl (void) |
486 | { | |
487 | cpu_ppc_store_atbl(env, T0); | |
488 | RETURN(); | |
489 | } | |
490 | ||
491 | void OPPROTO op_store_atbu (void) | |
492 | { | |
493 | cpu_ppc_store_atbu(env, T0); | |
494 | RETURN(); | |
495 | } | |
496 | ||
36081602 | 497 | void OPPROTO op_load_decr (void) |
9a64fbe4 | 498 | { |
36081602 | 499 | T0 = cpu_ppc_load_decr(env); |
76a66253 JM |
500 | RETURN(); |
501 | } | |
9fddaa0c | 502 | |
36081602 | 503 | void OPPROTO op_store_decr (void) |
9fddaa0c | 504 | { |
36081602 | 505 | cpu_ppc_store_decr(env, T0); |
9a64fbe4 FB |
506 | RETURN(); |
507 | } | |
508 | ||
36081602 | 509 | void OPPROTO op_load_ibat (void) |
9a64fbe4 | 510 | { |
36081602 | 511 | T0 = env->IBAT[PARAM1][PARAM2]; |
76a66253 | 512 | RETURN(); |
9a64fbe4 FB |
513 | } |
514 | ||
76a66253 | 515 | void OPPROTO op_store_ibatu (void) |
9a64fbe4 | 516 | { |
3fc6c082 FB |
517 | do_store_ibatu(env, PARAM1, T0); |
518 | RETURN(); | |
519 | } | |
520 | ||
76a66253 | 521 | void OPPROTO op_store_ibatl (void) |
3fc6c082 FB |
522 | { |
523 | #if 1 | |
524 | env->IBAT[1][PARAM1] = T0; | |
525 | #else | |
526 | do_store_ibatl(env, PARAM1, T0); | |
527 | #endif | |
528 | RETURN(); | |
9a64fbe4 FB |
529 | } |
530 | ||
36081602 | 531 | void OPPROTO op_load_dbat (void) |
9a64fbe4 | 532 | { |
36081602 | 533 | T0 = env->DBAT[PARAM1][PARAM2]; |
76a66253 | 534 | RETURN(); |
9a64fbe4 FB |
535 | } |
536 | ||
76a66253 | 537 | void OPPROTO op_store_dbatu (void) |
3fc6c082 FB |
538 | { |
539 | do_store_dbatu(env, PARAM1, T0); | |
540 | RETURN(); | |
541 | } | |
542 | ||
76a66253 | 543 | void OPPROTO op_store_dbatl (void) |
9a64fbe4 | 544 | { |
3fc6c082 FB |
545 | #if 1 |
546 | env->DBAT[1][PARAM1] = T0; | |
547 | #else | |
548 | do_store_dbatl(env, PARAM1, T0); | |
549 | #endif | |
550 | RETURN(); | |
9a64fbe4 | 551 | } |
76a66253 | 552 | #endif /* !defined(CONFIG_USER_ONLY) */ |
9a64fbe4 | 553 | |
fb0eaffc | 554 | /* FPSCR */ |
36081602 | 555 | void OPPROTO op_load_fpscr (void) |
fb0eaffc | 556 | { |
76a66253 | 557 | do_load_fpscr(); |
fb0eaffc FB |
558 | RETURN(); |
559 | } | |
560 | ||
36081602 | 561 | void OPPROTO op_store_fpscr (void) |
fb0eaffc | 562 | { |
76a66253 | 563 | do_store_fpscr(PARAM1); |
fb0eaffc FB |
564 | RETURN(); |
565 | } | |
566 | ||
36081602 | 567 | void OPPROTO op_reset_scrfx (void) |
fb0eaffc | 568 | { |
36081602 | 569 | env->fpscr[7] &= ~0x8; |
fb0eaffc FB |
570 | RETURN(); |
571 | } | |
572 | ||
79aceca5 | 573 | /* crf operations */ |
36081602 | 574 | void OPPROTO op_getbit_T0 (void) |
79aceca5 | 575 | { |
36081602 | 576 | T0 = (T0 >> PARAM1) & 1; |
79aceca5 FB |
577 | RETURN(); |
578 | } | |
579 | ||
36081602 | 580 | void OPPROTO op_getbit_T1 (void) |
79aceca5 | 581 | { |
36081602 | 582 | T1 = (T1 >> PARAM1) & 1; |
79aceca5 FB |
583 | RETURN(); |
584 | } | |
585 | ||
36081602 | 586 | void OPPROTO op_setcrfbit (void) |
79aceca5 | 587 | { |
2f401176 | 588 | T1 = (T1 & (uint32_t)PARAM1) | (T0 << PARAM2); |
79aceca5 FB |
589 | RETURN(); |
590 | } | |
591 | ||
592 | /* Branch */ | |
36081602 | 593 | #define EIP env->nip |
9a64fbe4 | 594 | |
36081602 | 595 | void OPPROTO op_setlr (void) |
e98a6e40 | 596 | { |
36081602 | 597 | env->lr = (uint32_t)PARAM1; |
76a66253 | 598 | RETURN(); |
e98a6e40 FB |
599 | } |
600 | ||
d9bce9d9 JM |
601 | #if defined (TARGET_PPC64) |
602 | void OPPROTO op_setlr_64 (void) | |
603 | { | |
36081602 | 604 | env->lr = ((uint64_t)PARAM1 << 32) | (uint64_t)PARAM2; |
d9bce9d9 JM |
605 | RETURN(); |
606 | } | |
607 | #endif | |
608 | ||
36081602 | 609 | void OPPROTO op_goto_tb0 (void) |
e98a6e40 | 610 | { |
c53be334 FB |
611 | GOTO_TB(op_goto_tb0, PARAM1, 0); |
612 | } | |
613 | ||
36081602 | 614 | void OPPROTO op_goto_tb1 (void) |
c53be334 FB |
615 | { |
616 | GOTO_TB(op_goto_tb1, PARAM1, 1); | |
e98a6e40 FB |
617 | } |
618 | ||
d9bce9d9 | 619 | void OPPROTO op_b_T1 (void) |
e98a6e40 | 620 | { |
36081602 | 621 | env->nip = (uint32_t)(T1 & ~3); |
76a66253 | 622 | RETURN(); |
e98a6e40 FB |
623 | } |
624 | ||
d9bce9d9 JM |
625 | #if defined (TARGET_PPC64) |
626 | void OPPROTO op_b_T1_64 (void) | |
627 | { | |
36081602 | 628 | env->nip = (uint64_t)(T1 & ~3); |
d9bce9d9 JM |
629 | RETURN(); |
630 | } | |
631 | #endif | |
632 | ||
36081602 | 633 | void OPPROTO op_jz_T0 (void) |
e98a6e40 | 634 | { |
c53be334 FB |
635 | if (!T0) |
636 | GOTO_LABEL_PARAM(1); | |
e98a6e40 FB |
637 | RETURN(); |
638 | } | |
639 | ||
d9bce9d9 | 640 | void OPPROTO op_btest_T1 (void) |
e98a6e40 FB |
641 | { |
642 | if (T0) { | |
36081602 | 643 | env->nip = (uint32_t)(T1 & ~3); |
e98a6e40 | 644 | } else { |
36081602 | 645 | env->nip = (uint32_t)PARAM1; |
e98a6e40 FB |
646 | } |
647 | RETURN(); | |
648 | } | |
649 | ||
d9bce9d9 JM |
650 | #if defined (TARGET_PPC64) |
651 | void OPPROTO op_btest_T1_64 (void) | |
652 | { | |
653 | if (T0) { | |
36081602 | 654 | env->nip = (uint64_t)(T1 & ~3); |
d9bce9d9 | 655 | } else { |
36081602 | 656 | env->nip = ((uint64_t)PARAM1 << 32) | (uint64_t)PARAM2; |
d9bce9d9 JM |
657 | } |
658 | RETURN(); | |
659 | } | |
660 | #endif | |
661 | ||
36081602 | 662 | void OPPROTO op_movl_T1_ctr (void) |
e98a6e40 | 663 | { |
36081602 | 664 | T1 = env->ctr; |
76a66253 | 665 | RETURN(); |
e98a6e40 FB |
666 | } |
667 | ||
36081602 | 668 | void OPPROTO op_movl_T1_lr (void) |
e98a6e40 | 669 | { |
36081602 | 670 | T1 = env->lr; |
76a66253 | 671 | RETURN(); |
e98a6e40 FB |
672 | } |
673 | ||
674 | /* tests with result in T0 */ | |
d9bce9d9 JM |
675 | void OPPROTO op_test_ctr (void) |
676 | { | |
36081602 | 677 | T0 = (uint32_t)env->ctr; |
d9bce9d9 JM |
678 | RETURN(); |
679 | } | |
e98a6e40 | 680 | |
d9bce9d9 JM |
681 | #if defined(TARGET_PPC64) |
682 | void OPPROTO op_test_ctr_64 (void) | |
e98a6e40 | 683 | { |
36081602 | 684 | T0 = (uint64_t)env->ctr; |
d9bce9d9 JM |
685 | RETURN(); |
686 | } | |
687 | #endif | |
688 | ||
689 | void OPPROTO op_test_ctr_true (void) | |
690 | { | |
36081602 | 691 | T0 = ((uint32_t)env->ctr != 0 && (T0 & PARAM1) != 0); |
76a66253 | 692 | RETURN(); |
e98a6e40 FB |
693 | } |
694 | ||
d9bce9d9 JM |
695 | #if defined(TARGET_PPC64) |
696 | void OPPROTO op_test_ctr_true_64 (void) | |
e98a6e40 | 697 | { |
36081602 | 698 | T0 = ((uint64_t)env->ctr != 0 && (T0 & PARAM1) != 0); |
76a66253 | 699 | RETURN(); |
e98a6e40 | 700 | } |
d9bce9d9 | 701 | #endif |
e98a6e40 | 702 | |
d9bce9d9 | 703 | void OPPROTO op_test_ctr_false (void) |
e98a6e40 | 704 | { |
36081602 | 705 | T0 = ((uint32_t)env->ctr != 0 && (T0 & PARAM1) == 0); |
76a66253 | 706 | RETURN(); |
e98a6e40 FB |
707 | } |
708 | ||
d9bce9d9 JM |
709 | #if defined(TARGET_PPC64) |
710 | void OPPROTO op_test_ctr_false_64 (void) | |
e98a6e40 | 711 | { |
36081602 | 712 | T0 = ((uint64_t)env->ctr != 0 && (T0 & PARAM1) == 0); |
76a66253 | 713 | RETURN(); |
e98a6e40 | 714 | } |
d9bce9d9 JM |
715 | #endif |
716 | ||
717 | void OPPROTO op_test_ctrz (void) | |
718 | { | |
36081602 | 719 | T0 = ((uint32_t)env->ctr == 0); |
d9bce9d9 JM |
720 | RETURN(); |
721 | } | |
722 | ||
723 | #if defined(TARGET_PPC64) | |
724 | void OPPROTO op_test_ctrz_64 (void) | |
725 | { | |
36081602 | 726 | T0 = ((uint64_t)env->ctr == 0); |
d9bce9d9 JM |
727 | RETURN(); |
728 | } | |
729 | #endif | |
730 | ||
731 | void OPPROTO op_test_ctrz_true (void) | |
732 | { | |
36081602 | 733 | T0 = ((uint32_t)env->ctr == 0 && (T0 & PARAM1) != 0); |
d9bce9d9 JM |
734 | RETURN(); |
735 | } | |
736 | ||
737 | #if defined(TARGET_PPC64) | |
738 | void OPPROTO op_test_ctrz_true_64 (void) | |
739 | { | |
36081602 | 740 | T0 = ((uint64_t)env->ctr == 0 && (T0 & PARAM1) != 0); |
d9bce9d9 JM |
741 | RETURN(); |
742 | } | |
743 | #endif | |
e98a6e40 | 744 | |
d9bce9d9 | 745 | void OPPROTO op_test_ctrz_false (void) |
e98a6e40 | 746 | { |
36081602 | 747 | T0 = ((uint32_t)env->ctr == 0 && (T0 & PARAM1) == 0); |
76a66253 | 748 | RETURN(); |
e98a6e40 FB |
749 | } |
750 | ||
d9bce9d9 JM |
751 | #if defined(TARGET_PPC64) |
752 | void OPPROTO op_test_ctrz_false_64 (void) | |
e98a6e40 | 753 | { |
36081602 | 754 | T0 = ((uint64_t)env->ctr == 0 && (T0 & PARAM1) == 0); |
76a66253 | 755 | RETURN(); |
e98a6e40 | 756 | } |
d9bce9d9 | 757 | #endif |
e98a6e40 | 758 | |
36081602 | 759 | void OPPROTO op_test_true (void) |
e98a6e40 | 760 | { |
36081602 | 761 | T0 = (T0 & PARAM1); |
76a66253 | 762 | RETURN(); |
e98a6e40 FB |
763 | } |
764 | ||
36081602 | 765 | void OPPROTO op_test_false (void) |
e98a6e40 | 766 | { |
36081602 | 767 | T0 = ((T0 & PARAM1) == 0); |
76a66253 | 768 | RETURN(); |
e98a6e40 | 769 | } |
79aceca5 FB |
770 | |
771 | /* CTR maintenance */ | |
36081602 | 772 | void OPPROTO op_dec_ctr (void) |
79aceca5 | 773 | { |
36081602 | 774 | env->ctr--; |
79aceca5 FB |
775 | RETURN(); |
776 | } | |
777 | ||
778 | /*** Integer arithmetic ***/ | |
779 | /* add */ | |
36081602 | 780 | void OPPROTO op_add (void) |
79aceca5 FB |
781 | { |
782 | T0 += T1; | |
783 | RETURN(); | |
784 | } | |
785 | ||
d9bce9d9 | 786 | void OPPROTO op_check_addo (void) |
79aceca5 | 787 | { |
d9bce9d9 JM |
788 | if (likely(!(((uint32_t)T2 ^ (uint32_t)T1 ^ UINT32_MAX) & |
789 | ((uint32_t)T2 ^ (uint32_t)T0) & (1UL << 31)))) { | |
790 | xer_ov = 0; | |
791 | } else { | |
d9bce9d9 | 792 | xer_ov = 1; |
966439a6 | 793 | xer_so = 1; |
d9bce9d9 | 794 | } |
e864cabd | 795 | RETURN(); |
79aceca5 FB |
796 | } |
797 | ||
d9bce9d9 JM |
798 | #if defined(TARGET_PPC64) |
799 | void OPPROTO op_check_addo_64 (void) | |
79aceca5 | 800 | { |
d9bce9d9 | 801 | if (likely(!(((uint64_t)T2 ^ (uint64_t)T1 ^ UINT64_MAX) & |
1698b741 | 802 | ((uint64_t)T2 ^ (uint64_t)T0) & (1ULL << 63)))) { |
d9bce9d9 | 803 | xer_ov = 0; |
79aceca5 | 804 | } else { |
d9bce9d9 | 805 | xer_ov = 1; |
966439a6 | 806 | xer_so = 1; |
d9bce9d9 | 807 | } |
e864cabd | 808 | RETURN(); |
d9bce9d9 JM |
809 | } |
810 | #endif | |
811 | ||
812 | /* add carrying */ | |
813 | void OPPROTO op_check_addc (void) | |
814 | { | |
815 | if (likely((uint32_t)T0 >= (uint32_t)T2)) { | |
79aceca5 | 816 | xer_ca = 0; |
d9bce9d9 JM |
817 | } else { |
818 | xer_ca = 1; | |
79aceca5 FB |
819 | } |
820 | RETURN(); | |
821 | } | |
822 | ||
d9bce9d9 JM |
823 | #if defined(TARGET_PPC64) |
824 | void OPPROTO op_check_addc_64 (void) | |
79aceca5 | 825 | { |
d9bce9d9 JM |
826 | if (likely((uint64_t)T0 >= (uint64_t)T2)) { |
827 | xer_ca = 0; | |
828 | } else { | |
829 | xer_ca = 1; | |
830 | } | |
79aceca5 FB |
831 | RETURN(); |
832 | } | |
d9bce9d9 | 833 | #endif |
79aceca5 FB |
834 | |
835 | /* add extended */ | |
76a66253 | 836 | void OPPROTO op_adde (void) |
79aceca5 | 837 | { |
fdabc366 | 838 | do_adde(); |
76a66253 | 839 | RETURN(); |
79aceca5 FB |
840 | } |
841 | ||
d9bce9d9 JM |
842 | #if defined(TARGET_PPC64) |
843 | void OPPROTO op_adde_64 (void) | |
79aceca5 | 844 | { |
d9bce9d9 | 845 | do_adde_64(); |
79aceca5 FB |
846 | RETURN(); |
847 | } | |
d9bce9d9 | 848 | #endif |
79aceca5 FB |
849 | |
850 | /* add immediate */ | |
36081602 | 851 | void OPPROTO op_addi (void) |
79aceca5 | 852 | { |
36081602 | 853 | T0 += (int32_t)PARAM1; |
79aceca5 FB |
854 | RETURN(); |
855 | } | |
856 | ||
d9bce9d9 JM |
857 | /* add to minus one extended */ |
858 | void OPPROTO op_add_me (void) | |
79aceca5 | 859 | { |
d9bce9d9 JM |
860 | T0 += xer_ca + (-1); |
861 | if (likely((uint32_t)T1 != 0)) | |
79aceca5 | 862 | xer_ca = 1; |
79aceca5 FB |
863 | RETURN(); |
864 | } | |
865 | ||
d9bce9d9 JM |
866 | #if defined(TARGET_PPC64) |
867 | void OPPROTO op_add_me_64 (void) | |
79aceca5 | 868 | { |
79aceca5 | 869 | T0 += xer_ca + (-1); |
d9bce9d9 | 870 | if (likely((uint64_t)T1 != 0)) |
79aceca5 FB |
871 | xer_ca = 1; |
872 | RETURN(); | |
873 | } | |
d9bce9d9 | 874 | #endif |
79aceca5 | 875 | |
76a66253 | 876 | void OPPROTO op_addmeo (void) |
79aceca5 | 877 | { |
fdabc366 | 878 | do_addmeo(); |
79aceca5 FB |
879 | RETURN(); |
880 | } | |
881 | ||
d9bce9d9 JM |
882 | void OPPROTO op_addmeo_64 (void) |
883 | { | |
884 | do_addmeo(); | |
885 | RETURN(); | |
886 | } | |
887 | ||
79aceca5 | 888 | /* add to zero extended */ |
d9bce9d9 | 889 | void OPPROTO op_add_ze (void) |
79aceca5 | 890 | { |
79aceca5 | 891 | T0 += xer_ca; |
79aceca5 FB |
892 | RETURN(); |
893 | } | |
894 | ||
d9bce9d9 JM |
895 | /* divide word */ |
896 | void OPPROTO op_divw (void) | |
79aceca5 | 897 | { |
d9bce9d9 JM |
898 | if (unlikely(((int32_t)T0 == INT32_MIN && (int32_t)T1 == -1) || |
899 | (int32_t)T1 == 0)) { | |
900 | T0 = (int32_t)((-1) * ((uint32_t)T0 >> 31)); | |
901 | } else { | |
902 | T0 = (int32_t)T0 / (int32_t)T1; | |
903 | } | |
79aceca5 FB |
904 | RETURN(); |
905 | } | |
906 | ||
d9bce9d9 JM |
907 | #if defined(TARGET_PPC64) |
908 | void OPPROTO op_divd (void) | |
79aceca5 | 909 | { |
d9bce9d9 JM |
910 | if (unlikely(((int64_t)T0 == INT64_MIN && (int64_t)T1 == -1) || |
911 | (int64_t)T1 == 0)) { | |
912 | T0 = (int64_t)((-1ULL) * ((uint64_t)T0 >> 63)); | |
79aceca5 | 913 | } else { |
d9bce9d9 | 914 | T0 = (int64_t)T0 / (int64_t)T1; |
79aceca5 FB |
915 | } |
916 | RETURN(); | |
917 | } | |
d9bce9d9 | 918 | #endif |
79aceca5 | 919 | |
76a66253 | 920 | void OPPROTO op_divwo (void) |
79aceca5 | 921 | { |
fdabc366 | 922 | do_divwo(); |
79aceca5 FB |
923 | RETURN(); |
924 | } | |
925 | ||
d9bce9d9 JM |
926 | #if defined(TARGET_PPC64) |
927 | void OPPROTO op_divdo (void) | |
928 | { | |
929 | do_divdo(); | |
930 | RETURN(); | |
931 | } | |
932 | #endif | |
933 | ||
79aceca5 | 934 | /* divide word unsigned */ |
d9bce9d9 JM |
935 | void OPPROTO op_divwu (void) |
936 | { | |
937 | if (unlikely(T1 == 0)) { | |
938 | T0 = 0; | |
939 | } else { | |
940 | T0 = (uint32_t)T0 / (uint32_t)T1; | |
941 | } | |
942 | RETURN(); | |
943 | } | |
944 | ||
945 | #if defined(TARGET_PPC64) | |
946 | void OPPROTO op_divdu (void) | |
79aceca5 | 947 | { |
d9bce9d9 | 948 | if (unlikely(T1 == 0)) { |
79aceca5 FB |
949 | T0 = 0; |
950 | } else { | |
951 | T0 /= T1; | |
952 | } | |
953 | RETURN(); | |
954 | } | |
d9bce9d9 | 955 | #endif |
79aceca5 | 956 | |
76a66253 | 957 | void OPPROTO op_divwuo (void) |
79aceca5 | 958 | { |
fdabc366 | 959 | do_divwuo(); |
79aceca5 FB |
960 | RETURN(); |
961 | } | |
962 | ||
d9bce9d9 JM |
963 | #if defined(TARGET_PPC64) |
964 | void OPPROTO op_divduo (void) | |
965 | { | |
966 | do_divduo(); | |
967 | RETURN(); | |
968 | } | |
969 | #endif | |
970 | ||
79aceca5 | 971 | /* multiply high word */ |
d9bce9d9 | 972 | void OPPROTO op_mulhw (void) |
79aceca5 | 973 | { |
d9bce9d9 | 974 | T0 = ((int64_t)((int32_t)T0) * (int64_t)((int32_t)T1)) >> 32; |
79aceca5 FB |
975 | RETURN(); |
976 | } | |
977 | ||
d9bce9d9 JM |
978 | #if defined(TARGET_PPC64) |
979 | void OPPROTO op_mulhd (void) | |
980 | { | |
981 | uint64_t tl, th; | |
982 | ||
983 | do_imul64(&tl, &th); | |
984 | T0 = th; | |
985 | RETURN(); | |
986 | } | |
987 | #endif | |
988 | ||
79aceca5 | 989 | /* multiply high word unsigned */ |
d9bce9d9 | 990 | void OPPROTO op_mulhwu (void) |
79aceca5 | 991 | { |
d9bce9d9 | 992 | T0 = ((uint64_t)(uint32_t)T0 * (uint64_t)(uint32_t)T1) >> 32; |
79aceca5 FB |
993 | RETURN(); |
994 | } | |
995 | ||
d9bce9d9 JM |
996 | #if defined(TARGET_PPC64) |
997 | void OPPROTO op_mulhdu (void) | |
998 | { | |
999 | uint64_t tl, th; | |
1000 | ||
1001 | do_mul64(&tl, &th); | |
1002 | T0 = th; | |
1003 | RETURN(); | |
1004 | } | |
1005 | #endif | |
1006 | ||
79aceca5 | 1007 | /* multiply low immediate */ |
36081602 | 1008 | void OPPROTO op_mulli (void) |
79aceca5 | 1009 | { |
d9bce9d9 | 1010 | T0 = ((int32_t)T0 * (int32_t)PARAM1); |
79aceca5 FB |
1011 | RETURN(); |
1012 | } | |
1013 | ||
1014 | /* multiply low word */ | |
36081602 | 1015 | void OPPROTO op_mullw (void) |
d9bce9d9 JM |
1016 | { |
1017 | T0 = (int32_t)(T0 * T1); | |
1018 | RETURN(); | |
1019 | } | |
1020 | ||
1021 | #if defined(TARGET_PPC64) | |
1022 | void OPPROTO op_mulld (void) | |
79aceca5 FB |
1023 | { |
1024 | T0 *= T1; | |
1025 | RETURN(); | |
1026 | } | |
d9bce9d9 | 1027 | #endif |
79aceca5 | 1028 | |
76a66253 | 1029 | void OPPROTO op_mullwo (void) |
79aceca5 | 1030 | { |
fdabc366 | 1031 | do_mullwo(); |
79aceca5 FB |
1032 | RETURN(); |
1033 | } | |
1034 | ||
d9bce9d9 JM |
1035 | #if defined(TARGET_PPC64) |
1036 | void OPPROTO op_mulldo (void) | |
1037 | { | |
1038 | do_mulldo(); | |
1039 | RETURN(); | |
1040 | } | |
1041 | #endif | |
1042 | ||
79aceca5 | 1043 | /* negate */ |
d9bce9d9 | 1044 | void OPPROTO op_neg (void) |
79aceca5 | 1045 | { |
d9bce9d9 JM |
1046 | if (likely(T0 != INT32_MIN)) { |
1047 | T0 = -(int32_t)T0; | |
79aceca5 FB |
1048 | } |
1049 | RETURN(); | |
1050 | } | |
1051 | ||
d9bce9d9 JM |
1052 | #if defined(TARGET_PPC64) |
1053 | void OPPROTO op_neg_64 (void) | |
1054 | { | |
1055 | if (likely(T0 != INT64_MIN)) { | |
1056 | T0 = -(int64_t)T0; | |
1057 | } | |
1058 | RETURN(); | |
1059 | } | |
1060 | #endif | |
1061 | ||
76a66253 | 1062 | void OPPROTO op_nego (void) |
79aceca5 | 1063 | { |
fdabc366 | 1064 | do_nego(); |
79aceca5 FB |
1065 | RETURN(); |
1066 | } | |
1067 | ||
d9bce9d9 JM |
1068 | #if defined(TARGET_PPC64) |
1069 | void OPPROTO op_nego_64 (void) | |
1070 | { | |
1071 | do_nego_64(); | |
1072 | RETURN(); | |
1073 | } | |
1074 | #endif | |
1075 | ||
0cfec834 | 1076 | /* subtract from */ |
36081602 | 1077 | void OPPROTO op_subf (void) |
79aceca5 FB |
1078 | { |
1079 | T0 = T1 - T0; | |
1080 | RETURN(); | |
1081 | } | |
1082 | ||
d9bce9d9 JM |
1083 | void OPPROTO op_check_subfo (void) |
1084 | { | |
1085 | if (likely(!(((uint32_t)(~T2) ^ (uint32_t)T1 ^ UINT32_MAX) & | |
1086 | ((uint32_t)(~T2) ^ (uint32_t)T0) & (1UL << 31)))) { | |
1087 | xer_ov = 0; | |
1088 | } else { | |
d9bce9d9 | 1089 | xer_ov = 1; |
966439a6 | 1090 | xer_so = 1; |
d9bce9d9 JM |
1091 | } |
1092 | RETURN(); | |
1093 | } | |
1094 | ||
1095 | #if defined(TARGET_PPC64) | |
1096 | void OPPROTO op_check_subfo_64 (void) | |
79aceca5 | 1097 | { |
d9bce9d9 JM |
1098 | if (likely(!(((uint64_t)(~T2) ^ (uint64_t)T1 ^ UINT64_MAX) & |
1099 | ((uint64_t)(~T2) ^ (uint64_t)T0) & (1ULL << 63)))) { | |
1100 | xer_ov = 0; | |
1101 | } else { | |
d9bce9d9 | 1102 | xer_ov = 1; |
966439a6 | 1103 | xer_so = 1; |
d9bce9d9 | 1104 | } |
79aceca5 FB |
1105 | RETURN(); |
1106 | } | |
d9bce9d9 | 1107 | #endif |
79aceca5 | 1108 | |
0cfec834 | 1109 | /* subtract from carrying */ |
d9bce9d9 | 1110 | void OPPROTO op_check_subfc (void) |
79aceca5 | 1111 | { |
d9bce9d9 | 1112 | if (likely((uint32_t)T0 > (uint32_t)T1)) { |
79aceca5 | 1113 | xer_ca = 0; |
d9bce9d9 JM |
1114 | } else { |
1115 | xer_ca = 1; | |
79aceca5 FB |
1116 | } |
1117 | RETURN(); | |
1118 | } | |
1119 | ||
d9bce9d9 JM |
1120 | #if defined(TARGET_PPC64) |
1121 | void OPPROTO op_check_subfc_64 (void) | |
79aceca5 | 1122 | { |
d9bce9d9 JM |
1123 | if (likely((uint64_t)T0 > (uint64_t)T1)) { |
1124 | xer_ca = 0; | |
1125 | } else { | |
1126 | xer_ca = 1; | |
1127 | } | |
79aceca5 FB |
1128 | RETURN(); |
1129 | } | |
d9bce9d9 | 1130 | #endif |
79aceca5 | 1131 | |
0cfec834 | 1132 | /* subtract from extended */ |
76a66253 | 1133 | void OPPROTO op_subfe (void) |
79aceca5 | 1134 | { |
fdabc366 | 1135 | do_subfe(); |
79aceca5 FB |
1136 | RETURN(); |
1137 | } | |
1138 | ||
d9bce9d9 JM |
1139 | #if defined(TARGET_PPC64) |
1140 | void OPPROTO op_subfe_64 (void) | |
79aceca5 | 1141 | { |
d9bce9d9 | 1142 | do_subfe_64(); |
79aceca5 FB |
1143 | RETURN(); |
1144 | } | |
d9bce9d9 | 1145 | #endif |
79aceca5 | 1146 | |
0cfec834 | 1147 | /* subtract from immediate carrying */ |
d9bce9d9 | 1148 | void OPPROTO op_subfic (void) |
79aceca5 | 1149 | { |
b6e27ab8 | 1150 | T0 = (int32_t)PARAM1 + ~T0 + 1; |
d9bce9d9 | 1151 | if ((uint32_t)T0 <= (uint32_t)PARAM1) { |
79aceca5 FB |
1152 | xer_ca = 1; |
1153 | } else { | |
1154 | xer_ca = 0; | |
1155 | } | |
1156 | RETURN(); | |
1157 | } | |
1158 | ||
d9bce9d9 JM |
1159 | #if defined(TARGET_PPC64) |
1160 | void OPPROTO op_subfic_64 (void) | |
1161 | { | |
2f401176 | 1162 | T0 = (int64_t)PARAM1 + ~T0 + 1; |
d9bce9d9 JM |
1163 | if ((uint64_t)T0 <= (uint64_t)PARAM1) { |
1164 | xer_ca = 1; | |
1165 | } else { | |
1166 | xer_ca = 0; | |
1167 | } | |
1168 | RETURN(); | |
1169 | } | |
1170 | #endif | |
1171 | ||
0cfec834 | 1172 | /* subtract from minus one extended */ |
d9bce9d9 | 1173 | void OPPROTO op_subfme (void) |
79aceca5 FB |
1174 | { |
1175 | T0 = ~T0 + xer_ca - 1; | |
d9bce9d9 JM |
1176 | if (likely((uint32_t)T0 != (uint32_t)-1)) |
1177 | xer_ca = 1; | |
1178 | RETURN(); | |
1179 | } | |
79aceca5 | 1180 | |
d9bce9d9 JM |
1181 | #if defined(TARGET_PPC64) |
1182 | void OPPROTO op_subfme_64 (void) | |
1183 | { | |
1184 | T0 = ~T0 + xer_ca - 1; | |
1185 | if (likely((uint64_t)T0 != (uint64_t)-1)) | |
79aceca5 FB |
1186 | xer_ca = 1; |
1187 | RETURN(); | |
1188 | } | |
d9bce9d9 | 1189 | #endif |
79aceca5 | 1190 | |
76a66253 | 1191 | void OPPROTO op_subfmeo (void) |
79aceca5 | 1192 | { |
fdabc366 | 1193 | do_subfmeo(); |
79aceca5 FB |
1194 | RETURN(); |
1195 | } | |
1196 | ||
d9bce9d9 JM |
1197 | #if defined(TARGET_PPC64) |
1198 | void OPPROTO op_subfmeo_64 (void) | |
1199 | { | |
1200 | do_subfmeo_64(); | |
1201 | RETURN(); | |
1202 | } | |
1203 | #endif | |
1204 | ||
0cfec834 | 1205 | /* subtract from zero extended */ |
d9bce9d9 | 1206 | void OPPROTO op_subfze (void) |
79aceca5 FB |
1207 | { |
1208 | T1 = ~T0; | |
1209 | T0 = T1 + xer_ca; | |
d9bce9d9 | 1210 | if ((uint32_t)T0 < (uint32_t)T1) { |
79aceca5 FB |
1211 | xer_ca = 1; |
1212 | } else { | |
1213 | xer_ca = 0; | |
1214 | } | |
1215 | RETURN(); | |
1216 | } | |
1217 | ||
d9bce9d9 JM |
1218 | #if defined(TARGET_PPC64) |
1219 | void OPPROTO op_subfze_64 (void) | |
1220 | { | |
1221 | T1 = ~T0; | |
1222 | T0 = T1 + xer_ca; | |
1223 | if ((uint64_t)T0 < (uint64_t)T1) { | |
1224 | xer_ca = 1; | |
1225 | } else { | |
1226 | xer_ca = 0; | |
1227 | } | |
1228 | RETURN(); | |
1229 | } | |
1230 | #endif | |
1231 | ||
76a66253 | 1232 | void OPPROTO op_subfzeo (void) |
79aceca5 | 1233 | { |
fdabc366 | 1234 | do_subfzeo(); |
79aceca5 FB |
1235 | RETURN(); |
1236 | } | |
1237 | ||
d9bce9d9 JM |
1238 | #if defined(TARGET_PPC64) |
1239 | void OPPROTO op_subfzeo_64 (void) | |
1240 | { | |
1241 | do_subfzeo_64(); | |
1242 | RETURN(); | |
1243 | } | |
1244 | #endif | |
1245 | ||
79aceca5 FB |
1246 | /*** Integer comparison ***/ |
1247 | /* compare */ | |
d9bce9d9 JM |
1248 | void OPPROTO op_cmp (void) |
1249 | { | |
1250 | if ((int32_t)T0 < (int32_t)T1) { | |
1251 | T0 = 0x08; | |
1252 | } else if ((int32_t)T0 > (int32_t)T1) { | |
1253 | T0 = 0x04; | |
1254 | } else { | |
1255 | T0 = 0x02; | |
1256 | } | |
966439a6 | 1257 | T0 |= xer_so; |
d9bce9d9 JM |
1258 | RETURN(); |
1259 | } | |
1260 | ||
1261 | #if defined(TARGET_PPC64) | |
1262 | void OPPROTO op_cmp_64 (void) | |
79aceca5 | 1263 | { |
d9bce9d9 | 1264 | if ((int64_t)T0 < (int64_t)T1) { |
79aceca5 | 1265 | T0 = 0x08; |
d9bce9d9 | 1266 | } else if ((int64_t)T0 > (int64_t)T1) { |
79aceca5 FB |
1267 | T0 = 0x04; |
1268 | } else { | |
1269 | T0 = 0x02; | |
1270 | } | |
966439a6 | 1271 | T0 |= xer_so; |
79aceca5 FB |
1272 | RETURN(); |
1273 | } | |
d9bce9d9 | 1274 | #endif |
79aceca5 FB |
1275 | |
1276 | /* compare immediate */ | |
d9bce9d9 | 1277 | void OPPROTO op_cmpi (void) |
79aceca5 | 1278 | { |
d9bce9d9 | 1279 | if ((int32_t)T0 < (int32_t)PARAM1) { |
79aceca5 | 1280 | T0 = 0x08; |
d9bce9d9 | 1281 | } else if ((int32_t)T0 > (int32_t)PARAM1) { |
79aceca5 FB |
1282 | T0 = 0x04; |
1283 | } else { | |
1284 | T0 = 0x02; | |
1285 | } | |
966439a6 | 1286 | T0 |= xer_so; |
79aceca5 FB |
1287 | RETURN(); |
1288 | } | |
1289 | ||
d9bce9d9 JM |
1290 | #if defined(TARGET_PPC64) |
1291 | void OPPROTO op_cmpi_64 (void) | |
1292 | { | |
1293 | if ((int64_t)T0 < (int64_t)((int32_t)PARAM1)) { | |
1294 | T0 = 0x08; | |
1295 | } else if ((int64_t)T0 > (int64_t)((int32_t)PARAM1)) { | |
1296 | T0 = 0x04; | |
1297 | } else { | |
1298 | T0 = 0x02; | |
1299 | } | |
966439a6 | 1300 | T0 |= xer_so; |
d9bce9d9 JM |
1301 | RETURN(); |
1302 | } | |
1303 | #endif | |
1304 | ||
79aceca5 | 1305 | /* compare logical */ |
d9bce9d9 | 1306 | void OPPROTO op_cmpl (void) |
79aceca5 | 1307 | { |
d9bce9d9 | 1308 | if ((uint32_t)T0 < (uint32_t)T1) { |
79aceca5 | 1309 | T0 = 0x08; |
d9bce9d9 | 1310 | } else if ((uint32_t)T0 > (uint32_t)T1) { |
79aceca5 FB |
1311 | T0 = 0x04; |
1312 | } else { | |
1313 | T0 = 0x02; | |
1314 | } | |
966439a6 | 1315 | T0 |= xer_so; |
79aceca5 FB |
1316 | RETURN(); |
1317 | } | |
1318 | ||
d9bce9d9 JM |
1319 | #if defined(TARGET_PPC64) |
1320 | void OPPROTO op_cmpl_64 (void) | |
1321 | { | |
1322 | if ((uint64_t)T0 < (uint64_t)T1) { | |
1323 | T0 = 0x08; | |
1324 | } else if ((uint64_t)T0 > (uint64_t)T1) { | |
1325 | T0 = 0x04; | |
1326 | } else { | |
1327 | T0 = 0x02; | |
1328 | } | |
966439a6 | 1329 | T0 |= xer_so; |
d9bce9d9 JM |
1330 | RETURN(); |
1331 | } | |
1332 | #endif | |
1333 | ||
79aceca5 | 1334 | /* compare logical immediate */ |
d9bce9d9 JM |
1335 | void OPPROTO op_cmpli (void) |
1336 | { | |
1337 | if ((uint32_t)T0 < (uint32_t)PARAM1) { | |
1338 | T0 = 0x08; | |
1339 | } else if ((uint32_t)T0 > (uint32_t)PARAM1) { | |
1340 | T0 = 0x04; | |
1341 | } else { | |
1342 | T0 = 0x02; | |
1343 | } | |
966439a6 | 1344 | T0 |= xer_so; |
d9bce9d9 JM |
1345 | RETURN(); |
1346 | } | |
1347 | ||
1348 | #if defined(TARGET_PPC64) | |
1349 | void OPPROTO op_cmpli_64 (void) | |
79aceca5 | 1350 | { |
d9bce9d9 | 1351 | if ((uint64_t)T0 < (uint64_t)PARAM1) { |
79aceca5 | 1352 | T0 = 0x08; |
d9bce9d9 | 1353 | } else if ((uint64_t)T0 > (uint64_t)PARAM1) { |
79aceca5 FB |
1354 | T0 = 0x04; |
1355 | } else { | |
1356 | T0 = 0x02; | |
1357 | } | |
966439a6 | 1358 | T0 |= xer_so; |
79aceca5 FB |
1359 | RETURN(); |
1360 | } | |
d9bce9d9 JM |
1361 | #endif |
1362 | ||
1363 | void OPPROTO op_isel (void) | |
1364 | { | |
1365 | if (T0) | |
1366 | T0 = T1; | |
1367 | else | |
1368 | T0 = T2; | |
1369 | RETURN(); | |
1370 | } | |
1371 | ||
1372 | void OPPROTO op_popcntb (void) | |
1373 | { | |
1374 | do_popcntb(); | |
1375 | RETURN(); | |
1376 | } | |
1377 | ||
1378 | #if defined(TARGET_PPC64) | |
1379 | void OPPROTO op_popcntb_64 (void) | |
1380 | { | |
1381 | do_popcntb_64(); | |
1382 | RETURN(); | |
1383 | } | |
1384 | #endif | |
79aceca5 FB |
1385 | |
1386 | /*** Integer logical ***/ | |
1387 | /* and */ | |
36081602 | 1388 | void OPPROTO op_and (void) |
79aceca5 FB |
1389 | { |
1390 | T0 &= T1; | |
1391 | RETURN(); | |
1392 | } | |
1393 | ||
1394 | /* andc */ | |
36081602 | 1395 | void OPPROTO op_andc (void) |
79aceca5 FB |
1396 | { |
1397 | T0 &= ~T1; | |
1398 | RETURN(); | |
1399 | } | |
1400 | ||
1401 | /* andi. */ | |
76a66253 | 1402 | void OPPROTO op_andi_T0 (void) |
79aceca5 | 1403 | { |
2f401176 | 1404 | T0 &= (uint32_t)PARAM1; |
79aceca5 FB |
1405 | RETURN(); |
1406 | } | |
1407 | ||
76a66253 JM |
1408 | void OPPROTO op_andi_T1 (void) |
1409 | { | |
2f401176 | 1410 | T1 &= (uint32_t)PARAM1; |
76a66253 JM |
1411 | RETURN(); |
1412 | } | |
1413 | ||
40d0591e JM |
1414 | #if defined(TARGET_PPC64) |
1415 | void OPPROTO op_andi_T0_64 (void) | |
1416 | { | |
2f401176 | 1417 | T0 &= ((uint64_t)PARAM1 << 32) | (uint64_t)PARAM2; |
40d0591e JM |
1418 | RETURN(); |
1419 | } | |
1420 | ||
1421 | void OPPROTO op_andi_T1_64 (void) | |
1422 | { | |
2f401176 | 1423 | T1 &= ((uint64_t)PARAM1 << 32) | (uint64_t)PARAM2; |
40d0591e JM |
1424 | RETURN(); |
1425 | } | |
1426 | #endif | |
1427 | ||
79aceca5 | 1428 | /* count leading zero */ |
76a66253 | 1429 | void OPPROTO op_cntlzw (void) |
79aceca5 | 1430 | { |
0487d6a8 | 1431 | T0 = _do_cntlzw(T0); |
79aceca5 FB |
1432 | RETURN(); |
1433 | } | |
1434 | ||
d9bce9d9 JM |
1435 | #if defined(TARGET_PPC64) |
1436 | void OPPROTO op_cntlzd (void) | |
1437 | { | |
0487d6a8 | 1438 | T0 = _do_cntlzd(T0); |
d9bce9d9 JM |
1439 | RETURN(); |
1440 | } | |
1441 | #endif | |
1442 | ||
79aceca5 | 1443 | /* eqv */ |
36081602 | 1444 | void OPPROTO op_eqv (void) |
79aceca5 FB |
1445 | { |
1446 | T0 = ~(T0 ^ T1); | |
1447 | RETURN(); | |
1448 | } | |
1449 | ||
1450 | /* extend sign byte */ | |
d9bce9d9 | 1451 | void OPPROTO op_extsb (void) |
79aceca5 | 1452 | { |
d9bce9d9 JM |
1453 | #if defined (TARGET_PPC64) |
1454 | T0 = (int64_t)((int8_t)T0); | |
1455 | #else | |
1456 | T0 = (int32_t)((int8_t)T0); | |
1457 | #endif | |
79aceca5 FB |
1458 | RETURN(); |
1459 | } | |
1460 | ||
1461 | /* extend sign half word */ | |
d9bce9d9 | 1462 | void OPPROTO op_extsh (void) |
79aceca5 | 1463 | { |
d9bce9d9 JM |
1464 | #if defined (TARGET_PPC64) |
1465 | T0 = (int64_t)((int16_t)T0); | |
1466 | #else | |
1467 | T0 = (int32_t)((int16_t)T0); | |
1468 | #endif | |
79aceca5 FB |
1469 | RETURN(); |
1470 | } | |
1471 | ||
d9bce9d9 JM |
1472 | #if defined (TARGET_PPC64) |
1473 | void OPPROTO op_extsw (void) | |
1474 | { | |
1475 | T0 = (int64_t)((int32_t)T0); | |
1476 | RETURN(); | |
1477 | } | |
1478 | #endif | |
1479 | ||
79aceca5 | 1480 | /* nand */ |
36081602 | 1481 | void OPPROTO op_nand (void) |
79aceca5 FB |
1482 | { |
1483 | T0 = ~(T0 & T1); | |
1484 | RETURN(); | |
1485 | } | |
1486 | ||
1487 | /* nor */ | |
36081602 | 1488 | void OPPROTO op_nor (void) |
79aceca5 FB |
1489 | { |
1490 | T0 = ~(T0 | T1); | |
1491 | RETURN(); | |
1492 | } | |
1493 | ||
1494 | /* or */ | |
36081602 | 1495 | void OPPROTO op_or (void) |
79aceca5 FB |
1496 | { |
1497 | T0 |= T1; | |
1498 | RETURN(); | |
1499 | } | |
1500 | ||
1501 | /* orc */ | |
36081602 | 1502 | void OPPROTO op_orc (void) |
79aceca5 FB |
1503 | { |
1504 | T0 |= ~T1; | |
1505 | RETURN(); | |
1506 | } | |
1507 | ||
1508 | /* ori */ | |
36081602 | 1509 | void OPPROTO op_ori (void) |
79aceca5 | 1510 | { |
2f401176 | 1511 | T0 |= (uint32_t)PARAM1; |
79aceca5 FB |
1512 | RETURN(); |
1513 | } | |
1514 | ||
1515 | /* xor */ | |
36081602 | 1516 | void OPPROTO op_xor (void) |
79aceca5 FB |
1517 | { |
1518 | T0 ^= T1; | |
1519 | RETURN(); | |
1520 | } | |
1521 | ||
1522 | /* xori */ | |
36081602 | 1523 | void OPPROTO op_xori (void) |
79aceca5 | 1524 | { |
2f401176 | 1525 | T0 ^= (uint32_t)PARAM1; |
79aceca5 FB |
1526 | RETURN(); |
1527 | } | |
1528 | ||
1529 | /*** Integer rotate ***/ | |
76a66253 | 1530 | void OPPROTO op_rotl32_T0_T1 (void) |
79aceca5 | 1531 | { |
76a66253 | 1532 | T0 = rotl32(T0, T1 & 0x1F); |
79aceca5 FB |
1533 | RETURN(); |
1534 | } | |
1535 | ||
76a66253 | 1536 | void OPPROTO op_rotli32_T0 (void) |
79aceca5 | 1537 | { |
76a66253 | 1538 | T0 = rotl32(T0, PARAM1); |
79aceca5 FB |
1539 | RETURN(); |
1540 | } | |
1541 | ||
51789c41 JM |
1542 | #if defined(TARGET_PPC64) |
1543 | void OPPROTO op_rotl64_T0_T1 (void) | |
1544 | { | |
1545 | T0 = rotl64(T0, T1 & 0x3F); | |
1546 | RETURN(); | |
1547 | } | |
1548 | ||
1549 | void OPPROTO op_rotli64_T0 (void) | |
1550 | { | |
1551 | T0 = rotl64(T0, PARAM1); | |
1552 | RETURN(); | |
1553 | } | |
1554 | #endif | |
1555 | ||
79aceca5 FB |
1556 | /*** Integer shift ***/ |
1557 | /* shift left word */ | |
d9bce9d9 | 1558 | void OPPROTO op_slw (void) |
79aceca5 FB |
1559 | { |
1560 | if (T1 & 0x20) { | |
1561 | T0 = 0; | |
d9bce9d9 JM |
1562 | } else { |
1563 | T0 = (uint32_t)(T0 << T1); | |
1564 | } | |
1565 | RETURN(); | |
1566 | } | |
1567 | ||
1568 | #if defined(TARGET_PPC64) | |
1569 | void OPPROTO op_sld (void) | |
1570 | { | |
1571 | if (T1 & 0x40) { | |
1572 | T0 = 0; | |
79aceca5 FB |
1573 | } else { |
1574 | T0 = T0 << T1; | |
1575 | } | |
1576 | RETURN(); | |
1577 | } | |
d9bce9d9 | 1578 | #endif |
79aceca5 FB |
1579 | |
1580 | /* shift right algebraic word */ | |
76a66253 | 1581 | void OPPROTO op_sraw (void) |
79aceca5 | 1582 | { |
9a64fbe4 | 1583 | do_sraw(); |
79aceca5 FB |
1584 | RETURN(); |
1585 | } | |
1586 | ||
d9bce9d9 JM |
1587 | #if defined(TARGET_PPC64) |
1588 | void OPPROTO op_srad (void) | |
1589 | { | |
1590 | do_srad(); | |
1591 | RETURN(); | |
1592 | } | |
1593 | #endif | |
1594 | ||
79aceca5 | 1595 | /* shift right algebraic word immediate */ |
d9bce9d9 | 1596 | void OPPROTO op_srawi (void) |
79aceca5 | 1597 | { |
d9bce9d9 JM |
1598 | uint32_t mask = (uint32_t)PARAM2; |
1599 | ||
1600 | T0 = (int32_t)T0 >> PARAM1; | |
1601 | if ((int32_t)T1 < 0 && (T1 & mask) != 0) { | |
79aceca5 FB |
1602 | xer_ca = 1; |
1603 | } else { | |
1604 | xer_ca = 0; | |
1605 | } | |
1606 | RETURN(); | |
1607 | } | |
1608 | ||
d9bce9d9 JM |
1609 | #if defined(TARGET_PPC64) |
1610 | void OPPROTO op_sradi (void) | |
1611 | { | |
1612 | uint64_t mask = ((uint64_t)PARAM2 << 32) | (uint64_t)PARAM3; | |
1613 | ||
1614 | T0 = (int64_t)T0 >> PARAM1; | |
1615 | if ((int64_t)T1 < 0 && ((uint64_t)T1 & mask) != 0) { | |
1616 | xer_ca = 1; | |
1617 | } else { | |
1618 | xer_ca = 0; | |
1619 | } | |
1620 | RETURN(); | |
1621 | } | |
1622 | #endif | |
1623 | ||
79aceca5 | 1624 | /* shift right word */ |
d9bce9d9 | 1625 | void OPPROTO op_srw (void) |
79aceca5 FB |
1626 | { |
1627 | if (T1 & 0x20) { | |
1628 | T0 = 0; | |
1629 | } else { | |
d9bce9d9 JM |
1630 | T0 = (uint32_t)T0 >> T1; |
1631 | } | |
1632 | RETURN(); | |
1633 | } | |
1634 | ||
1635 | #if defined(TARGET_PPC64) | |
1636 | void OPPROTO op_srd (void) | |
1637 | { | |
1638 | if (T1 & 0x40) { | |
1639 | T0 = 0; | |
1640 | } else { | |
1641 | T0 = (uint64_t)T0 >> T1; | |
79aceca5 FB |
1642 | } |
1643 | RETURN(); | |
1644 | } | |
d9bce9d9 | 1645 | #endif |
79aceca5 | 1646 | |
76a66253 JM |
1647 | void OPPROTO op_sl_T0_T1 (void) |
1648 | { | |
1649 | T0 = T0 << T1; | |
1650 | RETURN(); | |
1651 | } | |
1652 | ||
1653 | void OPPROTO op_sli_T0 (void) | |
1654 | { | |
1655 | T0 = T0 << PARAM1; | |
1656 | RETURN(); | |
1657 | } | |
1658 | ||
1659 | void OPPROTO op_srl_T0_T1 (void) | |
1660 | { | |
d9bce9d9 JM |
1661 | T0 = (uint32_t)T0 >> T1; |
1662 | RETURN(); | |
1663 | } | |
1664 | ||
1665 | #if defined(TARGET_PPC64) | |
1666 | void OPPROTO op_srl_T0_T1_64 (void) | |
1667 | { | |
1668 | T0 = (uint32_t)T0 >> T1; | |
76a66253 JM |
1669 | RETURN(); |
1670 | } | |
d9bce9d9 | 1671 | #endif |
76a66253 JM |
1672 | |
1673 | void OPPROTO op_srli_T0 (void) | |
1674 | { | |
d9bce9d9 | 1675 | T0 = (uint32_t)T0 >> PARAM1; |
76a66253 JM |
1676 | RETURN(); |
1677 | } | |
1678 | ||
d9bce9d9 JM |
1679 | #if defined(TARGET_PPC64) |
1680 | void OPPROTO op_srli_T0_64 (void) | |
1681 | { | |
1682 | T0 = (uint64_t)T0 >> PARAM1; | |
1683 | RETURN(); | |
1684 | } | |
1685 | #endif | |
1686 | ||
76a66253 JM |
1687 | void OPPROTO op_srli_T1 (void) |
1688 | { | |
d9bce9d9 | 1689 | T1 = (uint32_t)T1 >> PARAM1; |
76a66253 JM |
1690 | RETURN(); |
1691 | } | |
1692 | ||
d9bce9d9 JM |
1693 | #if defined(TARGET_PPC64) |
1694 | void OPPROTO op_srli_T1_64 (void) | |
1695 | { | |
1696 | T1 = (uint64_t)T1 >> PARAM1; | |
1697 | RETURN(); | |
1698 | } | |
1699 | #endif | |
1700 | ||
79aceca5 | 1701 | /*** Floating-Point arithmetic ***/ |
9a64fbe4 | 1702 | /* fadd - fadd. */ |
36081602 | 1703 | void OPPROTO op_fadd (void) |
79aceca5 | 1704 | { |
76a66253 | 1705 | FT0 = float64_add(FT0, FT1, &env->fp_status); |
79aceca5 FB |
1706 | RETURN(); |
1707 | } | |
1708 | ||
9a64fbe4 | 1709 | /* fsub - fsub. */ |
36081602 | 1710 | void OPPROTO op_fsub (void) |
79aceca5 | 1711 | { |
76a66253 | 1712 | FT0 = float64_sub(FT0, FT1, &env->fp_status); |
79aceca5 FB |
1713 | RETURN(); |
1714 | } | |
1715 | ||
9a64fbe4 | 1716 | /* fmul - fmul. */ |
36081602 | 1717 | void OPPROTO op_fmul (void) |
79aceca5 | 1718 | { |
76a66253 | 1719 | FT0 = float64_mul(FT0, FT1, &env->fp_status); |
79aceca5 FB |
1720 | RETURN(); |
1721 | } | |
1722 | ||
9a64fbe4 | 1723 | /* fdiv - fdiv. */ |
36081602 | 1724 | void OPPROTO op_fdiv (void) |
79aceca5 | 1725 | { |
fdabc366 | 1726 | FT0 = float64_div(FT0, FT1, &env->fp_status); |
79aceca5 FB |
1727 | RETURN(); |
1728 | } | |
28b6751f | 1729 | |
9a64fbe4 | 1730 | /* fsqrt - fsqrt. */ |
36081602 | 1731 | void OPPROTO op_fsqrt (void) |
28b6751f | 1732 | { |
9a64fbe4 FB |
1733 | do_fsqrt(); |
1734 | RETURN(); | |
28b6751f FB |
1735 | } |
1736 | ||
d7e4b87e JM |
1737 | /* fre - fre. */ |
1738 | void OPPROTO op_fre (void) | |
1739 | { | |
1740 | do_fre(); | |
1741 | RETURN(); | |
1742 | } | |
1743 | ||
9a64fbe4 | 1744 | /* fres - fres. */ |
36081602 | 1745 | void OPPROTO op_fres (void) |
28b6751f | 1746 | { |
9a64fbe4 FB |
1747 | do_fres(); |
1748 | RETURN(); | |
28b6751f FB |
1749 | } |
1750 | ||
9a64fbe4 | 1751 | /* frsqrte - frsqrte. */ |
36081602 | 1752 | void OPPROTO op_frsqrte (void) |
28b6751f | 1753 | { |
4ecc3190 | 1754 | do_frsqrte(); |
9a64fbe4 | 1755 | RETURN(); |
28b6751f FB |
1756 | } |
1757 | ||
9a64fbe4 | 1758 | /* fsel - fsel. */ |
36081602 | 1759 | void OPPROTO op_fsel (void) |
28b6751f | 1760 | { |
9a64fbe4 FB |
1761 | do_fsel(); |
1762 | RETURN(); | |
28b6751f FB |
1763 | } |
1764 | ||
9a64fbe4 FB |
1765 | /*** Floating-Point multiply-and-add ***/ |
1766 | /* fmadd - fmadd. */ | |
36081602 | 1767 | void OPPROTO op_fmadd (void) |
28b6751f | 1768 | { |
e864cabd JM |
1769 | #if USE_PRECISE_EMULATION |
1770 | do_fmadd(); | |
1771 | #else | |
76a66253 JM |
1772 | FT0 = float64_mul(FT0, FT1, &env->fp_status); |
1773 | FT0 = float64_add(FT0, FT2, &env->fp_status); | |
e864cabd | 1774 | #endif |
9a64fbe4 | 1775 | RETURN(); |
28b6751f FB |
1776 | } |
1777 | ||
9a64fbe4 | 1778 | /* fmsub - fmsub. */ |
36081602 | 1779 | void OPPROTO op_fmsub (void) |
28b6751f | 1780 | { |
e864cabd JM |
1781 | #if USE_PRECISE_EMULATION |
1782 | do_fmsub(); | |
1783 | #else | |
76a66253 JM |
1784 | FT0 = float64_mul(FT0, FT1, &env->fp_status); |
1785 | FT0 = float64_sub(FT0, FT2, &env->fp_status); | |
e864cabd | 1786 | #endif |
9a64fbe4 | 1787 | RETURN(); |
28b6751f FB |
1788 | } |
1789 | ||
9a64fbe4 | 1790 | /* fnmadd - fnmadd. - fnmadds - fnmadds. */ |
36081602 | 1791 | void OPPROTO op_fnmadd (void) |
28b6751f | 1792 | { |
4b3686fa | 1793 | do_fnmadd(); |
9a64fbe4 | 1794 | RETURN(); |
28b6751f FB |
1795 | } |
1796 | ||
9a64fbe4 | 1797 | /* fnmsub - fnmsub. */ |
36081602 | 1798 | void OPPROTO op_fnmsub (void) |
28b6751f | 1799 | { |
4b3686fa | 1800 | do_fnmsub(); |
9a64fbe4 | 1801 | RETURN(); |
28b6751f FB |
1802 | } |
1803 | ||
9a64fbe4 FB |
1804 | /*** Floating-Point round & convert ***/ |
1805 | /* frsp - frsp. */ | |
36081602 | 1806 | void OPPROTO op_frsp (void) |
28b6751f | 1807 | { |
76a66253 | 1808 | FT0 = float64_to_float32(FT0, &env->fp_status); |
9a64fbe4 | 1809 | RETURN(); |
28b6751f FB |
1810 | } |
1811 | ||
9a64fbe4 | 1812 | /* fctiw - fctiw. */ |
36081602 | 1813 | void OPPROTO op_fctiw (void) |
28b6751f | 1814 | { |
9a64fbe4 FB |
1815 | do_fctiw(); |
1816 | RETURN(); | |
28b6751f FB |
1817 | } |
1818 | ||
9a64fbe4 | 1819 | /* fctiwz - fctiwz. */ |
36081602 | 1820 | void OPPROTO op_fctiwz (void) |
28b6751f | 1821 | { |
9a64fbe4 FB |
1822 | do_fctiwz(); |
1823 | RETURN(); | |
28b6751f FB |
1824 | } |
1825 | ||
426613db JM |
1826 | #if defined(TARGET_PPC64) |
1827 | /* fcfid - fcfid. */ | |
36081602 | 1828 | void OPPROTO op_fcfid (void) |
426613db JM |
1829 | { |
1830 | do_fcfid(); | |
1831 | RETURN(); | |
1832 | } | |
1833 | ||
1834 | /* fctid - fctid. */ | |
36081602 | 1835 | void OPPROTO op_fctid (void) |
426613db JM |
1836 | { |
1837 | do_fctid(); | |
1838 | RETURN(); | |
1839 | } | |
1840 | ||
1841 | /* fctidz - fctidz. */ | |
36081602 | 1842 | void OPPROTO op_fctidz (void) |
426613db JM |
1843 | { |
1844 | do_fctidz(); | |
1845 | RETURN(); | |
1846 | } | |
1847 | #endif | |
1848 | ||
d7e4b87e JM |
1849 | void OPPROTO op_frin (void) |
1850 | { | |
1851 | do_frin(); | |
1852 | RETURN(); | |
1853 | } | |
1854 | ||
1855 | void OPPROTO op_friz (void) | |
1856 | { | |
1857 | do_friz(); | |
1858 | RETURN(); | |
1859 | } | |
1860 | ||
1861 | void OPPROTO op_frip (void) | |
1862 | { | |
1863 | do_frip(); | |
1864 | RETURN(); | |
1865 | } | |
1866 | ||
1867 | void OPPROTO op_frim (void) | |
1868 | { | |
1869 | do_frim(); | |
1870 | RETURN(); | |
1871 | } | |
1872 | ||
9a64fbe4 FB |
1873 | /*** Floating-Point compare ***/ |
1874 | /* fcmpu */ | |
36081602 | 1875 | void OPPROTO op_fcmpu (void) |
28b6751f | 1876 | { |
9a64fbe4 FB |
1877 | do_fcmpu(); |
1878 | RETURN(); | |
28b6751f FB |
1879 | } |
1880 | ||
9a64fbe4 | 1881 | /* fcmpo */ |
36081602 | 1882 | void OPPROTO op_fcmpo (void) |
fb0eaffc | 1883 | { |
9a64fbe4 FB |
1884 | do_fcmpo(); |
1885 | RETURN(); | |
fb0eaffc FB |
1886 | } |
1887 | ||
9a64fbe4 FB |
1888 | /*** Floating-point move ***/ |
1889 | /* fabs */ | |
36081602 | 1890 | void OPPROTO op_fabs (void) |
fb0eaffc | 1891 | { |
fdabc366 | 1892 | FT0 = float64_abs(FT0); |
fb0eaffc FB |
1893 | RETURN(); |
1894 | } | |
1895 | ||
9a64fbe4 | 1896 | /* fnabs */ |
36081602 | 1897 | void OPPROTO op_fnabs (void) |
fb0eaffc | 1898 | { |
fdabc366 FB |
1899 | FT0 = float64_abs(FT0); |
1900 | FT0 = float64_chs(FT0); | |
fb0eaffc FB |
1901 | RETURN(); |
1902 | } | |
1903 | ||
9a64fbe4 | 1904 | /* fneg */ |
36081602 | 1905 | void OPPROTO op_fneg (void) |
fb0eaffc | 1906 | { |
fdabc366 | 1907 | FT0 = float64_chs(FT0); |
fb0eaffc FB |
1908 | RETURN(); |
1909 | } | |
1910 | ||
9a64fbe4 | 1911 | /* Load and store */ |
9a64fbe4 | 1912 | #define MEMSUFFIX _raw |
76a66253 | 1913 | #include "op_helper.h" |
9a64fbe4 | 1914 | #include "op_mem.h" |
a541f297 | 1915 | #if !defined(CONFIG_USER_ONLY) |
9a64fbe4 | 1916 | #define MEMSUFFIX _user |
76a66253 | 1917 | #include "op_helper.h" |
9a64fbe4 | 1918 | #include "op_mem.h" |
9a64fbe4 | 1919 | #define MEMSUFFIX _kernel |
76a66253 | 1920 | #include "op_helper.h" |
9a64fbe4 | 1921 | #include "op_mem.h" |
1e42b8f0 JM |
1922 | #if defined(TARGET_PPC64H) |
1923 | #define MEMSUFFIX _hypv | |
1924 | #include "op_helper.h" | |
1925 | #include "op_mem.h" | |
1926 | #endif | |
9a64fbe4 FB |
1927 | #endif |
1928 | ||
4b3686fa | 1929 | /* Special op to check and maybe clear reservation */ |
d9bce9d9 | 1930 | void OPPROTO op_check_reservation (void) |
4b3686fa | 1931 | { |
fdabc366 FB |
1932 | if ((uint32_t)env->reserve == (uint32_t)(T0 & ~0x00000003)) |
1933 | env->reserve = -1; | |
4b3686fa FB |
1934 | RETURN(); |
1935 | } | |
1936 | ||
d9bce9d9 JM |
1937 | #if defined(TARGET_PPC64) |
1938 | void OPPROTO op_check_reservation_64 (void) | |
1939 | { | |
1940 | if ((uint64_t)env->reserve == (uint64_t)(T0 & ~0x00000003)) | |
1941 | env->reserve = -1; | |
1942 | RETURN(); | |
1943 | } | |
1944 | #endif | |
1945 | ||
be147d08 JM |
1946 | void OPPROTO op_wait (void) |
1947 | { | |
1948 | env->halted = 1; | |
1949 | RETURN(); | |
1950 | } | |
1951 | ||
9a64fbe4 | 1952 | /* Return from interrupt */ |
76a66253 JM |
1953 | #if !defined(CONFIG_USER_ONLY) |
1954 | void OPPROTO op_rfi (void) | |
28b6751f | 1955 | { |
fdabc366 | 1956 | do_rfi(); |
fb0eaffc FB |
1957 | RETURN(); |
1958 | } | |
d9bce9d9 JM |
1959 | |
1960 | #if defined(TARGET_PPC64) | |
426613db JM |
1961 | void OPPROTO op_rfid (void) |
1962 | { | |
1963 | do_rfid(); | |
1964 | RETURN(); | |
1965 | } | |
d9bce9d9 | 1966 | #endif |
be147d08 JM |
1967 | |
1968 | #if defined(TARGET_PPC64H) | |
1969 | void OPPROTO op_hrfid (void) | |
1970 | { | |
1971 | do_hrfid(); | |
1972 | RETURN(); | |
1973 | } | |
1974 | #endif | |
6f5d427d JM |
1975 | |
1976 | /* Exception vectors */ | |
1977 | void OPPROTO op_store_excp_prefix (void) | |
1978 | { | |
1979 | T0 &= env->ivpr_mask; | |
1980 | env->excp_prefix = T0; | |
1981 | RETURN(); | |
1982 | } | |
1983 | ||
1984 | void OPPROTO op_store_excp_vector (void) | |
1985 | { | |
1986 | T0 &= env->ivor_mask; | |
1987 | env->excp_vectors[PARAM1] = T0; | |
1988 | RETURN(); | |
1989 | } | |
76a66253 | 1990 | #endif |
fb0eaffc | 1991 | |
9a64fbe4 | 1992 | /* Trap word */ |
76a66253 | 1993 | void OPPROTO op_tw (void) |
fb0eaffc | 1994 | { |
76a66253 | 1995 | do_tw(PARAM1); |
fb0eaffc FB |
1996 | RETURN(); |
1997 | } | |
1998 | ||
d9bce9d9 JM |
1999 | #if defined(TARGET_PPC64) |
2000 | void OPPROTO op_td (void) | |
2001 | { | |
2002 | do_td(PARAM1); | |
2003 | RETURN(); | |
2004 | } | |
2005 | #endif | |
2006 | ||
76a66253 | 2007 | #if !defined(CONFIG_USER_ONLY) |
9a64fbe4 | 2008 | /* tlbia */ |
36081602 | 2009 | void OPPROTO op_tlbia (void) |
fb0eaffc | 2010 | { |
daf4f96e | 2011 | ppc_tlb_invalidate_all(env); |
9a64fbe4 FB |
2012 | RETURN(); |
2013 | } | |
2014 | ||
2015 | /* tlbie */ | |
d9bce9d9 | 2016 | void OPPROTO op_tlbie (void) |
9a64fbe4 | 2017 | { |
daf4f96e | 2018 | ppc_tlb_invalidate_one(env, (uint32_t)T0); |
fb0eaffc | 2019 | RETURN(); |
28b6751f | 2020 | } |
d9bce9d9 JM |
2021 | |
2022 | #if defined(TARGET_PPC64) | |
2023 | void OPPROTO op_tlbie_64 (void) | |
2024 | { | |
daf4f96e | 2025 | ppc_tlb_invalidate_one(env, T0); |
d9bce9d9 JM |
2026 | RETURN(); |
2027 | } | |
2028 | #endif | |
2029 | ||
2030 | #if defined(TARGET_PPC64) | |
2031 | void OPPROTO op_slbia (void) | |
2032 | { | |
daf4f96e | 2033 | ppc_slb_invalidate_all(env); |
d9bce9d9 JM |
2034 | RETURN(); |
2035 | } | |
2036 | ||
2037 | void OPPROTO op_slbie (void) | |
2038 | { | |
daf4f96e JM |
2039 | ppc_slb_invalidate_one(env, (uint32_t)T0); |
2040 | RETURN(); | |
2041 | } | |
2042 | ||
2043 | void OPPROTO op_slbie_64 (void) | |
2044 | { | |
2045 | ppc_slb_invalidate_one(env, T0); | |
d9bce9d9 JM |
2046 | RETURN(); |
2047 | } | |
2048 | #endif | |
76a66253 | 2049 | #endif |
3fc6c082 | 2050 | |
76a66253 | 2051 | #if !defined(CONFIG_USER_ONLY) |
7dbe11ac | 2052 | /* PowerPC 602/603/755 software TLB load instructions */ |
76a66253 JM |
2053 | void OPPROTO op_6xx_tlbld (void) |
2054 | { | |
2055 | do_load_6xx_tlb(0); | |
2056 | RETURN(); | |
2057 | } | |
2058 | ||
2059 | void OPPROTO op_6xx_tlbli (void) | |
2060 | { | |
2061 | do_load_6xx_tlb(1); | |
2062 | RETURN(); | |
2063 | } | |
7dbe11ac JM |
2064 | |
2065 | /* PowerPC 74xx software TLB load instructions */ | |
2066 | void OPPROTO op_74xx_tlbld (void) | |
2067 | { | |
2068 | do_load_74xx_tlb(0); | |
2069 | RETURN(); | |
2070 | } | |
2071 | ||
2072 | void OPPROTO op_74xx_tlbli (void) | |
2073 | { | |
2074 | do_load_74xx_tlb(1); | |
2075 | RETURN(); | |
2076 | } | |
76a66253 JM |
2077 | #endif |
2078 | ||
2079 | /* 601 specific */ | |
76a66253 JM |
2080 | void OPPROTO op_load_601_rtcl (void) |
2081 | { | |
2082 | T0 = cpu_ppc601_load_rtcl(env); | |
2083 | RETURN(); | |
2084 | } | |
2085 | ||
76a66253 JM |
2086 | void OPPROTO op_load_601_rtcu (void) |
2087 | { | |
2088 | T0 = cpu_ppc601_load_rtcu(env); | |
2089 | RETURN(); | |
2090 | } | |
2091 | ||
2092 | #if !defined(CONFIG_USER_ONLY) | |
76a66253 JM |
2093 | void OPPROTO op_store_601_rtcl (void) |
2094 | { | |
2095 | cpu_ppc601_store_rtcl(env, T0); | |
2096 | RETURN(); | |
2097 | } | |
2098 | ||
76a66253 JM |
2099 | void OPPROTO op_store_601_rtcu (void) |
2100 | { | |
2101 | cpu_ppc601_store_rtcu(env, T0); | |
2102 | RETURN(); | |
2103 | } | |
2104 | ||
2105 | void OPPROTO op_load_601_bat (void) | |
2106 | { | |
2107 | T0 = env->IBAT[PARAM1][PARAM2]; | |
2108 | RETURN(); | |
2109 | } | |
2110 | #endif /* !defined(CONFIG_USER_ONLY) */ | |
2111 | ||
2112 | /* 601 unified BATs store. | |
2113 | * To avoid using specific MMU code for 601, we store BATs in | |
2114 | * IBAT and DBAT simultaneously, then emulate unified BATs. | |
2115 | */ | |
2116 | #if !defined(CONFIG_USER_ONLY) | |
2117 | void OPPROTO op_store_601_batl (void) | |
2118 | { | |
2119 | int nr = PARAM1; | |
2120 | ||
2121 | env->IBAT[1][nr] = T0; | |
2122 | env->DBAT[1][nr] = T0; | |
2123 | RETURN(); | |
2124 | } | |
2125 | ||
2126 | void OPPROTO op_store_601_batu (void) | |
2127 | { | |
2128 | do_store_601_batu(PARAM1); | |
2129 | RETURN(); | |
2130 | } | |
2131 | #endif /* !defined(CONFIG_USER_ONLY) */ | |
2132 | ||
2133 | /* PowerPC 601 specific instructions (POWER bridge) */ | |
2134 | /* XXX: those micro-ops need tests ! */ | |
2135 | void OPPROTO op_POWER_abs (void) | |
2136 | { | |
2137 | if (T0 == INT32_MIN) | |
2138 | T0 = INT32_MAX; | |
2139 | else if (T0 < 0) | |
2140 | T0 = -T0; | |
2141 | RETURN(); | |
2142 | } | |
2143 | ||
2144 | void OPPROTO op_POWER_abso (void) | |
2145 | { | |
2146 | do_POWER_abso(); | |
2147 | RETURN(); | |
2148 | } | |
2149 | ||
2150 | void OPPROTO op_POWER_clcs (void) | |
2151 | { | |
2152 | do_POWER_clcs(); | |
2153 | RETURN(); | |
2154 | } | |
2155 | ||
2156 | void OPPROTO op_POWER_div (void) | |
2157 | { | |
2158 | do_POWER_div(); | |
2159 | RETURN(); | |
2160 | } | |
2161 | ||
2162 | void OPPROTO op_POWER_divo (void) | |
2163 | { | |
2164 | do_POWER_divo(); | |
2165 | RETURN(); | |
2166 | } | |
2167 | ||
2168 | void OPPROTO op_POWER_divs (void) | |
2169 | { | |
2170 | do_POWER_divs(); | |
2171 | RETURN(); | |
2172 | } | |
2173 | ||
2174 | void OPPROTO op_POWER_divso (void) | |
2175 | { | |
2176 | do_POWER_divso(); | |
2177 | RETURN(); | |
2178 | } | |
2179 | ||
2180 | void OPPROTO op_POWER_doz (void) | |
2181 | { | |
d9bce9d9 | 2182 | if ((int32_t)T1 > (int32_t)T0) |
76a66253 JM |
2183 | T0 = T1 - T0; |
2184 | else | |
2185 | T0 = 0; | |
2186 | RETURN(); | |
2187 | } | |
2188 | ||
2189 | void OPPROTO op_POWER_dozo (void) | |
2190 | { | |
2191 | do_POWER_dozo(); | |
2192 | RETURN(); | |
2193 | } | |
2194 | ||
2195 | void OPPROTO op_load_xer_cmp (void) | |
2196 | { | |
2197 | T2 = xer_cmp; | |
2198 | RETURN(); | |
2199 | } | |
2200 | ||
2201 | void OPPROTO op_POWER_maskg (void) | |
2202 | { | |
2203 | do_POWER_maskg(); | |
2204 | RETURN(); | |
2205 | } | |
2206 | ||
2207 | void OPPROTO op_POWER_maskir (void) | |
2208 | { | |
2209 | T0 = (T0 & ~T2) | (T1 & T2); | |
2210 | RETURN(); | |
2211 | } | |
2212 | ||
2213 | void OPPROTO op_POWER_mul (void) | |
2214 | { | |
2215 | uint64_t tmp; | |
2216 | ||
2217 | tmp = (uint64_t)T0 * (uint64_t)T1; | |
2218 | env->spr[SPR_MQ] = tmp >> 32; | |
2219 | T0 = tmp; | |
2220 | RETURN(); | |
2221 | } | |
2222 | ||
2223 | void OPPROTO op_POWER_mulo (void) | |
2224 | { | |
2225 | do_POWER_mulo(); | |
2226 | RETURN(); | |
2227 | } | |
2228 | ||
2229 | void OPPROTO op_POWER_nabs (void) | |
2230 | { | |
2231 | if (T0 > 0) | |
2232 | T0 = -T0; | |
2233 | RETURN(); | |
2234 | } | |
2235 | ||
2236 | void OPPROTO op_POWER_nabso (void) | |
2237 | { | |
2238 | /* nabs never overflows */ | |
2239 | if (T0 > 0) | |
2240 | T0 = -T0; | |
2241 | xer_ov = 0; | |
2242 | RETURN(); | |
2243 | } | |
2244 | ||
2245 | /* XXX: factorise POWER rotates... */ | |
2246 | void OPPROTO op_POWER_rlmi (void) | |
2247 | { | |
2248 | T0 = rotl32(T0, T2) & PARAM1; | |
2f401176 | 2249 | T0 |= T1 & (uint32_t)PARAM2; |
76a66253 JM |
2250 | RETURN(); |
2251 | } | |
2252 | ||
2253 | void OPPROTO op_POWER_rrib (void) | |
2254 | { | |
2255 | T2 &= 0x1FUL; | |
2256 | T0 = rotl32(T0 & INT32_MIN, T2); | |
2257 | T0 |= T1 & ~rotl32(INT32_MIN, T2); | |
2258 | RETURN(); | |
2259 | } | |
2260 | ||
2261 | void OPPROTO op_POWER_sle (void) | |
2262 | { | |
2263 | T1 &= 0x1FUL; | |
2264 | env->spr[SPR_MQ] = rotl32(T0, T1); | |
2265 | T0 = T0 << T1; | |
2266 | RETURN(); | |
2267 | } | |
2268 | ||
2269 | void OPPROTO op_POWER_sleq (void) | |
2270 | { | |
2271 | uint32_t tmp = env->spr[SPR_MQ]; | |
2272 | ||
2273 | T1 &= 0x1FUL; | |
2274 | env->spr[SPR_MQ] = rotl32(T0, T1); | |
2275 | T0 = T0 << T1; | |
2276 | T0 |= tmp >> (32 - T1); | |
2277 | RETURN(); | |
2278 | } | |
2279 | ||
2280 | void OPPROTO op_POWER_sllq (void) | |
2281 | { | |
2282 | uint32_t msk = -1; | |
2283 | ||
2284 | msk = msk << (T1 & 0x1FUL); | |
2285 | if (T1 & 0x20UL) | |
2286 | msk = ~msk; | |
2287 | T1 &= 0x1FUL; | |
2288 | T0 = (T0 << T1) & msk; | |
2289 | T0 |= env->spr[SPR_MQ] & ~msk; | |
2290 | RETURN(); | |
2291 | } | |
2292 | ||
2293 | void OPPROTO op_POWER_slq (void) | |
2294 | { | |
2295 | uint32_t msk = -1, tmp; | |
2296 | ||
2297 | msk = msk << (T1 & 0x1FUL); | |
2298 | if (T1 & 0x20UL) | |
2299 | msk = ~msk; | |
2300 | T1 &= 0x1FUL; | |
2301 | tmp = rotl32(T0, T1); | |
2302 | T0 = tmp & msk; | |
2303 | env->spr[SPR_MQ] = tmp; | |
2304 | RETURN(); | |
2305 | } | |
2306 | ||
2307 | void OPPROTO op_POWER_sraq (void) | |
2308 | { | |
2309 | env->spr[SPR_MQ] = rotl32(T0, 32 - (T1 & 0x1FUL)); | |
2310 | if (T1 & 0x20UL) | |
2311 | T0 = -1L; | |
2312 | else | |
d9bce9d9 | 2313 | T0 = (int32_t)T0 >> T1; |
76a66253 JM |
2314 | RETURN(); |
2315 | } | |
2316 | ||
2317 | void OPPROTO op_POWER_sre (void) | |
2318 | { | |
2319 | T1 &= 0x1FUL; | |
2320 | env->spr[SPR_MQ] = rotl32(T0, 32 - T1); | |
d9bce9d9 | 2321 | T0 = (int32_t)T0 >> T1; |
76a66253 JM |
2322 | RETURN(); |
2323 | } | |
2324 | ||
2325 | void OPPROTO op_POWER_srea (void) | |
2326 | { | |
2327 | T1 &= 0x1FUL; | |
2328 | env->spr[SPR_MQ] = T0 >> T1; | |
d9bce9d9 | 2329 | T0 = (int32_t)T0 >> T1; |
76a66253 JM |
2330 | RETURN(); |
2331 | } | |
2332 | ||
2333 | void OPPROTO op_POWER_sreq (void) | |
2334 | { | |
2335 | uint32_t tmp; | |
2336 | int32_t msk; | |
2337 | ||
2338 | T1 &= 0x1FUL; | |
2339 | msk = INT32_MIN >> T1; | |
2340 | tmp = env->spr[SPR_MQ]; | |
2341 | env->spr[SPR_MQ] = rotl32(T0, 32 - T1); | |
2342 | T0 = T0 >> T1; | |
2343 | T0 |= tmp & msk; | |
2344 | RETURN(); | |
2345 | } | |
2346 | ||
2347 | void OPPROTO op_POWER_srlq (void) | |
2348 | { | |
2349 | uint32_t tmp; | |
2350 | int32_t msk; | |
2351 | ||
2352 | msk = INT32_MIN >> (T1 & 0x1FUL); | |
2353 | if (T1 & 0x20UL) | |
2354 | msk = ~msk; | |
2355 | T1 &= 0x1FUL; | |
2356 | tmp = env->spr[SPR_MQ]; | |
2357 | env->spr[SPR_MQ] = rotl32(T0, 32 - T1); | |
2358 | T0 = T0 >> T1; | |
2359 | T0 &= msk; | |
2360 | T0 |= tmp & ~msk; | |
2361 | RETURN(); | |
2362 | } | |
2363 | ||
2364 | void OPPROTO op_POWER_srq (void) | |
2365 | { | |
2366 | T1 &= 0x1FUL; | |
2367 | env->spr[SPR_MQ] = rotl32(T0, 32 - T1); | |
2368 | T0 = T0 >> T1; | |
2369 | RETURN(); | |
2370 | } | |
2371 | ||
2372 | /* POWER instructions not implemented in PowerPC 601 */ | |
2373 | #if !defined(CONFIG_USER_ONLY) | |
2374 | void OPPROTO op_POWER_mfsri (void) | |
2375 | { | |
2376 | T1 = T0 >> 28; | |
2377 | T0 = env->sr[T1]; | |
2378 | RETURN(); | |
2379 | } | |
2380 | ||
2381 | void OPPROTO op_POWER_rac (void) | |
2382 | { | |
2383 | do_POWER_rac(); | |
2384 | RETURN(); | |
2385 | } | |
2386 | ||
2387 | void OPPROTO op_POWER_rfsvc (void) | |
2388 | { | |
2389 | do_POWER_rfsvc(); | |
2390 | RETURN(); | |
2391 | } | |
2392 | #endif | |
2393 | ||
2394 | /* PowerPC 602 specific instruction */ | |
2395 | #if !defined(CONFIG_USER_ONLY) | |
2396 | void OPPROTO op_602_mfrom (void) | |
2397 | { | |
2398 | do_op_602_mfrom(); | |
2399 | RETURN(); | |
2400 | } | |
2401 | #endif | |
2402 | ||
2403 | /* PowerPC 4xx specific micro-ops */ | |
2404 | void OPPROTO op_405_add_T0_T2 (void) | |
2405 | { | |
2406 | T0 = (int32_t)T0 + (int32_t)T2; | |
2407 | RETURN(); | |
2408 | } | |
2409 | ||
2410 | void OPPROTO op_405_mulchw (void) | |
2411 | { | |
2412 | T0 = ((int16_t)T0) * ((int16_t)(T1 >> 16)); | |
2413 | RETURN(); | |
2414 | } | |
2415 | ||
2416 | void OPPROTO op_405_mulchwu (void) | |
2417 | { | |
2418 | T0 = ((uint16_t)T0) * ((uint16_t)(T1 >> 16)); | |
2419 | RETURN(); | |
2420 | } | |
2421 | ||
2422 | void OPPROTO op_405_mulhhw (void) | |
2423 | { | |
2424 | T0 = ((int16_t)(T0 >> 16)) * ((int16_t)(T1 >> 16)); | |
2425 | RETURN(); | |
2426 | } | |
2427 | ||
2428 | void OPPROTO op_405_mulhhwu (void) | |
2429 | { | |
2430 | T0 = ((uint16_t)(T0 >> 16)) * ((uint16_t)(T1 >> 16)); | |
2431 | RETURN(); | |
2432 | } | |
2433 | ||
2434 | void OPPROTO op_405_mullhw (void) | |
2435 | { | |
2436 | T0 = ((int16_t)T0) * ((int16_t)T1); | |
2437 | RETURN(); | |
2438 | } | |
2439 | ||
2440 | void OPPROTO op_405_mullhwu (void) | |
2441 | { | |
2442 | T0 = ((uint16_t)T0) * ((uint16_t)T1); | |
2443 | RETURN(); | |
2444 | } | |
2445 | ||
2446 | void OPPROTO op_405_check_ov (void) | |
2447 | { | |
2448 | do_405_check_ov(); | |
2449 | RETURN(); | |
2450 | } | |
2451 | ||
2452 | void OPPROTO op_405_check_sat (void) | |
2453 | { | |
2454 | do_405_check_sat(); | |
2455 | RETURN(); | |
2456 | } | |
2457 | ||
2458 | void OPPROTO op_405_check_ovu (void) | |
2459 | { | |
2460 | if (likely(T0 >= T2)) { | |
2461 | xer_ov = 0; | |
2462 | } else { | |
2463 | xer_ov = 1; | |
2464 | xer_so = 1; | |
2465 | } | |
2466 | RETURN(); | |
2467 | } | |
2468 | ||
2469 | void OPPROTO op_405_check_satu (void) | |
2470 | { | |
2471 | if (unlikely(T0 < T2)) { | |
2472 | /* Saturate result */ | |
2473 | T0 = -1; | |
2474 | } | |
2475 | RETURN(); | |
2476 | } | |
2477 | ||
a42bd6cc | 2478 | void OPPROTO op_load_dcr (void) |
76a66253 | 2479 | { |
a42bd6cc | 2480 | do_load_dcr(); |
76a66253 JM |
2481 | RETURN(); |
2482 | } | |
2483 | ||
a42bd6cc | 2484 | void OPPROTO op_store_dcr (void) |
76a66253 | 2485 | { |
a42bd6cc | 2486 | do_store_dcr(); |
76a66253 JM |
2487 | RETURN(); |
2488 | } | |
2489 | ||
a750fc0b | 2490 | #if !defined(CONFIG_USER_ONLY) |
76a66253 JM |
2491 | /* Return from critical interrupt : |
2492 | * same as rfi, except nip & MSR are loaded from SRR2/3 instead of SRR0/1 | |
2493 | */ | |
a42bd6cc JM |
2494 | void OPPROTO op_40x_rfci (void) |
2495 | { | |
2496 | do_40x_rfci(); | |
2497 | RETURN(); | |
2498 | } | |
2499 | ||
2500 | void OPPROTO op_rfci (void) | |
2501 | { | |
2502 | do_rfci(); | |
2503 | RETURN(); | |
2504 | } | |
2505 | ||
2506 | void OPPROTO op_rfdi (void) | |
2507 | { | |
2508 | do_rfdi(); | |
2509 | RETURN(); | |
2510 | } | |
2511 | ||
2512 | void OPPROTO op_rfmci (void) | |
76a66253 | 2513 | { |
a42bd6cc | 2514 | do_rfmci(); |
76a66253 JM |
2515 | RETURN(); |
2516 | } | |
2517 | ||
a42bd6cc | 2518 | void OPPROTO op_wrte (void) |
76a66253 JM |
2519 | { |
2520 | msr_ee = T0 >> 16; | |
2521 | RETURN(); | |
2522 | } | |
2523 | ||
a4bb6c3e | 2524 | void OPPROTO op_440_tlbre (void) |
5eb7995e | 2525 | { |
a4bb6c3e | 2526 | do_440_tlbre(PARAM1); |
5eb7995e JM |
2527 | RETURN(); |
2528 | } | |
2529 | ||
a4bb6c3e | 2530 | void OPPROTO op_440_tlbsx (void) |
5eb7995e | 2531 | { |
daf4f96e | 2532 | T0 = ppcemb_tlb_search(env, T0, env->spr[SPR_440_MMUCR] & 0xFF); |
5eb7995e JM |
2533 | RETURN(); |
2534 | } | |
2535 | ||
daf4f96e | 2536 | void OPPROTO op_4xx_tlbsx_check (void) |
5eb7995e | 2537 | { |
daf4f96e JM |
2538 | int tmp; |
2539 | ||
2540 | tmp = xer_so; | |
2541 | if (T0 != -1) | |
2542 | tmp |= 0x02; | |
2543 | env->crf[0] = tmp; | |
5eb7995e JM |
2544 | RETURN(); |
2545 | } | |
2546 | ||
a4bb6c3e | 2547 | void OPPROTO op_440_tlbwe (void) |
5eb7995e | 2548 | { |
a4bb6c3e | 2549 | do_440_tlbwe(PARAM1); |
5eb7995e JM |
2550 | RETURN(); |
2551 | } | |
2552 | ||
76a66253 JM |
2553 | void OPPROTO op_4xx_tlbre_lo (void) |
2554 | { | |
2555 | do_4xx_tlbre_lo(); | |
2556 | RETURN(); | |
2557 | } | |
2558 | ||
2559 | void OPPROTO op_4xx_tlbre_hi (void) | |
2560 | { | |
2561 | do_4xx_tlbre_hi(); | |
2562 | RETURN(); | |
2563 | } | |
2564 | ||
2565 | void OPPROTO op_4xx_tlbsx (void) | |
2566 | { | |
daf4f96e | 2567 | T0 = ppcemb_tlb_search(env, T0, env->spr[SPR_40x_PID]); |
76a66253 JM |
2568 | RETURN(); |
2569 | } | |
2570 | ||
2571 | void OPPROTO op_4xx_tlbwe_lo (void) | |
2572 | { | |
2573 | do_4xx_tlbwe_lo(); | |
2574 | RETURN(); | |
2575 | } | |
2576 | ||
2577 | void OPPROTO op_4xx_tlbwe_hi (void) | |
2578 | { | |
2579 | do_4xx_tlbwe_hi(); | |
2580 | RETURN(); | |
2581 | } | |
2582 | #endif | |
2583 | ||
2584 | /* SPR micro-ops */ | |
2585 | /* 440 specific */ | |
2586 | void OPPROTO op_440_dlmzb (void) | |
2587 | { | |
2588 | do_440_dlmzb(); | |
2589 | RETURN(); | |
2590 | } | |
2591 | ||
2592 | void OPPROTO op_440_dlmzb_update_Rc (void) | |
2593 | { | |
2594 | if (T0 == 8) | |
2595 | T0 = 0x2; | |
2596 | else if (T0 < 4) | |
2597 | T0 = 0x4; | |
2598 | else | |
2599 | T0 = 0x8; | |
2600 | RETURN(); | |
2601 | } | |
2602 | ||
2603 | #if !defined(CONFIG_USER_ONLY) | |
2604 | void OPPROTO op_store_pir (void) | |
3fc6c082 FB |
2605 | { |
2606 | env->spr[SPR_PIR] = T0 & 0x0000000FUL; | |
2607 | RETURN(); | |
2608 | } | |
76a66253 JM |
2609 | |
2610 | void OPPROTO op_load_403_pb (void) | |
2611 | { | |
2612 | do_load_403_pb(PARAM1); | |
2613 | RETURN(); | |
2614 | } | |
2615 | ||
2616 | void OPPROTO op_store_403_pb (void) | |
2617 | { | |
2618 | do_store_403_pb(PARAM1); | |
2619 | RETURN(); | |
2620 | } | |
2621 | ||
76a66253 JM |
2622 | void OPPROTO op_load_40x_pit (void) |
2623 | { | |
2624 | T0 = load_40x_pit(env); | |
2625 | RETURN(); | |
2626 | } | |
2627 | ||
76a66253 JM |
2628 | void OPPROTO op_store_40x_pit (void) |
2629 | { | |
2630 | store_40x_pit(env, T0); | |
2631 | RETURN(); | |
2632 | } | |
2633 | ||
8ecc7913 JM |
2634 | void OPPROTO op_store_40x_dbcr0 (void) |
2635 | { | |
2636 | store_40x_dbcr0(env, T0); | |
be147d08 | 2637 | RETURN(); |
8ecc7913 JM |
2638 | } |
2639 | ||
c294fc58 JM |
2640 | void OPPROTO op_store_40x_sler (void) |
2641 | { | |
2642 | store_40x_sler(env, T0); | |
2643 | RETURN(); | |
2644 | } | |
2645 | ||
76a66253 JM |
2646 | void OPPROTO op_store_booke_tcr (void) |
2647 | { | |
2648 | store_booke_tcr(env, T0); | |
2649 | RETURN(); | |
2650 | } | |
2651 | ||
76a66253 JM |
2652 | void OPPROTO op_store_booke_tsr (void) |
2653 | { | |
2654 | store_booke_tsr(env, T0); | |
2655 | RETURN(); | |
2656 | } | |
2657 | #endif /* !defined(CONFIG_USER_ONLY) */ | |
0487d6a8 | 2658 | |
35cdaad6 | 2659 | #if defined(TARGET_PPCEMB) |
0487d6a8 JM |
2660 | /* SPE extension */ |
2661 | void OPPROTO op_splatw_T1_64 (void) | |
2662 | { | |
2663 | T1_64 = (T1_64 << 32) | (T1_64 & 0x00000000FFFFFFFFULL); | |
e864cabd | 2664 | RETURN(); |
0487d6a8 JM |
2665 | } |
2666 | ||
2667 | void OPPROTO op_splatwi_T0_64 (void) | |
2668 | { | |
2669 | uint64_t tmp = PARAM1; | |
2670 | ||
2671 | T0_64 = (tmp << 32) | tmp; | |
e864cabd | 2672 | RETURN(); |
0487d6a8 JM |
2673 | } |
2674 | ||
2675 | void OPPROTO op_splatwi_T1_64 (void) | |
2676 | { | |
2677 | uint64_t tmp = PARAM1; | |
2678 | ||
2679 | T1_64 = (tmp << 32) | tmp; | |
e864cabd | 2680 | RETURN(); |
0487d6a8 JM |
2681 | } |
2682 | ||
2683 | void OPPROTO op_extsh_T1_64 (void) | |
2684 | { | |
2685 | T1_64 = (int32_t)((int16_t)T1_64); | |
2686 | RETURN(); | |
2687 | } | |
2688 | ||
2689 | void OPPROTO op_sli16_T1_64 (void) | |
2690 | { | |
2691 | T1_64 = T1_64 << 16; | |
2692 | RETURN(); | |
2693 | } | |
2694 | ||
2695 | void OPPROTO op_sli32_T1_64 (void) | |
2696 | { | |
2697 | T1_64 = T1_64 << 32; | |
2698 | RETURN(); | |
2699 | } | |
2700 | ||
2701 | void OPPROTO op_srli32_T1_64 (void) | |
2702 | { | |
2703 | T1_64 = T1_64 >> 32; | |
2704 | RETURN(); | |
2705 | } | |
2706 | ||
2707 | void OPPROTO op_evsel (void) | |
2708 | { | |
2709 | do_evsel(); | |
2710 | RETURN(); | |
2711 | } | |
2712 | ||
2713 | void OPPROTO op_evaddw (void) | |
2714 | { | |
2715 | do_evaddw(); | |
2716 | RETURN(); | |
2717 | } | |
2718 | ||
2719 | void OPPROTO op_evsubfw (void) | |
2720 | { | |
2721 | do_evsubfw(); | |
2722 | RETURN(); | |
2723 | } | |
2724 | ||
2725 | void OPPROTO op_evneg (void) | |
2726 | { | |
2727 | do_evneg(); | |
2728 | RETURN(); | |
2729 | } | |
2730 | ||
2731 | void OPPROTO op_evabs (void) | |
2732 | { | |
2733 | do_evabs(); | |
2734 | RETURN(); | |
2735 | } | |
2736 | ||
2737 | void OPPROTO op_evextsh (void) | |
2738 | { | |
2739 | T0_64 = ((uint64_t)((int32_t)(int16_t)(T0_64 >> 32)) << 32) | | |
2740 | (uint64_t)((int32_t)(int16_t)T0_64); | |
2741 | RETURN(); | |
2742 | } | |
2743 | ||
2744 | void OPPROTO op_evextsb (void) | |
2745 | { | |
2746 | T0_64 = ((uint64_t)((int32_t)(int8_t)(T0_64 >> 32)) << 32) | | |
2747 | (uint64_t)((int32_t)(int8_t)T0_64); | |
2748 | RETURN(); | |
2749 | } | |
2750 | ||
2751 | void OPPROTO op_evcntlzw (void) | |
2752 | { | |
2753 | do_evcntlzw(); | |
2754 | RETURN(); | |
2755 | } | |
2756 | ||
2757 | void OPPROTO op_evrndw (void) | |
2758 | { | |
2759 | do_evrndw(); | |
2760 | RETURN(); | |
2761 | } | |
2762 | ||
2763 | void OPPROTO op_brinc (void) | |
2764 | { | |
2765 | do_brinc(); | |
2766 | RETURN(); | |
2767 | } | |
2768 | ||
2769 | void OPPROTO op_evcntlsw (void) | |
2770 | { | |
2771 | do_evcntlsw(); | |
2772 | RETURN(); | |
2773 | } | |
2774 | ||
2775 | void OPPROTO op_evand (void) | |
2776 | { | |
2777 | T0_64 &= T1_64; | |
2778 | RETURN(); | |
2779 | } | |
2780 | ||
2781 | void OPPROTO op_evandc (void) | |
2782 | { | |
2783 | T0_64 &= ~T1_64; | |
2784 | RETURN(); | |
2785 | } | |
2786 | ||
2787 | void OPPROTO op_evor (void) | |
2788 | { | |
2789 | T0_64 |= T1_64; | |
2790 | RETURN(); | |
2791 | } | |
2792 | ||
2793 | void OPPROTO op_evxor (void) | |
2794 | { | |
2795 | T0_64 ^= T1_64; | |
2796 | RETURN(); | |
2797 | } | |
2798 | ||
2799 | void OPPROTO op_eveqv (void) | |
2800 | { | |
2801 | T0_64 = ~(T0_64 ^ T1_64); | |
2802 | RETURN(); | |
2803 | } | |
2804 | ||
2805 | void OPPROTO op_evnor (void) | |
2806 | { | |
2807 | T0_64 = ~(T0_64 | T1_64); | |
2808 | RETURN(); | |
2809 | } | |
2810 | ||
2811 | void OPPROTO op_evorc (void) | |
2812 | { | |
2813 | T0_64 |= ~T1_64; | |
2814 | RETURN(); | |
2815 | } | |
2816 | ||
2817 | void OPPROTO op_evnand (void) | |
2818 | { | |
2819 | T0_64 = ~(T0_64 & T1_64); | |
2820 | RETURN(); | |
2821 | } | |
2822 | ||
2823 | void OPPROTO op_evsrws (void) | |
2824 | { | |
2825 | do_evsrws(); | |
2826 | RETURN(); | |
2827 | } | |
2828 | ||
2829 | void OPPROTO op_evsrwu (void) | |
2830 | { | |
2831 | do_evsrwu(); | |
2832 | RETURN(); | |
2833 | } | |
2834 | ||
2835 | void OPPROTO op_evslw (void) | |
2836 | { | |
2837 | do_evslw(); | |
2838 | RETURN(); | |
2839 | } | |
2840 | ||
2841 | void OPPROTO op_evrlw (void) | |
2842 | { | |
2843 | do_evrlw(); | |
2844 | RETURN(); | |
2845 | } | |
2846 | ||
2847 | void OPPROTO op_evmergelo (void) | |
2848 | { | |
2849 | T0_64 = (T0_64 << 32) | (T1_64 & 0x00000000FFFFFFFFULL); | |
2850 | RETURN(); | |
2851 | } | |
2852 | ||
2853 | void OPPROTO op_evmergehi (void) | |
2854 | { | |
2855 | T0_64 = (T0_64 & 0xFFFFFFFF00000000ULL) | (T1_64 >> 32); | |
2856 | RETURN(); | |
2857 | } | |
2858 | ||
2859 | void OPPROTO op_evmergelohi (void) | |
2860 | { | |
2861 | T0_64 = (T0_64 << 32) | (T1_64 >> 32); | |
2862 | RETURN(); | |
2863 | } | |
2864 | ||
2865 | void OPPROTO op_evmergehilo (void) | |
2866 | { | |
2867 | T0_64 = (T0_64 & 0xFFFFFFFF00000000ULL) | (T1_64 & 0x00000000FFFFFFFFULL); | |
2868 | RETURN(); | |
2869 | } | |
2870 | ||
2871 | void OPPROTO op_evcmpgts (void) | |
2872 | { | |
2873 | do_evcmpgts(); | |
2874 | RETURN(); | |
2875 | } | |
2876 | ||
2877 | void OPPROTO op_evcmpgtu (void) | |
2878 | { | |
2879 | do_evcmpgtu(); | |
2880 | RETURN(); | |
2881 | } | |
2882 | ||
2883 | void OPPROTO op_evcmplts (void) | |
2884 | { | |
2885 | do_evcmplts(); | |
2886 | RETURN(); | |
2887 | } | |
2888 | ||
2889 | void OPPROTO op_evcmpltu (void) | |
2890 | { | |
2891 | do_evcmpltu(); | |
2892 | RETURN(); | |
2893 | } | |
2894 | ||
2895 | void OPPROTO op_evcmpeq (void) | |
2896 | { | |
2897 | do_evcmpeq(); | |
2898 | RETURN(); | |
2899 | } | |
2900 | ||
2901 | void OPPROTO op_evfssub (void) | |
2902 | { | |
2903 | do_evfssub(); | |
2904 | RETURN(); | |
2905 | } | |
2906 | ||
2907 | void OPPROTO op_evfsadd (void) | |
2908 | { | |
2909 | do_evfsadd(); | |
2910 | RETURN(); | |
2911 | } | |
2912 | ||
2913 | void OPPROTO op_evfsnabs (void) | |
2914 | { | |
2915 | do_evfsnabs(); | |
2916 | RETURN(); | |
2917 | } | |
2918 | ||
2919 | void OPPROTO op_evfsabs (void) | |
2920 | { | |
2921 | do_evfsabs(); | |
2922 | RETURN(); | |
2923 | } | |
2924 | ||
2925 | void OPPROTO op_evfsneg (void) | |
2926 | { | |
2927 | do_evfsneg(); | |
2928 | RETURN(); | |
2929 | } | |
2930 | ||
2931 | void OPPROTO op_evfsdiv (void) | |
2932 | { | |
2933 | do_evfsdiv(); | |
2934 | RETURN(); | |
2935 | } | |
2936 | ||
2937 | void OPPROTO op_evfsmul (void) | |
2938 | { | |
2939 | do_evfsmul(); | |
2940 | RETURN(); | |
2941 | } | |
2942 | ||
2943 | void OPPROTO op_evfscmplt (void) | |
2944 | { | |
2945 | do_evfscmplt(); | |
2946 | RETURN(); | |
2947 | } | |
2948 | ||
2949 | void OPPROTO op_evfscmpgt (void) | |
2950 | { | |
2951 | do_evfscmpgt(); | |
2952 | RETURN(); | |
2953 | } | |
2954 | ||
2955 | void OPPROTO op_evfscmpeq (void) | |
2956 | { | |
2957 | do_evfscmpeq(); | |
2958 | RETURN(); | |
2959 | } | |
2960 | ||
2961 | void OPPROTO op_evfscfsi (void) | |
2962 | { | |
2963 | do_evfscfsi(); | |
2964 | RETURN(); | |
2965 | } | |
2966 | ||
2967 | void OPPROTO op_evfscfui (void) | |
2968 | { | |
2969 | do_evfscfui(); | |
2970 | RETURN(); | |
2971 | } | |
2972 | ||
2973 | void OPPROTO op_evfscfsf (void) | |
2974 | { | |
2975 | do_evfscfsf(); | |
2976 | RETURN(); | |
2977 | } | |
2978 | ||
2979 | void OPPROTO op_evfscfuf (void) | |
2980 | { | |
2981 | do_evfscfuf(); | |
2982 | RETURN(); | |
2983 | } | |
2984 | ||
2985 | void OPPROTO op_evfsctsi (void) | |
2986 | { | |
2987 | do_evfsctsi(); | |
2988 | RETURN(); | |
2989 | } | |
2990 | ||
2991 | void OPPROTO op_evfsctui (void) | |
2992 | { | |
2993 | do_evfsctui(); | |
2994 | RETURN(); | |
2995 | } | |
2996 | ||
2997 | void OPPROTO op_evfsctsf (void) | |
2998 | { | |
2999 | do_evfsctsf(); | |
3000 | RETURN(); | |
3001 | } | |
3002 | ||
3003 | void OPPROTO op_evfsctuf (void) | |
3004 | { | |
3005 | do_evfsctuf(); | |
3006 | RETURN(); | |
3007 | } | |
3008 | ||
3009 | void OPPROTO op_evfsctuiz (void) | |
3010 | { | |
3011 | do_evfsctuiz(); | |
3012 | RETURN(); | |
3013 | } | |
3014 | ||
3015 | void OPPROTO op_evfsctsiz (void) | |
3016 | { | |
3017 | do_evfsctsiz(); | |
3018 | RETURN(); | |
3019 | } | |
3020 | ||
3021 | void OPPROTO op_evfststlt (void) | |
3022 | { | |
3023 | do_evfststlt(); | |
3024 | RETURN(); | |
3025 | } | |
3026 | ||
3027 | void OPPROTO op_evfststgt (void) | |
3028 | { | |
3029 | do_evfststgt(); | |
3030 | RETURN(); | |
3031 | } | |
3032 | ||
3033 | void OPPROTO op_evfststeq (void) | |
3034 | { | |
3035 | do_evfststeq(); | |
3036 | RETURN(); | |
3037 | } | |
3038 | ||
3039 | void OPPROTO op_efssub (void) | |
3040 | { | |
3041 | T0_64 = _do_efssub(T0_64, T1_64); | |
3042 | RETURN(); | |
3043 | } | |
3044 | ||
3045 | void OPPROTO op_efsadd (void) | |
3046 | { | |
3047 | T0_64 = _do_efsadd(T0_64, T1_64); | |
3048 | RETURN(); | |
3049 | } | |
3050 | ||
3051 | void OPPROTO op_efsnabs (void) | |
3052 | { | |
3053 | T0_64 = _do_efsnabs(T0_64); | |
3054 | RETURN(); | |
3055 | } | |
3056 | ||
3057 | void OPPROTO op_efsabs (void) | |
3058 | { | |
3059 | T0_64 = _do_efsabs(T0_64); | |
3060 | RETURN(); | |
3061 | } | |
3062 | ||
3063 | void OPPROTO op_efsneg (void) | |
3064 | { | |
3065 | T0_64 = _do_efsneg(T0_64); | |
3066 | RETURN(); | |
3067 | } | |
3068 | ||
3069 | void OPPROTO op_efsdiv (void) | |
3070 | { | |
3071 | T0_64 = _do_efsdiv(T0_64, T1_64); | |
3072 | RETURN(); | |
3073 | } | |
3074 | ||
3075 | void OPPROTO op_efsmul (void) | |
3076 | { | |
3077 | T0_64 = _do_efsmul(T0_64, T1_64); | |
3078 | RETURN(); | |
3079 | } | |
3080 | ||
3081 | void OPPROTO op_efscmplt (void) | |
3082 | { | |
3083 | do_efscmplt(); | |
3084 | RETURN(); | |
3085 | } | |
3086 | ||
3087 | void OPPROTO op_efscmpgt (void) | |
3088 | { | |
3089 | do_efscmpgt(); | |
3090 | RETURN(); | |
3091 | } | |
3092 | ||
3093 | void OPPROTO op_efscfd (void) | |
3094 | { | |
3095 | do_efscfd(); | |
3096 | RETURN(); | |
3097 | } | |
3098 | ||
3099 | void OPPROTO op_efscmpeq (void) | |
3100 | { | |
3101 | do_efscmpeq(); | |
3102 | RETURN(); | |
3103 | } | |
3104 | ||
3105 | void OPPROTO op_efscfsi (void) | |
3106 | { | |
3107 | do_efscfsi(); | |
3108 | RETURN(); | |
3109 | } | |
3110 | ||
3111 | void OPPROTO op_efscfui (void) | |
3112 | { | |
3113 | do_efscfui(); | |
3114 | RETURN(); | |
3115 | } | |
3116 | ||
3117 | void OPPROTO op_efscfsf (void) | |
3118 | { | |
3119 | do_efscfsf(); | |
3120 | RETURN(); | |
3121 | } | |
3122 | ||
3123 | void OPPROTO op_efscfuf (void) | |
3124 | { | |
3125 | do_efscfuf(); | |
3126 | RETURN(); | |
3127 | } | |
3128 | ||
3129 | void OPPROTO op_efsctsi (void) | |
3130 | { | |
3131 | do_efsctsi(); | |
3132 | RETURN(); | |
3133 | } | |
3134 | ||
3135 | void OPPROTO op_efsctui (void) | |
3136 | { | |
3137 | do_efsctui(); | |
3138 | RETURN(); | |
3139 | } | |
3140 | ||
3141 | void OPPROTO op_efsctsf (void) | |
3142 | { | |
3143 | do_efsctsf(); | |
3144 | RETURN(); | |
3145 | } | |
3146 | ||
3147 | void OPPROTO op_efsctuf (void) | |
3148 | { | |
3149 | do_efsctuf(); | |
3150 | RETURN(); | |
3151 | } | |
3152 | ||
3153 | void OPPROTO op_efsctsiz (void) | |
3154 | { | |
3155 | do_efsctsiz(); | |
3156 | RETURN(); | |
3157 | } | |
3158 | ||
3159 | void OPPROTO op_efsctuiz (void) | |
3160 | { | |
3161 | do_efsctuiz(); | |
3162 | RETURN(); | |
3163 | } | |
3164 | ||
3165 | void OPPROTO op_efststlt (void) | |
3166 | { | |
3167 | T0 = _do_efststlt(T0_64, T1_64); | |
3168 | RETURN(); | |
3169 | } | |
3170 | ||
3171 | void OPPROTO op_efststgt (void) | |
3172 | { | |
3173 | T0 = _do_efststgt(T0_64, T1_64); | |
3174 | RETURN(); | |
3175 | } | |
3176 | ||
3177 | void OPPROTO op_efststeq (void) | |
3178 | { | |
3179 | T0 = _do_efststeq(T0_64, T1_64); | |
3180 | RETURN(); | |
3181 | } | |
3182 | ||
3183 | void OPPROTO op_efdsub (void) | |
3184 | { | |
3185 | union { | |
3186 | uint64_t u; | |
3187 | float64 f; | |
3188 | } u1, u2; | |
3189 | u1.u = T0_64; | |
3190 | u2.u = T1_64; | |
3191 | u1.f = float64_sub(u1.f, u2.f, &env->spe_status); | |
3192 | T0_64 = u1.u; | |
3193 | RETURN(); | |
3194 | } | |
3195 | ||
3196 | void OPPROTO op_efdadd (void) | |
3197 | { | |
3198 | union { | |
3199 | uint64_t u; | |
3200 | float64 f; | |
3201 | } u1, u2; | |
3202 | u1.u = T0_64; | |
3203 | u2.u = T1_64; | |
3204 | u1.f = float64_add(u1.f, u2.f, &env->spe_status); | |
3205 | T0_64 = u1.u; | |
3206 | RETURN(); | |
3207 | } | |
3208 | ||
3209 | void OPPROTO op_efdcfsid (void) | |
3210 | { | |
3211 | do_efdcfsi(); | |
3212 | RETURN(); | |
3213 | } | |
3214 | ||
3215 | void OPPROTO op_efdcfuid (void) | |
3216 | { | |
3217 | do_efdcfui(); | |
3218 | RETURN(); | |
3219 | } | |
3220 | ||
3221 | void OPPROTO op_efdnabs (void) | |
3222 | { | |
3223 | T0_64 |= 0x8000000000000000ULL; | |
3224 | RETURN(); | |
3225 | } | |
3226 | ||
3227 | void OPPROTO op_efdabs (void) | |
3228 | { | |
3229 | T0_64 &= ~0x8000000000000000ULL; | |
3230 | RETURN(); | |
3231 | } | |
3232 | ||
3233 | void OPPROTO op_efdneg (void) | |
3234 | { | |
3235 | T0_64 ^= 0x8000000000000000ULL; | |
3236 | RETURN(); | |
3237 | } | |
3238 | ||
3239 | void OPPROTO op_efddiv (void) | |
3240 | { | |
3241 | union { | |
3242 | uint64_t u; | |
3243 | float64 f; | |
3244 | } u1, u2; | |
3245 | u1.u = T0_64; | |
3246 | u2.u = T1_64; | |
3247 | u1.f = float64_div(u1.f, u2.f, &env->spe_status); | |
3248 | T0_64 = u1.u; | |
3249 | RETURN(); | |
3250 | } | |
3251 | ||
3252 | void OPPROTO op_efdmul (void) | |
3253 | { | |
3254 | union { | |
3255 | uint64_t u; | |
3256 | float64 f; | |
3257 | } u1, u2; | |
3258 | u1.u = T0_64; | |
3259 | u2.u = T1_64; | |
3260 | u1.f = float64_mul(u1.f, u2.f, &env->spe_status); | |
3261 | T0_64 = u1.u; | |
3262 | RETURN(); | |
3263 | } | |
3264 | ||
3265 | void OPPROTO op_efdctsidz (void) | |
3266 | { | |
3267 | do_efdctsiz(); | |
3268 | RETURN(); | |
3269 | } | |
3270 | ||
3271 | void OPPROTO op_efdctuidz (void) | |
3272 | { | |
3273 | do_efdctuiz(); | |
3274 | RETURN(); | |
3275 | } | |
3276 | ||
3277 | void OPPROTO op_efdcmplt (void) | |
3278 | { | |
3279 | do_efdcmplt(); | |
3280 | RETURN(); | |
3281 | } | |
3282 | ||
3283 | void OPPROTO op_efdcmpgt (void) | |
3284 | { | |
3285 | do_efdcmpgt(); | |
3286 | RETURN(); | |
3287 | } | |
3288 | ||
3289 | void OPPROTO op_efdcfs (void) | |
3290 | { | |
3291 | do_efdcfs(); | |
3292 | RETURN(); | |
3293 | } | |
3294 | ||
3295 | void OPPROTO op_efdcmpeq (void) | |
3296 | { | |
3297 | do_efdcmpeq(); | |
3298 | RETURN(); | |
3299 | } | |
3300 | ||
3301 | void OPPROTO op_efdcfsi (void) | |
3302 | { | |
3303 | do_efdcfsi(); | |
3304 | RETURN(); | |
3305 | } | |
3306 | ||
3307 | void OPPROTO op_efdcfui (void) | |
3308 | { | |
3309 | do_efdcfui(); | |
3310 | RETURN(); | |
3311 | } | |
3312 | ||
3313 | void OPPROTO op_efdcfsf (void) | |
3314 | { | |
3315 | do_efdcfsf(); | |
3316 | RETURN(); | |
3317 | } | |
3318 | ||
3319 | void OPPROTO op_efdcfuf (void) | |
3320 | { | |
3321 | do_efdcfuf(); | |
3322 | RETURN(); | |
3323 | } | |
3324 | ||
3325 | void OPPROTO op_efdctsi (void) | |
3326 | { | |
3327 | do_efdctsi(); | |
3328 | RETURN(); | |
3329 | } | |
3330 | ||
3331 | void OPPROTO op_efdctui (void) | |
3332 | { | |
3333 | do_efdctui(); | |
3334 | RETURN(); | |
3335 | } | |
3336 | ||
3337 | void OPPROTO op_efdctsf (void) | |
3338 | { | |
3339 | do_efdctsf(); | |
3340 | RETURN(); | |
3341 | } | |
3342 | ||
3343 | void OPPROTO op_efdctuf (void) | |
3344 | { | |
3345 | do_efdctuf(); | |
3346 | RETURN(); | |
3347 | } | |
3348 | ||
3349 | void OPPROTO op_efdctuiz (void) | |
3350 | { | |
3351 | do_efdctuiz(); | |
3352 | RETURN(); | |
3353 | } | |
3354 | ||
3355 | void OPPROTO op_efdctsiz (void) | |
3356 | { | |
3357 | do_efdctsiz(); | |
3358 | RETURN(); | |
3359 | } | |
3360 | ||
3361 | void OPPROTO op_efdtstlt (void) | |
3362 | { | |
3363 | T0 = _do_efdtstlt(T0_64, T1_64); | |
3364 | RETURN(); | |
3365 | } | |
3366 | ||
3367 | void OPPROTO op_efdtstgt (void) | |
3368 | { | |
3369 | T0 = _do_efdtstgt(T0_64, T1_64); | |
3370 | RETURN(); | |
3371 | } | |
3372 | ||
3373 | void OPPROTO op_efdtsteq (void) | |
3374 | { | |
3375 | T0 = _do_efdtsteq(T0_64, T1_64); | |
3376 | RETURN(); | |
3377 | } | |
35cdaad6 | 3378 | #endif /* defined(TARGET_PPCEMB) */ |