]>
Commit | Line | Data |
---|---|---|
79aceca5 | 1 | /* |
3fc6c082 | 2 | * PowerPC emulation micro-operations for qemu. |
5fafdf24 | 3 | * |
76a66253 | 4 | * Copyright (c) 2003-2007 Jocelyn Mayer |
79aceca5 FB |
5 | * |
6 | * This library is free software; you can redistribute it and/or | |
7 | * modify it under the terms of the GNU Lesser General Public | |
8 | * License as published by the Free Software Foundation; either | |
9 | * version 2 of the License, or (at your option) any later version. | |
10 | * | |
11 | * This library is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
14 | * Lesser General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU Lesser General Public | |
17 | * License along with this library; if not, write to the Free Software | |
18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
19 | */ | |
20 | ||
a541f297 FB |
21 | //#define DEBUG_OP |
22 | ||
79aceca5 FB |
23 | #include "config.h" |
24 | #include "exec.h" | |
76a66253 | 25 | #include "op_helper.h" |
79aceca5 | 26 | |
28b6751f FB |
27 | #define REG 0 |
28 | #include "op_template.h" | |
29 | ||
30 | #define REG 1 | |
31 | #include "op_template.h" | |
32 | ||
33 | #define REG 2 | |
34 | #include "op_template.h" | |
35 | ||
36 | #define REG 3 | |
37 | #include "op_template.h" | |
38 | ||
39 | #define REG 4 | |
40 | #include "op_template.h" | |
41 | ||
42 | #define REG 5 | |
43 | #include "op_template.h" | |
44 | ||
45 | #define REG 6 | |
46 | #include "op_template.h" | |
47 | ||
48 | #define REG 7 | |
49 | #include "op_template.h" | |
50 | ||
51 | #define REG 8 | |
52 | #include "op_template.h" | |
53 | ||
54 | #define REG 9 | |
55 | #include "op_template.h" | |
56 | ||
57 | #define REG 10 | |
58 | #include "op_template.h" | |
59 | ||
60 | #define REG 11 | |
61 | #include "op_template.h" | |
62 | ||
63 | #define REG 12 | |
64 | #include "op_template.h" | |
65 | ||
66 | #define REG 13 | |
67 | #include "op_template.h" | |
68 | ||
69 | #define REG 14 | |
70 | #include "op_template.h" | |
71 | ||
72 | #define REG 15 | |
73 | #include "op_template.h" | |
74 | ||
75 | #define REG 16 | |
76 | #include "op_template.h" | |
77 | ||
78 | #define REG 17 | |
79 | #include "op_template.h" | |
80 | ||
81 | #define REG 18 | |
82 | #include "op_template.h" | |
83 | ||
84 | #define REG 19 | |
85 | #include "op_template.h" | |
86 | ||
87 | #define REG 20 | |
88 | #include "op_template.h" | |
89 | ||
90 | #define REG 21 | |
91 | #include "op_template.h" | |
92 | ||
93 | #define REG 22 | |
94 | #include "op_template.h" | |
95 | ||
96 | #define REG 23 | |
97 | #include "op_template.h" | |
98 | ||
99 | #define REG 24 | |
100 | #include "op_template.h" | |
101 | ||
102 | #define REG 25 | |
103 | #include "op_template.h" | |
104 | ||
105 | #define REG 26 | |
106 | #include "op_template.h" | |
107 | ||
108 | #define REG 27 | |
109 | #include "op_template.h" | |
110 | ||
111 | #define REG 28 | |
112 | #include "op_template.h" | |
113 | ||
114 | #define REG 29 | |
115 | #include "op_template.h" | |
116 | ||
117 | #define REG 30 | |
118 | #include "op_template.h" | |
119 | ||
120 | #define REG 31 | |
121 | #include "op_template.h" | |
122 | ||
a496775f JM |
123 | |
124 | void OPPROTO op_print_mem_EA (void) | |
125 | { | |
126 | do_print_mem_EA(T0); | |
127 | RETURN(); | |
128 | } | |
129 | ||
3fc6c082 | 130 | /* PowerPC state maintenance operations */ |
79aceca5 | 131 | /* set_Rc0 */ |
36081602 | 132 | void OPPROTO op_set_Rc0 (void) |
79aceca5 | 133 | { |
966439a6 | 134 | env->crf[0] = T0 | xer_so; |
79aceca5 FB |
135 | RETURN(); |
136 | } | |
137 | ||
fb0eaffc | 138 | /* Set Rc1 (for floating point arithmetic) */ |
36081602 | 139 | void OPPROTO op_set_Rc1 (void) |
fb0eaffc | 140 | { |
36081602 | 141 | env->crf[1] = env->fpscr[7]; |
fb0eaffc FB |
142 | RETURN(); |
143 | } | |
144 | ||
9a64fbe4 | 145 | /* Constants load */ |
76a66253 JM |
146 | void OPPROTO op_reset_T0 (void) |
147 | { | |
148 | T0 = 0; | |
149 | RETURN(); | |
150 | } | |
151 | ||
36081602 | 152 | void OPPROTO op_set_T0 (void) |
79aceca5 | 153 | { |
d9bce9d9 | 154 | T0 = (uint32_t)PARAM1; |
79aceca5 FB |
155 | RETURN(); |
156 | } | |
157 | ||
d9bce9d9 JM |
158 | #if defined(TARGET_PPC64) |
159 | void OPPROTO op_set_T0_64 (void) | |
160 | { | |
161 | T0 = ((uint64_t)PARAM1 << 32) | (uint64_t)PARAM2; | |
162 | RETURN(); | |
163 | } | |
164 | #endif | |
165 | ||
36081602 | 166 | void OPPROTO op_set_T1 (void) |
79aceca5 | 167 | { |
d9bce9d9 JM |
168 | T1 = (uint32_t)PARAM1; |
169 | RETURN(); | |
170 | } | |
171 | ||
172 | #if defined(TARGET_PPC64) | |
173 | void OPPROTO op_set_T1_64 (void) | |
174 | { | |
175 | T1 = ((uint64_t)PARAM1 << 32) | (uint64_t)PARAM2; | |
79aceca5 FB |
176 | RETURN(); |
177 | } | |
d9bce9d9 | 178 | #endif |
79aceca5 | 179 | |
76a66253 | 180 | #if 0 // unused |
36081602 | 181 | void OPPROTO op_set_T2 (void) |
79aceca5 | 182 | { |
36081602 | 183 | T2 = PARAM1; |
79aceca5 FB |
184 | RETURN(); |
185 | } | |
76a66253 | 186 | #endif |
79aceca5 | 187 | |
76a66253 | 188 | void OPPROTO op_move_T1_T0 (void) |
79aceca5 | 189 | { |
76a66253 JM |
190 | T1 = T0; |
191 | RETURN(); | |
9a64fbe4 FB |
192 | } |
193 | ||
d9bce9d9 JM |
194 | void OPPROTO op_move_T2_T0 (void) |
195 | { | |
196 | T2 = T0; | |
197 | RETURN(); | |
198 | } | |
199 | ||
76a66253 | 200 | /* Generate exceptions */ |
36081602 | 201 | void OPPROTO op_raise_exception_err (void) |
9a64fbe4 | 202 | { |
36081602 | 203 | do_raise_exception_err(PARAM1, PARAM2); |
9a64fbe4 FB |
204 | } |
205 | ||
36081602 | 206 | void OPPROTO op_update_nip (void) |
9a64fbe4 | 207 | { |
d9bce9d9 | 208 | env->nip = (uint32_t)PARAM1; |
76a66253 | 209 | RETURN(); |
9a64fbe4 FB |
210 | } |
211 | ||
d9bce9d9 JM |
212 | #if defined(TARGET_PPC64) |
213 | void OPPROTO op_update_nip_64 (void) | |
214 | { | |
215 | env->nip = ((uint64_t)PARAM1 << 32) | (uint64_t)PARAM2; | |
216 | RETURN(); | |
217 | } | |
218 | #endif | |
219 | ||
36081602 | 220 | void OPPROTO op_debug (void) |
ea4e754f FB |
221 | { |
222 | do_raise_exception(EXCP_DEBUG); | |
223 | } | |
224 | ||
36081602 | 225 | void OPPROTO op_exit_tb (void) |
9a64fbe4 | 226 | { |
76a66253 | 227 | EXIT_TB(); |
9a64fbe4 FB |
228 | } |
229 | ||
76a66253 | 230 | /* Load/store special registers */ |
36081602 | 231 | void OPPROTO op_load_cr (void) |
9a64fbe4 | 232 | { |
76a66253 | 233 | do_load_cr(); |
79aceca5 FB |
234 | RETURN(); |
235 | } | |
236 | ||
36081602 | 237 | void OPPROTO op_store_cr (void) |
79aceca5 | 238 | { |
36081602 | 239 | do_store_cr(PARAM1); |
79aceca5 FB |
240 | RETURN(); |
241 | } | |
242 | ||
76a66253 | 243 | void OPPROTO op_load_cro (void) |
79aceca5 | 244 | { |
76a66253 | 245 | T0 = env->crf[PARAM1]; |
79aceca5 FB |
246 | RETURN(); |
247 | } | |
248 | ||
76a66253 | 249 | void OPPROTO op_store_cro (void) |
79aceca5 | 250 | { |
76a66253 | 251 | env->crf[PARAM1] = T0; |
79aceca5 FB |
252 | RETURN(); |
253 | } | |
254 | ||
36081602 | 255 | void OPPROTO op_load_xer_cr (void) |
79aceca5 FB |
256 | { |
257 | T0 = (xer_so << 3) | (xer_ov << 2) | (xer_ca << 1); | |
258 | RETURN(); | |
259 | } | |
260 | ||
36081602 | 261 | void OPPROTO op_clear_xer_ov (void) |
79aceca5 FB |
262 | { |
263 | xer_so = 0; | |
264 | xer_ov = 0; | |
e864cabd JM |
265 | RETURN(); |
266 | } | |
267 | ||
36081602 | 268 | void OPPROTO op_clear_xer_ca (void) |
e864cabd | 269 | { |
79aceca5 FB |
270 | xer_ca = 0; |
271 | RETURN(); | |
272 | } | |
273 | ||
36081602 | 274 | void OPPROTO op_load_xer_bc (void) |
79aceca5 | 275 | { |
9a64fbe4 | 276 | T1 = xer_bc; |
79aceca5 FB |
277 | RETURN(); |
278 | } | |
279 | ||
76a66253 JM |
280 | void OPPROTO op_store_xer_bc (void) |
281 | { | |
282 | xer_bc = T0; | |
283 | RETURN(); | |
284 | } | |
285 | ||
36081602 | 286 | void OPPROTO op_load_xer (void) |
79aceca5 | 287 | { |
76a66253 | 288 | do_load_xer(); |
79aceca5 FB |
289 | RETURN(); |
290 | } | |
291 | ||
36081602 | 292 | void OPPROTO op_store_xer (void) |
79aceca5 | 293 | { |
76a66253 JM |
294 | do_store_xer(); |
295 | RETURN(); | |
296 | } | |
297 | ||
c80f84e3 JM |
298 | #if defined(TARGET_PPC64) |
299 | void OPPROTO op_store_pri (void) | |
300 | { | |
301 | do_store_pri(PARAM1); | |
302 | RETURN(); | |
303 | } | |
304 | #endif | |
305 | ||
76a66253 JM |
306 | #if !defined(CONFIG_USER_ONLY) |
307 | /* Segment registers load and store */ | |
36081602 | 308 | void OPPROTO op_load_sr (void) |
76a66253 | 309 | { |
36081602 | 310 | T0 = env->sr[T1]; |
76a66253 JM |
311 | RETURN(); |
312 | } | |
313 | ||
36081602 | 314 | void OPPROTO op_store_sr (void) |
76a66253 JM |
315 | { |
316 | do_store_sr(env, T1, T0); | |
317 | RETURN(); | |
318 | } | |
319 | ||
36081602 | 320 | void OPPROTO op_load_sdr1 (void) |
76a66253 | 321 | { |
36081602 | 322 | T0 = env->sdr1; |
76a66253 JM |
323 | RETURN(); |
324 | } | |
325 | ||
36081602 | 326 | void OPPROTO op_store_sdr1 (void) |
76a66253 JM |
327 | { |
328 | do_store_sdr1(env, T0); | |
79aceca5 FB |
329 | RETURN(); |
330 | } | |
331 | ||
d9bce9d9 JM |
332 | #if defined (TARGET_PPC64) |
333 | void OPPROTO op_load_asr (void) | |
334 | { | |
335 | T0 = env->asr; | |
336 | RETURN(); | |
337 | } | |
338 | ||
339 | void OPPROTO op_store_asr (void) | |
340 | { | |
341 | ppc_store_asr(env, T0); | |
342 | RETURN(); | |
343 | } | |
344 | #endif | |
345 | ||
36081602 | 346 | void OPPROTO op_load_msr (void) |
79aceca5 | 347 | { |
3fc6c082 | 348 | T0 = do_load_msr(env); |
79aceca5 FB |
349 | RETURN(); |
350 | } | |
351 | ||
36081602 | 352 | void OPPROTO op_store_msr (void) |
79aceca5 | 353 | { |
3fc6c082 | 354 | do_store_msr(env, T0); |
9a64fbe4 FB |
355 | RETURN(); |
356 | } | |
d9bce9d9 JM |
357 | |
358 | #if defined (TARGET_PPC64) | |
359 | void OPPROTO op_store_msr_32 (void) | |
360 | { | |
361 | ppc_store_msr_32(env, T0); | |
362 | RETURN(); | |
363 | } | |
364 | #endif | |
76a66253 | 365 | #endif |
9a64fbe4 FB |
366 | |
367 | /* SPR */ | |
a496775f JM |
368 | void OPPROTO op_load_spr (void) |
369 | { | |
370 | T0 = env->spr[PARAM1]; | |
371 | RETURN(); | |
372 | } | |
373 | ||
374 | void OPPROTO op_store_spr (void) | |
375 | { | |
376 | env->spr[PARAM1] = T0; | |
377 | RETURN(); | |
378 | } | |
379 | ||
380 | void OPPROTO op_load_dump_spr (void) | |
381 | { | |
382 | T0 = ppc_load_dump_spr(PARAM1); | |
383 | RETURN(); | |
384 | } | |
385 | ||
386 | void OPPROTO op_store_dump_spr (void) | |
9a64fbe4 | 387 | { |
a496775f | 388 | ppc_store_dump_spr(PARAM1, T0); |
9a64fbe4 FB |
389 | RETURN(); |
390 | } | |
391 | ||
a496775f | 392 | void OPPROTO op_mask_spr (void) |
9a64fbe4 | 393 | { |
a496775f | 394 | env->spr[PARAM1] &= ~T0; |
79aceca5 FB |
395 | RETURN(); |
396 | } | |
397 | ||
36081602 | 398 | void OPPROTO op_load_lr (void) |
79aceca5 | 399 | { |
36081602 | 400 | T0 = env->lr; |
9a64fbe4 FB |
401 | RETURN(); |
402 | } | |
403 | ||
36081602 | 404 | void OPPROTO op_store_lr (void) |
9a64fbe4 | 405 | { |
36081602 | 406 | env->lr = T0; |
9a64fbe4 FB |
407 | RETURN(); |
408 | } | |
409 | ||
36081602 | 410 | void OPPROTO op_load_ctr (void) |
9a64fbe4 | 411 | { |
36081602 | 412 | T0 = env->ctr; |
9a64fbe4 FB |
413 | RETURN(); |
414 | } | |
415 | ||
36081602 | 416 | void OPPROTO op_store_ctr (void) |
9a64fbe4 | 417 | { |
36081602 | 418 | env->ctr = T0; |
9a64fbe4 FB |
419 | RETURN(); |
420 | } | |
421 | ||
36081602 | 422 | void OPPROTO op_load_tbl (void) |
9a64fbe4 | 423 | { |
36081602 | 424 | T0 = cpu_ppc_load_tbl(env); |
9a64fbe4 FB |
425 | RETURN(); |
426 | } | |
427 | ||
36081602 | 428 | void OPPROTO op_load_tbu (void) |
9a64fbe4 | 429 | { |
36081602 | 430 | T0 = cpu_ppc_load_tbu(env); |
9a64fbe4 FB |
431 | RETURN(); |
432 | } | |
433 | ||
a062e36c JM |
434 | void OPPROTO op_load_atbl (void) |
435 | { | |
436 | T0 = cpu_ppc_load_atbl(env); | |
437 | RETURN(); | |
438 | } | |
439 | ||
440 | void OPPROTO op_load_atbu (void) | |
441 | { | |
442 | T0 = cpu_ppc_load_atbu(env); | |
443 | RETURN(); | |
444 | } | |
445 | ||
76a66253 | 446 | #if !defined(CONFIG_USER_ONLY) |
36081602 | 447 | void OPPROTO op_store_tbl (void) |
9a64fbe4 | 448 | { |
36081602 | 449 | cpu_ppc_store_tbl(env, T0); |
79aceca5 FB |
450 | RETURN(); |
451 | } | |
452 | ||
36081602 | 453 | void OPPROTO op_store_tbu (void) |
9a64fbe4 | 454 | { |
36081602 | 455 | cpu_ppc_store_tbu(env, T0); |
9a64fbe4 FB |
456 | RETURN(); |
457 | } | |
458 | ||
a062e36c JM |
459 | void OPPROTO op_store_atbl (void) |
460 | { | |
461 | cpu_ppc_store_atbl(env, T0); | |
462 | RETURN(); | |
463 | } | |
464 | ||
465 | void OPPROTO op_store_atbu (void) | |
466 | { | |
467 | cpu_ppc_store_atbu(env, T0); | |
468 | RETURN(); | |
469 | } | |
470 | ||
36081602 | 471 | void OPPROTO op_load_decr (void) |
9a64fbe4 | 472 | { |
36081602 | 473 | T0 = cpu_ppc_load_decr(env); |
76a66253 JM |
474 | RETURN(); |
475 | } | |
9fddaa0c | 476 | |
36081602 | 477 | void OPPROTO op_store_decr (void) |
9fddaa0c | 478 | { |
36081602 | 479 | cpu_ppc_store_decr(env, T0); |
9a64fbe4 FB |
480 | RETURN(); |
481 | } | |
482 | ||
36081602 | 483 | void OPPROTO op_load_ibat (void) |
9a64fbe4 | 484 | { |
36081602 | 485 | T0 = env->IBAT[PARAM1][PARAM2]; |
76a66253 | 486 | RETURN(); |
9a64fbe4 FB |
487 | } |
488 | ||
76a66253 | 489 | void OPPROTO op_store_ibatu (void) |
9a64fbe4 | 490 | { |
3fc6c082 FB |
491 | do_store_ibatu(env, PARAM1, T0); |
492 | RETURN(); | |
493 | } | |
494 | ||
76a66253 | 495 | void OPPROTO op_store_ibatl (void) |
3fc6c082 FB |
496 | { |
497 | #if 1 | |
498 | env->IBAT[1][PARAM1] = T0; | |
499 | #else | |
500 | do_store_ibatl(env, PARAM1, T0); | |
501 | #endif | |
502 | RETURN(); | |
9a64fbe4 FB |
503 | } |
504 | ||
36081602 | 505 | void OPPROTO op_load_dbat (void) |
9a64fbe4 | 506 | { |
36081602 | 507 | T0 = env->DBAT[PARAM1][PARAM2]; |
76a66253 | 508 | RETURN(); |
9a64fbe4 FB |
509 | } |
510 | ||
76a66253 | 511 | void OPPROTO op_store_dbatu (void) |
3fc6c082 FB |
512 | { |
513 | do_store_dbatu(env, PARAM1, T0); | |
514 | RETURN(); | |
515 | } | |
516 | ||
76a66253 | 517 | void OPPROTO op_store_dbatl (void) |
9a64fbe4 | 518 | { |
3fc6c082 FB |
519 | #if 1 |
520 | env->DBAT[1][PARAM1] = T0; | |
521 | #else | |
522 | do_store_dbatl(env, PARAM1, T0); | |
523 | #endif | |
524 | RETURN(); | |
9a64fbe4 | 525 | } |
76a66253 | 526 | #endif /* !defined(CONFIG_USER_ONLY) */ |
9a64fbe4 | 527 | |
fb0eaffc | 528 | /* FPSCR */ |
36081602 | 529 | void OPPROTO op_load_fpscr (void) |
fb0eaffc | 530 | { |
76a66253 | 531 | do_load_fpscr(); |
fb0eaffc FB |
532 | RETURN(); |
533 | } | |
534 | ||
36081602 | 535 | void OPPROTO op_store_fpscr (void) |
fb0eaffc | 536 | { |
76a66253 | 537 | do_store_fpscr(PARAM1); |
fb0eaffc FB |
538 | RETURN(); |
539 | } | |
540 | ||
36081602 | 541 | void OPPROTO op_reset_scrfx (void) |
fb0eaffc | 542 | { |
36081602 | 543 | env->fpscr[7] &= ~0x8; |
fb0eaffc FB |
544 | RETURN(); |
545 | } | |
546 | ||
79aceca5 | 547 | /* crf operations */ |
36081602 | 548 | void OPPROTO op_getbit_T0 (void) |
79aceca5 | 549 | { |
36081602 | 550 | T0 = (T0 >> PARAM1) & 1; |
79aceca5 FB |
551 | RETURN(); |
552 | } | |
553 | ||
36081602 | 554 | void OPPROTO op_getbit_T1 (void) |
79aceca5 | 555 | { |
36081602 | 556 | T1 = (T1 >> PARAM1) & 1; |
79aceca5 FB |
557 | RETURN(); |
558 | } | |
559 | ||
36081602 | 560 | void OPPROTO op_setcrfbit (void) |
79aceca5 | 561 | { |
36081602 | 562 | T1 = (T1 & PARAM1) | (T0 << PARAM2); |
79aceca5 FB |
563 | RETURN(); |
564 | } | |
565 | ||
566 | /* Branch */ | |
36081602 | 567 | #define EIP env->nip |
9a64fbe4 | 568 | |
36081602 | 569 | void OPPROTO op_setlr (void) |
e98a6e40 | 570 | { |
36081602 | 571 | env->lr = (uint32_t)PARAM1; |
76a66253 | 572 | RETURN(); |
e98a6e40 FB |
573 | } |
574 | ||
d9bce9d9 JM |
575 | #if defined (TARGET_PPC64) |
576 | void OPPROTO op_setlr_64 (void) | |
577 | { | |
36081602 | 578 | env->lr = ((uint64_t)PARAM1 << 32) | (uint64_t)PARAM2; |
d9bce9d9 JM |
579 | RETURN(); |
580 | } | |
581 | #endif | |
582 | ||
36081602 | 583 | void OPPROTO op_goto_tb0 (void) |
e98a6e40 | 584 | { |
c53be334 FB |
585 | GOTO_TB(op_goto_tb0, PARAM1, 0); |
586 | } | |
587 | ||
36081602 | 588 | void OPPROTO op_goto_tb1 (void) |
c53be334 FB |
589 | { |
590 | GOTO_TB(op_goto_tb1, PARAM1, 1); | |
e98a6e40 FB |
591 | } |
592 | ||
d9bce9d9 | 593 | void OPPROTO op_b_T1 (void) |
e98a6e40 | 594 | { |
36081602 | 595 | env->nip = (uint32_t)(T1 & ~3); |
76a66253 | 596 | RETURN(); |
e98a6e40 FB |
597 | } |
598 | ||
d9bce9d9 JM |
599 | #if defined (TARGET_PPC64) |
600 | void OPPROTO op_b_T1_64 (void) | |
601 | { | |
36081602 | 602 | env->nip = (uint64_t)(T1 & ~3); |
d9bce9d9 JM |
603 | RETURN(); |
604 | } | |
605 | #endif | |
606 | ||
36081602 | 607 | void OPPROTO op_jz_T0 (void) |
e98a6e40 | 608 | { |
c53be334 FB |
609 | if (!T0) |
610 | GOTO_LABEL_PARAM(1); | |
e98a6e40 FB |
611 | RETURN(); |
612 | } | |
613 | ||
d9bce9d9 | 614 | void OPPROTO op_btest_T1 (void) |
e98a6e40 FB |
615 | { |
616 | if (T0) { | |
36081602 | 617 | env->nip = (uint32_t)(T1 & ~3); |
e98a6e40 | 618 | } else { |
36081602 | 619 | env->nip = (uint32_t)PARAM1; |
e98a6e40 FB |
620 | } |
621 | RETURN(); | |
622 | } | |
623 | ||
d9bce9d9 JM |
624 | #if defined (TARGET_PPC64) |
625 | void OPPROTO op_btest_T1_64 (void) | |
626 | { | |
627 | if (T0) { | |
36081602 | 628 | env->nip = (uint64_t)(T1 & ~3); |
d9bce9d9 | 629 | } else { |
36081602 | 630 | env->nip = ((uint64_t)PARAM1 << 32) | (uint64_t)PARAM2; |
d9bce9d9 JM |
631 | } |
632 | RETURN(); | |
633 | } | |
634 | #endif | |
635 | ||
36081602 | 636 | void OPPROTO op_movl_T1_ctr (void) |
e98a6e40 | 637 | { |
36081602 | 638 | T1 = env->ctr; |
76a66253 | 639 | RETURN(); |
e98a6e40 FB |
640 | } |
641 | ||
36081602 | 642 | void OPPROTO op_movl_T1_lr (void) |
e98a6e40 | 643 | { |
36081602 | 644 | T1 = env->lr; |
76a66253 | 645 | RETURN(); |
e98a6e40 FB |
646 | } |
647 | ||
648 | /* tests with result in T0 */ | |
d9bce9d9 JM |
649 | void OPPROTO op_test_ctr (void) |
650 | { | |
36081602 | 651 | T0 = (uint32_t)env->ctr; |
d9bce9d9 JM |
652 | RETURN(); |
653 | } | |
e98a6e40 | 654 | |
d9bce9d9 JM |
655 | #if defined(TARGET_PPC64) |
656 | void OPPROTO op_test_ctr_64 (void) | |
e98a6e40 | 657 | { |
36081602 | 658 | T0 = (uint64_t)env->ctr; |
d9bce9d9 JM |
659 | RETURN(); |
660 | } | |
661 | #endif | |
662 | ||
663 | void OPPROTO op_test_ctr_true (void) | |
664 | { | |
36081602 | 665 | T0 = ((uint32_t)env->ctr != 0 && (T0 & PARAM1) != 0); |
76a66253 | 666 | RETURN(); |
e98a6e40 FB |
667 | } |
668 | ||
d9bce9d9 JM |
669 | #if defined(TARGET_PPC64) |
670 | void OPPROTO op_test_ctr_true_64 (void) | |
e98a6e40 | 671 | { |
36081602 | 672 | T0 = ((uint64_t)env->ctr != 0 && (T0 & PARAM1) != 0); |
76a66253 | 673 | RETURN(); |
e98a6e40 | 674 | } |
d9bce9d9 | 675 | #endif |
e98a6e40 | 676 | |
d9bce9d9 | 677 | void OPPROTO op_test_ctr_false (void) |
e98a6e40 | 678 | { |
36081602 | 679 | T0 = ((uint32_t)env->ctr != 0 && (T0 & PARAM1) == 0); |
76a66253 | 680 | RETURN(); |
e98a6e40 FB |
681 | } |
682 | ||
d9bce9d9 JM |
683 | #if defined(TARGET_PPC64) |
684 | void OPPROTO op_test_ctr_false_64 (void) | |
e98a6e40 | 685 | { |
36081602 | 686 | T0 = ((uint64_t)env->ctr != 0 && (T0 & PARAM1) == 0); |
76a66253 | 687 | RETURN(); |
e98a6e40 | 688 | } |
d9bce9d9 JM |
689 | #endif |
690 | ||
691 | void OPPROTO op_test_ctrz (void) | |
692 | { | |
36081602 | 693 | T0 = ((uint32_t)env->ctr == 0); |
d9bce9d9 JM |
694 | RETURN(); |
695 | } | |
696 | ||
697 | #if defined(TARGET_PPC64) | |
698 | void OPPROTO op_test_ctrz_64 (void) | |
699 | { | |
36081602 | 700 | T0 = ((uint64_t)env->ctr == 0); |
d9bce9d9 JM |
701 | RETURN(); |
702 | } | |
703 | #endif | |
704 | ||
705 | void OPPROTO op_test_ctrz_true (void) | |
706 | { | |
36081602 | 707 | T0 = ((uint32_t)env->ctr == 0 && (T0 & PARAM1) != 0); |
d9bce9d9 JM |
708 | RETURN(); |
709 | } | |
710 | ||
711 | #if defined(TARGET_PPC64) | |
712 | void OPPROTO op_test_ctrz_true_64 (void) | |
713 | { | |
36081602 | 714 | T0 = ((uint64_t)env->ctr == 0 && (T0 & PARAM1) != 0); |
d9bce9d9 JM |
715 | RETURN(); |
716 | } | |
717 | #endif | |
e98a6e40 | 718 | |
d9bce9d9 | 719 | void OPPROTO op_test_ctrz_false (void) |
e98a6e40 | 720 | { |
36081602 | 721 | T0 = ((uint32_t)env->ctr == 0 && (T0 & PARAM1) == 0); |
76a66253 | 722 | RETURN(); |
e98a6e40 FB |
723 | } |
724 | ||
d9bce9d9 JM |
725 | #if defined(TARGET_PPC64) |
726 | void OPPROTO op_test_ctrz_false_64 (void) | |
e98a6e40 | 727 | { |
36081602 | 728 | T0 = ((uint64_t)env->ctr == 0 && (T0 & PARAM1) == 0); |
76a66253 | 729 | RETURN(); |
e98a6e40 | 730 | } |
d9bce9d9 | 731 | #endif |
e98a6e40 | 732 | |
36081602 | 733 | void OPPROTO op_test_true (void) |
e98a6e40 | 734 | { |
36081602 | 735 | T0 = (T0 & PARAM1); |
76a66253 | 736 | RETURN(); |
e98a6e40 FB |
737 | } |
738 | ||
36081602 | 739 | void OPPROTO op_test_false (void) |
e98a6e40 | 740 | { |
36081602 | 741 | T0 = ((T0 & PARAM1) == 0); |
76a66253 | 742 | RETURN(); |
e98a6e40 | 743 | } |
79aceca5 FB |
744 | |
745 | /* CTR maintenance */ | |
36081602 | 746 | void OPPROTO op_dec_ctr (void) |
79aceca5 | 747 | { |
36081602 | 748 | env->ctr--; |
79aceca5 FB |
749 | RETURN(); |
750 | } | |
751 | ||
752 | /*** Integer arithmetic ***/ | |
753 | /* add */ | |
36081602 | 754 | void OPPROTO op_add (void) |
79aceca5 FB |
755 | { |
756 | T0 += T1; | |
757 | RETURN(); | |
758 | } | |
759 | ||
d9bce9d9 | 760 | void OPPROTO op_check_addo (void) |
79aceca5 | 761 | { |
d9bce9d9 JM |
762 | if (likely(!(((uint32_t)T2 ^ (uint32_t)T1 ^ UINT32_MAX) & |
763 | ((uint32_t)T2 ^ (uint32_t)T0) & (1UL << 31)))) { | |
764 | xer_ov = 0; | |
765 | } else { | |
d9bce9d9 | 766 | xer_ov = 1; |
966439a6 | 767 | xer_so = 1; |
d9bce9d9 | 768 | } |
e864cabd | 769 | RETURN(); |
79aceca5 FB |
770 | } |
771 | ||
d9bce9d9 JM |
772 | #if defined(TARGET_PPC64) |
773 | void OPPROTO op_check_addo_64 (void) | |
79aceca5 | 774 | { |
d9bce9d9 | 775 | if (likely(!(((uint64_t)T2 ^ (uint64_t)T1 ^ UINT64_MAX) & |
1698b741 | 776 | ((uint64_t)T2 ^ (uint64_t)T0) & (1ULL << 63)))) { |
d9bce9d9 | 777 | xer_ov = 0; |
79aceca5 | 778 | } else { |
d9bce9d9 | 779 | xer_ov = 1; |
966439a6 | 780 | xer_so = 1; |
d9bce9d9 | 781 | } |
e864cabd | 782 | RETURN(); |
d9bce9d9 JM |
783 | } |
784 | #endif | |
785 | ||
786 | /* add carrying */ | |
787 | void OPPROTO op_check_addc (void) | |
788 | { | |
789 | if (likely((uint32_t)T0 >= (uint32_t)T2)) { | |
79aceca5 | 790 | xer_ca = 0; |
d9bce9d9 JM |
791 | } else { |
792 | xer_ca = 1; | |
79aceca5 FB |
793 | } |
794 | RETURN(); | |
795 | } | |
796 | ||
d9bce9d9 JM |
797 | #if defined(TARGET_PPC64) |
798 | void OPPROTO op_check_addc_64 (void) | |
79aceca5 | 799 | { |
d9bce9d9 JM |
800 | if (likely((uint64_t)T0 >= (uint64_t)T2)) { |
801 | xer_ca = 0; | |
802 | } else { | |
803 | xer_ca = 1; | |
804 | } | |
79aceca5 FB |
805 | RETURN(); |
806 | } | |
d9bce9d9 | 807 | #endif |
79aceca5 FB |
808 | |
809 | /* add extended */ | |
76a66253 | 810 | void OPPROTO op_adde (void) |
79aceca5 | 811 | { |
fdabc366 | 812 | do_adde(); |
76a66253 | 813 | RETURN(); |
79aceca5 FB |
814 | } |
815 | ||
d9bce9d9 JM |
816 | #if defined(TARGET_PPC64) |
817 | void OPPROTO op_adde_64 (void) | |
79aceca5 | 818 | { |
d9bce9d9 | 819 | do_adde_64(); |
79aceca5 FB |
820 | RETURN(); |
821 | } | |
d9bce9d9 | 822 | #endif |
79aceca5 FB |
823 | |
824 | /* add immediate */ | |
36081602 | 825 | void OPPROTO op_addi (void) |
79aceca5 | 826 | { |
36081602 | 827 | T0 += (int32_t)PARAM1; |
79aceca5 FB |
828 | RETURN(); |
829 | } | |
830 | ||
d9bce9d9 JM |
831 | /* add to minus one extended */ |
832 | void OPPROTO op_add_me (void) | |
79aceca5 | 833 | { |
d9bce9d9 JM |
834 | T0 += xer_ca + (-1); |
835 | if (likely((uint32_t)T1 != 0)) | |
79aceca5 | 836 | xer_ca = 1; |
79aceca5 FB |
837 | RETURN(); |
838 | } | |
839 | ||
d9bce9d9 JM |
840 | #if defined(TARGET_PPC64) |
841 | void OPPROTO op_add_me_64 (void) | |
79aceca5 | 842 | { |
79aceca5 | 843 | T0 += xer_ca + (-1); |
d9bce9d9 | 844 | if (likely((uint64_t)T1 != 0)) |
79aceca5 FB |
845 | xer_ca = 1; |
846 | RETURN(); | |
847 | } | |
d9bce9d9 | 848 | #endif |
79aceca5 | 849 | |
76a66253 | 850 | void OPPROTO op_addmeo (void) |
79aceca5 | 851 | { |
fdabc366 | 852 | do_addmeo(); |
79aceca5 FB |
853 | RETURN(); |
854 | } | |
855 | ||
d9bce9d9 JM |
856 | void OPPROTO op_addmeo_64 (void) |
857 | { | |
858 | do_addmeo(); | |
859 | RETURN(); | |
860 | } | |
861 | ||
79aceca5 | 862 | /* add to zero extended */ |
d9bce9d9 | 863 | void OPPROTO op_add_ze (void) |
79aceca5 | 864 | { |
79aceca5 | 865 | T0 += xer_ca; |
79aceca5 FB |
866 | RETURN(); |
867 | } | |
868 | ||
d9bce9d9 JM |
869 | /* divide word */ |
870 | void OPPROTO op_divw (void) | |
79aceca5 | 871 | { |
d9bce9d9 JM |
872 | if (unlikely(((int32_t)T0 == INT32_MIN && (int32_t)T1 == -1) || |
873 | (int32_t)T1 == 0)) { | |
874 | T0 = (int32_t)((-1) * ((uint32_t)T0 >> 31)); | |
875 | } else { | |
876 | T0 = (int32_t)T0 / (int32_t)T1; | |
877 | } | |
79aceca5 FB |
878 | RETURN(); |
879 | } | |
880 | ||
d9bce9d9 JM |
881 | #if defined(TARGET_PPC64) |
882 | void OPPROTO op_divd (void) | |
79aceca5 | 883 | { |
d9bce9d9 JM |
884 | if (unlikely(((int64_t)T0 == INT64_MIN && (int64_t)T1 == -1) || |
885 | (int64_t)T1 == 0)) { | |
886 | T0 = (int64_t)((-1ULL) * ((uint64_t)T0 >> 63)); | |
79aceca5 | 887 | } else { |
d9bce9d9 | 888 | T0 = (int64_t)T0 / (int64_t)T1; |
79aceca5 FB |
889 | } |
890 | RETURN(); | |
891 | } | |
d9bce9d9 | 892 | #endif |
79aceca5 | 893 | |
76a66253 | 894 | void OPPROTO op_divwo (void) |
79aceca5 | 895 | { |
fdabc366 | 896 | do_divwo(); |
79aceca5 FB |
897 | RETURN(); |
898 | } | |
899 | ||
d9bce9d9 JM |
900 | #if defined(TARGET_PPC64) |
901 | void OPPROTO op_divdo (void) | |
902 | { | |
903 | do_divdo(); | |
904 | RETURN(); | |
905 | } | |
906 | #endif | |
907 | ||
79aceca5 | 908 | /* divide word unsigned */ |
d9bce9d9 JM |
909 | void OPPROTO op_divwu (void) |
910 | { | |
911 | if (unlikely(T1 == 0)) { | |
912 | T0 = 0; | |
913 | } else { | |
914 | T0 = (uint32_t)T0 / (uint32_t)T1; | |
915 | } | |
916 | RETURN(); | |
917 | } | |
918 | ||
919 | #if defined(TARGET_PPC64) | |
920 | void OPPROTO op_divdu (void) | |
79aceca5 | 921 | { |
d9bce9d9 | 922 | if (unlikely(T1 == 0)) { |
79aceca5 FB |
923 | T0 = 0; |
924 | } else { | |
925 | T0 /= T1; | |
926 | } | |
927 | RETURN(); | |
928 | } | |
d9bce9d9 | 929 | #endif |
79aceca5 | 930 | |
76a66253 | 931 | void OPPROTO op_divwuo (void) |
79aceca5 | 932 | { |
fdabc366 | 933 | do_divwuo(); |
79aceca5 FB |
934 | RETURN(); |
935 | } | |
936 | ||
d9bce9d9 JM |
937 | #if defined(TARGET_PPC64) |
938 | void OPPROTO op_divduo (void) | |
939 | { | |
940 | do_divduo(); | |
941 | RETURN(); | |
942 | } | |
943 | #endif | |
944 | ||
79aceca5 | 945 | /* multiply high word */ |
d9bce9d9 | 946 | void OPPROTO op_mulhw (void) |
79aceca5 | 947 | { |
d9bce9d9 | 948 | T0 = ((int64_t)((int32_t)T0) * (int64_t)((int32_t)T1)) >> 32; |
79aceca5 FB |
949 | RETURN(); |
950 | } | |
951 | ||
d9bce9d9 JM |
952 | #if defined(TARGET_PPC64) |
953 | void OPPROTO op_mulhd (void) | |
954 | { | |
955 | uint64_t tl, th; | |
956 | ||
957 | do_imul64(&tl, &th); | |
958 | T0 = th; | |
959 | RETURN(); | |
960 | } | |
961 | #endif | |
962 | ||
79aceca5 | 963 | /* multiply high word unsigned */ |
d9bce9d9 | 964 | void OPPROTO op_mulhwu (void) |
79aceca5 | 965 | { |
d9bce9d9 | 966 | T0 = ((uint64_t)(uint32_t)T0 * (uint64_t)(uint32_t)T1) >> 32; |
79aceca5 FB |
967 | RETURN(); |
968 | } | |
969 | ||
d9bce9d9 JM |
970 | #if defined(TARGET_PPC64) |
971 | void OPPROTO op_mulhdu (void) | |
972 | { | |
973 | uint64_t tl, th; | |
974 | ||
975 | do_mul64(&tl, &th); | |
976 | T0 = th; | |
977 | RETURN(); | |
978 | } | |
979 | #endif | |
980 | ||
79aceca5 | 981 | /* multiply low immediate */ |
36081602 | 982 | void OPPROTO op_mulli (void) |
79aceca5 | 983 | { |
d9bce9d9 | 984 | T0 = ((int32_t)T0 * (int32_t)PARAM1); |
79aceca5 FB |
985 | RETURN(); |
986 | } | |
987 | ||
988 | /* multiply low word */ | |
36081602 | 989 | void OPPROTO op_mullw (void) |
d9bce9d9 JM |
990 | { |
991 | T0 = (int32_t)(T0 * T1); | |
992 | RETURN(); | |
993 | } | |
994 | ||
995 | #if defined(TARGET_PPC64) | |
996 | void OPPROTO op_mulld (void) | |
79aceca5 FB |
997 | { |
998 | T0 *= T1; | |
999 | RETURN(); | |
1000 | } | |
d9bce9d9 | 1001 | #endif |
79aceca5 | 1002 | |
76a66253 | 1003 | void OPPROTO op_mullwo (void) |
79aceca5 | 1004 | { |
fdabc366 | 1005 | do_mullwo(); |
79aceca5 FB |
1006 | RETURN(); |
1007 | } | |
1008 | ||
d9bce9d9 JM |
1009 | #if defined(TARGET_PPC64) |
1010 | void OPPROTO op_mulldo (void) | |
1011 | { | |
1012 | do_mulldo(); | |
1013 | RETURN(); | |
1014 | } | |
1015 | #endif | |
1016 | ||
79aceca5 | 1017 | /* negate */ |
d9bce9d9 | 1018 | void OPPROTO op_neg (void) |
79aceca5 | 1019 | { |
d9bce9d9 JM |
1020 | if (likely(T0 != INT32_MIN)) { |
1021 | T0 = -(int32_t)T0; | |
79aceca5 FB |
1022 | } |
1023 | RETURN(); | |
1024 | } | |
1025 | ||
d9bce9d9 JM |
1026 | #if defined(TARGET_PPC64) |
1027 | void OPPROTO op_neg_64 (void) | |
1028 | { | |
1029 | if (likely(T0 != INT64_MIN)) { | |
1030 | T0 = -(int64_t)T0; | |
1031 | } | |
1032 | RETURN(); | |
1033 | } | |
1034 | #endif | |
1035 | ||
76a66253 | 1036 | void OPPROTO op_nego (void) |
79aceca5 | 1037 | { |
fdabc366 | 1038 | do_nego(); |
79aceca5 FB |
1039 | RETURN(); |
1040 | } | |
1041 | ||
d9bce9d9 JM |
1042 | #if defined(TARGET_PPC64) |
1043 | void OPPROTO op_nego_64 (void) | |
1044 | { | |
1045 | do_nego_64(); | |
1046 | RETURN(); | |
1047 | } | |
1048 | #endif | |
1049 | ||
0cfec834 | 1050 | /* subtract from */ |
36081602 | 1051 | void OPPROTO op_subf (void) |
79aceca5 FB |
1052 | { |
1053 | T0 = T1 - T0; | |
1054 | RETURN(); | |
1055 | } | |
1056 | ||
d9bce9d9 JM |
1057 | void OPPROTO op_check_subfo (void) |
1058 | { | |
1059 | if (likely(!(((uint32_t)(~T2) ^ (uint32_t)T1 ^ UINT32_MAX) & | |
1060 | ((uint32_t)(~T2) ^ (uint32_t)T0) & (1UL << 31)))) { | |
1061 | xer_ov = 0; | |
1062 | } else { | |
d9bce9d9 | 1063 | xer_ov = 1; |
966439a6 | 1064 | xer_so = 1; |
d9bce9d9 JM |
1065 | } |
1066 | RETURN(); | |
1067 | } | |
1068 | ||
1069 | #if defined(TARGET_PPC64) | |
1070 | void OPPROTO op_check_subfo_64 (void) | |
79aceca5 | 1071 | { |
d9bce9d9 JM |
1072 | if (likely(!(((uint64_t)(~T2) ^ (uint64_t)T1 ^ UINT64_MAX) & |
1073 | ((uint64_t)(~T2) ^ (uint64_t)T0) & (1ULL << 63)))) { | |
1074 | xer_ov = 0; | |
1075 | } else { | |
d9bce9d9 | 1076 | xer_ov = 1; |
966439a6 | 1077 | xer_so = 1; |
d9bce9d9 | 1078 | } |
79aceca5 FB |
1079 | RETURN(); |
1080 | } | |
d9bce9d9 | 1081 | #endif |
79aceca5 | 1082 | |
0cfec834 | 1083 | /* subtract from carrying */ |
d9bce9d9 | 1084 | void OPPROTO op_check_subfc (void) |
79aceca5 | 1085 | { |
d9bce9d9 | 1086 | if (likely((uint32_t)T0 > (uint32_t)T1)) { |
79aceca5 | 1087 | xer_ca = 0; |
d9bce9d9 JM |
1088 | } else { |
1089 | xer_ca = 1; | |
79aceca5 FB |
1090 | } |
1091 | RETURN(); | |
1092 | } | |
1093 | ||
d9bce9d9 JM |
1094 | #if defined(TARGET_PPC64) |
1095 | void OPPROTO op_check_subfc_64 (void) | |
79aceca5 | 1096 | { |
d9bce9d9 JM |
1097 | if (likely((uint64_t)T0 > (uint64_t)T1)) { |
1098 | xer_ca = 0; | |
1099 | } else { | |
1100 | xer_ca = 1; | |
1101 | } | |
79aceca5 FB |
1102 | RETURN(); |
1103 | } | |
d9bce9d9 | 1104 | #endif |
79aceca5 | 1105 | |
0cfec834 | 1106 | /* subtract from extended */ |
76a66253 | 1107 | void OPPROTO op_subfe (void) |
79aceca5 | 1108 | { |
fdabc366 | 1109 | do_subfe(); |
79aceca5 FB |
1110 | RETURN(); |
1111 | } | |
1112 | ||
d9bce9d9 JM |
1113 | #if defined(TARGET_PPC64) |
1114 | void OPPROTO op_subfe_64 (void) | |
79aceca5 | 1115 | { |
d9bce9d9 | 1116 | do_subfe_64(); |
79aceca5 FB |
1117 | RETURN(); |
1118 | } | |
d9bce9d9 | 1119 | #endif |
79aceca5 | 1120 | |
0cfec834 | 1121 | /* subtract from immediate carrying */ |
d9bce9d9 | 1122 | void OPPROTO op_subfic (void) |
79aceca5 | 1123 | { |
b6e27ab8 | 1124 | T0 = (int32_t)PARAM1 + ~T0 + 1; |
d9bce9d9 | 1125 | if ((uint32_t)T0 <= (uint32_t)PARAM1) { |
79aceca5 FB |
1126 | xer_ca = 1; |
1127 | } else { | |
1128 | xer_ca = 0; | |
1129 | } | |
1130 | RETURN(); | |
1131 | } | |
1132 | ||
d9bce9d9 JM |
1133 | #if defined(TARGET_PPC64) |
1134 | void OPPROTO op_subfic_64 (void) | |
1135 | { | |
1136 | T0 = PARAM1 + ~T0 + 1; | |
1137 | if ((uint64_t)T0 <= (uint64_t)PARAM1) { | |
1138 | xer_ca = 1; | |
1139 | } else { | |
1140 | xer_ca = 0; | |
1141 | } | |
1142 | RETURN(); | |
1143 | } | |
1144 | #endif | |
1145 | ||
0cfec834 | 1146 | /* subtract from minus one extended */ |
d9bce9d9 | 1147 | void OPPROTO op_subfme (void) |
79aceca5 FB |
1148 | { |
1149 | T0 = ~T0 + xer_ca - 1; | |
d9bce9d9 JM |
1150 | if (likely((uint32_t)T0 != (uint32_t)-1)) |
1151 | xer_ca = 1; | |
1152 | RETURN(); | |
1153 | } | |
79aceca5 | 1154 | |
d9bce9d9 JM |
1155 | #if defined(TARGET_PPC64) |
1156 | void OPPROTO op_subfme_64 (void) | |
1157 | { | |
1158 | T0 = ~T0 + xer_ca - 1; | |
1159 | if (likely((uint64_t)T0 != (uint64_t)-1)) | |
79aceca5 FB |
1160 | xer_ca = 1; |
1161 | RETURN(); | |
1162 | } | |
d9bce9d9 | 1163 | #endif |
79aceca5 | 1164 | |
76a66253 | 1165 | void OPPROTO op_subfmeo (void) |
79aceca5 | 1166 | { |
fdabc366 | 1167 | do_subfmeo(); |
79aceca5 FB |
1168 | RETURN(); |
1169 | } | |
1170 | ||
d9bce9d9 JM |
1171 | #if defined(TARGET_PPC64) |
1172 | void OPPROTO op_subfmeo_64 (void) | |
1173 | { | |
1174 | do_subfmeo_64(); | |
1175 | RETURN(); | |
1176 | } | |
1177 | #endif | |
1178 | ||
0cfec834 | 1179 | /* subtract from zero extended */ |
d9bce9d9 | 1180 | void OPPROTO op_subfze (void) |
79aceca5 FB |
1181 | { |
1182 | T1 = ~T0; | |
1183 | T0 = T1 + xer_ca; | |
d9bce9d9 | 1184 | if ((uint32_t)T0 < (uint32_t)T1) { |
79aceca5 FB |
1185 | xer_ca = 1; |
1186 | } else { | |
1187 | xer_ca = 0; | |
1188 | } | |
1189 | RETURN(); | |
1190 | } | |
1191 | ||
d9bce9d9 JM |
1192 | #if defined(TARGET_PPC64) |
1193 | void OPPROTO op_subfze_64 (void) | |
1194 | { | |
1195 | T1 = ~T0; | |
1196 | T0 = T1 + xer_ca; | |
1197 | if ((uint64_t)T0 < (uint64_t)T1) { | |
1198 | xer_ca = 1; | |
1199 | } else { | |
1200 | xer_ca = 0; | |
1201 | } | |
1202 | RETURN(); | |
1203 | } | |
1204 | #endif | |
1205 | ||
76a66253 | 1206 | void OPPROTO op_subfzeo (void) |
79aceca5 | 1207 | { |
fdabc366 | 1208 | do_subfzeo(); |
79aceca5 FB |
1209 | RETURN(); |
1210 | } | |
1211 | ||
d9bce9d9 JM |
1212 | #if defined(TARGET_PPC64) |
1213 | void OPPROTO op_subfzeo_64 (void) | |
1214 | { | |
1215 | do_subfzeo_64(); | |
1216 | RETURN(); | |
1217 | } | |
1218 | #endif | |
1219 | ||
79aceca5 FB |
1220 | /*** Integer comparison ***/ |
1221 | /* compare */ | |
d9bce9d9 JM |
1222 | void OPPROTO op_cmp (void) |
1223 | { | |
1224 | if ((int32_t)T0 < (int32_t)T1) { | |
1225 | T0 = 0x08; | |
1226 | } else if ((int32_t)T0 > (int32_t)T1) { | |
1227 | T0 = 0x04; | |
1228 | } else { | |
1229 | T0 = 0x02; | |
1230 | } | |
966439a6 | 1231 | T0 |= xer_so; |
d9bce9d9 JM |
1232 | RETURN(); |
1233 | } | |
1234 | ||
1235 | #if defined(TARGET_PPC64) | |
1236 | void OPPROTO op_cmp_64 (void) | |
79aceca5 | 1237 | { |
d9bce9d9 | 1238 | if ((int64_t)T0 < (int64_t)T1) { |
79aceca5 | 1239 | T0 = 0x08; |
d9bce9d9 | 1240 | } else if ((int64_t)T0 > (int64_t)T1) { |
79aceca5 FB |
1241 | T0 = 0x04; |
1242 | } else { | |
1243 | T0 = 0x02; | |
1244 | } | |
966439a6 | 1245 | T0 |= xer_so; |
79aceca5 FB |
1246 | RETURN(); |
1247 | } | |
d9bce9d9 | 1248 | #endif |
79aceca5 FB |
1249 | |
1250 | /* compare immediate */ | |
d9bce9d9 | 1251 | void OPPROTO op_cmpi (void) |
79aceca5 | 1252 | { |
d9bce9d9 | 1253 | if ((int32_t)T0 < (int32_t)PARAM1) { |
79aceca5 | 1254 | T0 = 0x08; |
d9bce9d9 | 1255 | } else if ((int32_t)T0 > (int32_t)PARAM1) { |
79aceca5 FB |
1256 | T0 = 0x04; |
1257 | } else { | |
1258 | T0 = 0x02; | |
1259 | } | |
966439a6 | 1260 | T0 |= xer_so; |
79aceca5 FB |
1261 | RETURN(); |
1262 | } | |
1263 | ||
d9bce9d9 JM |
1264 | #if defined(TARGET_PPC64) |
1265 | void OPPROTO op_cmpi_64 (void) | |
1266 | { | |
1267 | if ((int64_t)T0 < (int64_t)((int32_t)PARAM1)) { | |
1268 | T0 = 0x08; | |
1269 | } else if ((int64_t)T0 > (int64_t)((int32_t)PARAM1)) { | |
1270 | T0 = 0x04; | |
1271 | } else { | |
1272 | T0 = 0x02; | |
1273 | } | |
966439a6 | 1274 | T0 |= xer_so; |
d9bce9d9 JM |
1275 | RETURN(); |
1276 | } | |
1277 | #endif | |
1278 | ||
79aceca5 | 1279 | /* compare logical */ |
d9bce9d9 | 1280 | void OPPROTO op_cmpl (void) |
79aceca5 | 1281 | { |
d9bce9d9 | 1282 | if ((uint32_t)T0 < (uint32_t)T1) { |
79aceca5 | 1283 | T0 = 0x08; |
d9bce9d9 | 1284 | } else if ((uint32_t)T0 > (uint32_t)T1) { |
79aceca5 FB |
1285 | T0 = 0x04; |
1286 | } else { | |
1287 | T0 = 0x02; | |
1288 | } | |
966439a6 | 1289 | T0 |= xer_so; |
79aceca5 FB |
1290 | RETURN(); |
1291 | } | |
1292 | ||
d9bce9d9 JM |
1293 | #if defined(TARGET_PPC64) |
1294 | void OPPROTO op_cmpl_64 (void) | |
1295 | { | |
1296 | if ((uint64_t)T0 < (uint64_t)T1) { | |
1297 | T0 = 0x08; | |
1298 | } else if ((uint64_t)T0 > (uint64_t)T1) { | |
1299 | T0 = 0x04; | |
1300 | } else { | |
1301 | T0 = 0x02; | |
1302 | } | |
966439a6 | 1303 | T0 |= xer_so; |
d9bce9d9 JM |
1304 | RETURN(); |
1305 | } | |
1306 | #endif | |
1307 | ||
79aceca5 | 1308 | /* compare logical immediate */ |
d9bce9d9 JM |
1309 | void OPPROTO op_cmpli (void) |
1310 | { | |
1311 | if ((uint32_t)T0 < (uint32_t)PARAM1) { | |
1312 | T0 = 0x08; | |
1313 | } else if ((uint32_t)T0 > (uint32_t)PARAM1) { | |
1314 | T0 = 0x04; | |
1315 | } else { | |
1316 | T0 = 0x02; | |
1317 | } | |
966439a6 | 1318 | T0 |= xer_so; |
d9bce9d9 JM |
1319 | RETURN(); |
1320 | } | |
1321 | ||
1322 | #if defined(TARGET_PPC64) | |
1323 | void OPPROTO op_cmpli_64 (void) | |
79aceca5 | 1324 | { |
d9bce9d9 | 1325 | if ((uint64_t)T0 < (uint64_t)PARAM1) { |
79aceca5 | 1326 | T0 = 0x08; |
d9bce9d9 | 1327 | } else if ((uint64_t)T0 > (uint64_t)PARAM1) { |
79aceca5 FB |
1328 | T0 = 0x04; |
1329 | } else { | |
1330 | T0 = 0x02; | |
1331 | } | |
966439a6 | 1332 | T0 |= xer_so; |
79aceca5 FB |
1333 | RETURN(); |
1334 | } | |
d9bce9d9 JM |
1335 | #endif |
1336 | ||
1337 | void OPPROTO op_isel (void) | |
1338 | { | |
1339 | if (T0) | |
1340 | T0 = T1; | |
1341 | else | |
1342 | T0 = T2; | |
1343 | RETURN(); | |
1344 | } | |
1345 | ||
1346 | void OPPROTO op_popcntb (void) | |
1347 | { | |
1348 | do_popcntb(); | |
1349 | RETURN(); | |
1350 | } | |
1351 | ||
1352 | #if defined(TARGET_PPC64) | |
1353 | void OPPROTO op_popcntb_64 (void) | |
1354 | { | |
1355 | do_popcntb_64(); | |
1356 | RETURN(); | |
1357 | } | |
1358 | #endif | |
79aceca5 FB |
1359 | |
1360 | /*** Integer logical ***/ | |
1361 | /* and */ | |
36081602 | 1362 | void OPPROTO op_and (void) |
79aceca5 FB |
1363 | { |
1364 | T0 &= T1; | |
1365 | RETURN(); | |
1366 | } | |
1367 | ||
1368 | /* andc */ | |
36081602 | 1369 | void OPPROTO op_andc (void) |
79aceca5 FB |
1370 | { |
1371 | T0 &= ~T1; | |
1372 | RETURN(); | |
1373 | } | |
1374 | ||
1375 | /* andi. */ | |
76a66253 | 1376 | void OPPROTO op_andi_T0 (void) |
79aceca5 | 1377 | { |
36081602 | 1378 | T0 &= PARAM1; |
79aceca5 FB |
1379 | RETURN(); |
1380 | } | |
1381 | ||
76a66253 JM |
1382 | void OPPROTO op_andi_T1 (void) |
1383 | { | |
1384 | T1 &= PARAM1; | |
1385 | RETURN(); | |
1386 | } | |
1387 | ||
40d0591e JM |
1388 | #if defined(TARGET_PPC64) |
1389 | void OPPROTO op_andi_T0_64 (void) | |
1390 | { | |
1391 | T0 &= ((uint64_t)PARAM1 << 32) | PARAM2; | |
1392 | RETURN(); | |
1393 | } | |
1394 | ||
1395 | void OPPROTO op_andi_T1_64 (void) | |
1396 | { | |
1397 | T1 &= ((uint64_t)PARAM1 << 32) | PARAM2; | |
1398 | RETURN(); | |
1399 | } | |
1400 | #endif | |
1401 | ||
1402 | ||
79aceca5 | 1403 | /* count leading zero */ |
76a66253 | 1404 | void OPPROTO op_cntlzw (void) |
79aceca5 | 1405 | { |
0487d6a8 | 1406 | T0 = _do_cntlzw(T0); |
79aceca5 FB |
1407 | RETURN(); |
1408 | } | |
1409 | ||
d9bce9d9 JM |
1410 | #if defined(TARGET_PPC64) |
1411 | void OPPROTO op_cntlzd (void) | |
1412 | { | |
0487d6a8 | 1413 | T0 = _do_cntlzd(T0); |
d9bce9d9 JM |
1414 | RETURN(); |
1415 | } | |
1416 | #endif | |
1417 | ||
79aceca5 | 1418 | /* eqv */ |
36081602 | 1419 | void OPPROTO op_eqv (void) |
79aceca5 FB |
1420 | { |
1421 | T0 = ~(T0 ^ T1); | |
1422 | RETURN(); | |
1423 | } | |
1424 | ||
1425 | /* extend sign byte */ | |
d9bce9d9 | 1426 | void OPPROTO op_extsb (void) |
79aceca5 | 1427 | { |
d9bce9d9 JM |
1428 | #if defined (TARGET_PPC64) |
1429 | T0 = (int64_t)((int8_t)T0); | |
1430 | #else | |
1431 | T0 = (int32_t)((int8_t)T0); | |
1432 | #endif | |
79aceca5 FB |
1433 | RETURN(); |
1434 | } | |
1435 | ||
1436 | /* extend sign half word */ | |
d9bce9d9 | 1437 | void OPPROTO op_extsh (void) |
79aceca5 | 1438 | { |
d9bce9d9 JM |
1439 | #if defined (TARGET_PPC64) |
1440 | T0 = (int64_t)((int16_t)T0); | |
1441 | #else | |
1442 | T0 = (int32_t)((int16_t)T0); | |
1443 | #endif | |
79aceca5 FB |
1444 | RETURN(); |
1445 | } | |
1446 | ||
d9bce9d9 JM |
1447 | #if defined (TARGET_PPC64) |
1448 | void OPPROTO op_extsw (void) | |
1449 | { | |
1450 | T0 = (int64_t)((int32_t)T0); | |
1451 | RETURN(); | |
1452 | } | |
1453 | #endif | |
1454 | ||
79aceca5 | 1455 | /* nand */ |
36081602 | 1456 | void OPPROTO op_nand (void) |
79aceca5 FB |
1457 | { |
1458 | T0 = ~(T0 & T1); | |
1459 | RETURN(); | |
1460 | } | |
1461 | ||
1462 | /* nor */ | |
36081602 | 1463 | void OPPROTO op_nor (void) |
79aceca5 FB |
1464 | { |
1465 | T0 = ~(T0 | T1); | |
1466 | RETURN(); | |
1467 | } | |
1468 | ||
1469 | /* or */ | |
36081602 | 1470 | void OPPROTO op_or (void) |
79aceca5 FB |
1471 | { |
1472 | T0 |= T1; | |
1473 | RETURN(); | |
1474 | } | |
1475 | ||
1476 | /* orc */ | |
36081602 | 1477 | void OPPROTO op_orc (void) |
79aceca5 FB |
1478 | { |
1479 | T0 |= ~T1; | |
1480 | RETURN(); | |
1481 | } | |
1482 | ||
1483 | /* ori */ | |
36081602 | 1484 | void OPPROTO op_ori (void) |
79aceca5 | 1485 | { |
36081602 | 1486 | T0 |= PARAM1; |
79aceca5 FB |
1487 | RETURN(); |
1488 | } | |
1489 | ||
1490 | /* xor */ | |
36081602 | 1491 | void OPPROTO op_xor (void) |
79aceca5 FB |
1492 | { |
1493 | T0 ^= T1; | |
1494 | RETURN(); | |
1495 | } | |
1496 | ||
1497 | /* xori */ | |
36081602 | 1498 | void OPPROTO op_xori (void) |
79aceca5 | 1499 | { |
36081602 | 1500 | T0 ^= PARAM1; |
79aceca5 FB |
1501 | RETURN(); |
1502 | } | |
1503 | ||
1504 | /*** Integer rotate ***/ | |
76a66253 | 1505 | void OPPROTO op_rotl32_T0_T1 (void) |
79aceca5 | 1506 | { |
76a66253 | 1507 | T0 = rotl32(T0, T1 & 0x1F); |
79aceca5 FB |
1508 | RETURN(); |
1509 | } | |
1510 | ||
76a66253 | 1511 | void OPPROTO op_rotli32_T0 (void) |
79aceca5 | 1512 | { |
76a66253 | 1513 | T0 = rotl32(T0, PARAM1); |
79aceca5 FB |
1514 | RETURN(); |
1515 | } | |
1516 | ||
51789c41 JM |
1517 | #if defined(TARGET_PPC64) |
1518 | void OPPROTO op_rotl64_T0_T1 (void) | |
1519 | { | |
1520 | T0 = rotl64(T0, T1 & 0x3F); | |
1521 | RETURN(); | |
1522 | } | |
1523 | ||
1524 | void OPPROTO op_rotli64_T0 (void) | |
1525 | { | |
1526 | T0 = rotl64(T0, PARAM1); | |
1527 | RETURN(); | |
1528 | } | |
1529 | #endif | |
1530 | ||
79aceca5 FB |
1531 | /*** Integer shift ***/ |
1532 | /* shift left word */ | |
d9bce9d9 | 1533 | void OPPROTO op_slw (void) |
79aceca5 FB |
1534 | { |
1535 | if (T1 & 0x20) { | |
1536 | T0 = 0; | |
d9bce9d9 JM |
1537 | } else { |
1538 | T0 = (uint32_t)(T0 << T1); | |
1539 | } | |
1540 | RETURN(); | |
1541 | } | |
1542 | ||
1543 | #if defined(TARGET_PPC64) | |
1544 | void OPPROTO op_sld (void) | |
1545 | { | |
1546 | if (T1 & 0x40) { | |
1547 | T0 = 0; | |
79aceca5 FB |
1548 | } else { |
1549 | T0 = T0 << T1; | |
1550 | } | |
1551 | RETURN(); | |
1552 | } | |
d9bce9d9 | 1553 | #endif |
79aceca5 FB |
1554 | |
1555 | /* shift right algebraic word */ | |
76a66253 | 1556 | void OPPROTO op_sraw (void) |
79aceca5 | 1557 | { |
9a64fbe4 | 1558 | do_sraw(); |
79aceca5 FB |
1559 | RETURN(); |
1560 | } | |
1561 | ||
d9bce9d9 JM |
1562 | #if defined(TARGET_PPC64) |
1563 | void OPPROTO op_srad (void) | |
1564 | { | |
1565 | do_srad(); | |
1566 | RETURN(); | |
1567 | } | |
1568 | #endif | |
1569 | ||
79aceca5 | 1570 | /* shift right algebraic word immediate */ |
d9bce9d9 | 1571 | void OPPROTO op_srawi (void) |
79aceca5 | 1572 | { |
d9bce9d9 JM |
1573 | uint32_t mask = (uint32_t)PARAM2; |
1574 | ||
1575 | T0 = (int32_t)T0 >> PARAM1; | |
1576 | if ((int32_t)T1 < 0 && (T1 & mask) != 0) { | |
79aceca5 FB |
1577 | xer_ca = 1; |
1578 | } else { | |
1579 | xer_ca = 0; | |
1580 | } | |
1581 | RETURN(); | |
1582 | } | |
1583 | ||
d9bce9d9 JM |
1584 | #if defined(TARGET_PPC64) |
1585 | void OPPROTO op_sradi (void) | |
1586 | { | |
1587 | uint64_t mask = ((uint64_t)PARAM2 << 32) | (uint64_t)PARAM3; | |
1588 | ||
1589 | T0 = (int64_t)T0 >> PARAM1; | |
1590 | if ((int64_t)T1 < 0 && ((uint64_t)T1 & mask) != 0) { | |
1591 | xer_ca = 1; | |
1592 | } else { | |
1593 | xer_ca = 0; | |
1594 | } | |
1595 | RETURN(); | |
1596 | } | |
1597 | #endif | |
1598 | ||
79aceca5 | 1599 | /* shift right word */ |
d9bce9d9 | 1600 | void OPPROTO op_srw (void) |
79aceca5 FB |
1601 | { |
1602 | if (T1 & 0x20) { | |
1603 | T0 = 0; | |
1604 | } else { | |
d9bce9d9 JM |
1605 | T0 = (uint32_t)T0 >> T1; |
1606 | } | |
1607 | RETURN(); | |
1608 | } | |
1609 | ||
1610 | #if defined(TARGET_PPC64) | |
1611 | void OPPROTO op_srd (void) | |
1612 | { | |
1613 | if (T1 & 0x40) { | |
1614 | T0 = 0; | |
1615 | } else { | |
1616 | T0 = (uint64_t)T0 >> T1; | |
79aceca5 FB |
1617 | } |
1618 | RETURN(); | |
1619 | } | |
d9bce9d9 | 1620 | #endif |
79aceca5 | 1621 | |
76a66253 JM |
1622 | void OPPROTO op_sl_T0_T1 (void) |
1623 | { | |
1624 | T0 = T0 << T1; | |
1625 | RETURN(); | |
1626 | } | |
1627 | ||
1628 | void OPPROTO op_sli_T0 (void) | |
1629 | { | |
1630 | T0 = T0 << PARAM1; | |
1631 | RETURN(); | |
1632 | } | |
1633 | ||
1634 | void OPPROTO op_srl_T0_T1 (void) | |
1635 | { | |
d9bce9d9 JM |
1636 | T0 = (uint32_t)T0 >> T1; |
1637 | RETURN(); | |
1638 | } | |
1639 | ||
1640 | #if defined(TARGET_PPC64) | |
1641 | void OPPROTO op_srl_T0_T1_64 (void) | |
1642 | { | |
1643 | T0 = (uint32_t)T0 >> T1; | |
76a66253 JM |
1644 | RETURN(); |
1645 | } | |
d9bce9d9 | 1646 | #endif |
76a66253 JM |
1647 | |
1648 | void OPPROTO op_srli_T0 (void) | |
1649 | { | |
d9bce9d9 | 1650 | T0 = (uint32_t)T0 >> PARAM1; |
76a66253 JM |
1651 | RETURN(); |
1652 | } | |
1653 | ||
d9bce9d9 JM |
1654 | #if defined(TARGET_PPC64) |
1655 | void OPPROTO op_srli_T0_64 (void) | |
1656 | { | |
1657 | T0 = (uint64_t)T0 >> PARAM1; | |
1658 | RETURN(); | |
1659 | } | |
1660 | #endif | |
1661 | ||
76a66253 JM |
1662 | void OPPROTO op_srli_T1 (void) |
1663 | { | |
d9bce9d9 | 1664 | T1 = (uint32_t)T1 >> PARAM1; |
76a66253 JM |
1665 | RETURN(); |
1666 | } | |
1667 | ||
d9bce9d9 JM |
1668 | #if defined(TARGET_PPC64) |
1669 | void OPPROTO op_srli_T1_64 (void) | |
1670 | { | |
1671 | T1 = (uint64_t)T1 >> PARAM1; | |
1672 | RETURN(); | |
1673 | } | |
1674 | #endif | |
1675 | ||
79aceca5 | 1676 | /*** Floating-Point arithmetic ***/ |
9a64fbe4 | 1677 | /* fadd - fadd. */ |
36081602 | 1678 | void OPPROTO op_fadd (void) |
79aceca5 | 1679 | { |
76a66253 | 1680 | FT0 = float64_add(FT0, FT1, &env->fp_status); |
79aceca5 FB |
1681 | RETURN(); |
1682 | } | |
1683 | ||
9a64fbe4 | 1684 | /* fsub - fsub. */ |
36081602 | 1685 | void OPPROTO op_fsub (void) |
79aceca5 | 1686 | { |
76a66253 | 1687 | FT0 = float64_sub(FT0, FT1, &env->fp_status); |
79aceca5 FB |
1688 | RETURN(); |
1689 | } | |
1690 | ||
9a64fbe4 | 1691 | /* fmul - fmul. */ |
36081602 | 1692 | void OPPROTO op_fmul (void) |
79aceca5 | 1693 | { |
76a66253 | 1694 | FT0 = float64_mul(FT0, FT1, &env->fp_status); |
79aceca5 FB |
1695 | RETURN(); |
1696 | } | |
1697 | ||
9a64fbe4 | 1698 | /* fdiv - fdiv. */ |
36081602 | 1699 | void OPPROTO op_fdiv (void) |
79aceca5 | 1700 | { |
fdabc366 | 1701 | FT0 = float64_div(FT0, FT1, &env->fp_status); |
79aceca5 FB |
1702 | RETURN(); |
1703 | } | |
28b6751f | 1704 | |
9a64fbe4 | 1705 | /* fsqrt - fsqrt. */ |
36081602 | 1706 | void OPPROTO op_fsqrt (void) |
28b6751f | 1707 | { |
9a64fbe4 FB |
1708 | do_fsqrt(); |
1709 | RETURN(); | |
28b6751f FB |
1710 | } |
1711 | ||
d7e4b87e JM |
1712 | /* fre - fre. */ |
1713 | void OPPROTO op_fre (void) | |
1714 | { | |
1715 | do_fre(); | |
1716 | RETURN(); | |
1717 | } | |
1718 | ||
9a64fbe4 | 1719 | /* fres - fres. */ |
36081602 | 1720 | void OPPROTO op_fres (void) |
28b6751f | 1721 | { |
9a64fbe4 FB |
1722 | do_fres(); |
1723 | RETURN(); | |
28b6751f FB |
1724 | } |
1725 | ||
9a64fbe4 | 1726 | /* frsqrte - frsqrte. */ |
36081602 | 1727 | void OPPROTO op_frsqrte (void) |
28b6751f | 1728 | { |
4ecc3190 | 1729 | do_frsqrte(); |
9a64fbe4 | 1730 | RETURN(); |
28b6751f FB |
1731 | } |
1732 | ||
9a64fbe4 | 1733 | /* fsel - fsel. */ |
36081602 | 1734 | void OPPROTO op_fsel (void) |
28b6751f | 1735 | { |
9a64fbe4 FB |
1736 | do_fsel(); |
1737 | RETURN(); | |
28b6751f FB |
1738 | } |
1739 | ||
9a64fbe4 FB |
1740 | /*** Floating-Point multiply-and-add ***/ |
1741 | /* fmadd - fmadd. */ | |
36081602 | 1742 | void OPPROTO op_fmadd (void) |
28b6751f | 1743 | { |
e864cabd JM |
1744 | #if USE_PRECISE_EMULATION |
1745 | do_fmadd(); | |
1746 | #else | |
76a66253 JM |
1747 | FT0 = float64_mul(FT0, FT1, &env->fp_status); |
1748 | FT0 = float64_add(FT0, FT2, &env->fp_status); | |
e864cabd | 1749 | #endif |
9a64fbe4 | 1750 | RETURN(); |
28b6751f FB |
1751 | } |
1752 | ||
9a64fbe4 | 1753 | /* fmsub - fmsub. */ |
36081602 | 1754 | void OPPROTO op_fmsub (void) |
28b6751f | 1755 | { |
e864cabd JM |
1756 | #if USE_PRECISE_EMULATION |
1757 | do_fmsub(); | |
1758 | #else | |
76a66253 JM |
1759 | FT0 = float64_mul(FT0, FT1, &env->fp_status); |
1760 | FT0 = float64_sub(FT0, FT2, &env->fp_status); | |
e864cabd | 1761 | #endif |
9a64fbe4 | 1762 | RETURN(); |
28b6751f FB |
1763 | } |
1764 | ||
9a64fbe4 | 1765 | /* fnmadd - fnmadd. - fnmadds - fnmadds. */ |
36081602 | 1766 | void OPPROTO op_fnmadd (void) |
28b6751f | 1767 | { |
4b3686fa | 1768 | do_fnmadd(); |
9a64fbe4 | 1769 | RETURN(); |
28b6751f FB |
1770 | } |
1771 | ||
9a64fbe4 | 1772 | /* fnmsub - fnmsub. */ |
36081602 | 1773 | void OPPROTO op_fnmsub (void) |
28b6751f | 1774 | { |
4b3686fa | 1775 | do_fnmsub(); |
9a64fbe4 | 1776 | RETURN(); |
28b6751f FB |
1777 | } |
1778 | ||
9a64fbe4 FB |
1779 | /*** Floating-Point round & convert ***/ |
1780 | /* frsp - frsp. */ | |
36081602 | 1781 | void OPPROTO op_frsp (void) |
28b6751f | 1782 | { |
76a66253 | 1783 | FT0 = float64_to_float32(FT0, &env->fp_status); |
9a64fbe4 | 1784 | RETURN(); |
28b6751f FB |
1785 | } |
1786 | ||
9a64fbe4 | 1787 | /* fctiw - fctiw. */ |
36081602 | 1788 | void OPPROTO op_fctiw (void) |
28b6751f | 1789 | { |
9a64fbe4 FB |
1790 | do_fctiw(); |
1791 | RETURN(); | |
28b6751f FB |
1792 | } |
1793 | ||
9a64fbe4 | 1794 | /* fctiwz - fctiwz. */ |
36081602 | 1795 | void OPPROTO op_fctiwz (void) |
28b6751f | 1796 | { |
9a64fbe4 FB |
1797 | do_fctiwz(); |
1798 | RETURN(); | |
28b6751f FB |
1799 | } |
1800 | ||
426613db JM |
1801 | #if defined(TARGET_PPC64) |
1802 | /* fcfid - fcfid. */ | |
36081602 | 1803 | void OPPROTO op_fcfid (void) |
426613db JM |
1804 | { |
1805 | do_fcfid(); | |
1806 | RETURN(); | |
1807 | } | |
1808 | ||
1809 | /* fctid - fctid. */ | |
36081602 | 1810 | void OPPROTO op_fctid (void) |
426613db JM |
1811 | { |
1812 | do_fctid(); | |
1813 | RETURN(); | |
1814 | } | |
1815 | ||
1816 | /* fctidz - fctidz. */ | |
36081602 | 1817 | void OPPROTO op_fctidz (void) |
426613db JM |
1818 | { |
1819 | do_fctidz(); | |
1820 | RETURN(); | |
1821 | } | |
1822 | #endif | |
1823 | ||
d7e4b87e JM |
1824 | void OPPROTO op_frin (void) |
1825 | { | |
1826 | do_frin(); | |
1827 | RETURN(); | |
1828 | } | |
1829 | ||
1830 | void OPPROTO op_friz (void) | |
1831 | { | |
1832 | do_friz(); | |
1833 | RETURN(); | |
1834 | } | |
1835 | ||
1836 | void OPPROTO op_frip (void) | |
1837 | { | |
1838 | do_frip(); | |
1839 | RETURN(); | |
1840 | } | |
1841 | ||
1842 | void OPPROTO op_frim (void) | |
1843 | { | |
1844 | do_frim(); | |
1845 | RETURN(); | |
1846 | } | |
1847 | ||
9a64fbe4 FB |
1848 | /*** Floating-Point compare ***/ |
1849 | /* fcmpu */ | |
36081602 | 1850 | void OPPROTO op_fcmpu (void) |
28b6751f | 1851 | { |
9a64fbe4 FB |
1852 | do_fcmpu(); |
1853 | RETURN(); | |
28b6751f FB |
1854 | } |
1855 | ||
9a64fbe4 | 1856 | /* fcmpo */ |
36081602 | 1857 | void OPPROTO op_fcmpo (void) |
fb0eaffc | 1858 | { |
9a64fbe4 FB |
1859 | do_fcmpo(); |
1860 | RETURN(); | |
fb0eaffc FB |
1861 | } |
1862 | ||
9a64fbe4 FB |
1863 | /*** Floating-point move ***/ |
1864 | /* fabs */ | |
36081602 | 1865 | void OPPROTO op_fabs (void) |
fb0eaffc | 1866 | { |
fdabc366 | 1867 | FT0 = float64_abs(FT0); |
fb0eaffc FB |
1868 | RETURN(); |
1869 | } | |
1870 | ||
9a64fbe4 | 1871 | /* fnabs */ |
36081602 | 1872 | void OPPROTO op_fnabs (void) |
fb0eaffc | 1873 | { |
fdabc366 FB |
1874 | FT0 = float64_abs(FT0); |
1875 | FT0 = float64_chs(FT0); | |
fb0eaffc FB |
1876 | RETURN(); |
1877 | } | |
1878 | ||
9a64fbe4 | 1879 | /* fneg */ |
36081602 | 1880 | void OPPROTO op_fneg (void) |
fb0eaffc | 1881 | { |
fdabc366 | 1882 | FT0 = float64_chs(FT0); |
fb0eaffc FB |
1883 | RETURN(); |
1884 | } | |
1885 | ||
9a64fbe4 | 1886 | /* Load and store */ |
9a64fbe4 | 1887 | #define MEMSUFFIX _raw |
76a66253 | 1888 | #include "op_helper.h" |
9a64fbe4 | 1889 | #include "op_mem.h" |
a541f297 | 1890 | #if !defined(CONFIG_USER_ONLY) |
9a64fbe4 | 1891 | #define MEMSUFFIX _user |
76a66253 | 1892 | #include "op_helper.h" |
9a64fbe4 | 1893 | #include "op_mem.h" |
9a64fbe4 | 1894 | #define MEMSUFFIX _kernel |
76a66253 | 1895 | #include "op_helper.h" |
9a64fbe4 FB |
1896 | #include "op_mem.h" |
1897 | #endif | |
1898 | ||
4b3686fa | 1899 | /* Special op to check and maybe clear reservation */ |
d9bce9d9 | 1900 | void OPPROTO op_check_reservation (void) |
4b3686fa | 1901 | { |
fdabc366 FB |
1902 | if ((uint32_t)env->reserve == (uint32_t)(T0 & ~0x00000003)) |
1903 | env->reserve = -1; | |
4b3686fa FB |
1904 | RETURN(); |
1905 | } | |
1906 | ||
d9bce9d9 JM |
1907 | #if defined(TARGET_PPC64) |
1908 | void OPPROTO op_check_reservation_64 (void) | |
1909 | { | |
1910 | if ((uint64_t)env->reserve == (uint64_t)(T0 & ~0x00000003)) | |
1911 | env->reserve = -1; | |
1912 | RETURN(); | |
1913 | } | |
1914 | #endif | |
1915 | ||
9a64fbe4 | 1916 | /* Return from interrupt */ |
76a66253 JM |
1917 | #if !defined(CONFIG_USER_ONLY) |
1918 | void OPPROTO op_rfi (void) | |
28b6751f | 1919 | { |
fdabc366 | 1920 | do_rfi(); |
fb0eaffc FB |
1921 | RETURN(); |
1922 | } | |
d9bce9d9 JM |
1923 | |
1924 | #if defined(TARGET_PPC64) | |
426613db JM |
1925 | void OPPROTO op_rfid (void) |
1926 | { | |
1927 | do_rfid(); | |
1928 | RETURN(); | |
1929 | } | |
d9bce9d9 | 1930 | #endif |
76a66253 | 1931 | #endif |
fb0eaffc | 1932 | |
9a64fbe4 | 1933 | /* Trap word */ |
76a66253 | 1934 | void OPPROTO op_tw (void) |
fb0eaffc | 1935 | { |
76a66253 | 1936 | do_tw(PARAM1); |
fb0eaffc FB |
1937 | RETURN(); |
1938 | } | |
1939 | ||
d9bce9d9 JM |
1940 | #if defined(TARGET_PPC64) |
1941 | void OPPROTO op_td (void) | |
1942 | { | |
1943 | do_td(PARAM1); | |
1944 | RETURN(); | |
1945 | } | |
1946 | #endif | |
1947 | ||
76a66253 | 1948 | #if !defined(CONFIG_USER_ONLY) |
9a64fbe4 | 1949 | /* tlbia */ |
36081602 | 1950 | void OPPROTO op_tlbia (void) |
fb0eaffc | 1951 | { |
9a64fbe4 FB |
1952 | do_tlbia(); |
1953 | RETURN(); | |
1954 | } | |
1955 | ||
1956 | /* tlbie */ | |
d9bce9d9 | 1957 | void OPPROTO op_tlbie (void) |
9a64fbe4 FB |
1958 | { |
1959 | do_tlbie(); | |
fb0eaffc | 1960 | RETURN(); |
28b6751f | 1961 | } |
d9bce9d9 JM |
1962 | |
1963 | #if defined(TARGET_PPC64) | |
1964 | void OPPROTO op_tlbie_64 (void) | |
1965 | { | |
1966 | do_tlbie_64(); | |
1967 | RETURN(); | |
1968 | } | |
1969 | #endif | |
1970 | ||
1971 | #if defined(TARGET_PPC64) | |
1972 | void OPPROTO op_slbia (void) | |
1973 | { | |
1974 | do_slbia(); | |
1975 | RETURN(); | |
1976 | } | |
1977 | ||
1978 | void OPPROTO op_slbie (void) | |
1979 | { | |
1980 | do_slbie(); | |
1981 | RETURN(); | |
1982 | } | |
1983 | #endif | |
76a66253 | 1984 | #endif |
3fc6c082 | 1985 | |
76a66253 JM |
1986 | /* PowerPC 602/603/755 software TLB load instructions */ |
1987 | #if !defined(CONFIG_USER_ONLY) | |
1988 | void OPPROTO op_6xx_tlbld (void) | |
1989 | { | |
1990 | do_load_6xx_tlb(0); | |
1991 | RETURN(); | |
1992 | } | |
1993 | ||
1994 | void OPPROTO op_6xx_tlbli (void) | |
1995 | { | |
1996 | do_load_6xx_tlb(1); | |
1997 | RETURN(); | |
1998 | } | |
1999 | #endif | |
2000 | ||
2001 | /* 601 specific */ | |
76a66253 JM |
2002 | void OPPROTO op_load_601_rtcl (void) |
2003 | { | |
2004 | T0 = cpu_ppc601_load_rtcl(env); | |
2005 | RETURN(); | |
2006 | } | |
2007 | ||
76a66253 JM |
2008 | void OPPROTO op_load_601_rtcu (void) |
2009 | { | |
2010 | T0 = cpu_ppc601_load_rtcu(env); | |
2011 | RETURN(); | |
2012 | } | |
2013 | ||
2014 | #if !defined(CONFIG_USER_ONLY) | |
76a66253 JM |
2015 | void OPPROTO op_store_601_rtcl (void) |
2016 | { | |
2017 | cpu_ppc601_store_rtcl(env, T0); | |
2018 | RETURN(); | |
2019 | } | |
2020 | ||
76a66253 JM |
2021 | void OPPROTO op_store_601_rtcu (void) |
2022 | { | |
2023 | cpu_ppc601_store_rtcu(env, T0); | |
2024 | RETURN(); | |
2025 | } | |
2026 | ||
2027 | void OPPROTO op_load_601_bat (void) | |
2028 | { | |
2029 | T0 = env->IBAT[PARAM1][PARAM2]; | |
2030 | RETURN(); | |
2031 | } | |
2032 | #endif /* !defined(CONFIG_USER_ONLY) */ | |
2033 | ||
2034 | /* 601 unified BATs store. | |
2035 | * To avoid using specific MMU code for 601, we store BATs in | |
2036 | * IBAT and DBAT simultaneously, then emulate unified BATs. | |
2037 | */ | |
2038 | #if !defined(CONFIG_USER_ONLY) | |
2039 | void OPPROTO op_store_601_batl (void) | |
2040 | { | |
2041 | int nr = PARAM1; | |
2042 | ||
2043 | env->IBAT[1][nr] = T0; | |
2044 | env->DBAT[1][nr] = T0; | |
2045 | RETURN(); | |
2046 | } | |
2047 | ||
2048 | void OPPROTO op_store_601_batu (void) | |
2049 | { | |
2050 | do_store_601_batu(PARAM1); | |
2051 | RETURN(); | |
2052 | } | |
2053 | #endif /* !defined(CONFIG_USER_ONLY) */ | |
2054 | ||
2055 | /* PowerPC 601 specific instructions (POWER bridge) */ | |
2056 | /* XXX: those micro-ops need tests ! */ | |
2057 | void OPPROTO op_POWER_abs (void) | |
2058 | { | |
2059 | if (T0 == INT32_MIN) | |
2060 | T0 = INT32_MAX; | |
2061 | else if (T0 < 0) | |
2062 | T0 = -T0; | |
2063 | RETURN(); | |
2064 | } | |
2065 | ||
2066 | void OPPROTO op_POWER_abso (void) | |
2067 | { | |
2068 | do_POWER_abso(); | |
2069 | RETURN(); | |
2070 | } | |
2071 | ||
2072 | void OPPROTO op_POWER_clcs (void) | |
2073 | { | |
2074 | do_POWER_clcs(); | |
2075 | RETURN(); | |
2076 | } | |
2077 | ||
2078 | void OPPROTO op_POWER_div (void) | |
2079 | { | |
2080 | do_POWER_div(); | |
2081 | RETURN(); | |
2082 | } | |
2083 | ||
2084 | void OPPROTO op_POWER_divo (void) | |
2085 | { | |
2086 | do_POWER_divo(); | |
2087 | RETURN(); | |
2088 | } | |
2089 | ||
2090 | void OPPROTO op_POWER_divs (void) | |
2091 | { | |
2092 | do_POWER_divs(); | |
2093 | RETURN(); | |
2094 | } | |
2095 | ||
2096 | void OPPROTO op_POWER_divso (void) | |
2097 | { | |
2098 | do_POWER_divso(); | |
2099 | RETURN(); | |
2100 | } | |
2101 | ||
2102 | void OPPROTO op_POWER_doz (void) | |
2103 | { | |
d9bce9d9 | 2104 | if ((int32_t)T1 > (int32_t)T0) |
76a66253 JM |
2105 | T0 = T1 - T0; |
2106 | else | |
2107 | T0 = 0; | |
2108 | RETURN(); | |
2109 | } | |
2110 | ||
2111 | void OPPROTO op_POWER_dozo (void) | |
2112 | { | |
2113 | do_POWER_dozo(); | |
2114 | RETURN(); | |
2115 | } | |
2116 | ||
2117 | void OPPROTO op_load_xer_cmp (void) | |
2118 | { | |
2119 | T2 = xer_cmp; | |
2120 | RETURN(); | |
2121 | } | |
2122 | ||
2123 | void OPPROTO op_POWER_maskg (void) | |
2124 | { | |
2125 | do_POWER_maskg(); | |
2126 | RETURN(); | |
2127 | } | |
2128 | ||
2129 | void OPPROTO op_POWER_maskir (void) | |
2130 | { | |
2131 | T0 = (T0 & ~T2) | (T1 & T2); | |
2132 | RETURN(); | |
2133 | } | |
2134 | ||
2135 | void OPPROTO op_POWER_mul (void) | |
2136 | { | |
2137 | uint64_t tmp; | |
2138 | ||
2139 | tmp = (uint64_t)T0 * (uint64_t)T1; | |
2140 | env->spr[SPR_MQ] = tmp >> 32; | |
2141 | T0 = tmp; | |
2142 | RETURN(); | |
2143 | } | |
2144 | ||
2145 | void OPPROTO op_POWER_mulo (void) | |
2146 | { | |
2147 | do_POWER_mulo(); | |
2148 | RETURN(); | |
2149 | } | |
2150 | ||
2151 | void OPPROTO op_POWER_nabs (void) | |
2152 | { | |
2153 | if (T0 > 0) | |
2154 | T0 = -T0; | |
2155 | RETURN(); | |
2156 | } | |
2157 | ||
2158 | void OPPROTO op_POWER_nabso (void) | |
2159 | { | |
2160 | /* nabs never overflows */ | |
2161 | if (T0 > 0) | |
2162 | T0 = -T0; | |
2163 | xer_ov = 0; | |
2164 | RETURN(); | |
2165 | } | |
2166 | ||
2167 | /* XXX: factorise POWER rotates... */ | |
2168 | void OPPROTO op_POWER_rlmi (void) | |
2169 | { | |
2170 | T0 = rotl32(T0, T2) & PARAM1; | |
2171 | T0 |= T1 & PARAM2; | |
2172 | RETURN(); | |
2173 | } | |
2174 | ||
2175 | void OPPROTO op_POWER_rrib (void) | |
2176 | { | |
2177 | T2 &= 0x1FUL; | |
2178 | T0 = rotl32(T0 & INT32_MIN, T2); | |
2179 | T0 |= T1 & ~rotl32(INT32_MIN, T2); | |
2180 | RETURN(); | |
2181 | } | |
2182 | ||
2183 | void OPPROTO op_POWER_sle (void) | |
2184 | { | |
2185 | T1 &= 0x1FUL; | |
2186 | env->spr[SPR_MQ] = rotl32(T0, T1); | |
2187 | T0 = T0 << T1; | |
2188 | RETURN(); | |
2189 | } | |
2190 | ||
2191 | void OPPROTO op_POWER_sleq (void) | |
2192 | { | |
2193 | uint32_t tmp = env->spr[SPR_MQ]; | |
2194 | ||
2195 | T1 &= 0x1FUL; | |
2196 | env->spr[SPR_MQ] = rotl32(T0, T1); | |
2197 | T0 = T0 << T1; | |
2198 | T0 |= tmp >> (32 - T1); | |
2199 | RETURN(); | |
2200 | } | |
2201 | ||
2202 | void OPPROTO op_POWER_sllq (void) | |
2203 | { | |
2204 | uint32_t msk = -1; | |
2205 | ||
2206 | msk = msk << (T1 & 0x1FUL); | |
2207 | if (T1 & 0x20UL) | |
2208 | msk = ~msk; | |
2209 | T1 &= 0x1FUL; | |
2210 | T0 = (T0 << T1) & msk; | |
2211 | T0 |= env->spr[SPR_MQ] & ~msk; | |
2212 | RETURN(); | |
2213 | } | |
2214 | ||
2215 | void OPPROTO op_POWER_slq (void) | |
2216 | { | |
2217 | uint32_t msk = -1, tmp; | |
2218 | ||
2219 | msk = msk << (T1 & 0x1FUL); | |
2220 | if (T1 & 0x20UL) | |
2221 | msk = ~msk; | |
2222 | T1 &= 0x1FUL; | |
2223 | tmp = rotl32(T0, T1); | |
2224 | T0 = tmp & msk; | |
2225 | env->spr[SPR_MQ] = tmp; | |
2226 | RETURN(); | |
2227 | } | |
2228 | ||
2229 | void OPPROTO op_POWER_sraq (void) | |
2230 | { | |
2231 | env->spr[SPR_MQ] = rotl32(T0, 32 - (T1 & 0x1FUL)); | |
2232 | if (T1 & 0x20UL) | |
2233 | T0 = -1L; | |
2234 | else | |
d9bce9d9 | 2235 | T0 = (int32_t)T0 >> T1; |
76a66253 JM |
2236 | RETURN(); |
2237 | } | |
2238 | ||
2239 | void OPPROTO op_POWER_sre (void) | |
2240 | { | |
2241 | T1 &= 0x1FUL; | |
2242 | env->spr[SPR_MQ] = rotl32(T0, 32 - T1); | |
d9bce9d9 | 2243 | T0 = (int32_t)T0 >> T1; |
76a66253 JM |
2244 | RETURN(); |
2245 | } | |
2246 | ||
2247 | void OPPROTO op_POWER_srea (void) | |
2248 | { | |
2249 | T1 &= 0x1FUL; | |
2250 | env->spr[SPR_MQ] = T0 >> T1; | |
d9bce9d9 | 2251 | T0 = (int32_t)T0 >> T1; |
76a66253 JM |
2252 | RETURN(); |
2253 | } | |
2254 | ||
2255 | void OPPROTO op_POWER_sreq (void) | |
2256 | { | |
2257 | uint32_t tmp; | |
2258 | int32_t msk; | |
2259 | ||
2260 | T1 &= 0x1FUL; | |
2261 | msk = INT32_MIN >> T1; | |
2262 | tmp = env->spr[SPR_MQ]; | |
2263 | env->spr[SPR_MQ] = rotl32(T0, 32 - T1); | |
2264 | T0 = T0 >> T1; | |
2265 | T0 |= tmp & msk; | |
2266 | RETURN(); | |
2267 | } | |
2268 | ||
2269 | void OPPROTO op_POWER_srlq (void) | |
2270 | { | |
2271 | uint32_t tmp; | |
2272 | int32_t msk; | |
2273 | ||
2274 | msk = INT32_MIN >> (T1 & 0x1FUL); | |
2275 | if (T1 & 0x20UL) | |
2276 | msk = ~msk; | |
2277 | T1 &= 0x1FUL; | |
2278 | tmp = env->spr[SPR_MQ]; | |
2279 | env->spr[SPR_MQ] = rotl32(T0, 32 - T1); | |
2280 | T0 = T0 >> T1; | |
2281 | T0 &= msk; | |
2282 | T0 |= tmp & ~msk; | |
2283 | RETURN(); | |
2284 | } | |
2285 | ||
2286 | void OPPROTO op_POWER_srq (void) | |
2287 | { | |
2288 | T1 &= 0x1FUL; | |
2289 | env->spr[SPR_MQ] = rotl32(T0, 32 - T1); | |
2290 | T0 = T0 >> T1; | |
2291 | RETURN(); | |
2292 | } | |
2293 | ||
2294 | /* POWER instructions not implemented in PowerPC 601 */ | |
2295 | #if !defined(CONFIG_USER_ONLY) | |
2296 | void OPPROTO op_POWER_mfsri (void) | |
2297 | { | |
2298 | T1 = T0 >> 28; | |
2299 | T0 = env->sr[T1]; | |
2300 | RETURN(); | |
2301 | } | |
2302 | ||
2303 | void OPPROTO op_POWER_rac (void) | |
2304 | { | |
2305 | do_POWER_rac(); | |
2306 | RETURN(); | |
2307 | } | |
2308 | ||
2309 | void OPPROTO op_POWER_rfsvc (void) | |
2310 | { | |
2311 | do_POWER_rfsvc(); | |
2312 | RETURN(); | |
2313 | } | |
2314 | #endif | |
2315 | ||
2316 | /* PowerPC 602 specific instruction */ | |
2317 | #if !defined(CONFIG_USER_ONLY) | |
2318 | void OPPROTO op_602_mfrom (void) | |
2319 | { | |
2320 | do_op_602_mfrom(); | |
2321 | RETURN(); | |
2322 | } | |
2323 | #endif | |
2324 | ||
2325 | /* PowerPC 4xx specific micro-ops */ | |
2326 | void OPPROTO op_405_add_T0_T2 (void) | |
2327 | { | |
2328 | T0 = (int32_t)T0 + (int32_t)T2; | |
2329 | RETURN(); | |
2330 | } | |
2331 | ||
2332 | void OPPROTO op_405_mulchw (void) | |
2333 | { | |
2334 | T0 = ((int16_t)T0) * ((int16_t)(T1 >> 16)); | |
2335 | RETURN(); | |
2336 | } | |
2337 | ||
2338 | void OPPROTO op_405_mulchwu (void) | |
2339 | { | |
2340 | T0 = ((uint16_t)T0) * ((uint16_t)(T1 >> 16)); | |
2341 | RETURN(); | |
2342 | } | |
2343 | ||
2344 | void OPPROTO op_405_mulhhw (void) | |
2345 | { | |
2346 | T0 = ((int16_t)(T0 >> 16)) * ((int16_t)(T1 >> 16)); | |
2347 | RETURN(); | |
2348 | } | |
2349 | ||
2350 | void OPPROTO op_405_mulhhwu (void) | |
2351 | { | |
2352 | T0 = ((uint16_t)(T0 >> 16)) * ((uint16_t)(T1 >> 16)); | |
2353 | RETURN(); | |
2354 | } | |
2355 | ||
2356 | void OPPROTO op_405_mullhw (void) | |
2357 | { | |
2358 | T0 = ((int16_t)T0) * ((int16_t)T1); | |
2359 | RETURN(); | |
2360 | } | |
2361 | ||
2362 | void OPPROTO op_405_mullhwu (void) | |
2363 | { | |
2364 | T0 = ((uint16_t)T0) * ((uint16_t)T1); | |
2365 | RETURN(); | |
2366 | } | |
2367 | ||
2368 | void OPPROTO op_405_check_ov (void) | |
2369 | { | |
2370 | do_405_check_ov(); | |
2371 | RETURN(); | |
2372 | } | |
2373 | ||
2374 | void OPPROTO op_405_check_sat (void) | |
2375 | { | |
2376 | do_405_check_sat(); | |
2377 | RETURN(); | |
2378 | } | |
2379 | ||
2380 | void OPPROTO op_405_check_ovu (void) | |
2381 | { | |
2382 | if (likely(T0 >= T2)) { | |
2383 | xer_ov = 0; | |
2384 | } else { | |
2385 | xer_ov = 1; | |
2386 | xer_so = 1; | |
2387 | } | |
2388 | RETURN(); | |
2389 | } | |
2390 | ||
2391 | void OPPROTO op_405_check_satu (void) | |
2392 | { | |
2393 | if (unlikely(T0 < T2)) { | |
2394 | /* Saturate result */ | |
2395 | T0 = -1; | |
2396 | } | |
2397 | RETURN(); | |
2398 | } | |
2399 | ||
a42bd6cc | 2400 | void OPPROTO op_load_dcr (void) |
76a66253 | 2401 | { |
a42bd6cc | 2402 | do_load_dcr(); |
76a66253 JM |
2403 | RETURN(); |
2404 | } | |
2405 | ||
a42bd6cc | 2406 | void OPPROTO op_store_dcr (void) |
76a66253 | 2407 | { |
a42bd6cc | 2408 | do_store_dcr(); |
76a66253 JM |
2409 | RETURN(); |
2410 | } | |
2411 | ||
a750fc0b | 2412 | #if !defined(CONFIG_USER_ONLY) |
76a66253 JM |
2413 | /* Return from critical interrupt : |
2414 | * same as rfi, except nip & MSR are loaded from SRR2/3 instead of SRR0/1 | |
2415 | */ | |
a42bd6cc JM |
2416 | void OPPROTO op_40x_rfci (void) |
2417 | { | |
2418 | do_40x_rfci(); | |
2419 | RETURN(); | |
2420 | } | |
2421 | ||
2422 | void OPPROTO op_rfci (void) | |
2423 | { | |
2424 | do_rfci(); | |
2425 | RETURN(); | |
2426 | } | |
2427 | ||
2428 | void OPPROTO op_rfdi (void) | |
2429 | { | |
2430 | do_rfdi(); | |
2431 | RETURN(); | |
2432 | } | |
2433 | ||
2434 | void OPPROTO op_rfmci (void) | |
76a66253 | 2435 | { |
a42bd6cc | 2436 | do_rfmci(); |
76a66253 JM |
2437 | RETURN(); |
2438 | } | |
2439 | ||
a42bd6cc | 2440 | void OPPROTO op_wrte (void) |
76a66253 JM |
2441 | { |
2442 | msr_ee = T0 >> 16; | |
2443 | RETURN(); | |
2444 | } | |
2445 | ||
a4bb6c3e | 2446 | void OPPROTO op_440_tlbre (void) |
5eb7995e | 2447 | { |
a4bb6c3e | 2448 | do_440_tlbre(PARAM1); |
5eb7995e JM |
2449 | RETURN(); |
2450 | } | |
2451 | ||
a4bb6c3e | 2452 | void OPPROTO op_440_tlbsx (void) |
5eb7995e | 2453 | { |
a4bb6c3e | 2454 | do_440_tlbsx(); |
5eb7995e JM |
2455 | RETURN(); |
2456 | } | |
2457 | ||
a4bb6c3e | 2458 | void OPPROTO op_440_tlbsx_ (void) |
5eb7995e | 2459 | { |
a4bb6c3e | 2460 | do_440_tlbsx_(); |
5eb7995e JM |
2461 | RETURN(); |
2462 | } | |
2463 | ||
a4bb6c3e | 2464 | void OPPROTO op_440_tlbwe (void) |
5eb7995e | 2465 | { |
a4bb6c3e | 2466 | do_440_tlbwe(PARAM1); |
5eb7995e JM |
2467 | RETURN(); |
2468 | } | |
2469 | ||
76a66253 JM |
2470 | void OPPROTO op_4xx_tlbre_lo (void) |
2471 | { | |
2472 | do_4xx_tlbre_lo(); | |
2473 | RETURN(); | |
2474 | } | |
2475 | ||
2476 | void OPPROTO op_4xx_tlbre_hi (void) | |
2477 | { | |
2478 | do_4xx_tlbre_hi(); | |
2479 | RETURN(); | |
2480 | } | |
2481 | ||
2482 | void OPPROTO op_4xx_tlbsx (void) | |
2483 | { | |
2484 | do_4xx_tlbsx(); | |
2485 | RETURN(); | |
2486 | } | |
2487 | ||
2488 | void OPPROTO op_4xx_tlbsx_ (void) | |
2489 | { | |
2490 | do_4xx_tlbsx_(); | |
2491 | RETURN(); | |
2492 | } | |
2493 | ||
2494 | void OPPROTO op_4xx_tlbwe_lo (void) | |
2495 | { | |
2496 | do_4xx_tlbwe_lo(); | |
2497 | RETURN(); | |
2498 | } | |
2499 | ||
2500 | void OPPROTO op_4xx_tlbwe_hi (void) | |
2501 | { | |
2502 | do_4xx_tlbwe_hi(); | |
2503 | RETURN(); | |
2504 | } | |
2505 | #endif | |
2506 | ||
2507 | /* SPR micro-ops */ | |
2508 | /* 440 specific */ | |
2509 | void OPPROTO op_440_dlmzb (void) | |
2510 | { | |
2511 | do_440_dlmzb(); | |
2512 | RETURN(); | |
2513 | } | |
2514 | ||
2515 | void OPPROTO op_440_dlmzb_update_Rc (void) | |
2516 | { | |
2517 | if (T0 == 8) | |
2518 | T0 = 0x2; | |
2519 | else if (T0 < 4) | |
2520 | T0 = 0x4; | |
2521 | else | |
2522 | T0 = 0x8; | |
2523 | RETURN(); | |
2524 | } | |
2525 | ||
2526 | #if !defined(CONFIG_USER_ONLY) | |
2527 | void OPPROTO op_store_pir (void) | |
3fc6c082 FB |
2528 | { |
2529 | env->spr[SPR_PIR] = T0 & 0x0000000FUL; | |
2530 | RETURN(); | |
2531 | } | |
76a66253 JM |
2532 | |
2533 | void OPPROTO op_load_403_pb (void) | |
2534 | { | |
2535 | do_load_403_pb(PARAM1); | |
2536 | RETURN(); | |
2537 | } | |
2538 | ||
2539 | void OPPROTO op_store_403_pb (void) | |
2540 | { | |
2541 | do_store_403_pb(PARAM1); | |
2542 | RETURN(); | |
2543 | } | |
2544 | ||
76a66253 JM |
2545 | void OPPROTO op_load_40x_pit (void) |
2546 | { | |
2547 | T0 = load_40x_pit(env); | |
2548 | RETURN(); | |
2549 | } | |
2550 | ||
76a66253 JM |
2551 | void OPPROTO op_store_40x_pit (void) |
2552 | { | |
2553 | store_40x_pit(env, T0); | |
2554 | RETURN(); | |
2555 | } | |
2556 | ||
8ecc7913 JM |
2557 | void OPPROTO op_store_40x_dbcr0 (void) |
2558 | { | |
2559 | store_40x_dbcr0(env, T0); | |
2560 | } | |
2561 | ||
c294fc58 JM |
2562 | void OPPROTO op_store_40x_sler (void) |
2563 | { | |
2564 | store_40x_sler(env, T0); | |
2565 | RETURN(); | |
2566 | } | |
2567 | ||
76a66253 JM |
2568 | void OPPROTO op_store_booke_tcr (void) |
2569 | { | |
2570 | store_booke_tcr(env, T0); | |
2571 | RETURN(); | |
2572 | } | |
2573 | ||
76a66253 JM |
2574 | void OPPROTO op_store_booke_tsr (void) |
2575 | { | |
2576 | store_booke_tsr(env, T0); | |
2577 | RETURN(); | |
2578 | } | |
0487d6a8 | 2579 | |
76a66253 | 2580 | #endif /* !defined(CONFIG_USER_ONLY) */ |
0487d6a8 | 2581 | |
35cdaad6 | 2582 | #if defined(TARGET_PPCEMB) |
0487d6a8 JM |
2583 | /* SPE extension */ |
2584 | void OPPROTO op_splatw_T1_64 (void) | |
2585 | { | |
2586 | T1_64 = (T1_64 << 32) | (T1_64 & 0x00000000FFFFFFFFULL); | |
e864cabd | 2587 | RETURN(); |
0487d6a8 JM |
2588 | } |
2589 | ||
2590 | void OPPROTO op_splatwi_T0_64 (void) | |
2591 | { | |
2592 | uint64_t tmp = PARAM1; | |
2593 | ||
2594 | T0_64 = (tmp << 32) | tmp; | |
e864cabd | 2595 | RETURN(); |
0487d6a8 JM |
2596 | } |
2597 | ||
2598 | void OPPROTO op_splatwi_T1_64 (void) | |
2599 | { | |
2600 | uint64_t tmp = PARAM1; | |
2601 | ||
2602 | T1_64 = (tmp << 32) | tmp; | |
e864cabd | 2603 | RETURN(); |
0487d6a8 JM |
2604 | } |
2605 | ||
2606 | void OPPROTO op_extsh_T1_64 (void) | |
2607 | { | |
2608 | T1_64 = (int32_t)((int16_t)T1_64); | |
2609 | RETURN(); | |
2610 | } | |
2611 | ||
2612 | void OPPROTO op_sli16_T1_64 (void) | |
2613 | { | |
2614 | T1_64 = T1_64 << 16; | |
2615 | RETURN(); | |
2616 | } | |
2617 | ||
2618 | void OPPROTO op_sli32_T1_64 (void) | |
2619 | { | |
2620 | T1_64 = T1_64 << 32; | |
2621 | RETURN(); | |
2622 | } | |
2623 | ||
2624 | void OPPROTO op_srli32_T1_64 (void) | |
2625 | { | |
2626 | T1_64 = T1_64 >> 32; | |
2627 | RETURN(); | |
2628 | } | |
2629 | ||
2630 | void OPPROTO op_evsel (void) | |
2631 | { | |
2632 | do_evsel(); | |
2633 | RETURN(); | |
2634 | } | |
2635 | ||
2636 | void OPPROTO op_evaddw (void) | |
2637 | { | |
2638 | do_evaddw(); | |
2639 | RETURN(); | |
2640 | } | |
2641 | ||
2642 | void OPPROTO op_evsubfw (void) | |
2643 | { | |
2644 | do_evsubfw(); | |
2645 | RETURN(); | |
2646 | } | |
2647 | ||
2648 | void OPPROTO op_evneg (void) | |
2649 | { | |
2650 | do_evneg(); | |
2651 | RETURN(); | |
2652 | } | |
2653 | ||
2654 | void OPPROTO op_evabs (void) | |
2655 | { | |
2656 | do_evabs(); | |
2657 | RETURN(); | |
2658 | } | |
2659 | ||
2660 | void OPPROTO op_evextsh (void) | |
2661 | { | |
2662 | T0_64 = ((uint64_t)((int32_t)(int16_t)(T0_64 >> 32)) << 32) | | |
2663 | (uint64_t)((int32_t)(int16_t)T0_64); | |
2664 | RETURN(); | |
2665 | } | |
2666 | ||
2667 | void OPPROTO op_evextsb (void) | |
2668 | { | |
2669 | T0_64 = ((uint64_t)((int32_t)(int8_t)(T0_64 >> 32)) << 32) | | |
2670 | (uint64_t)((int32_t)(int8_t)T0_64); | |
2671 | RETURN(); | |
2672 | } | |
2673 | ||
2674 | void OPPROTO op_evcntlzw (void) | |
2675 | { | |
2676 | do_evcntlzw(); | |
2677 | RETURN(); | |
2678 | } | |
2679 | ||
2680 | void OPPROTO op_evrndw (void) | |
2681 | { | |
2682 | do_evrndw(); | |
2683 | RETURN(); | |
2684 | } | |
2685 | ||
2686 | void OPPROTO op_brinc (void) | |
2687 | { | |
2688 | do_brinc(); | |
2689 | RETURN(); | |
2690 | } | |
2691 | ||
2692 | void OPPROTO op_evcntlsw (void) | |
2693 | { | |
2694 | do_evcntlsw(); | |
2695 | RETURN(); | |
2696 | } | |
2697 | ||
2698 | void OPPROTO op_evand (void) | |
2699 | { | |
2700 | T0_64 &= T1_64; | |
2701 | RETURN(); | |
2702 | } | |
2703 | ||
2704 | void OPPROTO op_evandc (void) | |
2705 | { | |
2706 | T0_64 &= ~T1_64; | |
2707 | RETURN(); | |
2708 | } | |
2709 | ||
2710 | void OPPROTO op_evor (void) | |
2711 | { | |
2712 | T0_64 |= T1_64; | |
2713 | RETURN(); | |
2714 | } | |
2715 | ||
2716 | void OPPROTO op_evxor (void) | |
2717 | { | |
2718 | T0_64 ^= T1_64; | |
2719 | RETURN(); | |
2720 | } | |
2721 | ||
2722 | void OPPROTO op_eveqv (void) | |
2723 | { | |
2724 | T0_64 = ~(T0_64 ^ T1_64); | |
2725 | RETURN(); | |
2726 | } | |
2727 | ||
2728 | void OPPROTO op_evnor (void) | |
2729 | { | |
2730 | T0_64 = ~(T0_64 | T1_64); | |
2731 | RETURN(); | |
2732 | } | |
2733 | ||
2734 | void OPPROTO op_evorc (void) | |
2735 | { | |
2736 | T0_64 |= ~T1_64; | |
2737 | RETURN(); | |
2738 | } | |
2739 | ||
2740 | void OPPROTO op_evnand (void) | |
2741 | { | |
2742 | T0_64 = ~(T0_64 & T1_64); | |
2743 | RETURN(); | |
2744 | } | |
2745 | ||
2746 | void OPPROTO op_evsrws (void) | |
2747 | { | |
2748 | do_evsrws(); | |
2749 | RETURN(); | |
2750 | } | |
2751 | ||
2752 | void OPPROTO op_evsrwu (void) | |
2753 | { | |
2754 | do_evsrwu(); | |
2755 | RETURN(); | |
2756 | } | |
2757 | ||
2758 | void OPPROTO op_evslw (void) | |
2759 | { | |
2760 | do_evslw(); | |
2761 | RETURN(); | |
2762 | } | |
2763 | ||
2764 | void OPPROTO op_evrlw (void) | |
2765 | { | |
2766 | do_evrlw(); | |
2767 | RETURN(); | |
2768 | } | |
2769 | ||
2770 | void OPPROTO op_evmergelo (void) | |
2771 | { | |
2772 | T0_64 = (T0_64 << 32) | (T1_64 & 0x00000000FFFFFFFFULL); | |
2773 | RETURN(); | |
2774 | } | |
2775 | ||
2776 | void OPPROTO op_evmergehi (void) | |
2777 | { | |
2778 | T0_64 = (T0_64 & 0xFFFFFFFF00000000ULL) | (T1_64 >> 32); | |
2779 | RETURN(); | |
2780 | } | |
2781 | ||
2782 | void OPPROTO op_evmergelohi (void) | |
2783 | { | |
2784 | T0_64 = (T0_64 << 32) | (T1_64 >> 32); | |
2785 | RETURN(); | |
2786 | } | |
2787 | ||
2788 | void OPPROTO op_evmergehilo (void) | |
2789 | { | |
2790 | T0_64 = (T0_64 & 0xFFFFFFFF00000000ULL) | (T1_64 & 0x00000000FFFFFFFFULL); | |
2791 | RETURN(); | |
2792 | } | |
2793 | ||
2794 | void OPPROTO op_evcmpgts (void) | |
2795 | { | |
2796 | do_evcmpgts(); | |
2797 | RETURN(); | |
2798 | } | |
2799 | ||
2800 | void OPPROTO op_evcmpgtu (void) | |
2801 | { | |
2802 | do_evcmpgtu(); | |
2803 | RETURN(); | |
2804 | } | |
2805 | ||
2806 | void OPPROTO op_evcmplts (void) | |
2807 | { | |
2808 | do_evcmplts(); | |
2809 | RETURN(); | |
2810 | } | |
2811 | ||
2812 | void OPPROTO op_evcmpltu (void) | |
2813 | { | |
2814 | do_evcmpltu(); | |
2815 | RETURN(); | |
2816 | } | |
2817 | ||
2818 | void OPPROTO op_evcmpeq (void) | |
2819 | { | |
2820 | do_evcmpeq(); | |
2821 | RETURN(); | |
2822 | } | |
2823 | ||
2824 | void OPPROTO op_evfssub (void) | |
2825 | { | |
2826 | do_evfssub(); | |
2827 | RETURN(); | |
2828 | } | |
2829 | ||
2830 | void OPPROTO op_evfsadd (void) | |
2831 | { | |
2832 | do_evfsadd(); | |
2833 | RETURN(); | |
2834 | } | |
2835 | ||
2836 | void OPPROTO op_evfsnabs (void) | |
2837 | { | |
2838 | do_evfsnabs(); | |
2839 | RETURN(); | |
2840 | } | |
2841 | ||
2842 | void OPPROTO op_evfsabs (void) | |
2843 | { | |
2844 | do_evfsabs(); | |
2845 | RETURN(); | |
2846 | } | |
2847 | ||
2848 | void OPPROTO op_evfsneg (void) | |
2849 | { | |
2850 | do_evfsneg(); | |
2851 | RETURN(); | |
2852 | } | |
2853 | ||
2854 | void OPPROTO op_evfsdiv (void) | |
2855 | { | |
2856 | do_evfsdiv(); | |
2857 | RETURN(); | |
2858 | } | |
2859 | ||
2860 | void OPPROTO op_evfsmul (void) | |
2861 | { | |
2862 | do_evfsmul(); | |
2863 | RETURN(); | |
2864 | } | |
2865 | ||
2866 | void OPPROTO op_evfscmplt (void) | |
2867 | { | |
2868 | do_evfscmplt(); | |
2869 | RETURN(); | |
2870 | } | |
2871 | ||
2872 | void OPPROTO op_evfscmpgt (void) | |
2873 | { | |
2874 | do_evfscmpgt(); | |
2875 | RETURN(); | |
2876 | } | |
2877 | ||
2878 | void OPPROTO op_evfscmpeq (void) | |
2879 | { | |
2880 | do_evfscmpeq(); | |
2881 | RETURN(); | |
2882 | } | |
2883 | ||
2884 | void OPPROTO op_evfscfsi (void) | |
2885 | { | |
2886 | do_evfscfsi(); | |
2887 | RETURN(); | |
2888 | } | |
2889 | ||
2890 | void OPPROTO op_evfscfui (void) | |
2891 | { | |
2892 | do_evfscfui(); | |
2893 | RETURN(); | |
2894 | } | |
2895 | ||
2896 | void OPPROTO op_evfscfsf (void) | |
2897 | { | |
2898 | do_evfscfsf(); | |
2899 | RETURN(); | |
2900 | } | |
2901 | ||
2902 | void OPPROTO op_evfscfuf (void) | |
2903 | { | |
2904 | do_evfscfuf(); | |
2905 | RETURN(); | |
2906 | } | |
2907 | ||
2908 | void OPPROTO op_evfsctsi (void) | |
2909 | { | |
2910 | do_evfsctsi(); | |
2911 | RETURN(); | |
2912 | } | |
2913 | ||
2914 | void OPPROTO op_evfsctui (void) | |
2915 | { | |
2916 | do_evfsctui(); | |
2917 | RETURN(); | |
2918 | } | |
2919 | ||
2920 | void OPPROTO op_evfsctsf (void) | |
2921 | { | |
2922 | do_evfsctsf(); | |
2923 | RETURN(); | |
2924 | } | |
2925 | ||
2926 | void OPPROTO op_evfsctuf (void) | |
2927 | { | |
2928 | do_evfsctuf(); | |
2929 | RETURN(); | |
2930 | } | |
2931 | ||
2932 | void OPPROTO op_evfsctuiz (void) | |
2933 | { | |
2934 | do_evfsctuiz(); | |
2935 | RETURN(); | |
2936 | } | |
2937 | ||
2938 | void OPPROTO op_evfsctsiz (void) | |
2939 | { | |
2940 | do_evfsctsiz(); | |
2941 | RETURN(); | |
2942 | } | |
2943 | ||
2944 | void OPPROTO op_evfststlt (void) | |
2945 | { | |
2946 | do_evfststlt(); | |
2947 | RETURN(); | |
2948 | } | |
2949 | ||
2950 | void OPPROTO op_evfststgt (void) | |
2951 | { | |
2952 | do_evfststgt(); | |
2953 | RETURN(); | |
2954 | } | |
2955 | ||
2956 | void OPPROTO op_evfststeq (void) | |
2957 | { | |
2958 | do_evfststeq(); | |
2959 | RETURN(); | |
2960 | } | |
2961 | ||
2962 | void OPPROTO op_efssub (void) | |
2963 | { | |
2964 | T0_64 = _do_efssub(T0_64, T1_64); | |
2965 | RETURN(); | |
2966 | } | |
2967 | ||
2968 | void OPPROTO op_efsadd (void) | |
2969 | { | |
2970 | T0_64 = _do_efsadd(T0_64, T1_64); | |
2971 | RETURN(); | |
2972 | } | |
2973 | ||
2974 | void OPPROTO op_efsnabs (void) | |
2975 | { | |
2976 | T0_64 = _do_efsnabs(T0_64); | |
2977 | RETURN(); | |
2978 | } | |
2979 | ||
2980 | void OPPROTO op_efsabs (void) | |
2981 | { | |
2982 | T0_64 = _do_efsabs(T0_64); | |
2983 | RETURN(); | |
2984 | } | |
2985 | ||
2986 | void OPPROTO op_efsneg (void) | |
2987 | { | |
2988 | T0_64 = _do_efsneg(T0_64); | |
2989 | RETURN(); | |
2990 | } | |
2991 | ||
2992 | void OPPROTO op_efsdiv (void) | |
2993 | { | |
2994 | T0_64 = _do_efsdiv(T0_64, T1_64); | |
2995 | RETURN(); | |
2996 | } | |
2997 | ||
2998 | void OPPROTO op_efsmul (void) | |
2999 | { | |
3000 | T0_64 = _do_efsmul(T0_64, T1_64); | |
3001 | RETURN(); | |
3002 | } | |
3003 | ||
3004 | void OPPROTO op_efscmplt (void) | |
3005 | { | |
3006 | do_efscmplt(); | |
3007 | RETURN(); | |
3008 | } | |
3009 | ||
3010 | void OPPROTO op_efscmpgt (void) | |
3011 | { | |
3012 | do_efscmpgt(); | |
3013 | RETURN(); | |
3014 | } | |
3015 | ||
3016 | void OPPROTO op_efscfd (void) | |
3017 | { | |
3018 | do_efscfd(); | |
3019 | RETURN(); | |
3020 | } | |
3021 | ||
3022 | void OPPROTO op_efscmpeq (void) | |
3023 | { | |
3024 | do_efscmpeq(); | |
3025 | RETURN(); | |
3026 | } | |
3027 | ||
3028 | void OPPROTO op_efscfsi (void) | |
3029 | { | |
3030 | do_efscfsi(); | |
3031 | RETURN(); | |
3032 | } | |
3033 | ||
3034 | void OPPROTO op_efscfui (void) | |
3035 | { | |
3036 | do_efscfui(); | |
3037 | RETURN(); | |
3038 | } | |
3039 | ||
3040 | void OPPROTO op_efscfsf (void) | |
3041 | { | |
3042 | do_efscfsf(); | |
3043 | RETURN(); | |
3044 | } | |
3045 | ||
3046 | void OPPROTO op_efscfuf (void) | |
3047 | { | |
3048 | do_efscfuf(); | |
3049 | RETURN(); | |
3050 | } | |
3051 | ||
3052 | void OPPROTO op_efsctsi (void) | |
3053 | { | |
3054 | do_efsctsi(); | |
3055 | RETURN(); | |
3056 | } | |
3057 | ||
3058 | void OPPROTO op_efsctui (void) | |
3059 | { | |
3060 | do_efsctui(); | |
3061 | RETURN(); | |
3062 | } | |
3063 | ||
3064 | void OPPROTO op_efsctsf (void) | |
3065 | { | |
3066 | do_efsctsf(); | |
3067 | RETURN(); | |
3068 | } | |
3069 | ||
3070 | void OPPROTO op_efsctuf (void) | |
3071 | { | |
3072 | do_efsctuf(); | |
3073 | RETURN(); | |
3074 | } | |
3075 | ||
3076 | void OPPROTO op_efsctsiz (void) | |
3077 | { | |
3078 | do_efsctsiz(); | |
3079 | RETURN(); | |
3080 | } | |
3081 | ||
3082 | void OPPROTO op_efsctuiz (void) | |
3083 | { | |
3084 | do_efsctuiz(); | |
3085 | RETURN(); | |
3086 | } | |
3087 | ||
3088 | void OPPROTO op_efststlt (void) | |
3089 | { | |
3090 | T0 = _do_efststlt(T0_64, T1_64); | |
3091 | RETURN(); | |
3092 | } | |
3093 | ||
3094 | void OPPROTO op_efststgt (void) | |
3095 | { | |
3096 | T0 = _do_efststgt(T0_64, T1_64); | |
3097 | RETURN(); | |
3098 | } | |
3099 | ||
3100 | void OPPROTO op_efststeq (void) | |
3101 | { | |
3102 | T0 = _do_efststeq(T0_64, T1_64); | |
3103 | RETURN(); | |
3104 | } | |
3105 | ||
3106 | void OPPROTO op_efdsub (void) | |
3107 | { | |
3108 | union { | |
3109 | uint64_t u; | |
3110 | float64 f; | |
3111 | } u1, u2; | |
3112 | u1.u = T0_64; | |
3113 | u2.u = T1_64; | |
3114 | u1.f = float64_sub(u1.f, u2.f, &env->spe_status); | |
3115 | T0_64 = u1.u; | |
3116 | RETURN(); | |
3117 | } | |
3118 | ||
3119 | void OPPROTO op_efdadd (void) | |
3120 | { | |
3121 | union { | |
3122 | uint64_t u; | |
3123 | float64 f; | |
3124 | } u1, u2; | |
3125 | u1.u = T0_64; | |
3126 | u2.u = T1_64; | |
3127 | u1.f = float64_add(u1.f, u2.f, &env->spe_status); | |
3128 | T0_64 = u1.u; | |
3129 | RETURN(); | |
3130 | } | |
3131 | ||
3132 | void OPPROTO op_efdcfsid (void) | |
3133 | { | |
3134 | do_efdcfsi(); | |
3135 | RETURN(); | |
3136 | } | |
3137 | ||
3138 | void OPPROTO op_efdcfuid (void) | |
3139 | { | |
3140 | do_efdcfui(); | |
3141 | RETURN(); | |
3142 | } | |
3143 | ||
3144 | void OPPROTO op_efdnabs (void) | |
3145 | { | |
3146 | T0_64 |= 0x8000000000000000ULL; | |
3147 | RETURN(); | |
3148 | } | |
3149 | ||
3150 | void OPPROTO op_efdabs (void) | |
3151 | { | |
3152 | T0_64 &= ~0x8000000000000000ULL; | |
3153 | RETURN(); | |
3154 | } | |
3155 | ||
3156 | void OPPROTO op_efdneg (void) | |
3157 | { | |
3158 | T0_64 ^= 0x8000000000000000ULL; | |
3159 | RETURN(); | |
3160 | } | |
3161 | ||
3162 | void OPPROTO op_efddiv (void) | |
3163 | { | |
3164 | union { | |
3165 | uint64_t u; | |
3166 | float64 f; | |
3167 | } u1, u2; | |
3168 | u1.u = T0_64; | |
3169 | u2.u = T1_64; | |
3170 | u1.f = float64_div(u1.f, u2.f, &env->spe_status); | |
3171 | T0_64 = u1.u; | |
3172 | RETURN(); | |
3173 | } | |
3174 | ||
3175 | void OPPROTO op_efdmul (void) | |
3176 | { | |
3177 | union { | |
3178 | uint64_t u; | |
3179 | float64 f; | |
3180 | } u1, u2; | |
3181 | u1.u = T0_64; | |
3182 | u2.u = T1_64; | |
3183 | u1.f = float64_mul(u1.f, u2.f, &env->spe_status); | |
3184 | T0_64 = u1.u; | |
3185 | RETURN(); | |
3186 | } | |
3187 | ||
3188 | void OPPROTO op_efdctsidz (void) | |
3189 | { | |
3190 | do_efdctsiz(); | |
3191 | RETURN(); | |
3192 | } | |
3193 | ||
3194 | void OPPROTO op_efdctuidz (void) | |
3195 | { | |
3196 | do_efdctuiz(); | |
3197 | RETURN(); | |
3198 | } | |
3199 | ||
3200 | void OPPROTO op_efdcmplt (void) | |
3201 | { | |
3202 | do_efdcmplt(); | |
3203 | RETURN(); | |
3204 | } | |
3205 | ||
3206 | void OPPROTO op_efdcmpgt (void) | |
3207 | { | |
3208 | do_efdcmpgt(); | |
3209 | RETURN(); | |
3210 | } | |
3211 | ||
3212 | void OPPROTO op_efdcfs (void) | |
3213 | { | |
3214 | do_efdcfs(); | |
3215 | RETURN(); | |
3216 | } | |
3217 | ||
3218 | void OPPROTO op_efdcmpeq (void) | |
3219 | { | |
3220 | do_efdcmpeq(); | |
3221 | RETURN(); | |
3222 | } | |
3223 | ||
3224 | void OPPROTO op_efdcfsi (void) | |
3225 | { | |
3226 | do_efdcfsi(); | |
3227 | RETURN(); | |
3228 | } | |
3229 | ||
3230 | void OPPROTO op_efdcfui (void) | |
3231 | { | |
3232 | do_efdcfui(); | |
3233 | RETURN(); | |
3234 | } | |
3235 | ||
3236 | void OPPROTO op_efdcfsf (void) | |
3237 | { | |
3238 | do_efdcfsf(); | |
3239 | RETURN(); | |
3240 | } | |
3241 | ||
3242 | void OPPROTO op_efdcfuf (void) | |
3243 | { | |
3244 | do_efdcfuf(); | |
3245 | RETURN(); | |
3246 | } | |
3247 | ||
3248 | void OPPROTO op_efdctsi (void) | |
3249 | { | |
3250 | do_efdctsi(); | |
3251 | RETURN(); | |
3252 | } | |
3253 | ||
3254 | void OPPROTO op_efdctui (void) | |
3255 | { | |
3256 | do_efdctui(); | |
3257 | RETURN(); | |
3258 | } | |
3259 | ||
3260 | void OPPROTO op_efdctsf (void) | |
3261 | { | |
3262 | do_efdctsf(); | |
3263 | RETURN(); | |
3264 | } | |
3265 | ||
3266 | void OPPROTO op_efdctuf (void) | |
3267 | { | |
3268 | do_efdctuf(); | |
3269 | RETURN(); | |
3270 | } | |
3271 | ||
3272 | void OPPROTO op_efdctuiz (void) | |
3273 | { | |
3274 | do_efdctuiz(); | |
3275 | RETURN(); | |
3276 | } | |
3277 | ||
3278 | void OPPROTO op_efdctsiz (void) | |
3279 | { | |
3280 | do_efdctsiz(); | |
3281 | RETURN(); | |
3282 | } | |
3283 | ||
3284 | void OPPROTO op_efdtstlt (void) | |
3285 | { | |
3286 | T0 = _do_efdtstlt(T0_64, T1_64); | |
3287 | RETURN(); | |
3288 | } | |
3289 | ||
3290 | void OPPROTO op_efdtstgt (void) | |
3291 | { | |
3292 | T0 = _do_efdtstgt(T0_64, T1_64); | |
3293 | RETURN(); | |
3294 | } | |
3295 | ||
3296 | void OPPROTO op_efdtsteq (void) | |
3297 | { | |
3298 | T0 = _do_efdtsteq(T0_64, T1_64); | |
3299 | RETURN(); | |
3300 | } | |
35cdaad6 | 3301 | #endif /* defined(TARGET_PPCEMB) */ |