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Commit | Line | Data |
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29e4bcb2 AF |
1 | /* |
2 | * QEMU S/390 CPU | |
3 | * | |
1ac1a749 AF |
4 | * Copyright (c) 2009 Ulrich Hecht |
5 | * Copyright (c) 2011 Alexander Graf | |
29e4bcb2 | 6 | * Copyright (c) 2012 SUSE LINUX Products GmbH |
70bada03 | 7 | * Copyright (c) 2012 IBM Corp. |
29e4bcb2 AF |
8 | * |
9 | * This library is free software; you can redistribute it and/or | |
10 | * modify it under the terms of the GNU Lesser General Public | |
11 | * License as published by the Free Software Foundation; either | |
12 | * version 2.1 of the License, or (at your option) any later version. | |
13 | * | |
14 | * This library is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
17 | * Lesser General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU Lesser General Public | |
20 | * License along with this library; if not, see | |
21 | * <http://www.gnu.org/licenses/lgpl-2.1.html> | |
70bada03 JF |
22 | * Contributions after 2012-12-11 are licensed under the terms of the |
23 | * GNU GPL, version 2 or (at your option) any later version. | |
29e4bcb2 AF |
24 | */ |
25 | ||
9615495a | 26 | #include "qemu/osdep.h" |
da34e65c | 27 | #include "qapi/error.h" |
564b863d | 28 | #include "cpu.h" |
29e4bcb2 | 29 | #include "qemu-common.h" |
f348b6d1 | 30 | #include "qemu/cutils.h" |
1de7afc9 | 31 | #include "qemu/timer.h" |
eb24f7c6 | 32 | #include "qemu/error-report.h" |
70bada03 | 33 | #include "hw/hw.h" |
eb24f7c6 | 34 | #include "trace.h" |
96b1a8bb | 35 | #include "qapi/visitor.h" |
c7396bbb | 36 | #ifndef CONFIG_USER_ONLY |
904e5fd5 | 37 | #include "sysemu/arch_init.h" |
96b1a8bb | 38 | #include "sysemu/sysemu.h" |
a006b67f | 39 | #include "hw/s390x/sclp.h" |
904e5fd5 VM |
40 | #endif |
41 | ||
70bada03 JF |
42 | #define CR0_RESET 0xE0UL |
43 | #define CR14_RESET 0xC2000000UL; | |
44 | ||
904e5fd5 VM |
45 | /* generate CPU information for cpu -? */ |
46 | void s390_cpu_list(FILE *f, fprintf_function cpu_fprintf) | |
47 | { | |
48 | #ifdef CONFIG_KVM | |
49 | (*cpu_fprintf)(f, "s390 %16s\n", "host"); | |
50 | #endif | |
51 | } | |
29e4bcb2 | 52 | |
904e5fd5 VM |
53 | #ifndef CONFIG_USER_ONLY |
54 | CpuDefinitionInfoList *arch_query_cpu_definitions(Error **errp) | |
55 | { | |
56 | CpuDefinitionInfoList *entry; | |
57 | CpuDefinitionInfo *info; | |
58 | ||
59 | info = g_malloc0(sizeof(*info)); | |
60 | info->name = g_strdup("host"); | |
61 | ||
62 | entry = g_malloc0(sizeof(*entry)); | |
63 | entry->value = info; | |
64 | ||
65 | return entry; | |
66 | } | |
67 | #endif | |
29e4bcb2 | 68 | |
f45748f1 AF |
69 | static void s390_cpu_set_pc(CPUState *cs, vaddr value) |
70 | { | |
71 | S390CPU *cpu = S390_CPU(cs); | |
72 | ||
73 | cpu->env.psw.addr = value; | |
74 | } | |
75 | ||
8c2e1b00 AF |
76 | static bool s390_cpu_has_work(CPUState *cs) |
77 | { | |
78 | S390CPU *cpu = S390_CPU(cs); | |
79 | CPUS390XState *env = &cpu->env; | |
80 | ||
81 | return (cs->interrupt_request & CPU_INTERRUPT_HARD) && | |
82 | (env->psw.mask & PSW_MASK_EXT); | |
83 | } | |
84 | ||
29c6157c CB |
85 | #if !defined(CONFIG_USER_ONLY) |
86 | /* S390CPUClass::load_normal() */ | |
87 | static void s390_cpu_load_normal(CPUState *s) | |
88 | { | |
89 | S390CPU *cpu = S390_CPU(s); | |
fdfba1a2 | 90 | cpu->env.psw.addr = ldl_phys(s->as, 4) & PSW_MASK_ESA_ADDR; |
29c6157c | 91 | cpu->env.psw.mask = PSW_MASK_32 | PSW_MASK_64; |
eb24f7c6 | 92 | s390_cpu_set_state(CPU_STATE_OPERATING, cpu); |
29c6157c CB |
93 | } |
94 | #endif | |
95 | ||
f5ae2a4f | 96 | /* S390CPUClass::cpu_reset() */ |
29e4bcb2 AF |
97 | static void s390_cpu_reset(CPUState *s) |
98 | { | |
99 | S390CPU *cpu = S390_CPU(s); | |
100 | S390CPUClass *scc = S390_CPU_GET_CLASS(cpu); | |
101 | CPUS390XState *env = &cpu->env; | |
102 | ||
819bd309 | 103 | env->pfault_token = -1UL; |
f5ae2a4f | 104 | scc->parent_reset(s); |
18ff9494 | 105 | cpu->env.sigp_order = 0; |
eb24f7c6 | 106 | s390_cpu_set_state(CPU_STATE_STOPPED, cpu); |
00c8cb0a | 107 | tlb_flush(s, 1); |
f5ae2a4f CB |
108 | } |
109 | ||
110 | /* S390CPUClass::initial_reset() */ | |
111 | static void s390_cpu_initial_reset(CPUState *s) | |
112 | { | |
113 | S390CPU *cpu = S390_CPU(s); | |
114 | CPUS390XState *env = &cpu->env; | |
cc0d079d | 115 | int i; |
f5ae2a4f CB |
116 | |
117 | s390_cpu_reset(s); | |
118 | /* initial reset does not touch regs,fregs and aregs */ | |
f0c3c505 | 119 | memset(&env->fpc, 0, offsetof(CPUS390XState, cpu_num) - |
f5ae2a4f CB |
120 | offsetof(CPUS390XState, fpc)); |
121 | ||
122 | /* architectured initial values for CR 0 and 14 */ | |
123 | env->cregs[0] = CR0_RESET; | |
124 | env->cregs[14] = CR14_RESET; | |
819bd309 | 125 | |
3da0ab35 AJ |
126 | /* architectured initial value for Breaking-Event-Address register */ |
127 | env->gbea = 1; | |
128 | ||
819bd309 | 129 | env->pfault_token = -1UL; |
7107e5a7 | 130 | env->ext_index = -1; |
cc0d079d AJ |
131 | for (i = 0; i < ARRAY_SIZE(env->io_index); i++) { |
132 | env->io_index[i] = -1; | |
133 | } | |
49f5c9e9 | 134 | |
4a33565f AJ |
135 | /* tininess for underflow is detected before rounding */ |
136 | set_float_detect_tininess(float_tininess_before_rounding, | |
137 | &env->fpu_status); | |
138 | ||
49f5c9e9 TH |
139 | /* Reset state inside the kernel that we cannot access yet from QEMU. */ |
140 | if (kvm_enabled()) { | |
99607144 | 141 | kvm_s390_reset_vcpu(cpu); |
49f5c9e9 | 142 | } |
cbed0ba7 | 143 | tlb_flush(s, 1); |
f5ae2a4f CB |
144 | } |
145 | ||
146 | /* CPUClass:reset() */ | |
147 | static void s390_cpu_full_reset(CPUState *s) | |
148 | { | |
149 | S390CPU *cpu = S390_CPU(s); | |
150 | S390CPUClass *scc = S390_CPU_GET_CLASS(cpu); | |
151 | CPUS390XState *env = &cpu->env; | |
cc0d079d | 152 | int i; |
f5ae2a4f | 153 | |
29e4bcb2 | 154 | scc->parent_reset(s); |
18ff9494 | 155 | cpu->env.sigp_order = 0; |
eb24f7c6 | 156 | s390_cpu_set_state(CPU_STATE_STOPPED, cpu); |
29e4bcb2 | 157 | |
f0c3c505 | 158 | memset(env, 0, offsetof(CPUS390XState, cpu_num)); |
70bada03 JF |
159 | |
160 | /* architectured initial values for CR 0 and 14 */ | |
161 | env->cregs[0] = CR0_RESET; | |
162 | env->cregs[14] = CR14_RESET; | |
819bd309 | 163 | |
3da0ab35 AJ |
164 | /* architectured initial value for Breaking-Event-Address register */ |
165 | env->gbea = 1; | |
166 | ||
819bd309 | 167 | env->pfault_token = -1UL; |
7107e5a7 | 168 | env->ext_index = -1; |
cc0d079d AJ |
169 | for (i = 0; i < ARRAY_SIZE(env->io_index); i++) { |
170 | env->io_index[i] = -1; | |
171 | } | |
819bd309 | 172 | |
4a33565f AJ |
173 | /* tininess for underflow is detected before rounding */ |
174 | set_float_detect_tininess(float_tininess_before_rounding, | |
175 | &env->fpu_status); | |
176 | ||
99607144 | 177 | /* Reset state inside the kernel that we cannot access yet from QEMU. */ |
50a2c6e5 PB |
178 | if (kvm_enabled()) { |
179 | kvm_s390_reset_vcpu(cpu); | |
180 | } | |
00c8cb0a | 181 | tlb_flush(s, 1); |
29e4bcb2 AF |
182 | } |
183 | ||
70bada03 JF |
184 | #if !defined(CONFIG_USER_ONLY) |
185 | static void s390_cpu_machine_reset_cb(void *opaque) | |
186 | { | |
187 | S390CPU *cpu = opaque; | |
188 | ||
1fad8b3b | 189 | run_on_cpu(CPU(cpu), s390_do_cpu_full_reset, CPU(cpu)); |
70bada03 JF |
190 | } |
191 | #endif | |
192 | ||
dbad6b74 PC |
193 | static void s390_cpu_disas_set_info(CPUState *cpu, disassemble_info *info) |
194 | { | |
195 | info->mach = bfd_mach_s390_64; | |
196 | info->print_insn = print_insn_s390; | |
197 | } | |
198 | ||
1f136632 AF |
199 | static void s390_cpu_realizefn(DeviceState *dev, Error **errp) |
200 | { | |
14a10fc3 | 201 | CPUState *cs = CPU(dev); |
1f136632 | 202 | S390CPUClass *scc = S390_CPU_GET_CLASS(dev); |
c6644fc8 MR |
203 | S390CPU *cpu = S390_CPU(dev); |
204 | CPUS390XState *env = &cpu->env; | |
205 | Error *err = NULL; | |
206 | ||
96b1a8bb MR |
207 | #if !defined(CONFIG_USER_ONLY) |
208 | if (cpu->id >= max_cpus) { | |
209 | error_setg(&err, "Unable to add CPU: %" PRIi64 | |
210 | ", max allowed: %d", cpu->id, max_cpus - 1); | |
211 | goto out; | |
212 | } | |
213 | #endif | |
214 | if (cpu_exists(cpu->id)) { | |
215 | error_setg(&err, "Unable to add CPU: %" PRIi64 | |
216 | ", it already exists", cpu->id); | |
217 | goto out; | |
218 | } | |
219 | if (cpu->id != scc->next_cpu_id) { | |
220 | error_setg(&err, "Unable to add CPU: %" PRIi64 | |
221 | ", The next available id is %" PRIi64, cpu->id, | |
222 | scc->next_cpu_id); | |
223 | goto out; | |
224 | } | |
225 | ||
c6644fc8 MR |
226 | cpu_exec_init(cs, &err); |
227 | if (err != NULL) { | |
96b1a8bb | 228 | goto out; |
c6644fc8 | 229 | } |
96b1a8bb | 230 | scc->next_cpu_id++; |
1f136632 | 231 | |
c6644fc8 MR |
232 | #if !defined(CONFIG_USER_ONLY) |
233 | qemu_register_reset(s390_cpu_machine_reset_cb, cpu); | |
234 | #endif | |
96b1a8bb | 235 | env->cpu_num = cpu->id; |
73d510c9 | 236 | s390_cpu_gdb_init(cs); |
14a10fc3 | 237 | qemu_init_vcpu(cs); |
159855f0 DH |
238 | #if !defined(CONFIG_USER_ONLY) |
239 | run_on_cpu(cs, s390_do_cpu_full_reset, cs); | |
240 | #else | |
14a10fc3 | 241 | cpu_reset(cs); |
159855f0 | 242 | #endif |
1f136632 | 243 | |
96b1a8bb MR |
244 | scc->parent_realize(dev, &err); |
245 | ||
a006b67f MR |
246 | #if !defined(CONFIG_USER_ONLY) |
247 | if (dev->hotplugged) { | |
248 | raise_irq_cpu_hotplug(); | |
249 | } | |
250 | #endif | |
251 | ||
96b1a8bb MR |
252 | out: |
253 | error_propagate(errp, err); | |
254 | } | |
255 | ||
256 | static void s390x_cpu_get_id(Object *obj, Visitor *v, const char *name, | |
257 | void *opaque, Error **errp) | |
258 | { | |
259 | S390CPU *cpu = S390_CPU(obj); | |
260 | int64_t value = cpu->id; | |
261 | ||
262 | visit_type_int(v, name, &value, errp); | |
263 | } | |
264 | ||
265 | static void s390x_cpu_set_id(Object *obj, Visitor *v, const char *name, | |
266 | void *opaque, Error **errp) | |
267 | { | |
268 | S390CPU *cpu = S390_CPU(obj); | |
269 | DeviceState *dev = DEVICE(obj); | |
270 | const int64_t min = 0; | |
271 | const int64_t max = UINT32_MAX; | |
272 | Error *err = NULL; | |
273 | int64_t value; | |
274 | ||
275 | if (dev->realized) { | |
276 | error_setg(errp, "Attempt to set property '%s' on '%s' after " | |
277 | "it was realized", name, object_get_typename(obj)); | |
278 | return; | |
279 | } | |
280 | ||
281 | visit_type_int(v, name, &value, &err); | |
282 | if (err) { | |
283 | error_propagate(errp, err); | |
284 | return; | |
285 | } | |
286 | if (value < min || value > max) { | |
287 | error_setg(errp, "Property %s.%s doesn't take value %" PRId64 | |
288 | " (minimum: %" PRId64 ", maximum: %" PRId64 ")" , | |
289 | object_get_typename(obj), name, value, min, max); | |
290 | return; | |
291 | } | |
292 | cpu->id = value; | |
1f136632 AF |
293 | } |
294 | ||
8f22e0df AF |
295 | static void s390_cpu_initfn(Object *obj) |
296 | { | |
c05efcb1 | 297 | CPUState *cs = CPU(obj); |
8f22e0df AF |
298 | S390CPU *cpu = S390_CPU(obj); |
299 | CPUS390XState *env = &cpu->env; | |
2b7ac767 | 300 | static bool inited; |
8f22e0df AF |
301 | #if !defined(CONFIG_USER_ONLY) |
302 | struct tm tm; | |
303 | #endif | |
304 | ||
c05efcb1 | 305 | cs->env_ptr = env; |
ef3027af MR |
306 | cs->halted = 1; |
307 | cs->exception_index = EXCP_HLT; | |
96b1a8bb MR |
308 | object_property_add(OBJECT(cpu), "id", "int64_t", s390x_cpu_get_id, |
309 | s390x_cpu_set_id, NULL, NULL, NULL); | |
8f22e0df AF |
310 | #if !defined(CONFIG_USER_ONLY) |
311 | qemu_get_timedate(&tm, 0); | |
312 | env->tod_offset = TOD_UNIX_EPOCH + | |
313 | (time2tod(mktimegm(&tm)) * 1000000000ULL); | |
314 | env->tod_basetime = 0; | |
bc72ad67 AB |
315 | env->tod_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, s390x_tod_timer, cpu); |
316 | env->cpu_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, s390x_cpu_timer, cpu); | |
eb24f7c6 | 317 | s390_cpu_set_state(CPU_STATE_STOPPED, cpu); |
8f22e0df | 318 | #endif |
2b7ac767 AF |
319 | |
320 | if (tcg_enabled() && !inited) { | |
321 | inited = true; | |
322 | s390x_translate_init(); | |
323 | } | |
8f22e0df AF |
324 | } |
325 | ||
d5627ce8 AF |
326 | static void s390_cpu_finalize(Object *obj) |
327 | { | |
328 | #if !defined(CONFIG_USER_ONLY) | |
329 | S390CPU *cpu = S390_CPU(obj); | |
330 | ||
331 | qemu_unregister_reset(s390_cpu_machine_reset_cb, cpu); | |
3cda44f7 | 332 | g_free(cpu->irqstate); |
d5627ce8 AF |
333 | #endif |
334 | } | |
335 | ||
75973bfe | 336 | #if !defined(CONFIG_USER_ONLY) |
eb24f7c6 DH |
337 | static bool disabled_wait(CPUState *cpu) |
338 | { | |
339 | return cpu->halted && !(S390_CPU(cpu)->env.psw.mask & | |
340 | (PSW_MASK_IO | PSW_MASK_EXT | PSW_MASK_MCHECK)); | |
341 | } | |
342 | ||
75973bfe DH |
343 | static unsigned s390_count_running_cpus(void) |
344 | { | |
345 | CPUState *cpu; | |
346 | int nr_running = 0; | |
347 | ||
348 | CPU_FOREACH(cpu) { | |
349 | uint8_t state = S390_CPU(cpu)->env.cpu_state; | |
350 | if (state == CPU_STATE_OPERATING || | |
351 | state == CPU_STATE_LOAD) { | |
eb24f7c6 DH |
352 | if (!disabled_wait(cpu)) { |
353 | nr_running++; | |
354 | } | |
75973bfe DH |
355 | } |
356 | } | |
357 | ||
358 | return nr_running; | |
359 | } | |
360 | ||
eb24f7c6 | 361 | unsigned int s390_cpu_halt(S390CPU *cpu) |
75973bfe DH |
362 | { |
363 | CPUState *cs = CPU(cpu); | |
eb24f7c6 | 364 | trace_cpu_halt(cs->cpu_index); |
75973bfe | 365 | |
eb24f7c6 DH |
366 | if (!cs->halted) { |
367 | cs->halted = 1; | |
368 | cs->exception_index = EXCP_HLT; | |
75973bfe | 369 | } |
eb24f7c6 DH |
370 | |
371 | return s390_count_running_cpus(); | |
75973bfe DH |
372 | } |
373 | ||
eb24f7c6 | 374 | void s390_cpu_unhalt(S390CPU *cpu) |
75973bfe DH |
375 | { |
376 | CPUState *cs = CPU(cpu); | |
eb24f7c6 | 377 | trace_cpu_unhalt(cs->cpu_index); |
75973bfe | 378 | |
eb24f7c6 DH |
379 | if (cs->halted) { |
380 | cs->halted = 0; | |
381 | cs->exception_index = -1; | |
382 | } | |
383 | } | |
384 | ||
385 | unsigned int s390_cpu_set_state(uint8_t cpu_state, S390CPU *cpu) | |
386 | { | |
387 | trace_cpu_set_state(CPU(cpu)->cpu_index, cpu_state); | |
388 | ||
389 | switch (cpu_state) { | |
390 | case CPU_STATE_STOPPED: | |
391 | case CPU_STATE_CHECK_STOP: | |
392 | /* halt the cpu for common infrastructure */ | |
393 | s390_cpu_halt(cpu); | |
394 | break; | |
395 | case CPU_STATE_OPERATING: | |
396 | case CPU_STATE_LOAD: | |
397 | /* unhalt the cpu for common infrastructure */ | |
398 | s390_cpu_unhalt(cpu); | |
399 | break; | |
400 | default: | |
401 | error_report("Requested CPU state is not a valid S390 CPU state: %u", | |
402 | cpu_state); | |
403 | exit(1); | |
75973bfe | 404 | } |
c9e659c9 DH |
405 | if (kvm_enabled() && cpu->env.cpu_state != cpu_state) { |
406 | kvm_s390_set_cpu_state(cpu, cpu_state); | |
407 | } | |
eb24f7c6 | 408 | cpu->env.cpu_state = cpu_state; |
75973bfe DH |
409 | |
410 | return s390_count_running_cpus(); | |
411 | } | |
412 | #endif | |
413 | ||
b3820e6c DH |
414 | static gchar *s390_gdb_arch_name(CPUState *cs) |
415 | { | |
416 | return g_strdup("s390:64-bit"); | |
417 | } | |
418 | ||
29e4bcb2 AF |
419 | static void s390_cpu_class_init(ObjectClass *oc, void *data) |
420 | { | |
421 | S390CPUClass *scc = S390_CPU_CLASS(oc); | |
422 | CPUClass *cc = CPU_CLASS(scc); | |
c7396bbb | 423 | DeviceClass *dc = DEVICE_CLASS(oc); |
29e4bcb2 | 424 | |
c6644fc8 | 425 | scc->next_cpu_id = 0; |
1f136632 AF |
426 | scc->parent_realize = dc->realize; |
427 | dc->realize = s390_cpu_realizefn; | |
428 | ||
29e4bcb2 | 429 | scc->parent_reset = cc->reset; |
29c6157c CB |
430 | #if !defined(CONFIG_USER_ONLY) |
431 | scc->load_normal = s390_cpu_load_normal; | |
432 | #endif | |
f5ae2a4f CB |
433 | scc->cpu_reset = s390_cpu_reset; |
434 | scc->initial_cpu_reset = s390_cpu_initial_reset; | |
435 | cc->reset = s390_cpu_full_reset; | |
8c2e1b00 | 436 | cc->has_work = s390_cpu_has_work; |
97a8ea5a | 437 | cc->do_interrupt = s390_cpu_do_interrupt; |
878096ee | 438 | cc->dump_state = s390_cpu_dump_state; |
f45748f1 | 439 | cc->set_pc = s390_cpu_set_pc; |
5b50e790 AF |
440 | cc->gdb_read_register = s390_cpu_gdb_read_register; |
441 | cc->gdb_write_register = s390_cpu_gdb_write_register; | |
7510454e AF |
442 | #ifdef CONFIG_USER_ONLY |
443 | cc->handle_mmu_fault = s390_cpu_handle_mmu_fault; | |
444 | #else | |
00b941e5 | 445 | cc->get_phys_page_debug = s390_cpu_get_phys_page_debug; |
ef1df130 | 446 | cc->vmsd = &vmstate_s390_cpu; |
9b4f38e1 | 447 | cc->write_elf64_note = s390_cpu_write_elf64_note; |
02bb9bbf | 448 | cc->cpu_exec_interrupt = s390_cpu_exec_interrupt; |
311918b9 | 449 | cc->debug_excp_handler = s390x_cpu_debug_excp_handler; |
00b941e5 | 450 | #endif |
dbad6b74 PC |
451 | cc->disas_set_info = s390_cpu_disas_set_info; |
452 | ||
73d510c9 DH |
453 | cc->gdb_num_core_regs = S390_NUM_CORE_REGS; |
454 | cc->gdb_core_xml_file = "s390x-core64.xml"; | |
b3820e6c | 455 | cc->gdb_arch_name = s390_gdb_arch_name; |
4c315c27 MA |
456 | |
457 | /* | |
c6644fc8 | 458 | * Reason: s390_cpu_realizefn() calls cpu_exec_init(), which saves |
4c315c27 MA |
459 | * the object in cpus -> dangling pointer after final |
460 | * object_unref(). | |
461 | */ | |
462 | dc->cannot_destroy_with_object_finalize_yet = true; | |
29e4bcb2 AF |
463 | } |
464 | ||
465 | static const TypeInfo s390_cpu_type_info = { | |
466 | .name = TYPE_S390_CPU, | |
467 | .parent = TYPE_CPU, | |
468 | .instance_size = sizeof(S390CPU), | |
8f22e0df | 469 | .instance_init = s390_cpu_initfn, |
d5627ce8 | 470 | .instance_finalize = s390_cpu_finalize, |
29e4bcb2 AF |
471 | .abstract = false, |
472 | .class_size = sizeof(S390CPUClass), | |
473 | .class_init = s390_cpu_class_init, | |
474 | }; | |
475 | ||
476 | static void s390_cpu_register_types(void) | |
477 | { | |
478 | type_register_static(&s390_cpu_type_info); | |
479 | } | |
480 | ||
481 | type_init(s390_cpu_register_types) |