[mirror_qemu.git] / target-s390x / cpu.c

/*
 * QEMU S/390 CPU
 *
 * Copyright (c) 2009 Ulrich Hecht
 * Copyright (c) 2011 Alexander Graf
 * Copyright (c) 2012 SUSE LINUX Products GmbH
 * Copyright (c) 2012 IBM Corp.
 *
 * This library is free software; you can redistribute it and/or
 * modify it under the terms of the GNU Lesser General Public
 * License as published by the Free Software Foundation; either
 * version 2.1 of the License, or (at your option) any later version.
 *
 * This library is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
 * Lesser General Public License for more details.
 *
 * You should have received a copy of the GNU Lesser General Public
 * License along with this library; if not, see
 * <http://www.gnu.org/licenses/lgpl-2.1.html>
 * Contributions after 2012-12-11 are licensed under the terms of the
 * GNU GPL, version 2 or (at your option) any later version.
 */

#include "qemu/osdep.h"
#include "cpu.h"
#include "qemu-common.h"
#include "qemu/timer.h"
#include "qemu/error-report.h"
#include "hw/hw.h"
#include "trace.h"
#include "qapi/visitor.h"
#ifndef CONFIG_USER_ONLY
#include "sysemu/arch_init.h"
#include "sysemu/sysemu.h"
#include "hw/s390x/sclp.h"
#endif

#define CR0_RESET       0xE0UL
#define CR14_RESET      0xC2000000UL;

/* generate CPU information for cpu -? */
void s390_cpu_list(FILE *f, fprintf_function cpu_fprintf)
{
#ifdef CONFIG_KVM
    (*cpu_fprintf)(f, "s390 %16s\n", "host");
#endif
}

#ifndef CONFIG_USER_ONLY
CpuDefinitionInfoList *arch_query_cpu_definitions(Error **errp)
{
    CpuDefinitionInfoList *entry;
    CpuDefinitionInfo *info;

    info = g_malloc0(sizeof(*info));
    info->name = g_strdup("host");

    entry = g_malloc0(sizeof(*entry));
    entry->value = info;

    return entry;
}
#endif

static void s390_cpu_set_pc(CPUState *cs, vaddr value)
{
    S390CPU *cpu = S390_CPU(cs);

    cpu->env.psw.addr = value;
}

static bool s390_cpu_has_work(CPUState *cs)
{
    S390CPU *cpu = S390_CPU(cs);
    CPUS390XState *env = &cpu->env;

    return (cs->interrupt_request & CPU_INTERRUPT_HARD) &&
           (env->psw.mask & PSW_MASK_EXT);
}

#if !defined(CONFIG_USER_ONLY)
/* S390CPUClass::load_normal() */
static void s390_cpu_load_normal(CPUState *s)
{
    S390CPU *cpu = S390_CPU(s);
    cpu->env.psw.addr = ldl_phys(s->as, 4) & PSW_MASK_ESA_ADDR;
    cpu->env.psw.mask = PSW_MASK_32 | PSW_MASK_64;
    s390_cpu_set_state(CPU_STATE_OPERATING, cpu);
}
#endif

/* S390CPUClass::cpu_reset() */
static void s390_cpu_reset(CPUState *s)
{
    S390CPU *cpu = S390_CPU(s);
    S390CPUClass *scc = S390_CPU_GET_CLASS(cpu);
    CPUS390XState *env = &cpu->env;

    env->pfault_token = -1UL;
    scc->parent_reset(s);
    cpu->env.sigp_order = 0;
    s390_cpu_set_state(CPU_STATE_STOPPED, cpu);
    tlb_flush(s, 1);
}

/* S390CPUClass::initial_reset() */
static void s390_cpu_initial_reset(CPUState *s)
{
    S390CPU *cpu = S390_CPU(s);
    CPUS390XState *env = &cpu->env;
    int i;

    s390_cpu_reset(s);
    /* initial reset does not touch regs,fregs and aregs */
    memset(&env->fpc, 0, offsetof(CPUS390XState, cpu_num) -
                         offsetof(CPUS390XState, fpc));

    /* architectured initial values for CR 0 and 14 */
    env->cregs[0] = CR0_RESET;
    env->cregs[14] = CR14_RESET;

    /* architectured initial value for Breaking-Event-Address register */
    env->gbea = 1;

    env->pfault_token = -1UL;
    env->ext_index = -1;
    for (i = 0; i < ARRAY_SIZE(env->io_index); i++) {
        env->io_index[i] = -1;
    }

    /* tininess for underflow is detected before rounding */
    set_float_detect_tininess(float_tininess_before_rounding,
                              &env->fpu_status);

    /* Reset state inside the kernel that we cannot access yet from QEMU. */
    if (kvm_enabled()) {
        kvm_s390_reset_vcpu(cpu);
    }
    tlb_flush(s, 1);
}

/* CPUClass:reset() */
static void s390_cpu_full_reset(CPUState *s)
{
    S390CPU *cpu = S390_CPU(s);
    S390CPUClass *scc = S390_CPU_GET_CLASS(cpu);
    CPUS390XState *env = &cpu->env;
    int i;

    scc->parent_reset(s);
    cpu->env.sigp_order = 0;
    s390_cpu_set_state(CPU_STATE_STOPPED, cpu);

    memset(env, 0, offsetof(CPUS390XState, cpu_num));

    /* architectured initial values for CR 0 and 14 */
    env->cregs[0] = CR0_RESET;
    env->cregs[14] = CR14_RESET;

    /* architectured initial value for Breaking-Event-Address register */
    env->gbea = 1;

    env->pfault_token = -1UL;
    env->ext_index = -1;
    for (i = 0; i < ARRAY_SIZE(env->io_index); i++) {
        env->io_index[i] = -1;
    }

    /* tininess for underflow is detected before rounding */
    set_float_detect_tininess(float_tininess_before_rounding,
                              &env->fpu_status);

    /* Reset state inside the kernel that we cannot access yet from QEMU. */
    if (kvm_enabled()) {
        kvm_s390_reset_vcpu(cpu);
    }
    tlb_flush(s, 1);
}

#if !defined(CONFIG_USER_ONLY)
static void s390_cpu_machine_reset_cb(void *opaque)
{
    S390CPU *cpu = opaque;

    run_on_cpu(CPU(cpu), s390_do_cpu_full_reset, CPU(cpu));
}
#endif

static void s390_cpu_disas_set_info(CPUState *cpu, disassemble_info *info)
{
    info->mach = bfd_mach_s390_64;
    info->print_insn = print_insn_s390;
}

static void s390_cpu_realizefn(DeviceState *dev, Error **errp)
{
    CPUState *cs = CPU(dev);
    S390CPUClass *scc = S390_CPU_GET_CLASS(dev);
    S390CPU *cpu = S390_CPU(dev);
    CPUS390XState *env = &cpu->env;
    Error *err = NULL;

#if !defined(CONFIG_USER_ONLY)
    if (cpu->id >= max_cpus) {
        error_setg(&err, "Unable to add CPU: %" PRIi64
                   ", max allowed: %d", cpu->id, max_cpus - 1);
        goto out;
    }
#endif
    if (cpu_exists(cpu->id)) {
        error_setg(&err, "Unable to add CPU: %" PRIi64
                   ", it already exists", cpu->id);
        goto out;
    }
    if (cpu->id != scc->next_cpu_id) {
        error_setg(&err, "Unable to add CPU: %" PRIi64
                   ", The next available id is %" PRIi64, cpu->id,
                   scc->next_cpu_id);
        goto out;
    }

    cpu_exec_init(cs, &err);
    if (err != NULL) {
        goto out;
    }
    scc->next_cpu_id++;

#if !defined(CONFIG_USER_ONLY)
    qemu_register_reset(s390_cpu_machine_reset_cb, cpu);
#endif
    env->cpu_num = cpu->id;
    s390_cpu_gdb_init(cs);
    qemu_init_vcpu(cs);
#if !defined(CONFIG_USER_ONLY)
    run_on_cpu(cs, s390_do_cpu_full_reset, cs);
#else
    cpu_reset(cs);
#endif

    scc->parent_realize(dev, &err);

#if !defined(CONFIG_USER_ONLY)
    if (dev->hotplugged) {
        raise_irq_cpu_hotplug();
    }
#endif

out:
    error_propagate(errp, err);
}

static void s390x_cpu_get_id(Object *obj, Visitor *v, const char *name,
                             void *opaque, Error **errp)
{
    S390CPU *cpu = S390_CPU(obj);
    int64_t value = cpu->id;

    visit_type_int(v, name, &value, errp);
}

static void s390x_cpu_set_id(Object *obj, Visitor *v, const char *name,
                             void *opaque, Error **errp)
{
    S390CPU *cpu = S390_CPU(obj);
    DeviceState *dev = DEVICE(obj);
    const int64_t min = 0;
    const int64_t max = UINT32_MAX;
    Error *err = NULL;
    int64_t value;

    if (dev->realized) {
        error_setg(errp, "Attempt to set property '%s' on '%s' after "
                   "it was realized", name, object_get_typename(obj));
        return;
    }

    visit_type_int(v, name, &value, &err);
    if (err) {
        error_propagate(errp, err);
        return;
    }
    if (value < min || value > max) {
        error_setg(errp, "Property %s.%s doesn't take value %" PRId64
                   " (minimum: %" PRId64 ", maximum: %" PRId64 ")" ,
                   object_get_typename(obj), name, value, min, max);
        return;
    }
    cpu->id = value;
}

static void s390_cpu_initfn(Object *obj)
{
    CPUState *cs = CPU(obj);
    S390CPU *cpu = S390_CPU(obj);
    CPUS390XState *env = &cpu->env;
    static bool inited;
#if !defined(CONFIG_USER_ONLY)
    struct tm tm;
#endif

    cs->env_ptr = env;
    cs->halted = 1;
    cs->exception_index = EXCP_HLT;
    object_property_add(OBJECT(cpu), "id", "int64_t", s390x_cpu_get_id,
                        s390x_cpu_set_id, NULL, NULL, NULL);
#if !defined(CONFIG_USER_ONLY)
    qemu_get_timedate(&tm, 0);
    env->tod_offset = TOD_UNIX_EPOCH +
                      (time2tod(mktimegm(&tm)) * 1000000000ULL);
    env->tod_basetime = 0;
    env->tod_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, s390x_tod_timer, cpu);
    env->cpu_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, s390x_cpu_timer, cpu);
    s390_cpu_set_state(CPU_STATE_STOPPED, cpu);
#endif

    if (tcg_enabled() && !inited) {
        inited = true;
        s390x_translate_init();
    }
}

static void s390_cpu_finalize(Object *obj)
{
#if !defined(CONFIG_USER_ONLY)
    S390CPU *cpu = S390_CPU(obj);

    qemu_unregister_reset(s390_cpu_machine_reset_cb, cpu);
    g_free(cpu->irqstate);
#endif
}

#if !defined(CONFIG_USER_ONLY)
static bool disabled_wait(CPUState *cpu)
{
    return cpu->halted && !(S390_CPU(cpu)->env.psw.mask &
                            (PSW_MASK_IO | PSW_MASK_EXT | PSW_MASK_MCHECK));
}

static unsigned s390_count_running_cpus(void)
{
    CPUState *cpu;
    int nr_running = 0;

    CPU_FOREACH(cpu) {
        uint8_t state = S390_CPU(cpu)->env.cpu_state;
        if (state == CPU_STATE_OPERATING ||
            state == CPU_STATE_LOAD) {
            if (!disabled_wait(cpu)) {
                nr_running++;
            }
        }
    }

    return nr_running;
}

unsigned int s390_cpu_halt(S390CPU *cpu)
{
    CPUState *cs = CPU(cpu);
    trace_cpu_halt(cs->cpu_index);

    if (!cs->halted) {
        cs->halted = 1;
        cs->exception_index = EXCP_HLT;
    }

    return s390_count_running_cpus();
}

void s390_cpu_unhalt(S390CPU *cpu)
{
    CPUState *cs = CPU(cpu);
    trace_cpu_unhalt(cs->cpu_index);

    if (cs->halted) {
        cs->halted = 0;
        cs->exception_index = -1;
    }
}

unsigned int s390_cpu_set_state(uint8_t cpu_state, S390CPU *cpu)
 {
    trace_cpu_set_state(CPU(cpu)->cpu_index, cpu_state);

    switch (cpu_state) {
    case CPU_STATE_STOPPED:
    case CPU_STATE_CHECK_STOP:
        /* halt the cpu for common infrastructure */
        s390_cpu_halt(cpu);
        break;
    case CPU_STATE_OPERATING:
    case CPU_STATE_LOAD:
        /* unhalt the cpu for common infrastructure */
        s390_cpu_unhalt(cpu);
        break;
    default:
        error_report("Requested CPU state is not a valid S390 CPU state: %u",
                     cpu_state);
        exit(1);
    }
    if (kvm_enabled() && cpu->env.cpu_state != cpu_state) {
        kvm_s390_set_cpu_state(cpu, cpu_state);
    }
    cpu->env.cpu_state = cpu_state;

    return s390_count_running_cpus();
}
#endif

static gchar *s390_gdb_arch_name(CPUState *cs)
{
    return g_strdup("s390:64-bit");
}

static void s390_cpu_class_init(ObjectClass *oc, void *data)
{
    S390CPUClass *scc = S390_CPU_CLASS(oc);
    CPUClass *cc = CPU_CLASS(scc);
    DeviceClass *dc = DEVICE_CLASS(oc);

    scc->next_cpu_id = 0;
    scc->parent_realize = dc->realize;
    dc->realize = s390_cpu_realizefn;

    scc->parent_reset = cc->reset;
#if !defined(CONFIG_USER_ONLY)
    scc->load_normal = s390_cpu_load_normal;
#endif
    scc->cpu_reset = s390_cpu_reset;
    scc->initial_cpu_reset = s390_cpu_initial_reset;
    cc->reset = s390_cpu_full_reset;
    cc->has_work = s390_cpu_has_work;
    cc->do_interrupt = s390_cpu_do_interrupt;
    cc->dump_state = s390_cpu_dump_state;
    cc->set_pc = s390_cpu_set_pc;
    cc->gdb_read_register = s390_cpu_gdb_read_register;
    cc->gdb_write_register = s390_cpu_gdb_write_register;
#ifdef CONFIG_USER_ONLY
    cc->handle_mmu_fault = s390_cpu_handle_mmu_fault;
#else
    cc->get_phys_page_debug = s390_cpu_get_phys_page_debug;
    cc->vmsd = &vmstate_s390_cpu;
    cc->write_elf64_note = s390_cpu_write_elf64_note;
    cc->cpu_exec_interrupt = s390_cpu_exec_interrupt;
    cc->debug_excp_handler = s390x_cpu_debug_excp_handler;
#endif
    cc->disas_set_info = s390_cpu_disas_set_info;

    cc->gdb_num_core_regs = S390_NUM_CORE_REGS;
    cc->gdb_core_xml_file = "s390x-core64.xml";
    cc->gdb_arch_name = s390_gdb_arch_name;

    /*
     * Reason: s390_cpu_realizefn() calls cpu_exec_init(), which saves
     * the object in cpus -> dangling pointer after final
     * object_unref().
     */
    dc->cannot_destroy_with_object_finalize_yet = true;
}

static const TypeInfo s390_cpu_type_info = {
    .name = TYPE_S390_CPU,
    .parent = TYPE_CPU,
    .instance_size = sizeof(S390CPU),
    .instance_init = s390_cpu_initfn,
    .instance_finalize = s390_cpu_finalize,
    .abstract = false,
    .class_size = sizeof(S390CPUClass),
    .class_init = s390_cpu_class_init,
};

static void s390_cpu_register_types(void)
{
    type_register_static(&s390_cpu_type_info);
}

type_init(s390_cpu_register_types)
Commit	Line	Data
29e4bcb2 AF	1	/*
	2	* QEMU S/390 CPU
	3	*
1ac1a749 AF	4	* Copyright (c) 2009 Ulrich Hecht
1ac1a749 AF	5	* Copyright (c) 2011 Alexander Graf
29e4bcb2	6	* Copyright (c) 2012 SUSE LINUX Products GmbH
70bada03	7	* Copyright (c) 2012 IBM Corp.
29e4bcb2 AF	8	*
	9	* This library is free software; you can redistribute it and/or
	10	* modify it under the terms of the GNU Lesser General Public
	11	* License as published by the Free Software Foundation; either
	12	* version 2.1 of the License, or (at your option) any later version.
	13	*
	14	* This library is distributed in the hope that it will be useful,
	15	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	16	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
	17	* Lesser General Public License for more details.
	18	*
	19	* You should have received a copy of the GNU Lesser General Public
	20	* License along with this library; if not, see
	21	* <http://www.gnu.org/licenses/lgpl-2.1.html>
70bada03 JF	22	* Contributions after 2012-12-11 are licensed under the terms of the
70bada03 JF	23	* GNU GPL, version 2 or (at your option) any later version.
29e4bcb2 AF	24	*/
29e4bcb2 AF	25
9615495a	26	#include "qemu/osdep.h"
564b863d	27	#include "cpu.h"
29e4bcb2	28	#include "qemu-common.h"
1de7afc9	29	#include "qemu/timer.h"
eb24f7c6	30	#include "qemu/error-report.h"
70bada03	31	#include "hw/hw.h"
eb24f7c6	32	#include "trace.h"
96b1a8bb	33	#include "qapi/visitor.h"
c7396bbb	34	#ifndef CONFIG_USER_ONLY
904e5fd5	35	#include "sysemu/arch_init.h"
96b1a8bb	36	#include "sysemu/sysemu.h"
a006b67f	37	#include "hw/s390x/sclp.h"
904e5fd5 VM	38	#endif
904e5fd5 VM	39
70bada03 JF	40	#define CR0_RESET 0xE0UL
	41	#define CR14_RESET 0xC2000000UL;
	42
904e5fd5 VM	43	/* generate CPU information for cpu -? */
	44	void s390_cpu_list(FILE *f, fprintf_function cpu_fprintf)
	45	{
	46	#ifdef CONFIG_KVM
	47	(*cpu_fprintf)(f, "s390 %16s\n", "host");
	48	#endif
	49	}
29e4bcb2	50
904e5fd5 VM	51	#ifndef CONFIG_USER_ONLY
	52	CpuDefinitionInfoList arch_query_cpu_definitions(Error *errp)
	53	{
	54	CpuDefinitionInfoList *entry;
	55	CpuDefinitionInfo *info;
	56
	57	info = g_malloc0(sizeof(*info));
	58	info->name = g_strdup("host");
	59
	60	entry = g_malloc0(sizeof(*entry));
	61	entry->value = info;
	62
	63	return entry;
	64	}
	65	#endif
29e4bcb2	66
f45748f1 AF	67	static void s390_cpu_set_pc(CPUState *cs, vaddr value)
	68	{
	69	S390CPU *cpu = S390_CPU(cs);
	70
	71	cpu->env.psw.addr = value;
	72	}
	73
8c2e1b00 AF	74	static bool s390_cpu_has_work(CPUState *cs)
	75	{
	76	S390CPU *cpu = S390_CPU(cs);
	77	CPUS390XState *env = &cpu->env;
	78
	79	return (cs->interrupt_request & CPU_INTERRUPT_HARD) &&
	80	(env->psw.mask & PSW_MASK_EXT);
	81	}
	82
29c6157c CB	83	#if !defined(CONFIG_USER_ONLY)
	84	/* S390CPUClass::load_normal() */
	85	static void s390_cpu_load_normal(CPUState *s)
	86	{
	87	S390CPU *cpu = S390_CPU(s);
fdfba1a2	88	cpu->env.psw.addr = ldl_phys(s->as, 4) & PSW_MASK_ESA_ADDR;
29c6157c	89	cpu->env.psw.mask = PSW_MASK_32 \| PSW_MASK_64;
eb24f7c6	90	s390_cpu_set_state(CPU_STATE_OPERATING, cpu);
29c6157c CB	91	}
	92	#endif
	93
f5ae2a4f	94	/* S390CPUClass::cpu_reset() */
29e4bcb2 AF	95	static void s390_cpu_reset(CPUState *s)
	96	{
	97	S390CPU *cpu = S390_CPU(s);
	98	S390CPUClass *scc = S390_CPU_GET_CLASS(cpu);
	99	CPUS390XState *env = &cpu->env;
	100
819bd309	101	env->pfault_token = -1UL;
f5ae2a4f	102	scc->parent_reset(s);
18ff9494	103	cpu->env.sigp_order = 0;
eb24f7c6	104	s390_cpu_set_state(CPU_STATE_STOPPED, cpu);
00c8cb0a	105	tlb_flush(s, 1);
f5ae2a4f CB	106	}
	107
	108	/* S390CPUClass::initial_reset() */
	109	static void s390_cpu_initial_reset(CPUState *s)
	110	{
	111	S390CPU *cpu = S390_CPU(s);
	112	CPUS390XState *env = &cpu->env;
cc0d079d	113	int i;
f5ae2a4f CB	114
	115	s390_cpu_reset(s);
	116	/* initial reset does not touch regs,fregs and aregs */
f0c3c505	117	memset(&env->fpc, 0, offsetof(CPUS390XState, cpu_num) -
f5ae2a4f CB	118	offsetof(CPUS390XState, fpc));
	119
	120	/* architectured initial values for CR 0 and 14 */
	121	env->cregs[0] = CR0_RESET;
	122	env->cregs[14] = CR14_RESET;
819bd309	123
3da0ab35 AJ	124	/* architectured initial value for Breaking-Event-Address register */
	125	env->gbea = 1;
	126
819bd309	127	env->pfault_token = -1UL;
7107e5a7	128	env->ext_index = -1;
cc0d079d AJ	129	for (i = 0; i < ARRAY_SIZE(env->io_index); i++) {
	130	env->io_index[i] = -1;
	131	}
49f5c9e9	132
4a33565f AJ	133	/* tininess for underflow is detected before rounding */
	134	set_float_detect_tininess(float_tininess_before_rounding,
	135	&env->fpu_status);
	136
49f5c9e9 TH	137	/* Reset state inside the kernel that we cannot access yet from QEMU. */
49f5c9e9 TH	138	if (kvm_enabled()) {
99607144	139	kvm_s390_reset_vcpu(cpu);
49f5c9e9	140	}
cbed0ba7	141	tlb_flush(s, 1);
f5ae2a4f CB	142	}
	143
	144	/* CPUClass:reset() */
	145	static void s390_cpu_full_reset(CPUState *s)
	146	{
	147	S390CPU *cpu = S390_CPU(s);
	148	S390CPUClass *scc = S390_CPU_GET_CLASS(cpu);
	149	CPUS390XState *env = &cpu->env;
cc0d079d	150	int i;
f5ae2a4f	151
29e4bcb2	152	scc->parent_reset(s);
18ff9494	153	cpu->env.sigp_order = 0;
eb24f7c6	154	s390_cpu_set_state(CPU_STATE_STOPPED, cpu);
29e4bcb2	155
f0c3c505	156	memset(env, 0, offsetof(CPUS390XState, cpu_num));
70bada03 JF	157
	158	/* architectured initial values for CR 0 and 14 */
	159	env->cregs[0] = CR0_RESET;
	160	env->cregs[14] = CR14_RESET;
819bd309	161
3da0ab35 AJ	162	/* architectured initial value for Breaking-Event-Address register */
	163	env->gbea = 1;
	164
819bd309	165	env->pfault_token = -1UL;
7107e5a7	166	env->ext_index = -1;
cc0d079d AJ	167	for (i = 0; i < ARRAY_SIZE(env->io_index); i++) {
	168	env->io_index[i] = -1;
	169	}
819bd309	170
4a33565f AJ	171	/* tininess for underflow is detected before rounding */
	172	set_float_detect_tininess(float_tininess_before_rounding,
	173	&env->fpu_status);
	174
99607144	175	/* Reset state inside the kernel that we cannot access yet from QEMU. */
50a2c6e5 PB	176	if (kvm_enabled()) {
	177	kvm_s390_reset_vcpu(cpu);
	178	}
00c8cb0a	179	tlb_flush(s, 1);
29e4bcb2 AF	180	}
29e4bcb2 AF	181
70bada03 JF	182	#if !defined(CONFIG_USER_ONLY)
	183	static void s390_cpu_machine_reset_cb(void *opaque)
	184	{
	185	S390CPU *cpu = opaque;
	186
1fad8b3b	187	run_on_cpu(CPU(cpu), s390_do_cpu_full_reset, CPU(cpu));
70bada03 JF	188	}
	189	#endif
	190
dbad6b74 PC	191	static void s390_cpu_disas_set_info(CPUState cpu, disassemble_info info)
	192	{
	193	info->mach = bfd_mach_s390_64;
	194	info->print_insn = print_insn_s390;
	195	}
	196
1f136632 AF	197	static void s390_cpu_realizefn(DeviceState dev, Error *errp)
1f136632 AF	198	{
14a10fc3	199	CPUState *cs = CPU(dev);
1f136632	200	S390CPUClass *scc = S390_CPU_GET_CLASS(dev);
c6644fc8 MR	201	S390CPU *cpu = S390_CPU(dev);
	202	CPUS390XState *env = &cpu->env;
	203	Error *err = NULL;
	204
96b1a8bb MR	205	#if !defined(CONFIG_USER_ONLY)
	206	if (cpu->id >= max_cpus) {
	207	error_setg(&err, "Unable to add CPU: %" PRIi64
	208	", max allowed: %d", cpu->id, max_cpus - 1);
	209	goto out;
	210	}
	211	#endif
	212	if (cpu_exists(cpu->id)) {
	213	error_setg(&err, "Unable to add CPU: %" PRIi64
	214	", it already exists", cpu->id);
	215	goto out;
	216	}
	217	if (cpu->id != scc->next_cpu_id) {
	218	error_setg(&err, "Unable to add CPU: %" PRIi64
	219	", The next available id is %" PRIi64, cpu->id,
	220	scc->next_cpu_id);
	221	goto out;
	222	}
	223
c6644fc8 MR	224	cpu_exec_init(cs, &err);
c6644fc8 MR	225	if (err != NULL) {
96b1a8bb	226	goto out;
c6644fc8	227	}
96b1a8bb	228	scc->next_cpu_id++;
1f136632	229
c6644fc8 MR	230	#if !defined(CONFIG_USER_ONLY)
	231	qemu_register_reset(s390_cpu_machine_reset_cb, cpu);
	232	#endif
96b1a8bb	233	env->cpu_num = cpu->id;
73d510c9	234	s390_cpu_gdb_init(cs);
14a10fc3	235	qemu_init_vcpu(cs);
159855f0 DH	236	#if !defined(CONFIG_USER_ONLY)
	237	run_on_cpu(cs, s390_do_cpu_full_reset, cs);
	238	#else
14a10fc3	239	cpu_reset(cs);
159855f0	240	#endif
1f136632	241
96b1a8bb MR	242	scc->parent_realize(dev, &err);
96b1a8bb MR	243
a006b67f MR	244	#if !defined(CONFIG_USER_ONLY)
	245	if (dev->hotplugged) {
	246	raise_irq_cpu_hotplug();
	247	}
	248	#endif
	249
96b1a8bb MR	250	out:
	251	error_propagate(errp, err);
	252	}
	253
	254	static void s390x_cpu_get_id(Object obj, Visitor v, const char *name,
	255	void opaque, Error *errp)
	256	{
	257	S390CPU *cpu = S390_CPU(obj);
	258	int64_t value = cpu->id;
	259
	260	visit_type_int(v, name, &value, errp);
	261	}
	262
	263	static void s390x_cpu_set_id(Object obj, Visitor v, const char *name,
	264	void opaque, Error *errp)
	265	{
	266	S390CPU *cpu = S390_CPU(obj);
	267	DeviceState *dev = DEVICE(obj);
	268	const int64_t min = 0;
	269	const int64_t max = UINT32_MAX;
	270	Error *err = NULL;
	271	int64_t value;
	272
	273	if (dev->realized) {
	274	error_setg(errp, "Attempt to set property '%s' on '%s' after "
	275	"it was realized", name, object_get_typename(obj));
	276	return;
	277	}
	278
	279	visit_type_int(v, name, &value, &err);
	280	if (err) {
	281	error_propagate(errp, err);
	282	return;
	283	}
	284	if (value < min \|\| value > max) {
	285	error_setg(errp, "Property %s.%s doesn't take value %" PRId64
	286	" (minimum: %" PRId64 ", maximum: %" PRId64 ")" ,
	287	object_get_typename(obj), name, value, min, max);
	288	return;
	289	}
	290	cpu->id = value;
1f136632 AF	291	}
1f136632 AF	292
8f22e0df AF	293	static void s390_cpu_initfn(Object *obj)
8f22e0df AF	294	{
c05efcb1	295	CPUState *cs = CPU(obj);
8f22e0df AF	296	S390CPU *cpu = S390_CPU(obj);
8f22e0df AF	297	CPUS390XState *env = &cpu->env;
2b7ac767	298	static bool inited;
8f22e0df AF	299	#if !defined(CONFIG_USER_ONLY)
	300	struct tm tm;
	301	#endif
	302
c05efcb1	303	cs->env_ptr = env;
ef3027af MR	304	cs->halted = 1;
ef3027af MR	305	cs->exception_index = EXCP_HLT;
96b1a8bb MR	306	object_property_add(OBJECT(cpu), "id", "int64_t", s390x_cpu_get_id,
96b1a8bb MR	307	s390x_cpu_set_id, NULL, NULL, NULL);
8f22e0df AF	308	#if !defined(CONFIG_USER_ONLY)
	309	qemu_get_timedate(&tm, 0);
	310	env->tod_offset = TOD_UNIX_EPOCH +
	311	(time2tod(mktimegm(&tm)) * 1000000000ULL);
	312	env->tod_basetime = 0;
bc72ad67 AB	313	env->tod_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, s390x_tod_timer, cpu);
bc72ad67 AB	314	env->cpu_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, s390x_cpu_timer, cpu);
eb24f7c6	315	s390_cpu_set_state(CPU_STATE_STOPPED, cpu);
8f22e0df	316	#endif
2b7ac767 AF	317
	318	if (tcg_enabled() && !inited) {
	319	inited = true;
	320	s390x_translate_init();
	321	}
8f22e0df AF	322	}
8f22e0df AF	323
d5627ce8 AF	324	static void s390_cpu_finalize(Object *obj)
	325	{
	326	#if !defined(CONFIG_USER_ONLY)
	327	S390CPU *cpu = S390_CPU(obj);
	328
	329	qemu_unregister_reset(s390_cpu_machine_reset_cb, cpu);
3cda44f7	330	g_free(cpu->irqstate);
d5627ce8 AF	331	#endif
	332	}
	333
75973bfe	334	#if !defined(CONFIG_USER_ONLY)
eb24f7c6 DH	335	static bool disabled_wait(CPUState *cpu)
	336	{
	337	return cpu->halted && !(S390_CPU(cpu)->env.psw.mask &
	338	(PSW_MASK_IO \| PSW_MASK_EXT \| PSW_MASK_MCHECK));
	339	}
	340
75973bfe DH	341	static unsigned s390_count_running_cpus(void)
	342	{
	343	CPUState *cpu;
	344	int nr_running = 0;
	345
	346	CPU_FOREACH(cpu) {
	347	uint8_t state = S390_CPU(cpu)->env.cpu_state;
	348	if (state == CPU_STATE_OPERATING \|\|
	349	state == CPU_STATE_LOAD) {
eb24f7c6 DH	350	if (!disabled_wait(cpu)) {
	351	nr_running++;
	352	}
75973bfe DH	353	}
	354	}
	355
	356	return nr_running;
	357	}
	358
eb24f7c6	359	unsigned int s390_cpu_halt(S390CPU *cpu)
75973bfe DH	360	{
75973bfe DH	361	CPUState *cs = CPU(cpu);
eb24f7c6	362	trace_cpu_halt(cs->cpu_index);
75973bfe	363
eb24f7c6 DH	364	if (!cs->halted) {
	365	cs->halted = 1;
	366	cs->exception_index = EXCP_HLT;
75973bfe	367	}
eb24f7c6 DH	368
eb24f7c6 DH	369	return s390_count_running_cpus();
75973bfe DH	370	}
75973bfe DH	371
eb24f7c6	372	void s390_cpu_unhalt(S390CPU *cpu)
75973bfe DH	373	{
75973bfe DH	374	CPUState *cs = CPU(cpu);
eb24f7c6	375	trace_cpu_unhalt(cs->cpu_index);
75973bfe	376
eb24f7c6 DH	377	if (cs->halted) {
	378	cs->halted = 0;
	379	cs->exception_index = -1;
	380	}
	381	}
	382
	383	unsigned int s390_cpu_set_state(uint8_t cpu_state, S390CPU *cpu)
	384	{
	385	trace_cpu_set_state(CPU(cpu)->cpu_index, cpu_state);
	386
	387	switch (cpu_state) {
	388	case CPU_STATE_STOPPED:
	389	case CPU_STATE_CHECK_STOP:
	390	/* halt the cpu for common infrastructure */
	391	s390_cpu_halt(cpu);
	392	break;
	393	case CPU_STATE_OPERATING:
	394	case CPU_STATE_LOAD:
	395	/* unhalt the cpu for common infrastructure */
	396	s390_cpu_unhalt(cpu);
	397	break;
	398	default:
	399	error_report("Requested CPU state is not a valid S390 CPU state: %u",
	400	cpu_state);
	401	exit(1);
75973bfe	402	}
c9e659c9 DH	403	if (kvm_enabled() && cpu->env.cpu_state != cpu_state) {
	404	kvm_s390_set_cpu_state(cpu, cpu_state);
	405	}
eb24f7c6	406	cpu->env.cpu_state = cpu_state;
75973bfe DH	407
	408	return s390_count_running_cpus();
	409	}
	410	#endif
	411
b3820e6c DH	412	static gchar s390_gdb_arch_name(CPUState cs)
	413	{
	414	return g_strdup("s390:64-bit");
	415	}
	416
29e4bcb2 AF	417	static void s390_cpu_class_init(ObjectClass oc, void data)
	418	{
	419	S390CPUClass *scc = S390_CPU_CLASS(oc);
	420	CPUClass *cc = CPU_CLASS(scc);
c7396bbb	421	DeviceClass *dc = DEVICE_CLASS(oc);
29e4bcb2	422
c6644fc8	423	scc->next_cpu_id = 0;
1f136632 AF	424	scc->parent_realize = dc->realize;
	425	dc->realize = s390_cpu_realizefn;
	426
29e4bcb2	427	scc->parent_reset = cc->reset;
29c6157c CB	428	#if !defined(CONFIG_USER_ONLY)
	429	scc->load_normal = s390_cpu_load_normal;
	430	#endif
f5ae2a4f CB	431	scc->cpu_reset = s390_cpu_reset;
	432	scc->initial_cpu_reset = s390_cpu_initial_reset;
	433	cc->reset = s390_cpu_full_reset;
8c2e1b00	434	cc->has_work = s390_cpu_has_work;
97a8ea5a	435	cc->do_interrupt = s390_cpu_do_interrupt;
878096ee	436	cc->dump_state = s390_cpu_dump_state;
f45748f1	437	cc->set_pc = s390_cpu_set_pc;
5b50e790 AF	438	cc->gdb_read_register = s390_cpu_gdb_read_register;
5b50e790 AF	439	cc->gdb_write_register = s390_cpu_gdb_write_register;
7510454e AF	440	#ifdef CONFIG_USER_ONLY
	441	cc->handle_mmu_fault = s390_cpu_handle_mmu_fault;
	442	#else
00b941e5	443	cc->get_phys_page_debug = s390_cpu_get_phys_page_debug;
ef1df130	444	cc->vmsd = &vmstate_s390_cpu;
9b4f38e1	445	cc->write_elf64_note = s390_cpu_write_elf64_note;
02bb9bbf	446	cc->cpu_exec_interrupt = s390_cpu_exec_interrupt;
311918b9	447	cc->debug_excp_handler = s390x_cpu_debug_excp_handler;
00b941e5	448	#endif
dbad6b74 PC	449	cc->disas_set_info = s390_cpu_disas_set_info;
dbad6b74 PC	450
73d510c9 DH	451	cc->gdb_num_core_regs = S390_NUM_CORE_REGS;
73d510c9 DH	452	cc->gdb_core_xml_file = "s390x-core64.xml";
b3820e6c	453	cc->gdb_arch_name = s390_gdb_arch_name;
4c315c27 MA	454
4c315c27 MA	455	/*
c6644fc8	456	* Reason: s390_cpu_realizefn() calls cpu_exec_init(), which saves
4c315c27 MA	457	* the object in cpus -> dangling pointer after final
	458	* object_unref().
	459	*/
	460	dc->cannot_destroy_with_object_finalize_yet = true;
29e4bcb2 AF	461	}
	462
	463	static const TypeInfo s390_cpu_type_info = {
	464	.name = TYPE_S390_CPU,
	465	.parent = TYPE_CPU,
	466	.instance_size = sizeof(S390CPU),
8f22e0df	467	.instance_init = s390_cpu_initfn,
d5627ce8	468	.instance_finalize = s390_cpu_finalize,
29e4bcb2 AF	469	.abstract = false,
	470	.class_size = sizeof(S390CPUClass),
	471	.class_init = s390_cpu_class_init,
	472	};
	473
	474	static void s390_cpu_register_types(void)
	475	{
	476	type_register_static(&s390_cpu_type_info);
	477	}
	478
	479	type_init(s390_cpu_register_types)