]> git.proxmox.com Git - mirror_qemu.git/blame - target-s390x/cpu.c
qmp: Fix device-list-properties not to crash for abstract device
[mirror_qemu.git] / target-s390x / cpu.c
CommitLineData
29e4bcb2
AF
1/*
2 * QEMU S/390 CPU
3 *
1ac1a749
AF
4 * Copyright (c) 2009 Ulrich Hecht
5 * Copyright (c) 2011 Alexander Graf
29e4bcb2 6 * Copyright (c) 2012 SUSE LINUX Products GmbH
70bada03 7 * Copyright (c) 2012 IBM Corp.
29e4bcb2
AF
8 *
9 * This library is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU Lesser General Public
11 * License as published by the Free Software Foundation; either
12 * version 2.1 of the License, or (at your option) any later version.
13 *
14 * This library is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * Lesser General Public License for more details.
18 *
19 * You should have received a copy of the GNU Lesser General Public
20 * License along with this library; if not, see
21 * <http://www.gnu.org/licenses/lgpl-2.1.html>
70bada03
JF
22 * Contributions after 2012-12-11 are licensed under the terms of the
23 * GNU GPL, version 2 or (at your option) any later version.
29e4bcb2
AF
24 */
25
564b863d 26#include "cpu.h"
29e4bcb2 27#include "qemu-common.h"
1de7afc9 28#include "qemu/timer.h"
eb24f7c6 29#include "qemu/error-report.h"
70bada03 30#include "hw/hw.h"
eb24f7c6 31#include "trace.h"
c7396bbb 32#ifndef CONFIG_USER_ONLY
904e5fd5
VM
33#include "sysemu/arch_init.h"
34#endif
35
70bada03
JF
36#define CR0_RESET 0xE0UL
37#define CR14_RESET 0xC2000000UL;
38
904e5fd5
VM
39/* generate CPU information for cpu -? */
40void s390_cpu_list(FILE *f, fprintf_function cpu_fprintf)
41{
42#ifdef CONFIG_KVM
43 (*cpu_fprintf)(f, "s390 %16s\n", "host");
44#endif
45}
29e4bcb2 46
904e5fd5
VM
47#ifndef CONFIG_USER_ONLY
48CpuDefinitionInfoList *arch_query_cpu_definitions(Error **errp)
49{
50 CpuDefinitionInfoList *entry;
51 CpuDefinitionInfo *info;
52
53 info = g_malloc0(sizeof(*info));
54 info->name = g_strdup("host");
55
56 entry = g_malloc0(sizeof(*entry));
57 entry->value = info;
58
59 return entry;
60}
61#endif
29e4bcb2 62
f45748f1
AF
63static void s390_cpu_set_pc(CPUState *cs, vaddr value)
64{
65 S390CPU *cpu = S390_CPU(cs);
66
67 cpu->env.psw.addr = value;
68}
69
8c2e1b00
AF
70static bool s390_cpu_has_work(CPUState *cs)
71{
72 S390CPU *cpu = S390_CPU(cs);
73 CPUS390XState *env = &cpu->env;
74
75 return (cs->interrupt_request & CPU_INTERRUPT_HARD) &&
76 (env->psw.mask & PSW_MASK_EXT);
77}
78
29c6157c
CB
79#if !defined(CONFIG_USER_ONLY)
80/* S390CPUClass::load_normal() */
81static void s390_cpu_load_normal(CPUState *s)
82{
83 S390CPU *cpu = S390_CPU(s);
fdfba1a2 84 cpu->env.psw.addr = ldl_phys(s->as, 4) & PSW_MASK_ESA_ADDR;
29c6157c 85 cpu->env.psw.mask = PSW_MASK_32 | PSW_MASK_64;
eb24f7c6 86 s390_cpu_set_state(CPU_STATE_OPERATING, cpu);
29c6157c
CB
87}
88#endif
89
f5ae2a4f 90/* S390CPUClass::cpu_reset() */
29e4bcb2
AF
91static void s390_cpu_reset(CPUState *s)
92{
93 S390CPU *cpu = S390_CPU(s);
94 S390CPUClass *scc = S390_CPU_GET_CLASS(cpu);
95 CPUS390XState *env = &cpu->env;
96
819bd309 97 env->pfault_token = -1UL;
f5ae2a4f 98 scc->parent_reset(s);
18ff9494 99 cpu->env.sigp_order = 0;
eb24f7c6 100 s390_cpu_set_state(CPU_STATE_STOPPED, cpu);
00c8cb0a 101 tlb_flush(s, 1);
f5ae2a4f
CB
102}
103
104/* S390CPUClass::initial_reset() */
105static void s390_cpu_initial_reset(CPUState *s)
106{
107 S390CPU *cpu = S390_CPU(s);
108 CPUS390XState *env = &cpu->env;
cc0d079d 109 int i;
f5ae2a4f
CB
110
111 s390_cpu_reset(s);
112 /* initial reset does not touch regs,fregs and aregs */
f0c3c505 113 memset(&env->fpc, 0, offsetof(CPUS390XState, cpu_num) -
f5ae2a4f
CB
114 offsetof(CPUS390XState, fpc));
115
116 /* architectured initial values for CR 0 and 14 */
117 env->cregs[0] = CR0_RESET;
118 env->cregs[14] = CR14_RESET;
819bd309 119
3da0ab35
AJ
120 /* architectured initial value for Breaking-Event-Address register */
121 env->gbea = 1;
122
819bd309 123 env->pfault_token = -1UL;
7107e5a7 124 env->ext_index = -1;
cc0d079d
AJ
125 for (i = 0; i < ARRAY_SIZE(env->io_index); i++) {
126 env->io_index[i] = -1;
127 }
49f5c9e9 128
4a33565f
AJ
129 /* tininess for underflow is detected before rounding */
130 set_float_detect_tininess(float_tininess_before_rounding,
131 &env->fpu_status);
132
49f5c9e9
TH
133 /* Reset state inside the kernel that we cannot access yet from QEMU. */
134 if (kvm_enabled()) {
99607144 135 kvm_s390_reset_vcpu(cpu);
49f5c9e9 136 }
cbed0ba7 137 tlb_flush(s, 1);
f5ae2a4f
CB
138}
139
140/* CPUClass:reset() */
141static void s390_cpu_full_reset(CPUState *s)
142{
143 S390CPU *cpu = S390_CPU(s);
144 S390CPUClass *scc = S390_CPU_GET_CLASS(cpu);
145 CPUS390XState *env = &cpu->env;
cc0d079d 146 int i;
f5ae2a4f 147
29e4bcb2 148 scc->parent_reset(s);
18ff9494 149 cpu->env.sigp_order = 0;
eb24f7c6 150 s390_cpu_set_state(CPU_STATE_STOPPED, cpu);
29e4bcb2 151
f0c3c505 152 memset(env, 0, offsetof(CPUS390XState, cpu_num));
70bada03
JF
153
154 /* architectured initial values for CR 0 and 14 */
155 env->cregs[0] = CR0_RESET;
156 env->cregs[14] = CR14_RESET;
819bd309 157
3da0ab35
AJ
158 /* architectured initial value for Breaking-Event-Address register */
159 env->gbea = 1;
160
819bd309 161 env->pfault_token = -1UL;
7107e5a7 162 env->ext_index = -1;
cc0d079d
AJ
163 for (i = 0; i < ARRAY_SIZE(env->io_index); i++) {
164 env->io_index[i] = -1;
165 }
819bd309 166
4a33565f
AJ
167 /* tininess for underflow is detected before rounding */
168 set_float_detect_tininess(float_tininess_before_rounding,
169 &env->fpu_status);
170
99607144 171 /* Reset state inside the kernel that we cannot access yet from QEMU. */
50a2c6e5
PB
172 if (kvm_enabled()) {
173 kvm_s390_reset_vcpu(cpu);
174 }
00c8cb0a 175 tlb_flush(s, 1);
29e4bcb2
AF
176}
177
70bada03
JF
178#if !defined(CONFIG_USER_ONLY)
179static void s390_cpu_machine_reset_cb(void *opaque)
180{
181 S390CPU *cpu = opaque;
182
1fad8b3b 183 run_on_cpu(CPU(cpu), s390_do_cpu_full_reset, CPU(cpu));
70bada03
JF
184}
185#endif
186
1f136632
AF
187static void s390_cpu_realizefn(DeviceState *dev, Error **errp)
188{
14a10fc3 189 CPUState *cs = CPU(dev);
1f136632
AF
190 S390CPUClass *scc = S390_CPU_GET_CLASS(dev);
191
73d510c9 192 s390_cpu_gdb_init(cs);
14a10fc3 193 qemu_init_vcpu(cs);
159855f0
DH
194#if !defined(CONFIG_USER_ONLY)
195 run_on_cpu(cs, s390_do_cpu_full_reset, cs);
196#else
14a10fc3 197 cpu_reset(cs);
159855f0 198#endif
1f136632
AF
199
200 scc->parent_realize(dev, errp);
201}
202
8f22e0df
AF
203static void s390_cpu_initfn(Object *obj)
204{
c05efcb1 205 CPUState *cs = CPU(obj);
8f22e0df
AF
206 S390CPU *cpu = S390_CPU(obj);
207 CPUS390XState *env = &cpu->env;
2b7ac767 208 static bool inited;
8f22e0df
AF
209 static int cpu_num = 0;
210#if !defined(CONFIG_USER_ONLY)
211 struct tm tm;
212#endif
213
c05efcb1 214 cs->env_ptr = env;
4bad9e39 215 cpu_exec_init(cs, &error_abort);
8f22e0df 216#if !defined(CONFIG_USER_ONLY)
70bada03 217 qemu_register_reset(s390_cpu_machine_reset_cb, cpu);
8f22e0df
AF
218 qemu_get_timedate(&tm, 0);
219 env->tod_offset = TOD_UNIX_EPOCH +
220 (time2tod(mktimegm(&tm)) * 1000000000ULL);
221 env->tod_basetime = 0;
bc72ad67
AB
222 env->tod_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, s390x_tod_timer, cpu);
223 env->cpu_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, s390x_cpu_timer, cpu);
eb24f7c6 224 s390_cpu_set_state(CPU_STATE_STOPPED, cpu);
8f22e0df
AF
225#endif
226 env->cpu_num = cpu_num++;
2b7ac767
AF
227
228 if (tcg_enabled() && !inited) {
229 inited = true;
230 s390x_translate_init();
231 }
8f22e0df
AF
232}
233
d5627ce8
AF
234static void s390_cpu_finalize(Object *obj)
235{
236#if !defined(CONFIG_USER_ONLY)
237 S390CPU *cpu = S390_CPU(obj);
238
239 qemu_unregister_reset(s390_cpu_machine_reset_cb, cpu);
3cda44f7 240 g_free(cpu->irqstate);
d5627ce8
AF
241#endif
242}
243
75973bfe 244#if !defined(CONFIG_USER_ONLY)
eb24f7c6
DH
245static bool disabled_wait(CPUState *cpu)
246{
247 return cpu->halted && !(S390_CPU(cpu)->env.psw.mask &
248 (PSW_MASK_IO | PSW_MASK_EXT | PSW_MASK_MCHECK));
249}
250
75973bfe
DH
251static unsigned s390_count_running_cpus(void)
252{
253 CPUState *cpu;
254 int nr_running = 0;
255
256 CPU_FOREACH(cpu) {
257 uint8_t state = S390_CPU(cpu)->env.cpu_state;
258 if (state == CPU_STATE_OPERATING ||
259 state == CPU_STATE_LOAD) {
eb24f7c6
DH
260 if (!disabled_wait(cpu)) {
261 nr_running++;
262 }
75973bfe
DH
263 }
264 }
265
266 return nr_running;
267}
268
eb24f7c6 269unsigned int s390_cpu_halt(S390CPU *cpu)
75973bfe
DH
270{
271 CPUState *cs = CPU(cpu);
eb24f7c6 272 trace_cpu_halt(cs->cpu_index);
75973bfe 273
eb24f7c6
DH
274 if (!cs->halted) {
275 cs->halted = 1;
276 cs->exception_index = EXCP_HLT;
75973bfe 277 }
eb24f7c6
DH
278
279 return s390_count_running_cpus();
75973bfe
DH
280}
281
eb24f7c6 282void s390_cpu_unhalt(S390CPU *cpu)
75973bfe
DH
283{
284 CPUState *cs = CPU(cpu);
eb24f7c6 285 trace_cpu_unhalt(cs->cpu_index);
75973bfe 286
eb24f7c6
DH
287 if (cs->halted) {
288 cs->halted = 0;
289 cs->exception_index = -1;
290 }
291}
292
293unsigned int s390_cpu_set_state(uint8_t cpu_state, S390CPU *cpu)
294 {
295 trace_cpu_set_state(CPU(cpu)->cpu_index, cpu_state);
296
297 switch (cpu_state) {
298 case CPU_STATE_STOPPED:
299 case CPU_STATE_CHECK_STOP:
300 /* halt the cpu for common infrastructure */
301 s390_cpu_halt(cpu);
302 break;
303 case CPU_STATE_OPERATING:
304 case CPU_STATE_LOAD:
305 /* unhalt the cpu for common infrastructure */
306 s390_cpu_unhalt(cpu);
307 break;
308 default:
309 error_report("Requested CPU state is not a valid S390 CPU state: %u",
310 cpu_state);
311 exit(1);
75973bfe 312 }
c9e659c9
DH
313 if (kvm_enabled() && cpu->env.cpu_state != cpu_state) {
314 kvm_s390_set_cpu_state(cpu, cpu_state);
315 }
eb24f7c6 316 cpu->env.cpu_state = cpu_state;
75973bfe
DH
317
318 return s390_count_running_cpus();
319}
320#endif
321
29e4bcb2
AF
322static void s390_cpu_class_init(ObjectClass *oc, void *data)
323{
324 S390CPUClass *scc = S390_CPU_CLASS(oc);
325 CPUClass *cc = CPU_CLASS(scc);
c7396bbb 326 DeviceClass *dc = DEVICE_CLASS(oc);
29e4bcb2 327
1f136632
AF
328 scc->parent_realize = dc->realize;
329 dc->realize = s390_cpu_realizefn;
330
29e4bcb2 331 scc->parent_reset = cc->reset;
29c6157c
CB
332#if !defined(CONFIG_USER_ONLY)
333 scc->load_normal = s390_cpu_load_normal;
334#endif
f5ae2a4f
CB
335 scc->cpu_reset = s390_cpu_reset;
336 scc->initial_cpu_reset = s390_cpu_initial_reset;
337 cc->reset = s390_cpu_full_reset;
8c2e1b00 338 cc->has_work = s390_cpu_has_work;
97a8ea5a 339 cc->do_interrupt = s390_cpu_do_interrupt;
878096ee 340 cc->dump_state = s390_cpu_dump_state;
f45748f1 341 cc->set_pc = s390_cpu_set_pc;
5b50e790
AF
342 cc->gdb_read_register = s390_cpu_gdb_read_register;
343 cc->gdb_write_register = s390_cpu_gdb_write_register;
7510454e
AF
344#ifdef CONFIG_USER_ONLY
345 cc->handle_mmu_fault = s390_cpu_handle_mmu_fault;
346#else
00b941e5 347 cc->get_phys_page_debug = s390_cpu_get_phys_page_debug;
ef1df130 348 cc->vmsd = &vmstate_s390_cpu;
9b4f38e1
ET
349 cc->write_elf64_note = s390_cpu_write_elf64_note;
350 cc->write_elf64_qemunote = s390_cpu_write_elf64_qemunote;
02bb9bbf 351 cc->cpu_exec_interrupt = s390_cpu_exec_interrupt;
311918b9 352 cc->debug_excp_handler = s390x_cpu_debug_excp_handler;
00b941e5 353#endif
73d510c9
DH
354 cc->gdb_num_core_regs = S390_NUM_CORE_REGS;
355 cc->gdb_core_xml_file = "s390x-core64.xml";
29e4bcb2
AF
356}
357
358static const TypeInfo s390_cpu_type_info = {
359 .name = TYPE_S390_CPU,
360 .parent = TYPE_CPU,
361 .instance_size = sizeof(S390CPU),
8f22e0df 362 .instance_init = s390_cpu_initfn,
d5627ce8 363 .instance_finalize = s390_cpu_finalize,
29e4bcb2
AF
364 .abstract = false,
365 .class_size = sizeof(S390CPUClass),
366 .class_init = s390_cpu_class_init,
367};
368
369static void s390_cpu_register_types(void)
370{
371 type_register_static(&s390_cpu_type_info);
372}
373
374type_init(s390_cpu_register_types)