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c896fe29
FB		 1/*
2 * Tiny Code Generator for QEMU
3 *
4 * Copyright (c) 2008 Fabrice Bellard
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a copy
7 * of this software and associated documentation files (the "Software"), to deal
8 * in the Software without restriction, including without limitation the rights
9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10 * copies of the Software, and to permit persons to whom the Software is
11 * furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22 * THE SOFTWARE.
23 */
24
25/* define it to suppress various consistency checks (faster) */
26#define NDEBUG
27
28/* define it to use liveness analysis (better code) */
29#define USE_LIVENESS_ANALYSIS
30
31#include <assert.h>
32#include <stdarg.h>
33#include <stdlib.h>
34#include <stdio.h>
35#include <string.h>
36#include <inttypes.h>
3fe43da7
FB		 37#ifdef _WIN32
38#include <malloc.h>
39#endif
b29fe3ed 40#ifdef _AIX
41#include <alloca.h>
42#endif
c896fe29
FB		 43
44#include "config.h"
ca10f867 45#include "qemu-common.h"
c896fe29
FB		 46
47/* Note: the long term plan is to reduce the dependancies on the QEMU
48 CPU definitions. Currently they are used for qemu_ld/st
49 instructions */
50#define NO_CPU_IO_DEFS
51#include "cpu.h"
52#include "exec-all.h"
53
54#include "tcg-op.h"
55#include "elf.h"
56
57
58static void patch_reloc(uint8_t *code_ptr, int type,
f54b3f92 59 tcg_target_long value, tcg_target_long addend);
c896fe29
FB		 60
61TCGOpDef tcg_op_defs[] = {
62#define DEF(s, n, copy_size) { #s, 0, 0, n, n, 0, copy_size },
63#define DEF2(s, iargs, oargs, cargs, flags) { #s, iargs, oargs, cargs, iargs + oargs + cargs, flags, 0 },
64#include "tcg-opc.h"
65#undef DEF
66#undef DEF2
67};
68
b1d8e52e
BS		 69static TCGRegSet tcg_target_available_regs[2];
70static TCGRegSet tcg_target_call_clobber_regs;
c896fe29
FB		 71
72/* XXX: move that inside the context */
73uint16_t *gen_opc_ptr;
74TCGArg *gen_opparam_ptr;
75
76static inline void tcg_out8(TCGContext *s, uint8_t v)
77{
78 *s->code_ptr++ = v;
79}
80
81static inline void tcg_out16(TCGContext *s, uint16_t v)
82{
83 *(uint16_t *)s->code_ptr = v;
84 s->code_ptr += 2;
85}
86
87static inline void tcg_out32(TCGContext *s, uint32_t v)
88{
89 *(uint32_t *)s->code_ptr = v;
90 s->code_ptr += 4;
91}
92
93/* label relocation processing */
94
95void tcg_out_reloc(TCGContext *s, uint8_t *code_ptr, int type,
96 int label_index, long addend)
97{
98 TCGLabel *l;
99 TCGRelocation *r;
100
101 l = &s->labels[label_index];
102 if (l->has_value) {
623e265c
PB		 103 /* FIXME: This may break relocations on RISC targets that
104 modify instruction fields in place. The caller may not have
105 written the initial value. */
f54b3f92 106 patch_reloc(code_ptr, type, l->u.value, addend);
c896fe29
FB		 107 } else {
108 /* add a new relocation entry */
109 r = tcg_malloc(sizeof(TCGRelocation));
110 r->type = type;
111 r->ptr = code_ptr;
112 r->addend = addend;
113 r->next = l->u.first_reloc;
114 l->u.first_reloc = r;
115 }
116}
117
118static void tcg_out_label(TCGContext *s, int label_index,
119 tcg_target_long value)
120{
121 TCGLabel *l;
122 TCGRelocation *r;
123
124 l = &s->labels[label_index];
125 if (l->has_value)
126 tcg_abort();
127 r = l->u.first_reloc;
128 while (r != NULL) {
f54b3f92 129 patch_reloc(r->ptr, r->type, value, r->addend);
c896fe29
FB		 130 r = r->next;
131 }
132 l->has_value = 1;
133 l->u.value = value;
134}
135
136int gen_new_label(void)
137{
138 TCGContext *s = &tcg_ctx;
139 int idx;
140 TCGLabel *l;
141
142 if (s->nb_labels >= TCG_MAX_LABELS)
143 tcg_abort();
144 idx = s->nb_labels++;
145 l = &s->labels[idx];
146 l->has_value = 0;
147 l->u.first_reloc = NULL;
148 return idx;
149}
150
151#include "tcg-target.c"
152
c896fe29
FB		 153/* pool based memory allocation */
154void *tcg_malloc_internal(TCGContext *s, int size)
155{
156 TCGPool *p;
157 int pool_size;
158
159 if (size > TCG_POOL_CHUNK_SIZE) {
160 /* big malloc: insert a new pool (XXX: could optimize) */
161 p = qemu_malloc(sizeof(TCGPool) + size);
162 p->size = size;
163 if (s->pool_current)
164 s->pool_current->next = p;
165 else
166 s->pool_first = p;
167 p->next = s->pool_current;
168 } else {
169 p = s->pool_current;
170 if (!p) {
171 p = s->pool_first;
172 if (!p)
173 goto new_pool;
174 } else {
175 if (!p->next) {
176 new_pool:
177 pool_size = TCG_POOL_CHUNK_SIZE;
178 p = qemu_malloc(sizeof(TCGPool) + pool_size);
179 p->size = pool_size;
180 p->next = NULL;
181 if (s->pool_current)
182 s->pool_current->next = p;
183 else
184 s->pool_first = p;
185 } else {
186 p = p->next;
187 }
188 }
189 }
190 s->pool_current = p;
191 s->pool_cur = p->data + size;
192 s->pool_end = p->data + p->size;
193 return p->data;
194}
195
196void tcg_pool_reset(TCGContext *s)
197{
198 s->pool_cur = s->pool_end = NULL;
199 s->pool_current = NULL;
200}
201
c896fe29
FB		 202void tcg_context_init(TCGContext *s)
203{
204 int op, total_args, n;
205 TCGOpDef *def;
206 TCGArgConstraint *args_ct;
207 int *sorted_args;
208
209 memset(s, 0, sizeof(*s));
210 s->temps = s->static_temps;
211 s->nb_globals = 0;
212
213 /* Count total number of arguments and allocate the corresponding
214 space */
215 total_args = 0;
216 for(op = 0; op < NB_OPS; op++) {
217 def = &tcg_op_defs[op];
218 n = def->nb_iargs + def->nb_oargs;
219 total_args += n;
220 }
221
222 args_ct = qemu_malloc(sizeof(TCGArgConstraint) * total_args);
223 sorted_args = qemu_malloc(sizeof(int) * total_args);
224
225 for(op = 0; op < NB_OPS; op++) {
226 def = &tcg_op_defs[op];
227 def->args_ct = args_ct;
228 def->sorted_args = sorted_args;
229 n = def->nb_iargs + def->nb_oargs;
230 sorted_args += n;
231 args_ct += n;
232 }
233
234 tcg_target_init(s);
b03cce8e
FB		 235
236 /* init global prologue and epilogue */
237 s->code_buf = code_gen_prologue;
238 s->code_ptr = s->code_buf;
239 tcg_target_qemu_prologue(s);
240 flush_icache_range((unsigned long)s->code_buf,
241 (unsigned long)s->code_ptr);
c896fe29
FB		 242}
243
244void tcg_set_frame(TCGContext *s, int reg,
245 tcg_target_long start, tcg_target_long size)
246{
247 s->frame_start = start;
248 s->frame_end = start + size;
249 s->frame_reg = reg;
250}
251
c896fe29
FB		 252void tcg_func_start(TCGContext *s)
253{
e8996ee0 254 int i;
c896fe29
FB		 255 tcg_pool_reset(s);
256 s->nb_temps = s->nb_globals;
641d5fbe 257 for(i = 0; i < (TCG_TYPE_COUNT * 2); i++)
e8996ee0 258 s->first_free_temp[i] = -1;
c896fe29
FB		 259 s->labels = tcg_malloc(sizeof(TCGLabel) * TCG_MAX_LABELS);
260 s->nb_labels = 0;
261 s->current_frame_offset = s->frame_start;
262
263 gen_opc_ptr = gen_opc_buf;
264 gen_opparam_ptr = gen_opparam_buf;
265}
266
267static inline void tcg_temp_alloc(TCGContext *s, int n)
268{
269 if (n > TCG_MAX_TEMPS)
270 tcg_abort();
271}
272
a7812ae4
PB		 273static inline int tcg_global_reg_new_internal(TCGType type, int reg,
274 const char *name)
c896fe29
FB		 275{
276 TCGContext *s = &tcg_ctx;
277 TCGTemp *ts;
278 int idx;
279
280#if TCG_TARGET_REG_BITS == 32
281 if (type != TCG_TYPE_I32)
282 tcg_abort();
283#endif
284 if (tcg_regset_test_reg(s->reserved_regs, reg))
285 tcg_abort();
286 idx = s->nb_globals;
287 tcg_temp_alloc(s, s->nb_globals + 1);
288 ts = &s->temps[s->nb_globals];
289 ts->base_type = type;
290 ts->type = type;
291 ts->fixed_reg = 1;
292 ts->reg = reg;
c896fe29
FB		 293 ts->name = name;
294 s->nb_globals++;
295 tcg_regset_set_reg(s->reserved_regs, reg);
a7812ae4
PB		 296 return idx;
297}
298
299TCGv_i32 tcg_global_reg_new_i32(int reg, const char *name)
300{
301 int idx;
302
303 idx = tcg_global_reg_new_internal(TCG_TYPE_I32, reg, name);
304 return MAKE_TCGV_I32(idx);
305}
306
307TCGv_i64 tcg_global_reg_new_i64(int reg, const char *name)
308{
309 int idx;
310
311 idx = tcg_global_reg_new_internal(TCG_TYPE_I64, reg, name);
312 return MAKE_TCGV_I64(idx);
c896fe29
FB		 313}
314
6a8d7b76
FB		 315#if TCG_TARGET_REG_BITS == 32
316/* temporary hack to avoid register shortage for tcg_qemu_st64() */
a7812ae4
PB		 317TCGv_i64 tcg_global_reg2_new_hack(TCGType type, int reg1, int reg2,
318 const char *name)
6a8d7b76
FB		 319{
320 TCGContext *s = &tcg_ctx;
321 TCGTemp *ts;
322 int idx;
323 char buf[64];
324
325 if (type != TCG_TYPE_I64)
326 tcg_abort();
327 idx = s->nb_globals;
328 tcg_temp_alloc(s, s->nb_globals + 2);
329 ts = &s->temps[s->nb_globals];
330 ts->base_type = type;
331 ts->type = TCG_TYPE_I32;
332 ts->fixed_reg = 1;
333 ts->reg = reg1;
6a8d7b76
FB		 334 pstrcpy(buf, sizeof(buf), name);
335 pstrcat(buf, sizeof(buf), "_0");
336 ts->name = strdup(buf);
337
338 ts++;
339 ts->base_type = type;
340 ts->type = TCG_TYPE_I32;
341 ts->fixed_reg = 1;
342 ts->reg = reg2;
6a8d7b76
FB		 343 pstrcpy(buf, sizeof(buf), name);
344 pstrcat(buf, sizeof(buf), "_1");
345 ts->name = strdup(buf);
346
347 s->nb_globals += 2;
a7812ae4 348 return MAKE_TCGV_I64(idx);
6a8d7b76
FB		 349}
350#endif
351
a7812ae4
PB		 352static inline int tcg_global_mem_new_internal(TCGType type, int reg,
353 tcg_target_long offset,
354 const char *name)
c896fe29
FB		 355{
356 TCGContext *s = &tcg_ctx;
357 TCGTemp *ts;
358 int idx;
359
360 idx = s->nb_globals;
361#if TCG_TARGET_REG_BITS == 32
362 if (type == TCG_TYPE_I64) {
363 char buf[64];
c588979b 364 tcg_temp_alloc(s, s->nb_globals + 2);
c896fe29
FB		 365 ts = &s->temps[s->nb_globals];
366 ts->base_type = type;
367 ts->type = TCG_TYPE_I32;
368 ts->fixed_reg = 0;
369 ts->mem_allocated = 1;
370 ts->mem_reg = reg;
371#ifdef TCG_TARGET_WORDS_BIGENDIAN
372 ts->mem_offset = offset + 4;
373#else
374 ts->mem_offset = offset;
375#endif
c896fe29
FB		 376 pstrcpy(buf, sizeof(buf), name);
377 pstrcat(buf, sizeof(buf), "_0");
378 ts->name = strdup(buf);
379 ts++;
380
381 ts->base_type = type;
382 ts->type = TCG_TYPE_I32;
383 ts->fixed_reg = 0;
384 ts->mem_allocated = 1;
385 ts->mem_reg = reg;
386#ifdef TCG_TARGET_WORDS_BIGENDIAN
387 ts->mem_offset = offset;
388#else
389 ts->mem_offset = offset + 4;
390#endif
c896fe29
FB		 391 pstrcpy(buf, sizeof(buf), name);
392 pstrcat(buf, sizeof(buf), "_1");
393 ts->name = strdup(buf);
394
395 s->nb_globals += 2;
396 } else
397#endif
398 {
399 tcg_temp_alloc(s, s->nb_globals + 1);
400 ts = &s->temps[s->nb_globals];
401 ts->base_type = type;
402 ts->type = type;
403 ts->fixed_reg = 0;
404 ts->mem_allocated = 1;
405 ts->mem_reg = reg;
406 ts->mem_offset = offset;
c896fe29
FB		 407 ts->name = name;
408 s->nb_globals++;
409 }
a7812ae4
PB		 410 return idx;
411}
412
413TCGv_i32 tcg_global_mem_new_i32(int reg, tcg_target_long offset,
414 const char *name)
415{
416 int idx;
417
418 idx = tcg_global_mem_new_internal(TCG_TYPE_I32, reg, offset, name);
419 return MAKE_TCGV_I32(idx);
420}
421
422TCGv_i64 tcg_global_mem_new_i64(int reg, tcg_target_long offset,
423 const char *name)
424{
425 int idx;
426
427 idx = tcg_global_mem_new_internal(TCG_TYPE_I64, reg, offset, name);
428 return MAKE_TCGV_I64(idx);
c896fe29
FB		 429}
430
a7812ae4 431static inline int tcg_temp_new_internal(TCGType type, int temp_local)
c896fe29
FB		 432{
433 TCGContext *s = &tcg_ctx;
434 TCGTemp *ts;
641d5fbe 435 int idx, k;
c896fe29 436
641d5fbe
FB		 437 k = type;
438 if (temp_local)
439 k += TCG_TYPE_COUNT;
440 idx = s->first_free_temp[k];
e8996ee0
FB		 441 if (idx != -1) {
442 /* There is already an available temp with the
443 right type */
444 ts = &s->temps[idx];
641d5fbe 445 s->first_free_temp[k] = ts->next_free_temp;
e8996ee0 446 ts->temp_allocated = 1;
641d5fbe 447 assert(ts->temp_local == temp_local);
e8996ee0
FB		 448 } else {
449 idx = s->nb_temps;
c896fe29 450#if TCG_TARGET_REG_BITS == 32
e8996ee0 451 if (type == TCG_TYPE_I64) {
8df1ca4b 452 tcg_temp_alloc(s, s->nb_temps + 2);
e8996ee0
FB		 453 ts = &s->temps[s->nb_temps];
454 ts->base_type = type;
455 ts->type = TCG_TYPE_I32;
456 ts->temp_allocated = 1;
641d5fbe 457 ts->temp_local = temp_local;
e8996ee0
FB		 458 ts->name = NULL;
459 ts++;
460 ts->base_type = TCG_TYPE_I32;
461 ts->type = TCG_TYPE_I32;
462 ts->temp_allocated = 1;
641d5fbe 463 ts->temp_local = temp_local;
e8996ee0
FB		 464 ts->name = NULL;
465 s->nb_temps += 2;
466 } else
c896fe29 467#endif
e8996ee0
FB		 468 {
469 tcg_temp_alloc(s, s->nb_temps + 1);
470 ts = &s->temps[s->nb_temps];
471 ts->base_type = type;
472 ts->type = type;
473 ts->temp_allocated = 1;
641d5fbe 474 ts->temp_local = temp_local;
e8996ee0
FB		 475 ts->name = NULL;
476 s->nb_temps++;
477 }
c896fe29 478 }
a7812ae4 479 return idx;
c896fe29
FB		 480}
481
a7812ae4
PB		 482TCGv_i32 tcg_temp_new_internal_i32(int temp_local)
483{
484 int idx;
485
486 idx = tcg_temp_new_internal(TCG_TYPE_I32, temp_local);
487 return MAKE_TCGV_I32(idx);
488}
489
490TCGv_i64 tcg_temp_new_internal_i64(int temp_local)
491{
492 int idx;
493
494 idx = tcg_temp_new_internal(TCG_TYPE_I64, temp_local);
495 return MAKE_TCGV_I64(idx);
496}
497
498static inline void tcg_temp_free_internal(int idx)
c896fe29
FB		 499{
500 TCGContext *s = &tcg_ctx;
501 TCGTemp *ts;
641d5fbe 502 int k;
c896fe29 503
e8996ee0 504 assert(idx >= s->nb_globals && idx < s->nb_temps);
c896fe29 505 ts = &s->temps[idx];
e8996ee0
FB		 506 assert(ts->temp_allocated != 0);
507 ts->temp_allocated = 0;
641d5fbe
FB		 508 k = ts->base_type;
509 if (ts->temp_local)
510 k += TCG_TYPE_COUNT;
511 ts->next_free_temp = s->first_free_temp[k];
512 s->first_free_temp[k] = idx;
c896fe29
FB		 513}
514
a7812ae4
PB		 515void tcg_temp_free_i32(TCGv_i32 arg)
516{
517 tcg_temp_free_internal(GET_TCGV_I32(arg));
518}
519
520void tcg_temp_free_i64(TCGv_i64 arg)
521{
522 tcg_temp_free_internal(GET_TCGV_I64(arg));
523}
e8996ee0 524
a7812ae4 525TCGv_i32 tcg_const_i32(int32_t val)
c896fe29 526{
a7812ae4
PB		 527 TCGv_i32 t0;
528 t0 = tcg_temp_new_i32();
e8996ee0
FB		 529 tcg_gen_movi_i32(t0, val);
530 return t0;
531}
c896fe29 532
a7812ae4 533TCGv_i64 tcg_const_i64(int64_t val)
e8996ee0 534{
a7812ae4
PB		 535 TCGv_i64 t0;
536 t0 = tcg_temp_new_i64();
e8996ee0
FB		 537 tcg_gen_movi_i64(t0, val);
538 return t0;
c896fe29
FB		 539}
540
a7812ae4 541TCGv_i32 tcg_const_local_i32(int32_t val)
bdffd4a9 542{
a7812ae4
PB		 543 TCGv_i32 t0;
544 t0 = tcg_temp_local_new_i32();
bdffd4a9
AJ		 545 tcg_gen_movi_i32(t0, val);
546 return t0;
547}
548
a7812ae4 549TCGv_i64 tcg_const_local_i64(int64_t val)
bdffd4a9 550{
a7812ae4
PB		 551 TCGv_i64 t0;
552 t0 = tcg_temp_local_new_i64();
bdffd4a9
AJ		 553 tcg_gen_movi_i64(t0, val);
554 return t0;
555}
556
c896fe29
FB		 557void tcg_register_helper(void *func, const char *name)
558{
559 TCGContext *s = &tcg_ctx;
560 int n;
561 if ((s->nb_helpers + 1) > s->allocated_helpers) {
562 n = s->allocated_helpers;
563 if (n == 0) {
564 n = 4;
565 } else {
566 n *= 2;
567 }
568 s->helpers = realloc(s->helpers, n * sizeof(TCGHelperInfo));
569 s->allocated_helpers = n;
570 }
4dc81f28 571 s->helpers[s->nb_helpers].func = (tcg_target_ulong)func;
c896fe29
FB		 572 s->helpers[s->nb_helpers].name = name;
573 s->nb_helpers++;
574}
575
39cf05d3
FB		 576/* Note: we convert the 64 bit args to 32 bit and do some alignment
577 and endian swap. Maybe it would be better to do the alignment
578 and endian swap in tcg_reg_alloc_call(). */
a7812ae4
PB		 579void tcg_gen_callN(TCGContext *s, TCGv_ptr func, unsigned int flags,
580 int sizemask, TCGArg ret, int nargs, TCGArg *args)
c896fe29 581{
a7812ae4
PB		 582 int call_type;
583 int i;
584 int real_args;
585 int nb_rets;
586 TCGArg *nparam;
587 *gen_opc_ptr++ = INDEX_op_call;
588 nparam = gen_opparam_ptr++;
589 call_type = (flags & TCG_CALL_TYPE_MASK);
590 if (ret != TCG_CALL_DUMMY_ARG) {
591#if TCG_TARGET_REG_BITS < 64
592 if (sizemask & 1) {
39cf05d3 593#ifdef TCG_TARGET_WORDS_BIGENDIAN
a7812ae4
PB		 594 *gen_opparam_ptr++ = ret + 1;
595 *gen_opparam_ptr++ = ret;
39cf05d3 596#else
a7812ae4
PB		 597 *gen_opparam_ptr++ = ret;
598 *gen_opparam_ptr++ = ret + 1;
39cf05d3 599#endif
a7812ae4
PB		 600 nb_rets = 2;
601 } else
602#endif
603 {
604 *gen_opparam_ptr++ = ret;
605 nb_rets = 1;
c896fe29 606 }
a7812ae4
PB		 607 } else {
608 nb_rets = 0;
c896fe29 609 }
a7812ae4
PB		 610 real_args = 0;
611 for (i = 0; i < nargs; i++) {
612#if TCG_TARGET_REG_BITS < 64
613 if (sizemask & (2 << i)) {
c896fe29
FB		 614#ifdef TCG_TARGET_I386
615 /* REGPARM case: if the third parameter is 64 bit, it is
616 allocated on the stack */
a7812ae4 617 if (i == 2 && call_type == TCG_CALL_TYPE_REGPARM) {
c896fe29
FB		 618 call_type = TCG_CALL_TYPE_REGPARM_2;
619 flags = (flags & ~TCG_CALL_TYPE_MASK) | call_type;
620 }
a7812ae4 621#endif
39cf05d3
FB		 622#ifdef TCG_TARGET_CALL_ALIGN_ARGS
623 /* some targets want aligned 64 bit args */
ebd486d5 624 if (real_args & 1) {
a7812ae4 625 *gen_opparam_ptr++ = TCG_CALL_DUMMY_ARG;
ebd486d5 626 real_args++;
39cf05d3
FB		 627 }
628#endif
c896fe29 629#ifdef TCG_TARGET_WORDS_BIGENDIAN
a7812ae4
PB		 630 *gen_opparam_ptr++ = args[i] + 1;
631 *gen_opparam_ptr++ = args[i];
c896fe29 632#else
a7812ae4
PB		 633 *gen_opparam_ptr++ = args[i];
634 *gen_opparam_ptr++ = args[i] + 1;
c896fe29 635#endif
a7812ae4
PB		 636 real_args += 2;
637 } else
c896fe29 638#endif
a7812ae4
PB		 639 {
640 *gen_opparam_ptr++ = args[i];
641 real_args++;
c896fe29
FB		 642 }
643 }
a7812ae4
PB		 644 *gen_opparam_ptr++ = GET_TCGV_PTR(func);
645
646 *gen_opparam_ptr++ = flags;
647
648 *nparam = (nb_rets << 16) | (real_args + 1);
649
650 /* total parameters, needed to go backward in the instruction stream */
651 *gen_opparam_ptr++ = 1 + nb_rets + real_args + 3;
c896fe29 652}
c896fe29 653
ac56dd48 654#if TCG_TARGET_REG_BITS == 32
a7812ae4 655void tcg_gen_shifti_i64(TCGv_i64 ret, TCGv_i64 arg1,
c896fe29
FB		 656 int c, int right, int arith)
657{
cf60bce4 658 if (c == 0) {
a7812ae4 659 tcg_gen_mov_i32(TCGV_LOW(ret), TCGV_LOW(arg1));
cf60bce4
FB		 660 tcg_gen_mov_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1));
661 } else if (c >= 32) {
c896fe29
FB		 662 c -= 32;
663 if (right) {
664 if (arith) {
a7812ae4 665 tcg_gen_sari_i32(TCGV_LOW(ret), TCGV_HIGH(arg1), c);
ac56dd48 666 tcg_gen_sari_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), 31);
c896fe29 667 } else {
a7812ae4 668 tcg_gen_shri_i32(TCGV_LOW(ret), TCGV_HIGH(arg1), c);
ac56dd48 669 tcg_gen_movi_i32(TCGV_HIGH(ret), 0);
c896fe29
FB		 670 }
671 } else {
a7812ae4
PB		 672 tcg_gen_shli_i32(TCGV_HIGH(ret), TCGV_LOW(arg1), c);
673 tcg_gen_movi_i32(TCGV_LOW(ret), 0);
c896fe29
FB		 674 }
675 } else {
a7812ae4 676 TCGv_i32 t0, t1;
c896fe29 677
a7812ae4
PB		 678 t0 = tcg_temp_new_i32();
679 t1 = tcg_temp_new_i32();
c896fe29 680 if (right) {
ac56dd48 681 tcg_gen_shli_i32(t0, TCGV_HIGH(arg1), 32 - c);
c896fe29 682 if (arith)
ac56dd48 683 tcg_gen_sari_i32(t1, TCGV_HIGH(arg1), c);
a7812ae4 684 else
ac56dd48 685 tcg_gen_shri_i32(t1, TCGV_HIGH(arg1), c);
a7812ae4
PB		 686 tcg_gen_shri_i32(TCGV_LOW(ret), TCGV_LOW(arg1), c);
687 tcg_gen_or_i32(TCGV_LOW(ret), TCGV_LOW(ret), t0);
ac56dd48 688 tcg_gen_mov_i32(TCGV_HIGH(ret), t1);
c896fe29 689 } else {
a7812ae4 690 tcg_gen_shri_i32(t0, TCGV_LOW(arg1), 32 - c);
c896fe29 691 /* Note: ret can be the same as arg1, so we use t1 */
a7812ae4 692 tcg_gen_shli_i32(t1, TCGV_LOW(arg1), c);
ac56dd48
PB		 693 tcg_gen_shli_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), c);
694 tcg_gen_or_i32(TCGV_HIGH(ret), TCGV_HIGH(ret), t0);
a7812ae4 695 tcg_gen_mov_i32(TCGV_LOW(ret), t1);
c896fe29 696 }
a7812ae4
PB		 697 tcg_temp_free_i32(t0);
698 tcg_temp_free_i32(t1);
c896fe29
FB		 699 }
700}
ac56dd48 701#endif
c896fe29 702
8fcd3692 703static void tcg_reg_alloc_start(TCGContext *s)
c896fe29
FB		 704{
705 int i;
706 TCGTemp *ts;
707 for(i = 0; i < s->nb_globals; i++) {
708 ts = &s->temps[i];
709 if (ts->fixed_reg) {
710 ts->val_type = TEMP_VAL_REG;
711 } else {
712 ts->val_type = TEMP_VAL_MEM;
713 }
714 }
e8996ee0
FB		 715 for(i = s->nb_globals; i < s->nb_temps; i++) {
716 ts = &s->temps[i];
717 ts->val_type = TEMP_VAL_DEAD;
718 ts->mem_allocated = 0;
719 ts->fixed_reg = 0;
720 }
c896fe29
FB		 721 for(i = 0; i < TCG_TARGET_NB_REGS; i++) {
722 s->reg_to_temp[i] = -1;
723 }
724}
725
ac56dd48
PB		 726static char *tcg_get_arg_str_idx(TCGContext *s, char *buf, int buf_size,
727 int idx)
c896fe29
FB		 728{
729 TCGTemp *ts;
ac56dd48
PB		 730
731 ts = &s->temps[idx];
732 if (idx < s->nb_globals) {
733 pstrcpy(buf, buf_size, ts->name);
c896fe29 734 } else {
641d5fbe
FB		 735 if (ts->temp_local)
736 snprintf(buf, buf_size, "loc%d", idx - s->nb_globals);
737 else
738 snprintf(buf, buf_size, "tmp%d", idx - s->nb_globals);
c896fe29
FB		 739 }
740 return buf;
741}
742
a7812ae4
PB		 743char *tcg_get_arg_str_i32(TCGContext *s, char *buf, int buf_size, TCGv_i32 arg)
744{
745 return tcg_get_arg_str_idx(s, buf, buf_size, GET_TCGV_I32(arg));
746}
747
748char *tcg_get_arg_str_i64(TCGContext *s, char *buf, int buf_size, TCGv_i64 arg)
ac56dd48 749{
a810a2de 750 return tcg_get_arg_str_idx(s, buf, buf_size, GET_TCGV_I64(arg));
ac56dd48
PB		 751}
752
e8996ee0 753static int helper_cmp(const void *p1, const void *p2)
4dc81f28 754{
e8996ee0
FB		 755 const TCGHelperInfo *th1 = p1;
756 const TCGHelperInfo *th2 = p2;
757 if (th1->func < th2->func)
758 return -1;
759 else if (th1->func == th2->func)
760 return 0;
761 else
762 return 1;
4dc81f28
FB		 763}
764
e8996ee0
FB		 765/* find helper definition (Note: A hash table would be better) */
766static TCGHelperInfo *tcg_find_helper(TCGContext *s, tcg_target_ulong val)
4dc81f28 767{
e8996ee0 768 int m, m_min, m_max;
4dc81f28 769 TCGHelperInfo *th;
e8996ee0 770 tcg_target_ulong v;
4dc81f28 771
e8996ee0
FB		 772 if (unlikely(!s->helpers_sorted)) {
773 qsort(s->helpers, s->nb_helpers, sizeof(TCGHelperInfo),
774 helper_cmp);
775 s->helpers_sorted = 1;
776 }
777
778 /* binary search */
779 m_min = 0;
780 m_max = s->nb_helpers - 1;
781 while (m_min <= m_max) {
782 m = (m_min + m_max) >> 1;
783 th = &s->helpers[m];
784 v = th->func;
785 if (v == val)
786 return th;
787 else if (val < v) {
788 m_max = m - 1;
789 } else {
790 m_min = m + 1;
4dc81f28
FB		 791 }
792 }
e8996ee0 793 return NULL;
4dc81f28
FB		 794}
795
f48f3ede
BS		 796static const char * const cond_name[] =
797{
798 [TCG_COND_EQ] = "eq",
799 [TCG_COND_NE] = "ne",
800 [TCG_COND_LT] = "lt",
801 [TCG_COND_GE] = "ge",
802 [TCG_COND_LE] = "le",
803 [TCG_COND_GT] = "gt",
804 [TCG_COND_LTU] = "ltu",
805 [TCG_COND_GEU] = "geu",
806 [TCG_COND_LEU] = "leu",
807 [TCG_COND_GTU] = "gtu"
808};
809
c896fe29
FB		 810void tcg_dump_ops(TCGContext *s, FILE *outfile)
811{
812 const uint16_t *opc_ptr;
813 const TCGArg *args;
814 TCGArg arg;
7e4597d7 815 int c, i, k, nb_oargs, nb_iargs, nb_cargs, first_insn;
c896fe29
FB		 816 const TCGOpDef *def;
817 char buf[128];
818
7e4597d7 819 first_insn = 1;
c896fe29
FB		 820 opc_ptr = gen_opc_buf;
821 args = gen_opparam_buf;
822 while (opc_ptr < gen_opc_ptr) {
823 c = *opc_ptr++;
824 def = &tcg_op_defs[c];
7e4597d7
FB		 825 if (c == INDEX_op_debug_insn_start) {
826 uint64_t pc;
827#if TARGET_LONG_BITS > TCG_TARGET_REG_BITS
828 pc = ((uint64_t)args[1] << 32) | args[0];
829#else
830 pc = args[0];
831#endif
832 if (!first_insn)
833 fprintf(outfile, "\n");
834 fprintf(outfile, " ---- 0x%" PRIx64, pc);
835 first_insn = 0;
836 nb_oargs = def->nb_oargs;
837 nb_iargs = def->nb_iargs;
838 nb_cargs = def->nb_cargs;
839 } else if (c == INDEX_op_call) {
c896fe29 840 TCGArg arg;
4dc81f28 841
c896fe29
FB		 842 /* variable number of arguments */
843 arg = *args++;
844 nb_oargs = arg >> 16;
845 nb_iargs = arg & 0xffff;
846 nb_cargs = def->nb_cargs;
c896fe29 847
7e4597d7
FB		 848 fprintf(outfile, " %s ", def->name);
849
b03cce8e 850 /* function name */
ac56dd48 851 fprintf(outfile, "%s",
e8996ee0 852 tcg_get_arg_str_idx(s, buf, sizeof(buf), args[nb_oargs + nb_iargs - 1]));
b03cce8e
FB		 853 /* flags */
854 fprintf(outfile, ",$0x%" TCG_PRIlx,
855 args[nb_oargs + nb_iargs]);
856 /* nb out args */
857 fprintf(outfile, ",$%d", nb_oargs);
858 for(i = 0; i < nb_oargs; i++) {
859 fprintf(outfile, ",");
860 fprintf(outfile, "%s",
861 tcg_get_arg_str_idx(s, buf, sizeof(buf), args[i]));
862 }
863 for(i = 0; i < (nb_iargs - 1); i++) {
c896fe29 864 fprintf(outfile, ",");
39cf05d3
FB		 865 if (args[nb_oargs + i] == TCG_CALL_DUMMY_ARG) {
866 fprintf(outfile, "<dummy>");
867 } else {
868 fprintf(outfile, "%s",
869 tcg_get_arg_str_idx(s, buf, sizeof(buf), args[nb_oargs + i]));
870 }
b03cce8e 871 }
e8996ee0
FB		 872 } else if (c == INDEX_op_movi_i32
873#if TCG_TARGET_REG_BITS == 64
874 || c == INDEX_op_movi_i64
875#endif
876 ) {
877 tcg_target_ulong val;
878 TCGHelperInfo *th;
879
880 nb_oargs = def->nb_oargs;
881 nb_iargs = def->nb_iargs;
882 nb_cargs = def->nb_cargs;
883 fprintf(outfile, " %s %s,$", def->name,
884 tcg_get_arg_str_idx(s, buf, sizeof(buf), args[0]));
885 val = args[1];
886 th = tcg_find_helper(s, val);
887 if (th) {
888 fprintf(outfile, th->name);
889 } else {
890 if (c == INDEX_op_movi_i32)
891 fprintf(outfile, "0x%x", (uint32_t)val);
892 else
893 fprintf(outfile, "0x%" PRIx64 , (uint64_t)val);
894 }
b03cce8e 895 } else {
7e4597d7 896 fprintf(outfile, " %s ", def->name);
b03cce8e
FB		 897 if (c == INDEX_op_nopn) {
898 /* variable number of arguments */
899 nb_cargs = *args;
900 nb_oargs = 0;
901 nb_iargs = 0;
902 } else {
903 nb_oargs = def->nb_oargs;
904 nb_iargs = def->nb_iargs;
905 nb_cargs = def->nb_cargs;
906 }
907
908 k = 0;
909 for(i = 0; i < nb_oargs; i++) {
910 if (k != 0)
911 fprintf(outfile, ",");
912 fprintf(outfile, "%s",
913 tcg_get_arg_str_idx(s, buf, sizeof(buf), args[k++]));
914 }
915 for(i = 0; i < nb_iargs; i++) {
916 if (k != 0)
917 fprintf(outfile, ",");
918 fprintf(outfile, "%s",
919 tcg_get_arg_str_idx(s, buf, sizeof(buf), args[k++]));
920 }
f48f3ede
BS		 921 if (c == INDEX_op_brcond_i32
922#if TCG_TARGET_REG_BITS == 32
923 || c == INDEX_op_brcond2_i32
924#elif TCG_TARGET_REG_BITS == 64
925 || c == INDEX_op_brcond_i64
926#endif
927 ) {
928 if (args[k] < ARRAY_SIZE(cond_name) && cond_name[args[k]])
929 fprintf(outfile, ",%s", cond_name[args[k++]]);
930 else
931 fprintf(outfile, ",$0x%" TCG_PRIlx, args[k++]);
932 i = 1;
933 }
934 else
935 i = 0;
936 for(; i < nb_cargs; i++) {
b03cce8e
FB		 937 if (k != 0)
938 fprintf(outfile, ",");
939 arg = args[k++];
940 fprintf(outfile, "$0x%" TCG_PRIlx, arg);
941 }
c896fe29
FB		 942 }
943 fprintf(outfile, "\n");
944 args += nb_iargs + nb_oargs + nb_cargs;
945 }
946}
947
948/* we give more priority to constraints with less registers */
949static int get_constraint_priority(const TCGOpDef *def, int k)
950{
951 const TCGArgConstraint *arg_ct;
952
953 int i, n;
954 arg_ct = &def->args_ct[k];
955 if (arg_ct->ct & TCG_CT_ALIAS) {
956 /* an alias is equivalent to a single register */
957 n = 1;
958 } else {
959 if (!(arg_ct->ct & TCG_CT_REG))
960 return 0;
961 n = 0;
962 for(i = 0; i < TCG_TARGET_NB_REGS; i++) {
963 if (tcg_regset_test_reg(arg_ct->u.regs, i))
964 n++;
965 }
966 }
967 return TCG_TARGET_NB_REGS - n + 1;
968}
969
970/* sort from highest priority to lowest */
971static void sort_constraints(TCGOpDef *def, int start, int n)
972{
973 int i, j, p1, p2, tmp;
974
975 for(i = 0; i < n; i++)
976 def->sorted_args[start + i] = start + i;
977 if (n <= 1)
978 return;
979 for(i = 0; i < n - 1; i++) {
980 for(j = i + 1; j < n; j++) {
981 p1 = get_constraint_priority(def, def->sorted_args[start + i]);
982 p2 = get_constraint_priority(def, def->sorted_args[start + j]);
983 if (p1 < p2) {
984 tmp = def->sorted_args[start + i];
985 def->sorted_args[start + i] = def->sorted_args[start + j];
986 def->sorted_args[start + j] = tmp;
987 }
988 }
989 }
990}
991
992void tcg_add_target_add_op_defs(const TCGTargetOpDef *tdefs)
993{
994 int op;
995 TCGOpDef *def;
996 const char *ct_str;
997 int i, nb_args;
998
999 for(;;) {
1000 if (tdefs->op < 0)
1001 break;
1002 op = tdefs->op;
1003 assert(op >= 0 && op < NB_OPS);
1004 def = &tcg_op_defs[op];
1005 nb_args = def->nb_iargs + def->nb_oargs;
1006 for(i = 0; i < nb_args; i++) {
1007 ct_str = tdefs->args_ct_str[i];
1008 tcg_regset_clear(def->args_ct[i].u.regs);
1009 def->args_ct[i].ct = 0;
1010 if (ct_str[0] >= '0' && ct_str[0] <= '9') {
1011 int oarg;
1012 oarg = ct_str[0] - '0';
1013 assert(oarg < def->nb_oargs);
1014 assert(def->args_ct[oarg].ct & TCG_CT_REG);
1015 /* TCG_CT_ALIAS is for the output arguments. The input
5ff9d6a4 1016 argument is tagged with TCG_CT_IALIAS. */
c896fe29 1017 def->args_ct[i] = def->args_ct[oarg];
5ff9d6a4
FB		 1018 def->args_ct[oarg].ct = TCG_CT_ALIAS;
1019 def->args_ct[oarg].alias_index = i;
c896fe29 1020 def->args_ct[i].ct |= TCG_CT_IALIAS;
5ff9d6a4 1021 def->args_ct[i].alias_index = oarg;
c896fe29
FB		 1022 } else {
1023 for(;;) {
1024 if (*ct_str == '\0')
1025 break;
1026 switch(*ct_str) {
1027 case 'i':
1028 def->args_ct[i].ct |= TCG_CT_CONST;
1029 ct_str++;
1030 break;
1031 default:
1032 if (target_parse_constraint(&def->args_ct[i], &ct_str) < 0) {
1033 fprintf(stderr, "Invalid constraint '%s' for arg %d of operation '%s'\n",
1034 ct_str, i, def->name);
1035 exit(1);
1036 }
1037 }
1038 }
1039 }
1040 }
1041
1042 /* sort the constraints (XXX: this is just an heuristic) */
1043 sort_constraints(def, 0, def->nb_oargs);
1044 sort_constraints(def, def->nb_oargs, def->nb_iargs);
1045
1046#if 0
1047 {
1048 int i;
1049
1050 printf("%s: sorted=", def->name);
1051 for(i = 0; i < def->nb_oargs + def->nb_iargs; i++)
1052 printf(" %d", def->sorted_args[i]);
1053 printf("\n");
1054 }
1055#endif
1056 tdefs++;
1057 }
1058
1059}
1060
1061#ifdef USE_LIVENESS_ANALYSIS
1062
1063/* set a nop for an operation using 'nb_args' */
1064static inline void tcg_set_nop(TCGContext *s, uint16_t *opc_ptr,
1065 TCGArg *args, int nb_args)
1066{
1067 if (nb_args == 0) {
1068 *opc_ptr = INDEX_op_nop;
1069 } else {
1070 *opc_ptr = INDEX_op_nopn;
1071 args[0] = nb_args;
1072 args[nb_args - 1] = nb_args;
1073 }
1074}
1075
641d5fbe
FB		 1076/* liveness analysis: end of function: globals are live, temps are
1077 dead. */
1078/* XXX: at this stage, not used as there would be little gains because
1079 most TBs end with a conditional jump. */
1080static inline void tcg_la_func_end(TCGContext *s, uint8_t *dead_temps)
c896fe29
FB		 1081{
1082 memset(dead_temps, 0, s->nb_globals);
1083 memset(dead_temps + s->nb_globals, 1, s->nb_temps - s->nb_globals);
1084}
1085
641d5fbe
FB		 1086/* liveness analysis: end of basic block: globals are live, temps are
1087 dead, local temps are live. */
1088static inline void tcg_la_bb_end(TCGContext *s, uint8_t *dead_temps)
1089{
1090 int i;
1091 TCGTemp *ts;
1092
1093 memset(dead_temps, 0, s->nb_globals);
1094 ts = &s->temps[s->nb_globals];
1095 for(i = s->nb_globals; i < s->nb_temps; i++) {
1096 if (ts->temp_local)
1097 dead_temps[i] = 0;
1098 else
1099 dead_temps[i] = 1;
1100 ts++;
1101 }
1102}
1103
c896fe29
FB		 1104/* Liveness analysis : update the opc_dead_iargs array to tell if a
1105 given input arguments is dead. Instructions updating dead
1106 temporaries are removed. */
8fcd3692 1107static void tcg_liveness_analysis(TCGContext *s)
c896fe29
FB		 1108{
1109 int i, op_index, op, nb_args, nb_iargs, nb_oargs, arg, nb_ops;
1110 TCGArg *args;
1111 const TCGOpDef *def;
1112 uint8_t *dead_temps;
1113 unsigned int dead_iargs;
1114
1115 gen_opc_ptr++; /* skip end */
1116
1117 nb_ops = gen_opc_ptr - gen_opc_buf;
1118
1119 /* XXX: make it really dynamic */
1120 s->op_dead_iargs = tcg_malloc(OPC_BUF_SIZE * sizeof(uint16_t));
1121
1122 dead_temps = tcg_malloc(s->nb_temps);
1123 memset(dead_temps, 1, s->nb_temps);
1124
1125 args = gen_opparam_ptr;
1126 op_index = nb_ops - 1;
1127 while (op_index >= 0) {
1128 op = gen_opc_buf[op_index];
1129 def = &tcg_op_defs[op];
1130 switch(op) {
1131 case INDEX_op_call:
c6e113f5
FB		 1132 {
1133 int call_flags;
c896fe29 1134
c6e113f5
FB		 1135 nb_args = args[-1];
1136 args -= nb_args;
1137 nb_iargs = args[0] & 0xffff;
1138 nb_oargs = args[0] >> 16;
1139 args++;
1140 call_flags = args[nb_oargs + nb_iargs];
1141
1142 /* pure functions can be removed if their result is not
1143 used */
1144 if (call_flags & TCG_CALL_PURE) {
1145 for(i = 0; i < nb_oargs; i++) {
1146 arg = args[i];
1147 if (!dead_temps[arg])
1148 goto do_not_remove_call;
1149 }
1150 tcg_set_nop(s, gen_opc_buf + op_index,
1151 args - 1, nb_args);
1152 } else {
1153 do_not_remove_call:
c896fe29 1154
c6e113f5
FB		 1155 /* output args are dead */
1156 for(i = 0; i < nb_oargs; i++) {
1157 arg = args[i];
1158 dead_temps[arg] = 1;
1159 }
1160
1161 /* globals are live (they may be used by the call) */
1162 memset(dead_temps, 0, s->nb_globals);
1163
1164 /* input args are live */
1165 dead_iargs = 0;
1166 for(i = 0; i < nb_iargs; i++) {
1167 arg = args[i + nb_oargs];
39cf05d3
FB		 1168 if (arg != TCG_CALL_DUMMY_ARG) {
1169 if (dead_temps[arg]) {
1170 dead_iargs |= (1 << i);
1171 }
1172 dead_temps[arg] = 0;
c6e113f5 1173 }
c6e113f5
FB		 1174 }
1175 s->op_dead_iargs[op_index] = dead_iargs;
c896fe29 1176 }
c6e113f5 1177 args--;
c896fe29 1178 }
c896fe29
FB		 1179 break;
1180 case INDEX_op_set_label:
1181 args--;
1182 /* mark end of basic block */
1183 tcg_la_bb_end(s, dead_temps);
1184 break;
7e4597d7
FB		 1185 case INDEX_op_debug_insn_start:
1186 args -= def->nb_args;
1187 break;
c896fe29
FB		 1188 case INDEX_op_nopn:
1189 nb_args = args[-1];
1190 args -= nb_args;
1191 break;
5ff9d6a4
FB		 1192 case INDEX_op_discard:
1193 args--;
1194 /* mark the temporary as dead */
1195 dead_temps[args[0]] = 1;
1196 break;
c896fe29
FB		 1197 case INDEX_op_end:
1198 break;
1199 /* XXX: optimize by hardcoding common cases (e.g. triadic ops) */
1200 default:
49516bc0
AJ		 1201 args -= def->nb_args;
1202 nb_iargs = def->nb_iargs;
1203 nb_oargs = def->nb_oargs;
c896fe29 1204
49516bc0
AJ		 1205 /* Test if the operation can be removed because all
1206 its outputs are dead. We assume that nb_oargs == 0
1207 implies side effects */
1208 if (!(def->flags & TCG_OPF_SIDE_EFFECTS) && nb_oargs != 0) {
1209 for(i = 0; i < nb_oargs; i++) {
1210 arg = args[i];
1211 if (!dead_temps[arg])
1212 goto do_not_remove;
1213 }
1214 tcg_set_nop(s, gen_opc_buf + op_index, args, def->nb_args);
c896fe29 1215#ifdef CONFIG_PROFILER
49516bc0 1216 s->del_op_count++;
c896fe29 1217#endif
49516bc0
AJ		 1218 } else {
1219 do_not_remove:
c896fe29 1220
49516bc0
AJ		 1221 /* output args are dead */
1222 for(i = 0; i < nb_oargs; i++) {
1223 arg = args[i];
1224 dead_temps[arg] = 1;
1225 }
1226
1227 /* if end of basic block, update */
1228 if (def->flags & TCG_OPF_BB_END) {
1229 tcg_la_bb_end(s, dead_temps);
1230 } else if (def->flags & TCG_OPF_CALL_CLOBBER) {
1231 /* globals are live */
1232 memset(dead_temps, 0, s->nb_globals);
1233 }
1234
1235 /* input args are live */
1236 dead_iargs = 0;
1237 for(i = 0; i < nb_iargs; i++) {
1238 arg = args[i + nb_oargs];
1239 if (dead_temps[arg]) {
1240 dead_iargs |= (1 << i);
c896fe29 1241 }
49516bc0 1242 dead_temps[arg] = 0;
c896fe29 1243 }
49516bc0 1244 s->op_dead_iargs[op_index] = dead_iargs;
c896fe29
FB		 1245 }
1246 break;
1247 }
1248 op_index--;
1249 }
1250
1251 if (args != gen_opparam_buf)
1252 tcg_abort();
1253}
1254#else
1255/* dummy liveness analysis */
1256void tcg_liveness_analysis(TCGContext *s)
1257{
1258 int nb_ops;
1259 nb_ops = gen_opc_ptr - gen_opc_buf;
1260
1261 s->op_dead_iargs = tcg_malloc(nb_ops * sizeof(uint16_t));
1262 memset(s->op_dead_iargs, 0, nb_ops * sizeof(uint16_t));
1263}
1264#endif
1265
1266#ifndef NDEBUG
1267static void dump_regs(TCGContext *s)
1268{
1269 TCGTemp *ts;
1270 int i;
1271 char buf[64];
1272
1273 for(i = 0; i < s->nb_temps; i++) {
1274 ts = &s->temps[i];
ac56dd48 1275 printf(" %10s: ", tcg_get_arg_str_idx(s, buf, sizeof(buf), i));
c896fe29
FB		 1276 switch(ts->val_type) {
1277 case TEMP_VAL_REG:
1278 printf("%s", tcg_target_reg_names[ts->reg]);
1279 break;
1280 case TEMP_VAL_MEM:
1281 printf("%d(%s)", (int)ts->mem_offset, tcg_target_reg_names[ts->mem_reg]);
1282 break;
1283 case TEMP_VAL_CONST:
1284 printf("$0x%" TCG_PRIlx, ts->val);
1285 break;
1286 case TEMP_VAL_DEAD:
1287 printf("D");
1288 break;
1289 default:
1290 printf("???");
1291 break;
1292 }
1293 printf("\n");
1294 }
1295
1296 for(i = 0; i < TCG_TARGET_NB_REGS; i++) {
1297 if (s->reg_to_temp[i] >= 0) {
1298 printf("%s: %s\n",
1299 tcg_target_reg_names[i],
ac56dd48 1300 tcg_get_arg_str_idx(s, buf, sizeof(buf), s->reg_to_temp[i]));
c896fe29
FB		 1301 }
1302 }
1303}
1304
1305static void check_regs(TCGContext *s)
1306{
1307 int reg, k;
1308 TCGTemp *ts;
1309 char buf[64];
1310
1311 for(reg = 0; reg < TCG_TARGET_NB_REGS; reg++) {
1312 k = s->reg_to_temp[reg];
1313 if (k >= 0) {
1314 ts = &s->temps[k];
1315 if (ts->val_type != TEMP_VAL_REG ||
1316 ts->reg != reg) {
1317 printf("Inconsistency for register %s:\n",
1318 tcg_target_reg_names[reg]);
b03cce8e 1319 goto fail;
c896fe29
FB		 1320 }
1321 }
1322 }
1323 for(k = 0; k < s->nb_temps; k++) {
1324 ts = &s->temps[k];
1325 if (ts->val_type == TEMP_VAL_REG &&
1326 !ts->fixed_reg &&
1327 s->reg_to_temp[ts->reg] != k) {
1328 printf("Inconsistency for temp %s:\n",
ac56dd48 1329 tcg_get_arg_str_idx(s, buf, sizeof(buf), k));
b03cce8e 1330 fail:
c896fe29
FB		 1331 printf("reg state:\n");
1332 dump_regs(s);
1333 tcg_abort();
1334 }
1335 }
1336}
1337#endif
1338
1339static void temp_allocate_frame(TCGContext *s, int temp)
1340{
1341 TCGTemp *ts;
1342 ts = &s->temps[temp];
1343 s->current_frame_offset = (s->current_frame_offset + sizeof(tcg_target_long) - 1) & ~(sizeof(tcg_target_long) - 1);
1344 if (s->current_frame_offset + sizeof(tcg_target_long) > s->frame_end)
5ff9d6a4 1345 tcg_abort();
c896fe29
FB		 1346 ts->mem_offset = s->current_frame_offset;
1347 ts->mem_reg = s->frame_reg;
1348 ts->mem_allocated = 1;
1349 s->current_frame_offset += sizeof(tcg_target_long);
1350}
1351
1352/* free register 'reg' by spilling the corresponding temporary if necessary */
1353static void tcg_reg_free(TCGContext *s, int reg)
1354{
1355 TCGTemp *ts;
1356 int temp;
1357
1358 temp = s->reg_to_temp[reg];
1359 if (temp != -1) {
1360 ts = &s->temps[temp];
1361 assert(ts->val_type == TEMP_VAL_REG);
1362 if (!ts->mem_coherent) {
1363 if (!ts->mem_allocated)
1364 temp_allocate_frame(s, temp);
e4d5434c 1365 tcg_out_st(s, ts->type, reg, ts->mem_reg, ts->mem_offset);
c896fe29
FB		 1366 }
1367 ts->val_type = TEMP_VAL_MEM;
1368 s->reg_to_temp[reg] = -1;
1369 }
1370}
1371
1372/* Allocate a register belonging to reg1 & ~reg2 */
1373static int tcg_reg_alloc(TCGContext *s, TCGRegSet reg1, TCGRegSet reg2)
1374{
1375 int i, reg;
1376 TCGRegSet reg_ct;
1377
1378 tcg_regset_andnot(reg_ct, reg1, reg2);
1379
1380 /* first try free registers */
0954d0d9 1381 for(i = 0; i < ARRAY_SIZE(tcg_target_reg_alloc_order); i++) {
c896fe29
FB		 1382 reg = tcg_target_reg_alloc_order[i];
1383 if (tcg_regset_test_reg(reg_ct, reg) && s->reg_to_temp[reg] == -1)
1384 return reg;
1385 }
1386
1387 /* XXX: do better spill choice */
0954d0d9 1388 for(i = 0; i < ARRAY_SIZE(tcg_target_reg_alloc_order); i++) {
c896fe29
FB		 1389 reg = tcg_target_reg_alloc_order[i];
1390 if (tcg_regset_test_reg(reg_ct, reg)) {
1391 tcg_reg_free(s, reg);
1392 return reg;
1393 }
1394 }
1395
1396 tcg_abort();
1397}
1398
641d5fbe
FB		 1399/* save a temporary to memory. 'allocated_regs' is used in case a
1400 temporary registers needs to be allocated to store a constant. */
1401static void temp_save(TCGContext *s, int temp, TCGRegSet allocated_regs)
1402{
1403 TCGTemp *ts;
1404 int reg;
1405
1406 ts = &s->temps[temp];
1407 if (!ts->fixed_reg) {
1408 switch(ts->val_type) {
1409 case TEMP_VAL_REG:
1410 tcg_reg_free(s, ts->reg);
1411 break;
1412 case TEMP_VAL_DEAD:
1413 ts->val_type = TEMP_VAL_MEM;
1414 break;
1415 case TEMP_VAL_CONST:
1416 reg = tcg_reg_alloc(s, tcg_target_available_regs[ts->type],
1417 allocated_regs);
1418 if (!ts->mem_allocated)
1419 temp_allocate_frame(s, temp);
1420 tcg_out_movi(s, ts->type, reg, ts->val);
1421 tcg_out_st(s, ts->type, reg, ts->mem_reg, ts->mem_offset);
1422 ts->val_type = TEMP_VAL_MEM;
1423 break;
1424 case TEMP_VAL_MEM:
1425 break;
1426 default:
1427 tcg_abort();
1428 }
1429 }
1430}
1431
e5097dc8 1432/* save globals to their cannonical location and assume they can be
e8996ee0
FB		 1433 modified be the following code. 'allocated_regs' is used in case a
1434 temporary registers needs to be allocated to store a constant. */
1435static void save_globals(TCGContext *s, TCGRegSet allocated_regs)
c896fe29 1436{
641d5fbe 1437 int i;
c896fe29
FB		 1438
1439 for(i = 0; i < s->nb_globals; i++) {
641d5fbe 1440 temp_save(s, i, allocated_regs);
c896fe29 1441 }
e5097dc8
FB		 1442}
1443
1444/* at the end of a basic block, we assume all temporaries are dead and
e8996ee0
FB		 1445 all globals are stored at their canonical location. */
1446static void tcg_reg_alloc_bb_end(TCGContext *s, TCGRegSet allocated_regs)
e5097dc8
FB		 1447{
1448 TCGTemp *ts;
1449 int i;
1450
c896fe29
FB		 1451 for(i = s->nb_globals; i < s->nb_temps; i++) {
1452 ts = &s->temps[i];
641d5fbe
FB		 1453 if (ts->temp_local) {
1454 temp_save(s, i, allocated_regs);
1455 } else {
1456 if (ts->val_type == TEMP_VAL_REG) {
1457 s->reg_to_temp[ts->reg] = -1;
1458 }
1459 ts->val_type = TEMP_VAL_DEAD;
c896fe29
FB		 1460 }
1461 }
e8996ee0
FB		 1462
1463 save_globals(s, allocated_regs);
c896fe29
FB		 1464}
1465
1466#define IS_DEAD_IARG(n) ((dead_iargs >> (n)) & 1)
1467
e8996ee0
FB		 1468static void tcg_reg_alloc_movi(TCGContext *s, const TCGArg *args)
1469{
1470 TCGTemp *ots;
1471 tcg_target_ulong val;
1472
1473 ots = &s->temps[args[0]];
1474 val = args[1];
1475
1476 if (ots->fixed_reg) {
1477 /* for fixed registers, we do not do any constant
1478 propagation */
1479 tcg_out_movi(s, ots->type, ots->reg, val);
1480 } else {
1235fc06 1481 /* The movi is not explicitly generated here */
e8996ee0
FB		 1482 if (ots->val_type == TEMP_VAL_REG)
1483 s->reg_to_temp[ots->reg] = -1;
1484 ots->val_type = TEMP_VAL_CONST;
1485 ots->val = val;
1486 }
1487}
1488
c896fe29
FB		 1489static void tcg_reg_alloc_mov(TCGContext *s, const TCGOpDef *def,
1490 const TCGArg *args,
1491 unsigned int dead_iargs)
1492{
1493 TCGTemp *ts, *ots;
1494 int reg;
1495 const TCGArgConstraint *arg_ct;
1496
1497 ots = &s->temps[args[0]];
1498 ts = &s->temps[args[1]];
1499 arg_ct = &def->args_ct[0];
1500
e8996ee0 1501 /* XXX: always mark arg dead if IS_DEAD_IARG(0) */
c896fe29
FB		 1502 if (ts->val_type == TEMP_VAL_REG) {
1503 if (IS_DEAD_IARG(0) && !ts->fixed_reg && !ots->fixed_reg) {
1504 /* the mov can be suppressed */
1505 if (ots->val_type == TEMP_VAL_REG)
1506 s->reg_to_temp[ots->reg] = -1;
1507 reg = ts->reg;
1508 s->reg_to_temp[reg] = -1;
1509 ts->val_type = TEMP_VAL_DEAD;
1510 } else {
1511 if (ots->val_type == TEMP_VAL_REG) {
1512 reg = ots->reg;
1513 } else {
1514 reg = tcg_reg_alloc(s, arg_ct->u.regs, s->reserved_regs);
1515 }
1516 if (ts->reg != reg) {
1517 tcg_out_mov(s, reg, ts->reg);
1518 }
1519 }
1520 } else if (ts->val_type == TEMP_VAL_MEM) {
1521 if (ots->val_type == TEMP_VAL_REG) {
1522 reg = ots->reg;
1523 } else {
1524 reg = tcg_reg_alloc(s, arg_ct->u.regs, s->reserved_regs);
1525 }
e4d5434c 1526 tcg_out_ld(s, ts->type, reg, ts->mem_reg, ts->mem_offset);
c896fe29 1527 } else if (ts->val_type == TEMP_VAL_CONST) {
e8996ee0 1528 if (ots->fixed_reg) {
c896fe29 1529 reg = ots->reg;
e8996ee0 1530 tcg_out_movi(s, ots->type, reg, ts->val);
c896fe29 1531 } else {
e8996ee0
FB		 1532 /* propagate constant */
1533 if (ots->val_type == TEMP_VAL_REG)
1534 s->reg_to_temp[ots->reg] = -1;
1535 ots->val_type = TEMP_VAL_CONST;
1536 ots->val = ts->val;
1537 return;
c896fe29 1538 }
c896fe29
FB		 1539 } else {
1540 tcg_abort();
1541 }
1542 s->reg_to_temp[reg] = args[0];
1543 ots->reg = reg;
1544 ots->val_type = TEMP_VAL_REG;
1545 ots->mem_coherent = 0;
1546}
1547
1548static void tcg_reg_alloc_op(TCGContext *s,
1549 const TCGOpDef *def, int opc,
1550 const TCGArg *args,
1551 unsigned int dead_iargs)
1552{
1553 TCGRegSet allocated_regs;
1554 int i, k, nb_iargs, nb_oargs, reg;
1555 TCGArg arg;
1556 const TCGArgConstraint *arg_ct;
1557 TCGTemp *ts;
1558 TCGArg new_args[TCG_MAX_OP_ARGS];
1559 int const_args[TCG_MAX_OP_ARGS];
1560
1561 nb_oargs = def->nb_oargs;
1562 nb_iargs = def->nb_iargs;
1563
1564 /* copy constants */
1565 memcpy(new_args + nb_oargs + nb_iargs,
1566 args + nb_oargs + nb_iargs,
1567 sizeof(TCGArg) * def->nb_cargs);
1568
1569 /* satisfy input constraints */
1570 tcg_regset_set(allocated_regs, s->reserved_regs);
1571 for(k = 0; k < nb_iargs; k++) {
1572 i = def->sorted_args[nb_oargs + k];
1573 arg = args[i];
1574 arg_ct = &def->args_ct[i];
1575 ts = &s->temps[arg];
1576 if (ts->val_type == TEMP_VAL_MEM) {
1577 reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs);
e4d5434c 1578 tcg_out_ld(s, ts->type, reg, ts->mem_reg, ts->mem_offset);
c896fe29
FB		 1579 ts->val_type = TEMP_VAL_REG;
1580 ts->reg = reg;
1581 ts->mem_coherent = 1;
1582 s->reg_to_temp[reg] = arg;
1583 } else if (ts->val_type == TEMP_VAL_CONST) {
1584 if (tcg_target_const_match(ts->val, arg_ct)) {
1585 /* constant is OK for instruction */
1586 const_args[i] = 1;
1587 new_args[i] = ts->val;
1588 goto iarg_end;
1589 } else {
e8996ee0 1590 /* need to move to a register */
c896fe29
FB		 1591 reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs);
1592 tcg_out_movi(s, ts->type, reg, ts->val);
e8996ee0
FB		 1593 ts->val_type = TEMP_VAL_REG;
1594 ts->reg = reg;
1595 ts->mem_coherent = 0;
1596 s->reg_to_temp[reg] = arg;
c896fe29
FB		 1597 }
1598 }
1599 assert(ts->val_type == TEMP_VAL_REG);
5ff9d6a4
FB		 1600 if (arg_ct->ct & TCG_CT_IALIAS) {
1601 if (ts->fixed_reg) {
1602 /* if fixed register, we must allocate a new register
1603 if the alias is not the same register */
1604 if (arg != args[arg_ct->alias_index])
1605 goto allocate_in_reg;
1606 } else {
1607 /* if the input is aliased to an output and if it is
1608 not dead after the instruction, we must allocate
1609 a new register and move it */
1610 if (!IS_DEAD_IARG(i - nb_oargs))
1611 goto allocate_in_reg;
1612 }
c896fe29
FB		 1613 }
1614 reg = ts->reg;
1615 if (tcg_regset_test_reg(arg_ct->u.regs, reg)) {
1616 /* nothing to do : the constraint is satisfied */
1617 } else {
1618 allocate_in_reg:
1619 /* allocate a new register matching the constraint
1620 and move the temporary register into it */
1621 reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs);
1622 tcg_out_mov(s, reg, ts->reg);
1623 }
c896fe29
FB		 1624 new_args[i] = reg;
1625 const_args[i] = 0;
1626 tcg_regset_set_reg(allocated_regs, reg);
1627 iarg_end: ;
1628 }
1629
e8996ee0
FB		 1630 if (def->flags & TCG_OPF_BB_END) {
1631 tcg_reg_alloc_bb_end(s, allocated_regs);
1632 } else {
1633 /* mark dead temporaries and free the associated registers */
1634 for(i = 0; i < nb_iargs; i++) {
1635 arg = args[nb_oargs + i];
1636 if (IS_DEAD_IARG(i)) {
1637 ts = &s->temps[arg];
1638 if (!ts->fixed_reg) {
1639 if (ts->val_type == TEMP_VAL_REG)
1640 s->reg_to_temp[ts->reg] = -1;
1641 ts->val_type = TEMP_VAL_DEAD;
1642 }
c896fe29
FB		 1643 }
1644 }
e8996ee0
FB		 1645
1646 if (def->flags & TCG_OPF_CALL_CLOBBER) {
1647 /* XXX: permit generic clobber register list ? */
1648 for(reg = 0; reg < TCG_TARGET_NB_REGS; reg++) {
1649 if (tcg_regset_test_reg(tcg_target_call_clobber_regs, reg)) {
1650 tcg_reg_free(s, reg);
1651 }
c896fe29 1652 }
e8996ee0
FB		 1653 /* XXX: for load/store we could do that only for the slow path
1654 (i.e. when a memory callback is called) */
1655
1656 /* store globals and free associated registers (we assume the insn
1657 can modify any global. */
1658 save_globals(s, allocated_regs);
c896fe29 1659 }
e8996ee0
FB		 1660
1661 /* satisfy the output constraints */
1662 tcg_regset_set(allocated_regs, s->reserved_regs);
1663 for(k = 0; k < nb_oargs; k++) {
1664 i = def->sorted_args[k];
1665 arg = args[i];
1666 arg_ct = &def->args_ct[i];
1667 ts = &s->temps[arg];
1668 if (arg_ct->ct & TCG_CT_ALIAS) {
1669 reg = new_args[arg_ct->alias_index];
1670 } else {
1671 /* if fixed register, we try to use it */
1672 reg = ts->reg;
1673 if (ts->fixed_reg &&
1674 tcg_regset_test_reg(arg_ct->u.regs, reg)) {
1675 goto oarg_end;
1676 }
1677 reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs);
c896fe29 1678 }
e8996ee0
FB		 1679 tcg_regset_set_reg(allocated_regs, reg);
1680 /* if a fixed register is used, then a move will be done afterwards */
1681 if (!ts->fixed_reg) {
1682 if (ts->val_type == TEMP_VAL_REG)
1683 s->reg_to_temp[ts->reg] = -1;
1684 ts->val_type = TEMP_VAL_REG;
1685 ts->reg = reg;
1686 /* temp value is modified, so the value kept in memory is
1687 potentially not the same */
1688 ts->mem_coherent = 0;
1689 s->reg_to_temp[reg] = arg;
1690 }
1691 oarg_end:
1692 new_args[i] = reg;
c896fe29 1693 }
c896fe29
FB		 1694 }
1695
c896fe29
FB		 1696 /* emit instruction */
1697 tcg_out_op(s, opc, new_args, const_args);
1698
1699 /* move the outputs in the correct register if needed */
1700 for(i = 0; i < nb_oargs; i++) {
1701 ts = &s->temps[args[i]];
1702 reg = new_args[i];
1703 if (ts->fixed_reg && ts->reg != reg) {
1704 tcg_out_mov(s, ts->reg, reg);
1705 }
1706 }
1707}
1708
b03cce8e
FB		 1709#ifdef TCG_TARGET_STACK_GROWSUP
1710#define STACK_DIR(x) (-(x))
1711#else
1712#define STACK_DIR(x) (x)
1713#endif
1714
c896fe29
FB		 1715static int tcg_reg_alloc_call(TCGContext *s, const TCGOpDef *def,
1716 int opc, const TCGArg *args,
1717 unsigned int dead_iargs)
1718{
1719 int nb_iargs, nb_oargs, flags, nb_regs, i, reg, nb_params;
1720 TCGArg arg, func_arg;
1721 TCGTemp *ts;
f54b3f92 1722 tcg_target_long stack_offset, call_stack_size, func_addr;
b03cce8e 1723 int const_func_arg, allocate_args;
c896fe29
FB		 1724 TCGRegSet allocated_regs;
1725 const TCGArgConstraint *arg_ct;
1726
1727 arg = *args++;
1728
1729 nb_oargs = arg >> 16;
1730 nb_iargs = arg & 0xffff;
1731 nb_params = nb_iargs - 1;
1732
1733 flags = args[nb_oargs + nb_iargs];
1734
1735 nb_regs = tcg_target_get_call_iarg_regs_count(flags);
1736 if (nb_regs > nb_params)
1737 nb_regs = nb_params;
1738
1739 /* assign stack slots first */
1740 /* XXX: preallocate call stack */
1741 call_stack_size = (nb_params - nb_regs) * sizeof(tcg_target_long);
1742 call_stack_size = (call_stack_size + TCG_TARGET_STACK_ALIGN - 1) &
1743 ~(TCG_TARGET_STACK_ALIGN - 1);
b03cce8e
FB		 1744 allocate_args = (call_stack_size > TCG_STATIC_CALL_ARGS_SIZE);
1745 if (allocate_args) {
1746 tcg_out_addi(s, TCG_REG_CALL_STACK, -STACK_DIR(call_stack_size));
1747 }
39cf05d3
FB		 1748
1749 stack_offset = TCG_TARGET_CALL_STACK_OFFSET;
c896fe29
FB		 1750 for(i = nb_regs; i < nb_params; i++) {
1751 arg = args[nb_oargs + i];
39cf05d3
FB		 1752#ifdef TCG_TARGET_STACK_GROWSUP
1753 stack_offset -= sizeof(tcg_target_long);
1754#endif
1755 if (arg != TCG_CALL_DUMMY_ARG) {
1756 ts = &s->temps[arg];
1757 if (ts->val_type == TEMP_VAL_REG) {
1758 tcg_out_st(s, ts->type, ts->reg, TCG_REG_CALL_STACK, stack_offset);
1759 } else if (ts->val_type == TEMP_VAL_MEM) {
1760 reg = tcg_reg_alloc(s, tcg_target_available_regs[ts->type],
1761 s->reserved_regs);
1762 /* XXX: not correct if reading values from the stack */
1763 tcg_out_ld(s, ts->type, reg, ts->mem_reg, ts->mem_offset);
1764 tcg_out_st(s, ts->type, reg, TCG_REG_CALL_STACK, stack_offset);
1765 } else if (ts->val_type == TEMP_VAL_CONST) {
1766 reg = tcg_reg_alloc(s, tcg_target_available_regs[ts->type],
1767 s->reserved_regs);
1768 /* XXX: sign extend may be needed on some targets */
1769 tcg_out_movi(s, ts->type, reg, ts->val);
1770 tcg_out_st(s, ts->type, reg, TCG_REG_CALL_STACK, stack_offset);
1771 } else {
1772 tcg_abort();
1773 }
c896fe29 1774 }
39cf05d3
FB		 1775#ifndef TCG_TARGET_STACK_GROWSUP
1776 stack_offset += sizeof(tcg_target_long);
1777#endif
c896fe29
FB		 1778 }
1779
1780 /* assign input registers */
1781 tcg_regset_set(allocated_regs, s->reserved_regs);
1782 for(i = 0; i < nb_regs; i++) {
1783 arg = args[nb_oargs + i];
39cf05d3
FB		 1784 if (arg != TCG_CALL_DUMMY_ARG) {
1785 ts = &s->temps[arg];
1786 reg = tcg_target_call_iarg_regs[i];
1787 tcg_reg_free(s, reg);
1788 if (ts->val_type == TEMP_VAL_REG) {
1789 if (ts->reg != reg) {
1790 tcg_out_mov(s, reg, ts->reg);
1791 }
1792 } else if (ts->val_type == TEMP_VAL_MEM) {
1793 tcg_out_ld(s, ts->type, reg, ts->mem_reg, ts->mem_offset);
1794 } else if (ts->val_type == TEMP_VAL_CONST) {
1795 /* XXX: sign extend ? */
1796 tcg_out_movi(s, ts->type, reg, ts->val);
1797 } else {
1798 tcg_abort();
c896fe29 1799 }
39cf05d3 1800 tcg_regset_set_reg(allocated_regs, reg);
c896fe29 1801 }
c896fe29
FB		 1802 }
1803
1804 /* assign function address */
1805 func_arg = args[nb_oargs + nb_iargs - 1];
1806 arg_ct = &def->args_ct[0];
1807 ts = &s->temps[func_arg];
f54b3f92 1808 func_addr = ts->val;
c896fe29
FB		 1809 const_func_arg = 0;
1810 if (ts->val_type == TEMP_VAL_MEM) {
1811 reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs);
e4d5434c 1812 tcg_out_ld(s, ts->type, reg, ts->mem_reg, ts->mem_offset);
c896fe29 1813 func_arg = reg;
e8996ee0 1814 tcg_regset_set_reg(allocated_regs, reg);
c896fe29
FB		 1815 } else if (ts->val_type == TEMP_VAL_REG) {
1816 reg = ts->reg;
1817 if (!tcg_regset_test_reg(arg_ct->u.regs, reg)) {
1818 reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs);
1819 tcg_out_mov(s, reg, ts->reg);
1820 }
1821 func_arg = reg;
e8996ee0 1822 tcg_regset_set_reg(allocated_regs, reg);
c896fe29 1823 } else if (ts->val_type == TEMP_VAL_CONST) {
f54b3f92 1824 if (tcg_target_const_match(func_addr, arg_ct)) {
c896fe29 1825 const_func_arg = 1;
f54b3f92 1826 func_arg = func_addr;
c896fe29
FB		 1827 } else {
1828 reg = tcg_reg_alloc(s, arg_ct->u.regs, allocated_regs);
f54b3f92 1829 tcg_out_movi(s, ts->type, reg, func_addr);
c896fe29 1830 func_arg = reg;
e8996ee0 1831 tcg_regset_set_reg(allocated_regs, reg);
c896fe29
FB		 1832 }
1833 } else {
1834 tcg_abort();
1835 }
e8996ee0 1836
c896fe29
FB		 1837
1838 /* mark dead temporaries and free the associated registers */
c6e113f5 1839 for(i = 0; i < nb_iargs; i++) {
c896fe29
FB		 1840 arg = args[nb_oargs + i];
1841 if (IS_DEAD_IARG(i)) {
1842 ts = &s->temps[arg];
e8996ee0 1843 if (!ts->fixed_reg) {
c896fe29
FB		 1844 if (ts->val_type == TEMP_VAL_REG)
1845 s->reg_to_temp[ts->reg] = -1;
1846 ts->val_type = TEMP_VAL_DEAD;
1847 }
1848 }
1849 }
1850
1851 /* clobber call registers */
1852 for(reg = 0; reg < TCG_TARGET_NB_REGS; reg++) {
1853 if (tcg_regset_test_reg(tcg_target_call_clobber_regs, reg)) {
1854 tcg_reg_free(s, reg);
1855 }
1856 }
1857
1858 /* store globals and free associated registers (we assume the call
1859 can modify any global. */
e8996ee0 1860 save_globals(s, allocated_regs);
c896fe29
FB		 1861
1862 tcg_out_op(s, opc, &func_arg, &const_func_arg);
1863
b03cce8e
FB		 1864 if (allocate_args) {
1865 tcg_out_addi(s, TCG_REG_CALL_STACK, STACK_DIR(call_stack_size));
1866 }
c896fe29
FB		 1867
1868 /* assign output registers and emit moves if needed */
1869 for(i = 0; i < nb_oargs; i++) {
1870 arg = args[i];
1871 ts = &s->temps[arg];
1872 reg = tcg_target_call_oarg_regs[i];
e8996ee0 1873 assert(s->reg_to_temp[reg] == -1);
c896fe29
FB		 1874 if (ts->fixed_reg) {
1875 if (ts->reg != reg) {
1876 tcg_out_mov(s, ts->reg, reg);
1877 }
1878 } else {
1879 if (ts->val_type == TEMP_VAL_REG)
1880 s->reg_to_temp[ts->reg] = -1;
1881 ts->val_type = TEMP_VAL_REG;
1882 ts->reg = reg;
1883 ts->mem_coherent = 0;
1884 s->reg_to_temp[reg] = arg;
1885 }
1886 }
1887
1888 return nb_iargs + nb_oargs + def->nb_cargs + 1;
1889}
1890
1891#ifdef CONFIG_PROFILER
1892
54604f74 1893static int64_t tcg_table_op_count[NB_OPS];
c896fe29
FB		 1894
1895void dump_op_count(void)
1896{
1897 int i;
1898 FILE *f;
54604f74 1899 f = fopen("/tmp/op.log", "w");
c896fe29 1900 for(i = INDEX_op_end; i < NB_OPS; i++) {
54604f74 1901 fprintf(f, "%s %" PRId64 "\n", tcg_op_defs[i].name, tcg_table_op_count[i]);
c896fe29
FB		 1902 }
1903 fclose(f);
1904}
1905#endif
1906
1907
1908static inline int tcg_gen_code_common(TCGContext *s, uint8_t *gen_code_buf,
2ba1eeb6 1909 long search_pc)
c896fe29 1910{
b314f270 1911 int opc, op_index;
c896fe29
FB		 1912 const TCGOpDef *def;
1913 unsigned int dead_iargs;
1914 const TCGArg *args;
1915
1916#ifdef DEBUG_DISAS
1917 if (unlikely(loglevel & CPU_LOG_TB_OP)) {
1918 fprintf(logfile, "OP:\n");
1919 tcg_dump_ops(s, logfile);
1920 fprintf(logfile, "\n");
1921 }
1922#endif
1923
a23a9ec6
FB		 1924#ifdef CONFIG_PROFILER
1925 s->la_time -= profile_getclock();
1926#endif
c896fe29 1927 tcg_liveness_analysis(s);
a23a9ec6
FB		 1928#ifdef CONFIG_PROFILER
1929 s->la_time += profile_getclock();
1930#endif
c896fe29
FB		 1931
1932#ifdef DEBUG_DISAS
1933 if (unlikely(loglevel & CPU_LOG_TB_OP_OPT)) {
1934 fprintf(logfile, "OP after la:\n");
1935 tcg_dump_ops(s, logfile);
1936 fprintf(logfile, "\n");
1937 }
1938#endif
1939
1940 tcg_reg_alloc_start(s);
1941
1942 s->code_buf = gen_code_buf;
1943 s->code_ptr = gen_code_buf;
1944
c896fe29
FB		 1945 args = gen_opparam_buf;
1946 op_index = 0;
b3db8758 1947
c896fe29
FB		 1948 for(;;) {
1949 opc = gen_opc_buf[op_index];
1950#ifdef CONFIG_PROFILER
54604f74 1951 tcg_table_op_count[opc]++;
c896fe29
FB		 1952#endif
1953 def = &tcg_op_defs[opc];
1954#if 0
1955 printf("%s: %d %d %d\n", def->name,
1956 def->nb_oargs, def->nb_iargs, def->nb_cargs);
1957 // dump_regs(s);
1958#endif
1959 switch(opc) {
1960 case INDEX_op_mov_i32:
1961#if TCG_TARGET_REG_BITS == 64
1962 case INDEX_op_mov_i64:
1963#endif
1964 dead_iargs = s->op_dead_iargs[op_index];
1965 tcg_reg_alloc_mov(s, def, args, dead_iargs);
1966 break;
e8996ee0
FB		 1967 case INDEX_op_movi_i32:
1968#if TCG_TARGET_REG_BITS == 64
1969 case INDEX_op_movi_i64:
1970#endif
1971 tcg_reg_alloc_movi(s, args);
1972 break;
7e4597d7
FB		 1973 case INDEX_op_debug_insn_start:
1974 /* debug instruction */
1975 break;
c896fe29
FB		 1976 case INDEX_op_nop:
1977 case INDEX_op_nop1:
1978 case INDEX_op_nop2:
1979 case INDEX_op_nop3:
1980 break;
1981 case INDEX_op_nopn:
1982 args += args[0];
1983 goto next;
5ff9d6a4
FB		 1984 case INDEX_op_discard:
1985 {
1986 TCGTemp *ts;
1987 ts = &s->temps[args[0]];
1988 /* mark the temporary as dead */
e8996ee0 1989 if (!ts->fixed_reg) {
5ff9d6a4
FB		 1990 if (ts->val_type == TEMP_VAL_REG)
1991 s->reg_to_temp[ts->reg] = -1;
1992 ts->val_type = TEMP_VAL_DEAD;
1993 }
1994 }
1995 break;
c896fe29 1996 case INDEX_op_set_label:
e8996ee0 1997 tcg_reg_alloc_bb_end(s, s->reserved_regs);
c896fe29
FB		 1998 tcg_out_label(s, args[0], (long)s->code_ptr);
1999 break;
2000 case INDEX_op_call:
2001 dead_iargs = s->op_dead_iargs[op_index];
2002 args += tcg_reg_alloc_call(s, def, opc, args, dead_iargs);
2003 goto next;
2004 case INDEX_op_end:
2005 goto the_end;
c896fe29
FB		 2006 default:
2007 /* Note: in order to speed up the code, it would be much
2008 faster to have specialized register allocator functions for
2009 some common argument patterns */
2010 dead_iargs = s->op_dead_iargs[op_index];
2011 tcg_reg_alloc_op(s, def, opc, args, dead_iargs);
2012 break;
2013 }
2014 args += def->nb_args;
8df1ca4b 2015 next:
2ba1eeb6 2016 if (search_pc >= 0 && search_pc < s->code_ptr - gen_code_buf) {
b314f270 2017 return op_index;
c896fe29
FB		 2018 }
2019 op_index++;
2020#ifndef NDEBUG
2021 check_regs(s);
2022#endif
2023 }
2024 the_end:
2025 return -1;
2026}
2027
54604f74 2028int tcg_gen_code(TCGContext *s, uint8_t *gen_code_buf)
c896fe29
FB		 2029{
2030#ifdef CONFIG_PROFILER
2031 {
c896fe29
FB		 2032 int n;
2033 n = (gen_opc_ptr - gen_opc_buf);
a23a9ec6
FB		 2034 s->op_count += n;
2035 if (n > s->op_count_max)
2036 s->op_count_max = n;
2037
2038 s->temp_count += s->nb_temps;
2039 if (s->nb_temps > s->temp_count_max)
2040 s->temp_count_max = s->nb_temps;
c896fe29
FB		 2041 }
2042#endif
2043
2ba1eeb6 2044 tcg_gen_code_common(s, gen_code_buf, -1);
c896fe29
FB		 2045
2046 /* flush instruction cache */
2047 flush_icache_range((unsigned long)gen_code_buf,
2048 (unsigned long)s->code_ptr);
2049 return s->code_ptr - gen_code_buf;
2050}
2051
2ba1eeb6 2052/* Return the index of the micro operation such as the pc after is <
623e265c
PB		 2053 offset bytes from the start of the TB. The contents of gen_code_buf must
2054 not be changed, though writing the same values is ok.
2055 Return -1 if not found. */
54604f74 2056int tcg_gen_code_search_pc(TCGContext *s, uint8_t *gen_code_buf, long offset)
c896fe29 2057{
623e265c 2058 return tcg_gen_code_common(s, gen_code_buf, offset);
c896fe29 2059}
a23a9ec6
FB		 2060
2061#ifdef CONFIG_PROFILER
2062void tcg_dump_info(FILE *f,
2063 int (*cpu_fprintf)(FILE *f, const char *fmt, ...))
2064{
2065 TCGContext *s = &tcg_ctx;
2066 int64_t tot;
2067
2068 tot = s->interm_time + s->code_time;
2069 cpu_fprintf(f, "JIT cycles %" PRId64 " (%0.3f s at 2.4 GHz)\n",
2070 tot, tot / 2.4e9);
2071 cpu_fprintf(f, "translated TBs %" PRId64 " (aborted=%" PRId64 " %0.1f%%)\n",
2072 s->tb_count,
2073 s->tb_count1 - s->tb_count,
2074 s->tb_count1 ? (double)(s->tb_count1 - s->tb_count) / s->tb_count1 * 100.0 : 0);
2075 cpu_fprintf(f, "avg ops/TB %0.1f max=%d\n",
2076 s->tb_count ? (double)s->op_count / s->tb_count : 0, s->op_count_max);
2077 cpu_fprintf(f, "old ops/total ops %0.1f%%\n",
2078 s->op_count ? (double)s->old_op_count / s->op_count * 100.0 : 0);
2079 cpu_fprintf(f, "deleted ops/TB %0.2f\n",
2080 s->tb_count ?
2081 (double)s->del_op_count / s->tb_count : 0);
2082 cpu_fprintf(f, "avg temps/TB %0.2f max=%d\n",
2083 s->tb_count ?
2084 (double)s->temp_count / s->tb_count : 0,
2085 s->temp_count_max);
2086
2087 cpu_fprintf(f, "cycles/op %0.1f\n",
2088 s->op_count ? (double)tot / s->op_count : 0);
2089 cpu_fprintf(f, "cycles/in byte %0.1f\n",
2090 s->code_in_len ? (double)tot / s->code_in_len : 0);
2091 cpu_fprintf(f, "cycles/out byte %0.1f\n",
2092 s->code_out_len ? (double)tot / s->code_out_len : 0);
2093 if (tot == 0)
2094 tot = 1;
2095 cpu_fprintf(f, " gen_interm time %0.1f%%\n",
2096 (double)s->interm_time / tot * 100.0);
2097 cpu_fprintf(f, " gen_code time %0.1f%%\n",
2098 (double)s->code_time / tot * 100.0);
2099 cpu_fprintf(f, "liveness/code time %0.1f%%\n",
2100 (double)s->la_time / (s->code_time ? s->code_time : 1) * 100.0);
2101 cpu_fprintf(f, "cpu_restore count %" PRId64 "\n",
2102 s->restore_count);
2103 cpu_fprintf(f, " avg cycles %0.1f\n",
2104 s->restore_count ? (double)s->restore_time / s->restore_count : 0);
2105 {
2106 extern void dump_op_count(void);
2107 dump_op_count();
2108 }
2109}
2110#else
24bf7b3a 2111void tcg_dump_info(FILE *f,
a23a9ec6
FB		 2112 int (*cpu_fprintf)(FILE *f, const char *fmt, ...))
2113{
24bf7b3a 2114 cpu_fprintf(f, "[TCG profiler not compiled]\n");
a23a9ec6
FB		 2115}
2116#endif
Qemu copy for testing