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Commit | Line | Data |
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f8a95309 ACM |
1 | /* |
2 | * Copyright (C) 2011, Red Hat Inc, Arnaldo Carvalho de Melo <acme@redhat.com> | |
3 | * | |
4 | * Parts came from builtin-{top,stat,record}.c, see those files for further | |
5 | * copyright notes. | |
6 | * | |
7 | * Released under the GPL v2. (and only v2, not any later version) | |
8 | */ | |
9 | ||
936be503 | 10 | #include <byteswap.h> |
0f6a3015 | 11 | #include <linux/bitops.h> |
553873e1 | 12 | #include <api/fs/debugfs.h> |
4e319027 RR |
13 | #include <traceevent/event-parse.h> |
14 | #include <linux/hw_breakpoint.h> | |
15 | #include <linux/perf_event.h> | |
bec19672 | 16 | #include <sys/resource.h> |
4e319027 | 17 | #include "asm/bug.h" |
8f651eae | 18 | #include "callchain.h" |
f14d5707 | 19 | #include "cgroup.h" |
69aad6f1 | 20 | #include "evsel.h" |
70082dd9 | 21 | #include "evlist.h" |
69aad6f1 | 22 | #include "util.h" |
86bd5e86 | 23 | #include "cpumap.h" |
fd78260b | 24 | #include "thread_map.h" |
12864b31 | 25 | #include "target.h" |
26d33022 | 26 | #include "perf_regs.h" |
e3e1a54f | 27 | #include "debug.h" |
97978b3e | 28 | #include "trace-event.h" |
69aad6f1 | 29 | |
594ac61a ACM |
30 | static struct { |
31 | bool sample_id_all; | |
32 | bool exclude_guest; | |
5c5e854b | 33 | bool mmap2; |
57480d2c | 34 | bool cloexec; |
594ac61a ACM |
35 | } perf_missing_features; |
36 | ||
ce8ccff5 ACM |
37 | static int perf_evsel__no_extra_init(struct perf_evsel *evsel __maybe_unused) |
38 | { | |
39 | return 0; | |
40 | } | |
41 | ||
42 | static void perf_evsel__no_extra_fini(struct perf_evsel *evsel __maybe_unused) | |
43 | { | |
44 | } | |
45 | ||
46 | static struct { | |
47 | size_t size; | |
48 | int (*init)(struct perf_evsel *evsel); | |
49 | void (*fini)(struct perf_evsel *evsel); | |
50 | } perf_evsel__object = { | |
51 | .size = sizeof(struct perf_evsel), | |
52 | .init = perf_evsel__no_extra_init, | |
53 | .fini = perf_evsel__no_extra_fini, | |
54 | }; | |
55 | ||
56 | int perf_evsel__object_config(size_t object_size, | |
57 | int (*init)(struct perf_evsel *evsel), | |
58 | void (*fini)(struct perf_evsel *evsel)) | |
59 | { | |
60 | ||
61 | if (object_size == 0) | |
62 | goto set_methods; | |
63 | ||
64 | if (perf_evsel__object.size > object_size) | |
65 | return -EINVAL; | |
66 | ||
67 | perf_evsel__object.size = object_size; | |
68 | ||
69 | set_methods: | |
70 | if (init != NULL) | |
71 | perf_evsel__object.init = init; | |
72 | ||
73 | if (fini != NULL) | |
74 | perf_evsel__object.fini = fini; | |
75 | ||
76 | return 0; | |
77 | } | |
78 | ||
c52b12ed ACM |
79 | #define FD(e, x, y) (*(int *)xyarray__entry(e->fd, x, y)) |
80 | ||
75562573 | 81 | int __perf_evsel__sample_size(u64 sample_type) |
c2a70653 ACM |
82 | { |
83 | u64 mask = sample_type & PERF_SAMPLE_MASK; | |
84 | int size = 0; | |
85 | int i; | |
86 | ||
87 | for (i = 0; i < 64; i++) { | |
88 | if (mask & (1ULL << i)) | |
89 | size++; | |
90 | } | |
91 | ||
92 | size *= sizeof(u64); | |
93 | ||
94 | return size; | |
95 | } | |
96 | ||
75562573 AH |
97 | /** |
98 | * __perf_evsel__calc_id_pos - calculate id_pos. | |
99 | * @sample_type: sample type | |
100 | * | |
101 | * This function returns the position of the event id (PERF_SAMPLE_ID or | |
102 | * PERF_SAMPLE_IDENTIFIER) in a sample event i.e. in the array of struct | |
103 | * sample_event. | |
104 | */ | |
105 | static int __perf_evsel__calc_id_pos(u64 sample_type) | |
106 | { | |
107 | int idx = 0; | |
108 | ||
109 | if (sample_type & PERF_SAMPLE_IDENTIFIER) | |
110 | return 0; | |
111 | ||
112 | if (!(sample_type & PERF_SAMPLE_ID)) | |
113 | return -1; | |
114 | ||
115 | if (sample_type & PERF_SAMPLE_IP) | |
116 | idx += 1; | |
117 | ||
118 | if (sample_type & PERF_SAMPLE_TID) | |
119 | idx += 1; | |
120 | ||
121 | if (sample_type & PERF_SAMPLE_TIME) | |
122 | idx += 1; | |
123 | ||
124 | if (sample_type & PERF_SAMPLE_ADDR) | |
125 | idx += 1; | |
126 | ||
127 | return idx; | |
128 | } | |
129 | ||
130 | /** | |
131 | * __perf_evsel__calc_is_pos - calculate is_pos. | |
132 | * @sample_type: sample type | |
133 | * | |
134 | * This function returns the position (counting backwards) of the event id | |
135 | * (PERF_SAMPLE_ID or PERF_SAMPLE_IDENTIFIER) in a non-sample event i.e. if | |
136 | * sample_id_all is used there is an id sample appended to non-sample events. | |
137 | */ | |
138 | static int __perf_evsel__calc_is_pos(u64 sample_type) | |
139 | { | |
140 | int idx = 1; | |
141 | ||
142 | if (sample_type & PERF_SAMPLE_IDENTIFIER) | |
143 | return 1; | |
144 | ||
145 | if (!(sample_type & PERF_SAMPLE_ID)) | |
146 | return -1; | |
147 | ||
148 | if (sample_type & PERF_SAMPLE_CPU) | |
149 | idx += 1; | |
150 | ||
151 | if (sample_type & PERF_SAMPLE_STREAM_ID) | |
152 | idx += 1; | |
153 | ||
154 | return idx; | |
155 | } | |
156 | ||
157 | void perf_evsel__calc_id_pos(struct perf_evsel *evsel) | |
158 | { | |
159 | evsel->id_pos = __perf_evsel__calc_id_pos(evsel->attr.sample_type); | |
160 | evsel->is_pos = __perf_evsel__calc_is_pos(evsel->attr.sample_type); | |
161 | } | |
162 | ||
7be5ebe8 ACM |
163 | void __perf_evsel__set_sample_bit(struct perf_evsel *evsel, |
164 | enum perf_event_sample_format bit) | |
165 | { | |
166 | if (!(evsel->attr.sample_type & bit)) { | |
167 | evsel->attr.sample_type |= bit; | |
168 | evsel->sample_size += sizeof(u64); | |
75562573 | 169 | perf_evsel__calc_id_pos(evsel); |
7be5ebe8 ACM |
170 | } |
171 | } | |
172 | ||
173 | void __perf_evsel__reset_sample_bit(struct perf_evsel *evsel, | |
174 | enum perf_event_sample_format bit) | |
175 | { | |
176 | if (evsel->attr.sample_type & bit) { | |
177 | evsel->attr.sample_type &= ~bit; | |
178 | evsel->sample_size -= sizeof(u64); | |
75562573 | 179 | perf_evsel__calc_id_pos(evsel); |
7be5ebe8 ACM |
180 | } |
181 | } | |
182 | ||
75562573 AH |
183 | void perf_evsel__set_sample_id(struct perf_evsel *evsel, |
184 | bool can_sample_identifier) | |
7a5a5ca5 | 185 | { |
75562573 AH |
186 | if (can_sample_identifier) { |
187 | perf_evsel__reset_sample_bit(evsel, ID); | |
188 | perf_evsel__set_sample_bit(evsel, IDENTIFIER); | |
189 | } else { | |
190 | perf_evsel__set_sample_bit(evsel, ID); | |
191 | } | |
7a5a5ca5 ACM |
192 | evsel->attr.read_format |= PERF_FORMAT_ID; |
193 | } | |
194 | ||
ef1d1af2 ACM |
195 | void perf_evsel__init(struct perf_evsel *evsel, |
196 | struct perf_event_attr *attr, int idx) | |
197 | { | |
198 | evsel->idx = idx; | |
60b0896c | 199 | evsel->tracking = !idx; |
ef1d1af2 | 200 | evsel->attr = *attr; |
2cfda562 | 201 | evsel->leader = evsel; |
410136f5 SE |
202 | evsel->unit = ""; |
203 | evsel->scale = 1.0; | |
ef1d1af2 | 204 | INIT_LIST_HEAD(&evsel->node); |
ce8ccff5 | 205 | perf_evsel__object.init(evsel); |
bde09467 | 206 | evsel->sample_size = __perf_evsel__sample_size(attr->sample_type); |
75562573 | 207 | perf_evsel__calc_id_pos(evsel); |
ef1d1af2 ACM |
208 | } |
209 | ||
ef503831 | 210 | struct perf_evsel *perf_evsel__new_idx(struct perf_event_attr *attr, int idx) |
69aad6f1 | 211 | { |
ce8ccff5 | 212 | struct perf_evsel *evsel = zalloc(perf_evsel__object.size); |
69aad6f1 | 213 | |
ef1d1af2 ACM |
214 | if (evsel != NULL) |
215 | perf_evsel__init(evsel, attr, idx); | |
69aad6f1 ACM |
216 | |
217 | return evsel; | |
218 | } | |
219 | ||
ef503831 | 220 | struct perf_evsel *perf_evsel__newtp_idx(const char *sys, const char *name, int idx) |
efd2b924 | 221 | { |
ce8ccff5 | 222 | struct perf_evsel *evsel = zalloc(perf_evsel__object.size); |
efd2b924 ACM |
223 | |
224 | if (evsel != NULL) { | |
225 | struct perf_event_attr attr = { | |
0b80f8b3 ACM |
226 | .type = PERF_TYPE_TRACEPOINT, |
227 | .sample_type = (PERF_SAMPLE_RAW | PERF_SAMPLE_TIME | | |
228 | PERF_SAMPLE_CPU | PERF_SAMPLE_PERIOD), | |
efd2b924 ACM |
229 | }; |
230 | ||
e48ffe2b ACM |
231 | if (asprintf(&evsel->name, "%s:%s", sys, name) < 0) |
232 | goto out_free; | |
233 | ||
97978b3e | 234 | evsel->tp_format = trace_event__tp_format(sys, name); |
efd2b924 ACM |
235 | if (evsel->tp_format == NULL) |
236 | goto out_free; | |
237 | ||
0b80f8b3 | 238 | event_attr_init(&attr); |
efd2b924 | 239 | attr.config = evsel->tp_format->id; |
0b80f8b3 | 240 | attr.sample_period = 1; |
efd2b924 | 241 | perf_evsel__init(evsel, &attr, idx); |
efd2b924 ACM |
242 | } |
243 | ||
244 | return evsel; | |
245 | ||
246 | out_free: | |
74cf249d | 247 | zfree(&evsel->name); |
efd2b924 ACM |
248 | free(evsel); |
249 | return NULL; | |
250 | } | |
251 | ||
8ad7013b | 252 | const char *perf_evsel__hw_names[PERF_COUNT_HW_MAX] = { |
c410431c ACM |
253 | "cycles", |
254 | "instructions", | |
255 | "cache-references", | |
256 | "cache-misses", | |
257 | "branches", | |
258 | "branch-misses", | |
259 | "bus-cycles", | |
260 | "stalled-cycles-frontend", | |
261 | "stalled-cycles-backend", | |
262 | "ref-cycles", | |
263 | }; | |
264 | ||
dd4f5223 | 265 | static const char *__perf_evsel__hw_name(u64 config) |
c410431c ACM |
266 | { |
267 | if (config < PERF_COUNT_HW_MAX && perf_evsel__hw_names[config]) | |
268 | return perf_evsel__hw_names[config]; | |
269 | ||
270 | return "unknown-hardware"; | |
271 | } | |
272 | ||
27f18617 | 273 | static int perf_evsel__add_modifiers(struct perf_evsel *evsel, char *bf, size_t size) |
c410431c | 274 | { |
27f18617 | 275 | int colon = 0, r = 0; |
c410431c | 276 | struct perf_event_attr *attr = &evsel->attr; |
c410431c ACM |
277 | bool exclude_guest_default = false; |
278 | ||
279 | #define MOD_PRINT(context, mod) do { \ | |
280 | if (!attr->exclude_##context) { \ | |
27f18617 | 281 | if (!colon) colon = ++r; \ |
c410431c ACM |
282 | r += scnprintf(bf + r, size - r, "%c", mod); \ |
283 | } } while(0) | |
284 | ||
285 | if (attr->exclude_kernel || attr->exclude_user || attr->exclude_hv) { | |
286 | MOD_PRINT(kernel, 'k'); | |
287 | MOD_PRINT(user, 'u'); | |
288 | MOD_PRINT(hv, 'h'); | |
289 | exclude_guest_default = true; | |
290 | } | |
291 | ||
292 | if (attr->precise_ip) { | |
293 | if (!colon) | |
27f18617 | 294 | colon = ++r; |
c410431c ACM |
295 | r += scnprintf(bf + r, size - r, "%.*s", attr->precise_ip, "ppp"); |
296 | exclude_guest_default = true; | |
297 | } | |
298 | ||
299 | if (attr->exclude_host || attr->exclude_guest == exclude_guest_default) { | |
300 | MOD_PRINT(host, 'H'); | |
301 | MOD_PRINT(guest, 'G'); | |
302 | } | |
303 | #undef MOD_PRINT | |
304 | if (colon) | |
27f18617 | 305 | bf[colon - 1] = ':'; |
c410431c ACM |
306 | return r; |
307 | } | |
308 | ||
27f18617 ACM |
309 | static int perf_evsel__hw_name(struct perf_evsel *evsel, char *bf, size_t size) |
310 | { | |
311 | int r = scnprintf(bf, size, "%s", __perf_evsel__hw_name(evsel->attr.config)); | |
312 | return r + perf_evsel__add_modifiers(evsel, bf + r, size - r); | |
313 | } | |
314 | ||
8ad7013b | 315 | const char *perf_evsel__sw_names[PERF_COUNT_SW_MAX] = { |
335c2f5d ACM |
316 | "cpu-clock", |
317 | "task-clock", | |
318 | "page-faults", | |
319 | "context-switches", | |
8ad7013b | 320 | "cpu-migrations", |
335c2f5d ACM |
321 | "minor-faults", |
322 | "major-faults", | |
323 | "alignment-faults", | |
324 | "emulation-faults", | |
d22d1a2a | 325 | "dummy", |
335c2f5d ACM |
326 | }; |
327 | ||
dd4f5223 | 328 | static const char *__perf_evsel__sw_name(u64 config) |
335c2f5d ACM |
329 | { |
330 | if (config < PERF_COUNT_SW_MAX && perf_evsel__sw_names[config]) | |
331 | return perf_evsel__sw_names[config]; | |
332 | return "unknown-software"; | |
333 | } | |
334 | ||
335 | static int perf_evsel__sw_name(struct perf_evsel *evsel, char *bf, size_t size) | |
336 | { | |
337 | int r = scnprintf(bf, size, "%s", __perf_evsel__sw_name(evsel->attr.config)); | |
338 | return r + perf_evsel__add_modifiers(evsel, bf + r, size - r); | |
339 | } | |
340 | ||
287e74aa JO |
341 | static int __perf_evsel__bp_name(char *bf, size_t size, u64 addr, u64 type) |
342 | { | |
343 | int r; | |
344 | ||
345 | r = scnprintf(bf, size, "mem:0x%" PRIx64 ":", addr); | |
346 | ||
347 | if (type & HW_BREAKPOINT_R) | |
348 | r += scnprintf(bf + r, size - r, "r"); | |
349 | ||
350 | if (type & HW_BREAKPOINT_W) | |
351 | r += scnprintf(bf + r, size - r, "w"); | |
352 | ||
353 | if (type & HW_BREAKPOINT_X) | |
354 | r += scnprintf(bf + r, size - r, "x"); | |
355 | ||
356 | return r; | |
357 | } | |
358 | ||
359 | static int perf_evsel__bp_name(struct perf_evsel *evsel, char *bf, size_t size) | |
360 | { | |
361 | struct perf_event_attr *attr = &evsel->attr; | |
362 | int r = __perf_evsel__bp_name(bf, size, attr->bp_addr, attr->bp_type); | |
363 | return r + perf_evsel__add_modifiers(evsel, bf + r, size - r); | |
364 | } | |
365 | ||
0b668bc9 ACM |
366 | const char *perf_evsel__hw_cache[PERF_COUNT_HW_CACHE_MAX] |
367 | [PERF_EVSEL__MAX_ALIASES] = { | |
368 | { "L1-dcache", "l1-d", "l1d", "L1-data", }, | |
369 | { "L1-icache", "l1-i", "l1i", "L1-instruction", }, | |
370 | { "LLC", "L2", }, | |
371 | { "dTLB", "d-tlb", "Data-TLB", }, | |
372 | { "iTLB", "i-tlb", "Instruction-TLB", }, | |
373 | { "branch", "branches", "bpu", "btb", "bpc", }, | |
374 | { "node", }, | |
375 | }; | |
376 | ||
377 | const char *perf_evsel__hw_cache_op[PERF_COUNT_HW_CACHE_OP_MAX] | |
378 | [PERF_EVSEL__MAX_ALIASES] = { | |
379 | { "load", "loads", "read", }, | |
380 | { "store", "stores", "write", }, | |
381 | { "prefetch", "prefetches", "speculative-read", "speculative-load", }, | |
382 | }; | |
383 | ||
384 | const char *perf_evsel__hw_cache_result[PERF_COUNT_HW_CACHE_RESULT_MAX] | |
385 | [PERF_EVSEL__MAX_ALIASES] = { | |
386 | { "refs", "Reference", "ops", "access", }, | |
387 | { "misses", "miss", }, | |
388 | }; | |
389 | ||
390 | #define C(x) PERF_COUNT_HW_CACHE_##x | |
391 | #define CACHE_READ (1 << C(OP_READ)) | |
392 | #define CACHE_WRITE (1 << C(OP_WRITE)) | |
393 | #define CACHE_PREFETCH (1 << C(OP_PREFETCH)) | |
394 | #define COP(x) (1 << x) | |
395 | ||
396 | /* | |
397 | * cache operartion stat | |
398 | * L1I : Read and prefetch only | |
399 | * ITLB and BPU : Read-only | |
400 | */ | |
401 | static unsigned long perf_evsel__hw_cache_stat[C(MAX)] = { | |
402 | [C(L1D)] = (CACHE_READ | CACHE_WRITE | CACHE_PREFETCH), | |
403 | [C(L1I)] = (CACHE_READ | CACHE_PREFETCH), | |
404 | [C(LL)] = (CACHE_READ | CACHE_WRITE | CACHE_PREFETCH), | |
405 | [C(DTLB)] = (CACHE_READ | CACHE_WRITE | CACHE_PREFETCH), | |
406 | [C(ITLB)] = (CACHE_READ), | |
407 | [C(BPU)] = (CACHE_READ), | |
408 | [C(NODE)] = (CACHE_READ | CACHE_WRITE | CACHE_PREFETCH), | |
409 | }; | |
410 | ||
411 | bool perf_evsel__is_cache_op_valid(u8 type, u8 op) | |
412 | { | |
413 | if (perf_evsel__hw_cache_stat[type] & COP(op)) | |
414 | return true; /* valid */ | |
415 | else | |
416 | return false; /* invalid */ | |
417 | } | |
418 | ||
419 | int __perf_evsel__hw_cache_type_op_res_name(u8 type, u8 op, u8 result, | |
420 | char *bf, size_t size) | |
421 | { | |
422 | if (result) { | |
423 | return scnprintf(bf, size, "%s-%s-%s", perf_evsel__hw_cache[type][0], | |
424 | perf_evsel__hw_cache_op[op][0], | |
425 | perf_evsel__hw_cache_result[result][0]); | |
426 | } | |
427 | ||
428 | return scnprintf(bf, size, "%s-%s", perf_evsel__hw_cache[type][0], | |
429 | perf_evsel__hw_cache_op[op][1]); | |
430 | } | |
431 | ||
dd4f5223 | 432 | static int __perf_evsel__hw_cache_name(u64 config, char *bf, size_t size) |
0b668bc9 ACM |
433 | { |
434 | u8 op, result, type = (config >> 0) & 0xff; | |
435 | const char *err = "unknown-ext-hardware-cache-type"; | |
436 | ||
437 | if (type > PERF_COUNT_HW_CACHE_MAX) | |
438 | goto out_err; | |
439 | ||
440 | op = (config >> 8) & 0xff; | |
441 | err = "unknown-ext-hardware-cache-op"; | |
442 | if (op > PERF_COUNT_HW_CACHE_OP_MAX) | |
443 | goto out_err; | |
444 | ||
445 | result = (config >> 16) & 0xff; | |
446 | err = "unknown-ext-hardware-cache-result"; | |
447 | if (result > PERF_COUNT_HW_CACHE_RESULT_MAX) | |
448 | goto out_err; | |
449 | ||
450 | err = "invalid-cache"; | |
451 | if (!perf_evsel__is_cache_op_valid(type, op)) | |
452 | goto out_err; | |
453 | ||
454 | return __perf_evsel__hw_cache_type_op_res_name(type, op, result, bf, size); | |
455 | out_err: | |
456 | return scnprintf(bf, size, "%s", err); | |
457 | } | |
458 | ||
459 | static int perf_evsel__hw_cache_name(struct perf_evsel *evsel, char *bf, size_t size) | |
460 | { | |
461 | int ret = __perf_evsel__hw_cache_name(evsel->attr.config, bf, size); | |
462 | return ret + perf_evsel__add_modifiers(evsel, bf + ret, size - ret); | |
463 | } | |
464 | ||
6eef3d9c ACM |
465 | static int perf_evsel__raw_name(struct perf_evsel *evsel, char *bf, size_t size) |
466 | { | |
467 | int ret = scnprintf(bf, size, "raw 0x%" PRIx64, evsel->attr.config); | |
468 | return ret + perf_evsel__add_modifiers(evsel, bf + ret, size - ret); | |
469 | } | |
470 | ||
7289f83c | 471 | const char *perf_evsel__name(struct perf_evsel *evsel) |
a4460836 | 472 | { |
7289f83c | 473 | char bf[128]; |
a4460836 | 474 | |
7289f83c ACM |
475 | if (evsel->name) |
476 | return evsel->name; | |
c410431c ACM |
477 | |
478 | switch (evsel->attr.type) { | |
479 | case PERF_TYPE_RAW: | |
6eef3d9c | 480 | perf_evsel__raw_name(evsel, bf, sizeof(bf)); |
c410431c ACM |
481 | break; |
482 | ||
483 | case PERF_TYPE_HARDWARE: | |
7289f83c | 484 | perf_evsel__hw_name(evsel, bf, sizeof(bf)); |
c410431c | 485 | break; |
0b668bc9 ACM |
486 | |
487 | case PERF_TYPE_HW_CACHE: | |
7289f83c | 488 | perf_evsel__hw_cache_name(evsel, bf, sizeof(bf)); |
0b668bc9 ACM |
489 | break; |
490 | ||
335c2f5d | 491 | case PERF_TYPE_SOFTWARE: |
7289f83c | 492 | perf_evsel__sw_name(evsel, bf, sizeof(bf)); |
335c2f5d ACM |
493 | break; |
494 | ||
a4460836 | 495 | case PERF_TYPE_TRACEPOINT: |
7289f83c | 496 | scnprintf(bf, sizeof(bf), "%s", "unknown tracepoint"); |
a4460836 ACM |
497 | break; |
498 | ||
287e74aa JO |
499 | case PERF_TYPE_BREAKPOINT: |
500 | perf_evsel__bp_name(evsel, bf, sizeof(bf)); | |
501 | break; | |
502 | ||
c410431c | 503 | default: |
ca1b1457 RR |
504 | scnprintf(bf, sizeof(bf), "unknown attr type: %d", |
505 | evsel->attr.type); | |
a4460836 | 506 | break; |
c410431c ACM |
507 | } |
508 | ||
7289f83c ACM |
509 | evsel->name = strdup(bf); |
510 | ||
511 | return evsel->name ?: "unknown"; | |
c410431c ACM |
512 | } |
513 | ||
717e263f NK |
514 | const char *perf_evsel__group_name(struct perf_evsel *evsel) |
515 | { | |
516 | return evsel->group_name ?: "anon group"; | |
517 | } | |
518 | ||
519 | int perf_evsel__group_desc(struct perf_evsel *evsel, char *buf, size_t size) | |
520 | { | |
521 | int ret; | |
522 | struct perf_evsel *pos; | |
523 | const char *group_name = perf_evsel__group_name(evsel); | |
524 | ||
525 | ret = scnprintf(buf, size, "%s", group_name); | |
526 | ||
527 | ret += scnprintf(buf + ret, size - ret, " { %s", | |
528 | perf_evsel__name(evsel)); | |
529 | ||
530 | for_each_group_member(pos, evsel) | |
531 | ret += scnprintf(buf + ret, size - ret, ", %s", | |
532 | perf_evsel__name(pos)); | |
533 | ||
534 | ret += scnprintf(buf + ret, size - ret, " }"); | |
535 | ||
536 | return ret; | |
537 | } | |
538 | ||
6bedfab6 | 539 | static void |
72a128aa | 540 | perf_evsel__config_callgraph(struct perf_evsel *evsel) |
6bedfab6 JO |
541 | { |
542 | bool function = perf_evsel__is_function_event(evsel); | |
543 | struct perf_event_attr *attr = &evsel->attr; | |
544 | ||
545 | perf_evsel__set_sample_bit(evsel, CALLCHAIN); | |
546 | ||
72a128aa | 547 | if (callchain_param.record_mode == CALLCHAIN_DWARF) { |
6bedfab6 JO |
548 | if (!function) { |
549 | perf_evsel__set_sample_bit(evsel, REGS_USER); | |
550 | perf_evsel__set_sample_bit(evsel, STACK_USER); | |
551 | attr->sample_regs_user = PERF_REGS_MASK; | |
72a128aa | 552 | attr->sample_stack_user = callchain_param.dump_size; |
6bedfab6 JO |
553 | attr->exclude_callchain_user = 1; |
554 | } else { | |
555 | pr_info("Cannot use DWARF unwind for function trace event," | |
556 | " falling back to framepointers.\n"); | |
557 | } | |
558 | } | |
559 | ||
560 | if (function) { | |
561 | pr_info("Disabling user space callchains for function trace event.\n"); | |
562 | attr->exclude_callchain_user = 1; | |
563 | } | |
564 | } | |
565 | ||
774cb499 JO |
566 | /* |
567 | * The enable_on_exec/disabled value strategy: | |
568 | * | |
569 | * 1) For any type of traced program: | |
570 | * - all independent events and group leaders are disabled | |
571 | * - all group members are enabled | |
572 | * | |
573 | * Group members are ruled by group leaders. They need to | |
574 | * be enabled, because the group scheduling relies on that. | |
575 | * | |
576 | * 2) For traced programs executed by perf: | |
577 | * - all independent events and group leaders have | |
578 | * enable_on_exec set | |
579 | * - we don't specifically enable or disable any event during | |
580 | * the record command | |
581 | * | |
582 | * Independent events and group leaders are initially disabled | |
583 | * and get enabled by exec. Group members are ruled by group | |
584 | * leaders as stated in 1). | |
585 | * | |
586 | * 3) For traced programs attached by perf (pid/tid): | |
587 | * - we specifically enable or disable all events during | |
588 | * the record command | |
589 | * | |
590 | * When attaching events to already running traced we | |
591 | * enable/disable events specifically, as there's no | |
592 | * initial traced exec call. | |
593 | */ | |
b4006796 | 594 | void perf_evsel__config(struct perf_evsel *evsel, struct record_opts *opts) |
0f82ebc4 | 595 | { |
3c176311 | 596 | struct perf_evsel *leader = evsel->leader; |
0f82ebc4 | 597 | struct perf_event_attr *attr = &evsel->attr; |
60b0896c | 598 | int track = evsel->tracking; |
3aa5939d | 599 | bool per_cpu = opts->target.default_per_cpu && !opts->target.per_thread; |
0f82ebc4 | 600 | |
594ac61a | 601 | attr->sample_id_all = perf_missing_features.sample_id_all ? 0 : 1; |
0f82ebc4 | 602 | attr->inherit = !opts->no_inherit; |
0f82ebc4 | 603 | |
7be5ebe8 ACM |
604 | perf_evsel__set_sample_bit(evsel, IP); |
605 | perf_evsel__set_sample_bit(evsel, TID); | |
0f82ebc4 | 606 | |
3c176311 JO |
607 | if (evsel->sample_read) { |
608 | perf_evsel__set_sample_bit(evsel, READ); | |
609 | ||
610 | /* | |
611 | * We need ID even in case of single event, because | |
612 | * PERF_SAMPLE_READ process ID specific data. | |
613 | */ | |
75562573 | 614 | perf_evsel__set_sample_id(evsel, false); |
3c176311 JO |
615 | |
616 | /* | |
617 | * Apply group format only if we belong to group | |
618 | * with more than one members. | |
619 | */ | |
620 | if (leader->nr_members > 1) { | |
621 | attr->read_format |= PERF_FORMAT_GROUP; | |
622 | attr->inherit = 0; | |
623 | } | |
624 | } | |
625 | ||
0f82ebc4 | 626 | /* |
17314e23 | 627 | * We default some events to have a default interval. But keep |
0f82ebc4 ACM |
628 | * it a weak assumption overridable by the user. |
629 | */ | |
17314e23 | 630 | if (!attr->sample_period || (opts->user_freq != UINT_MAX || |
0f82ebc4 ACM |
631 | opts->user_interval != ULLONG_MAX)) { |
632 | if (opts->freq) { | |
7be5ebe8 | 633 | perf_evsel__set_sample_bit(evsel, PERIOD); |
0f82ebc4 ACM |
634 | attr->freq = 1; |
635 | attr->sample_freq = opts->freq; | |
636 | } else { | |
637 | attr->sample_period = opts->default_interval; | |
638 | } | |
639 | } | |
640 | ||
3c176311 JO |
641 | /* |
642 | * Disable sampling for all group members other | |
643 | * than leader in case leader 'leads' the sampling. | |
644 | */ | |
645 | if ((leader != evsel) && leader->sample_read) { | |
646 | attr->sample_freq = 0; | |
647 | attr->sample_period = 0; | |
648 | } | |
649 | ||
0f82ebc4 ACM |
650 | if (opts->no_samples) |
651 | attr->sample_freq = 0; | |
652 | ||
653 | if (opts->inherit_stat) | |
654 | attr->inherit_stat = 1; | |
655 | ||
656 | if (opts->sample_address) { | |
7be5ebe8 | 657 | perf_evsel__set_sample_bit(evsel, ADDR); |
0f82ebc4 ACM |
658 | attr->mmap_data = track; |
659 | } | |
660 | ||
f140373b JO |
661 | /* |
662 | * We don't allow user space callchains for function trace | |
663 | * event, due to issues with page faults while tracing page | |
664 | * fault handler and its overall trickiness nature. | |
665 | */ | |
666 | if (perf_evsel__is_function_event(evsel)) | |
667 | evsel->attr.exclude_callchain_user = 1; | |
668 | ||
72a128aa NK |
669 | if (callchain_param.enabled && !evsel->no_aux_samples) |
670 | perf_evsel__config_callgraph(evsel); | |
26d33022 | 671 | |
6a21c0b5 SE |
672 | if (opts->sample_intr_regs) { |
673 | attr->sample_regs_intr = PERF_REGS_MASK; | |
674 | perf_evsel__set_sample_bit(evsel, REGS_INTR); | |
675 | } | |
676 | ||
3aa5939d | 677 | if (target__has_cpu(&opts->target)) |
7be5ebe8 | 678 | perf_evsel__set_sample_bit(evsel, CPU); |
0f82ebc4 | 679 | |
3e76ac78 | 680 | if (opts->period) |
7be5ebe8 | 681 | perf_evsel__set_sample_bit(evsel, PERIOD); |
3e76ac78 | 682 | |
8affc2b8 AK |
683 | /* |
684 | * When the user explicitely disabled time don't force it here. | |
685 | */ | |
686 | if (opts->sample_time && | |
687 | (!perf_missing_features.sample_id_all && | |
688 | (!opts->no_inherit || target__has_cpu(&opts->target) || per_cpu))) | |
7be5ebe8 | 689 | perf_evsel__set_sample_bit(evsel, TIME); |
0f82ebc4 | 690 | |
6ff1ce76 | 691 | if (opts->raw_samples && !evsel->no_aux_samples) { |
7be5ebe8 ACM |
692 | perf_evsel__set_sample_bit(evsel, TIME); |
693 | perf_evsel__set_sample_bit(evsel, RAW); | |
694 | perf_evsel__set_sample_bit(evsel, CPU); | |
0f82ebc4 ACM |
695 | } |
696 | ||
ccf49bfc | 697 | if (opts->sample_address) |
1e7ed5ec | 698 | perf_evsel__set_sample_bit(evsel, DATA_SRC); |
ccf49bfc | 699 | |
509051ea | 700 | if (opts->no_buffering) { |
0f82ebc4 ACM |
701 | attr->watermark = 0; |
702 | attr->wakeup_events = 1; | |
703 | } | |
6ff1ce76 | 704 | if (opts->branch_stack && !evsel->no_aux_samples) { |
7be5ebe8 | 705 | perf_evsel__set_sample_bit(evsel, BRANCH_STACK); |
bdfebd84 RAV |
706 | attr->branch_sample_type = opts->branch_stack; |
707 | } | |
0f82ebc4 | 708 | |
05484298 | 709 | if (opts->sample_weight) |
1e7ed5ec | 710 | perf_evsel__set_sample_bit(evsel, WEIGHT); |
05484298 | 711 | |
5c5e854b | 712 | attr->mmap = track; |
a5a5ba72 | 713 | attr->mmap2 = track && !perf_missing_features.mmap2; |
5c5e854b | 714 | attr->comm = track; |
0f82ebc4 | 715 | |
475eeab9 | 716 | if (opts->sample_transaction) |
1e7ed5ec | 717 | perf_evsel__set_sample_bit(evsel, TRANSACTION); |
475eeab9 | 718 | |
774cb499 JO |
719 | /* |
720 | * XXX see the function comment above | |
721 | * | |
722 | * Disabling only independent events or group leaders, | |
723 | * keeping group members enabled. | |
724 | */ | |
823254ed | 725 | if (perf_evsel__is_group_leader(evsel)) |
774cb499 JO |
726 | attr->disabled = 1; |
727 | ||
728 | /* | |
729 | * Setting enable_on_exec for independent events and | |
730 | * group leaders for traced executed by perf. | |
731 | */ | |
6619a53e AK |
732 | if (target__none(&opts->target) && perf_evsel__is_group_leader(evsel) && |
733 | !opts->initial_delay) | |
0f82ebc4 | 734 | attr->enable_on_exec = 1; |
2afd2bcf AH |
735 | |
736 | if (evsel->immediate) { | |
737 | attr->disabled = 0; | |
738 | attr->enable_on_exec = 0; | |
739 | } | |
0f82ebc4 ACM |
740 | } |
741 | ||
8885846f | 742 | static int perf_evsel__alloc_fd(struct perf_evsel *evsel, int ncpus, int nthreads) |
69aad6f1 | 743 | { |
4af4c955 | 744 | int cpu, thread; |
bf8e8f4b AH |
745 | |
746 | if (evsel->system_wide) | |
747 | nthreads = 1; | |
748 | ||
69aad6f1 | 749 | evsel->fd = xyarray__new(ncpus, nthreads, sizeof(int)); |
4af4c955 DA |
750 | |
751 | if (evsel->fd) { | |
752 | for (cpu = 0; cpu < ncpus; cpu++) { | |
753 | for (thread = 0; thread < nthreads; thread++) { | |
754 | FD(evsel, cpu, thread) = -1; | |
755 | } | |
756 | } | |
757 | } | |
758 | ||
69aad6f1 ACM |
759 | return evsel->fd != NULL ? 0 : -ENOMEM; |
760 | } | |
761 | ||
e2407bef AK |
762 | static int perf_evsel__run_ioctl(struct perf_evsel *evsel, int ncpus, int nthreads, |
763 | int ioc, void *arg) | |
745cefc5 ACM |
764 | { |
765 | int cpu, thread; | |
766 | ||
bf8e8f4b AH |
767 | if (evsel->system_wide) |
768 | nthreads = 1; | |
769 | ||
745cefc5 ACM |
770 | for (cpu = 0; cpu < ncpus; cpu++) { |
771 | for (thread = 0; thread < nthreads; thread++) { | |
772 | int fd = FD(evsel, cpu, thread), | |
e2407bef | 773 | err = ioctl(fd, ioc, arg); |
745cefc5 ACM |
774 | |
775 | if (err) | |
776 | return err; | |
777 | } | |
778 | } | |
779 | ||
780 | return 0; | |
781 | } | |
782 | ||
e2407bef AK |
783 | int perf_evsel__set_filter(struct perf_evsel *evsel, int ncpus, int nthreads, |
784 | const char *filter) | |
785 | { | |
786 | return perf_evsel__run_ioctl(evsel, ncpus, nthreads, | |
787 | PERF_EVENT_IOC_SET_FILTER, | |
788 | (void *)filter); | |
789 | } | |
790 | ||
791 | int perf_evsel__enable(struct perf_evsel *evsel, int ncpus, int nthreads) | |
792 | { | |
793 | return perf_evsel__run_ioctl(evsel, ncpus, nthreads, | |
794 | PERF_EVENT_IOC_ENABLE, | |
795 | 0); | |
796 | } | |
797 | ||
70db7533 ACM |
798 | int perf_evsel__alloc_id(struct perf_evsel *evsel, int ncpus, int nthreads) |
799 | { | |
bf8e8f4b AH |
800 | if (evsel->system_wide) |
801 | nthreads = 1; | |
802 | ||
a91e5431 ACM |
803 | evsel->sample_id = xyarray__new(ncpus, nthreads, sizeof(struct perf_sample_id)); |
804 | if (evsel->sample_id == NULL) | |
805 | return -ENOMEM; | |
806 | ||
807 | evsel->id = zalloc(ncpus * nthreads * sizeof(u64)); | |
808 | if (evsel->id == NULL) { | |
809 | xyarray__delete(evsel->sample_id); | |
810 | evsel->sample_id = NULL; | |
811 | return -ENOMEM; | |
812 | } | |
813 | ||
814 | return 0; | |
70db7533 ACM |
815 | } |
816 | ||
a7e191c3 FD |
817 | void perf_evsel__reset_counts(struct perf_evsel *evsel, int ncpus) |
818 | { | |
819 | memset(evsel->counts, 0, (sizeof(*evsel->counts) + | |
820 | (ncpus * sizeof(struct perf_counts_values)))); | |
821 | } | |
822 | ||
c52b12ed ACM |
823 | int perf_evsel__alloc_counts(struct perf_evsel *evsel, int ncpus) |
824 | { | |
825 | evsel->counts = zalloc((sizeof(*evsel->counts) + | |
826 | (ncpus * sizeof(struct perf_counts_values)))); | |
827 | return evsel->counts != NULL ? 0 : -ENOMEM; | |
828 | } | |
829 | ||
8885846f | 830 | static void perf_evsel__free_fd(struct perf_evsel *evsel) |
69aad6f1 ACM |
831 | { |
832 | xyarray__delete(evsel->fd); | |
833 | evsel->fd = NULL; | |
834 | } | |
835 | ||
8885846f | 836 | static void perf_evsel__free_id(struct perf_evsel *evsel) |
70db7533 | 837 | { |
a91e5431 ACM |
838 | xyarray__delete(evsel->sample_id); |
839 | evsel->sample_id = NULL; | |
04662523 | 840 | zfree(&evsel->id); |
70db7533 ACM |
841 | } |
842 | ||
c52b12ed ACM |
843 | void perf_evsel__close_fd(struct perf_evsel *evsel, int ncpus, int nthreads) |
844 | { | |
845 | int cpu, thread; | |
846 | ||
bf8e8f4b AH |
847 | if (evsel->system_wide) |
848 | nthreads = 1; | |
849 | ||
c52b12ed ACM |
850 | for (cpu = 0; cpu < ncpus; cpu++) |
851 | for (thread = 0; thread < nthreads; ++thread) { | |
852 | close(FD(evsel, cpu, thread)); | |
853 | FD(evsel, cpu, thread) = -1; | |
854 | } | |
855 | } | |
856 | ||
43f8e76e NK |
857 | void perf_evsel__free_counts(struct perf_evsel *evsel) |
858 | { | |
74cf249d | 859 | zfree(&evsel->counts); |
43f8e76e NK |
860 | } |
861 | ||
ef1d1af2 | 862 | void perf_evsel__exit(struct perf_evsel *evsel) |
69aad6f1 ACM |
863 | { |
864 | assert(list_empty(&evsel->node)); | |
736b05a0 NK |
865 | perf_evsel__free_fd(evsel); |
866 | perf_evsel__free_id(evsel); | |
597e48c1 ACM |
867 | close_cgroup(evsel->cgrp); |
868 | zfree(&evsel->group_name); | |
597e48c1 | 869 | zfree(&evsel->name); |
ce8ccff5 | 870 | perf_evsel__object.fini(evsel); |
ef1d1af2 ACM |
871 | } |
872 | ||
873 | void perf_evsel__delete(struct perf_evsel *evsel) | |
874 | { | |
875 | perf_evsel__exit(evsel); | |
69aad6f1 ACM |
876 | free(evsel); |
877 | } | |
c52b12ed | 878 | |
857a94a2 JO |
879 | void perf_evsel__compute_deltas(struct perf_evsel *evsel, int cpu, |
880 | struct perf_counts_values *count) | |
c7a79c47 SE |
881 | { |
882 | struct perf_counts_values tmp; | |
883 | ||
884 | if (!evsel->prev_raw_counts) | |
885 | return; | |
886 | ||
887 | if (cpu == -1) { | |
888 | tmp = evsel->prev_raw_counts->aggr; | |
889 | evsel->prev_raw_counts->aggr = *count; | |
890 | } else { | |
891 | tmp = evsel->prev_raw_counts->cpu[cpu]; | |
892 | evsel->prev_raw_counts->cpu[cpu] = *count; | |
893 | } | |
894 | ||
895 | count->val = count->val - tmp.val; | |
896 | count->ena = count->ena - tmp.ena; | |
897 | count->run = count->run - tmp.run; | |
898 | } | |
899 | ||
13112bbf JO |
900 | void perf_counts_values__scale(struct perf_counts_values *count, |
901 | bool scale, s8 *pscaled) | |
902 | { | |
903 | s8 scaled = 0; | |
904 | ||
905 | if (scale) { | |
906 | if (count->run == 0) { | |
907 | scaled = -1; | |
908 | count->val = 0; | |
909 | } else if (count->run < count->ena) { | |
910 | scaled = 1; | |
911 | count->val = (u64)((double) count->val * count->ena / count->run + 0.5); | |
912 | } | |
913 | } else | |
914 | count->ena = count->run = 0; | |
915 | ||
916 | if (pscaled) | |
917 | *pscaled = scaled; | |
918 | } | |
919 | ||
c52b12ed ACM |
920 | int __perf_evsel__read_on_cpu(struct perf_evsel *evsel, |
921 | int cpu, int thread, bool scale) | |
922 | { | |
923 | struct perf_counts_values count; | |
924 | size_t nv = scale ? 3 : 1; | |
925 | ||
926 | if (FD(evsel, cpu, thread) < 0) | |
927 | return -EINVAL; | |
928 | ||
4eed11d5 ACM |
929 | if (evsel->counts == NULL && perf_evsel__alloc_counts(evsel, cpu + 1) < 0) |
930 | return -ENOMEM; | |
931 | ||
c52b12ed ACM |
932 | if (readn(FD(evsel, cpu, thread), &count, nv * sizeof(u64)) < 0) |
933 | return -errno; | |
934 | ||
857a94a2 | 935 | perf_evsel__compute_deltas(evsel, cpu, &count); |
13112bbf | 936 | perf_counts_values__scale(&count, scale, NULL); |
c52b12ed ACM |
937 | evsel->counts->cpu[cpu] = count; |
938 | return 0; | |
939 | } | |
940 | ||
941 | int __perf_evsel__read(struct perf_evsel *evsel, | |
942 | int ncpus, int nthreads, bool scale) | |
943 | { | |
944 | size_t nv = scale ? 3 : 1; | |
945 | int cpu, thread; | |
946 | struct perf_counts_values *aggr = &evsel->counts->aggr, count; | |
947 | ||
bf8e8f4b AH |
948 | if (evsel->system_wide) |
949 | nthreads = 1; | |
950 | ||
52bcd994 | 951 | aggr->val = aggr->ena = aggr->run = 0; |
c52b12ed ACM |
952 | |
953 | for (cpu = 0; cpu < ncpus; cpu++) { | |
954 | for (thread = 0; thread < nthreads; thread++) { | |
955 | if (FD(evsel, cpu, thread) < 0) | |
956 | continue; | |
957 | ||
958 | if (readn(FD(evsel, cpu, thread), | |
959 | &count, nv * sizeof(u64)) < 0) | |
960 | return -errno; | |
961 | ||
962 | aggr->val += count.val; | |
963 | if (scale) { | |
964 | aggr->ena += count.ena; | |
965 | aggr->run += count.run; | |
966 | } | |
967 | } | |
968 | } | |
969 | ||
857a94a2 | 970 | perf_evsel__compute_deltas(evsel, -1, aggr); |
13112bbf | 971 | perf_counts_values__scale(aggr, scale, &evsel->counts->scaled); |
c52b12ed ACM |
972 | return 0; |
973 | } | |
48290609 | 974 | |
6a4bb04c JO |
975 | static int get_group_fd(struct perf_evsel *evsel, int cpu, int thread) |
976 | { | |
977 | struct perf_evsel *leader = evsel->leader; | |
978 | int fd; | |
979 | ||
823254ed | 980 | if (perf_evsel__is_group_leader(evsel)) |
6a4bb04c JO |
981 | return -1; |
982 | ||
983 | /* | |
984 | * Leader must be already processed/open, | |
985 | * if not it's a bug. | |
986 | */ | |
987 | BUG_ON(!leader->fd); | |
988 | ||
989 | fd = FD(leader, cpu, thread); | |
990 | BUG_ON(fd == -1); | |
991 | ||
992 | return fd; | |
993 | } | |
994 | ||
e3e1a54f AH |
995 | #define __PRINT_ATTR(fmt, cast, field) \ |
996 | fprintf(fp, " %-19s "fmt"\n", #field, cast attr->field) | |
997 | ||
998 | #define PRINT_ATTR_U32(field) __PRINT_ATTR("%u" , , field) | |
999 | #define PRINT_ATTR_X32(field) __PRINT_ATTR("%#x", , field) | |
1000 | #define PRINT_ATTR_U64(field) __PRINT_ATTR("%" PRIu64, (uint64_t), field) | |
1001 | #define PRINT_ATTR_X64(field) __PRINT_ATTR("%#"PRIx64, (uint64_t), field) | |
1002 | ||
1003 | #define PRINT_ATTR2N(name1, field1, name2, field2) \ | |
1004 | fprintf(fp, " %-19s %u %-19s %u\n", \ | |
1005 | name1, attr->field1, name2, attr->field2) | |
1006 | ||
1007 | #define PRINT_ATTR2(field1, field2) \ | |
1008 | PRINT_ATTR2N(#field1, field1, #field2, field2) | |
1009 | ||
1010 | static size_t perf_event_attr__fprintf(struct perf_event_attr *attr, FILE *fp) | |
1011 | { | |
1012 | size_t ret = 0; | |
1013 | ||
1014 | ret += fprintf(fp, "%.60s\n", graph_dotted_line); | |
1015 | ret += fprintf(fp, "perf_event_attr:\n"); | |
1016 | ||
1017 | ret += PRINT_ATTR_U32(type); | |
1018 | ret += PRINT_ATTR_U32(size); | |
1019 | ret += PRINT_ATTR_X64(config); | |
1020 | ret += PRINT_ATTR_U64(sample_period); | |
1021 | ret += PRINT_ATTR_U64(sample_freq); | |
1022 | ret += PRINT_ATTR_X64(sample_type); | |
1023 | ret += PRINT_ATTR_X64(read_format); | |
1024 | ||
1025 | ret += PRINT_ATTR2(disabled, inherit); | |
1026 | ret += PRINT_ATTR2(pinned, exclusive); | |
1027 | ret += PRINT_ATTR2(exclude_user, exclude_kernel); | |
1028 | ret += PRINT_ATTR2(exclude_hv, exclude_idle); | |
1029 | ret += PRINT_ATTR2(mmap, comm); | |
022c50d0 | 1030 | ret += PRINT_ATTR2(mmap2, comm_exec); |
e3e1a54f AH |
1031 | ret += PRINT_ATTR2(freq, inherit_stat); |
1032 | ret += PRINT_ATTR2(enable_on_exec, task); | |
1033 | ret += PRINT_ATTR2(watermark, precise_ip); | |
1034 | ret += PRINT_ATTR2(mmap_data, sample_id_all); | |
1035 | ret += PRINT_ATTR2(exclude_host, exclude_guest); | |
1036 | ret += PRINT_ATTR2N("excl.callchain_kern", exclude_callchain_kernel, | |
1037 | "excl.callchain_user", exclude_callchain_user); | |
1038 | ||
1039 | ret += PRINT_ATTR_U32(wakeup_events); | |
1040 | ret += PRINT_ATTR_U32(wakeup_watermark); | |
1041 | ret += PRINT_ATTR_X32(bp_type); | |
1042 | ret += PRINT_ATTR_X64(bp_addr); | |
1043 | ret += PRINT_ATTR_X64(config1); | |
1044 | ret += PRINT_ATTR_U64(bp_len); | |
1045 | ret += PRINT_ATTR_X64(config2); | |
1046 | ret += PRINT_ATTR_X64(branch_sample_type); | |
1047 | ret += PRINT_ATTR_X64(sample_regs_user); | |
1048 | ret += PRINT_ATTR_U32(sample_stack_user); | |
6a21c0b5 | 1049 | ret += PRINT_ATTR_X64(sample_regs_intr); |
e3e1a54f AH |
1050 | |
1051 | ret += fprintf(fp, "%.60s\n", graph_dotted_line); | |
1052 | ||
1053 | return ret; | |
1054 | } | |
1055 | ||
0252208e | 1056 | static int __perf_evsel__open(struct perf_evsel *evsel, struct cpu_map *cpus, |
6a4bb04c | 1057 | struct thread_map *threads) |
48290609 | 1058 | { |
bf8e8f4b | 1059 | int cpu, thread, nthreads; |
57480d2c | 1060 | unsigned long flags = PERF_FLAG_FD_CLOEXEC; |
727ab04e | 1061 | int pid = -1, err; |
bec19672 | 1062 | enum { NO_CHANGE, SET_TO_MAX, INCREASED_MAX } set_rlimit = NO_CHANGE; |
48290609 | 1063 | |
bf8e8f4b AH |
1064 | if (evsel->system_wide) |
1065 | nthreads = 1; | |
1066 | else | |
1067 | nthreads = threads->nr; | |
1068 | ||
0252208e | 1069 | if (evsel->fd == NULL && |
bf8e8f4b | 1070 | perf_evsel__alloc_fd(evsel, cpus->nr, nthreads) < 0) |
727ab04e | 1071 | return -ENOMEM; |
4eed11d5 | 1072 | |
023695d9 | 1073 | if (evsel->cgrp) { |
57480d2c | 1074 | flags |= PERF_FLAG_PID_CGROUP; |
023695d9 SE |
1075 | pid = evsel->cgrp->fd; |
1076 | } | |
1077 | ||
594ac61a | 1078 | fallback_missing_features: |
57480d2c YD |
1079 | if (perf_missing_features.cloexec) |
1080 | flags &= ~(unsigned long)PERF_FLAG_FD_CLOEXEC; | |
5c5e854b SE |
1081 | if (perf_missing_features.mmap2) |
1082 | evsel->attr.mmap2 = 0; | |
594ac61a ACM |
1083 | if (perf_missing_features.exclude_guest) |
1084 | evsel->attr.exclude_guest = evsel->attr.exclude_host = 0; | |
1085 | retry_sample_id: | |
1086 | if (perf_missing_features.sample_id_all) | |
1087 | evsel->attr.sample_id_all = 0; | |
1088 | ||
e3e1a54f AH |
1089 | if (verbose >= 2) |
1090 | perf_event_attr__fprintf(&evsel->attr, stderr); | |
1091 | ||
86bd5e86 | 1092 | for (cpu = 0; cpu < cpus->nr; cpu++) { |
9d04f178 | 1093 | |
bf8e8f4b | 1094 | for (thread = 0; thread < nthreads; thread++) { |
6a4bb04c | 1095 | int group_fd; |
023695d9 | 1096 | |
bf8e8f4b | 1097 | if (!evsel->cgrp && !evsel->system_wide) |
023695d9 SE |
1098 | pid = threads->map[thread]; |
1099 | ||
6a4bb04c | 1100 | group_fd = get_group_fd(evsel, cpu, thread); |
bec19672 | 1101 | retry_open: |
a33f6efc | 1102 | pr_debug2("sys_perf_event_open: pid %d cpu %d group_fd %d flags %#lx\n", |
e3e1a54f AH |
1103 | pid, cpus->map[cpu], group_fd, flags); |
1104 | ||
0252208e | 1105 | FD(evsel, cpu, thread) = sys_perf_event_open(&evsel->attr, |
023695d9 | 1106 | pid, |
f08199d3 | 1107 | cpus->map[cpu], |
023695d9 | 1108 | group_fd, flags); |
727ab04e ACM |
1109 | if (FD(evsel, cpu, thread) < 0) { |
1110 | err = -errno; | |
a33f6efc | 1111 | pr_debug2("sys_perf_event_open failed, error %d\n", |
f852fd62 | 1112 | err); |
594ac61a | 1113 | goto try_fallback; |
727ab04e | 1114 | } |
bec19672 | 1115 | set_rlimit = NO_CHANGE; |
0252208e | 1116 | } |
48290609 ACM |
1117 | } |
1118 | ||
1119 | return 0; | |
1120 | ||
594ac61a | 1121 | try_fallback: |
bec19672 AK |
1122 | /* |
1123 | * perf stat needs between 5 and 22 fds per CPU. When we run out | |
1124 | * of them try to increase the limits. | |
1125 | */ | |
1126 | if (err == -EMFILE && set_rlimit < INCREASED_MAX) { | |
1127 | struct rlimit l; | |
1128 | int old_errno = errno; | |
1129 | ||
1130 | if (getrlimit(RLIMIT_NOFILE, &l) == 0) { | |
1131 | if (set_rlimit == NO_CHANGE) | |
1132 | l.rlim_cur = l.rlim_max; | |
1133 | else { | |
1134 | l.rlim_cur = l.rlim_max + 1000; | |
1135 | l.rlim_max = l.rlim_cur; | |
1136 | } | |
1137 | if (setrlimit(RLIMIT_NOFILE, &l) == 0) { | |
1138 | set_rlimit++; | |
1139 | errno = old_errno; | |
1140 | goto retry_open; | |
1141 | } | |
1142 | } | |
1143 | errno = old_errno; | |
1144 | } | |
1145 | ||
594ac61a ACM |
1146 | if (err != -EINVAL || cpu > 0 || thread > 0) |
1147 | goto out_close; | |
1148 | ||
57480d2c YD |
1149 | if (!perf_missing_features.cloexec && (flags & PERF_FLAG_FD_CLOEXEC)) { |
1150 | perf_missing_features.cloexec = true; | |
1151 | goto fallback_missing_features; | |
1152 | } else if (!perf_missing_features.mmap2 && evsel->attr.mmap2) { | |
5c5e854b SE |
1153 | perf_missing_features.mmap2 = true; |
1154 | goto fallback_missing_features; | |
1155 | } else if (!perf_missing_features.exclude_guest && | |
1156 | (evsel->attr.exclude_guest || evsel->attr.exclude_host)) { | |
594ac61a ACM |
1157 | perf_missing_features.exclude_guest = true; |
1158 | goto fallback_missing_features; | |
1159 | } else if (!perf_missing_features.sample_id_all) { | |
1160 | perf_missing_features.sample_id_all = true; | |
1161 | goto retry_sample_id; | |
1162 | } | |
1163 | ||
48290609 | 1164 | out_close: |
0252208e ACM |
1165 | do { |
1166 | while (--thread >= 0) { | |
1167 | close(FD(evsel, cpu, thread)); | |
1168 | FD(evsel, cpu, thread) = -1; | |
1169 | } | |
bf8e8f4b | 1170 | thread = nthreads; |
0252208e | 1171 | } while (--cpu >= 0); |
727ab04e ACM |
1172 | return err; |
1173 | } | |
1174 | ||
1175 | void perf_evsel__close(struct perf_evsel *evsel, int ncpus, int nthreads) | |
1176 | { | |
1177 | if (evsel->fd == NULL) | |
1178 | return; | |
1179 | ||
1180 | perf_evsel__close_fd(evsel, ncpus, nthreads); | |
1181 | perf_evsel__free_fd(evsel); | |
48290609 ACM |
1182 | } |
1183 | ||
0252208e ACM |
1184 | static struct { |
1185 | struct cpu_map map; | |
1186 | int cpus[1]; | |
1187 | } empty_cpu_map = { | |
1188 | .map.nr = 1, | |
1189 | .cpus = { -1, }, | |
1190 | }; | |
1191 | ||
1192 | static struct { | |
1193 | struct thread_map map; | |
1194 | int threads[1]; | |
1195 | } empty_thread_map = { | |
1196 | .map.nr = 1, | |
1197 | .threads = { -1, }, | |
1198 | }; | |
1199 | ||
f08199d3 | 1200 | int perf_evsel__open(struct perf_evsel *evsel, struct cpu_map *cpus, |
6a4bb04c | 1201 | struct thread_map *threads) |
48290609 | 1202 | { |
0252208e ACM |
1203 | if (cpus == NULL) { |
1204 | /* Work around old compiler warnings about strict aliasing */ | |
1205 | cpus = &empty_cpu_map.map; | |
48290609 ACM |
1206 | } |
1207 | ||
0252208e ACM |
1208 | if (threads == NULL) |
1209 | threads = &empty_thread_map.map; | |
48290609 | 1210 | |
6a4bb04c | 1211 | return __perf_evsel__open(evsel, cpus, threads); |
48290609 ACM |
1212 | } |
1213 | ||
f08199d3 | 1214 | int perf_evsel__open_per_cpu(struct perf_evsel *evsel, |
6a4bb04c | 1215 | struct cpu_map *cpus) |
48290609 | 1216 | { |
6a4bb04c | 1217 | return __perf_evsel__open(evsel, cpus, &empty_thread_map.map); |
0252208e | 1218 | } |
48290609 | 1219 | |
f08199d3 | 1220 | int perf_evsel__open_per_thread(struct perf_evsel *evsel, |
6a4bb04c | 1221 | struct thread_map *threads) |
0252208e | 1222 | { |
6a4bb04c | 1223 | return __perf_evsel__open(evsel, &empty_cpu_map.map, threads); |
48290609 | 1224 | } |
70082dd9 | 1225 | |
0807d2d8 ACM |
1226 | static int perf_evsel__parse_id_sample(const struct perf_evsel *evsel, |
1227 | const union perf_event *event, | |
1228 | struct perf_sample *sample) | |
d0dd74e8 | 1229 | { |
0807d2d8 | 1230 | u64 type = evsel->attr.sample_type; |
d0dd74e8 | 1231 | const u64 *array = event->sample.array; |
0807d2d8 | 1232 | bool swapped = evsel->needs_swap; |
37073f9e | 1233 | union u64_swap u; |
d0dd74e8 ACM |
1234 | |
1235 | array += ((event->header.size - | |
1236 | sizeof(event->header)) / sizeof(u64)) - 1; | |
1237 | ||
75562573 AH |
1238 | if (type & PERF_SAMPLE_IDENTIFIER) { |
1239 | sample->id = *array; | |
1240 | array--; | |
1241 | } | |
1242 | ||
d0dd74e8 | 1243 | if (type & PERF_SAMPLE_CPU) { |
37073f9e JO |
1244 | u.val64 = *array; |
1245 | if (swapped) { | |
1246 | /* undo swap of u64, then swap on individual u32s */ | |
1247 | u.val64 = bswap_64(u.val64); | |
1248 | u.val32[0] = bswap_32(u.val32[0]); | |
1249 | } | |
1250 | ||
1251 | sample->cpu = u.val32[0]; | |
d0dd74e8 ACM |
1252 | array--; |
1253 | } | |
1254 | ||
1255 | if (type & PERF_SAMPLE_STREAM_ID) { | |
1256 | sample->stream_id = *array; | |
1257 | array--; | |
1258 | } | |
1259 | ||
1260 | if (type & PERF_SAMPLE_ID) { | |
1261 | sample->id = *array; | |
1262 | array--; | |
1263 | } | |
1264 | ||
1265 | if (type & PERF_SAMPLE_TIME) { | |
1266 | sample->time = *array; | |
1267 | array--; | |
1268 | } | |
1269 | ||
1270 | if (type & PERF_SAMPLE_TID) { | |
37073f9e JO |
1271 | u.val64 = *array; |
1272 | if (swapped) { | |
1273 | /* undo swap of u64, then swap on individual u32s */ | |
1274 | u.val64 = bswap_64(u.val64); | |
1275 | u.val32[0] = bswap_32(u.val32[0]); | |
1276 | u.val32[1] = bswap_32(u.val32[1]); | |
1277 | } | |
1278 | ||
1279 | sample->pid = u.val32[0]; | |
1280 | sample->tid = u.val32[1]; | |
dd44bc6b | 1281 | array--; |
d0dd74e8 ACM |
1282 | } |
1283 | ||
1284 | return 0; | |
1285 | } | |
1286 | ||
03b6ea9b AH |
1287 | static inline bool overflow(const void *endp, u16 max_size, const void *offset, |
1288 | u64 size) | |
98e1da90 | 1289 | { |
03b6ea9b AH |
1290 | return size > max_size || offset + size > endp; |
1291 | } | |
98e1da90 | 1292 | |
03b6ea9b AH |
1293 | #define OVERFLOW_CHECK(offset, size, max_size) \ |
1294 | do { \ | |
1295 | if (overflow(endp, (max_size), (offset), (size))) \ | |
1296 | return -EFAULT; \ | |
1297 | } while (0) | |
98e1da90 | 1298 | |
03b6ea9b AH |
1299 | #define OVERFLOW_CHECK_u64(offset) \ |
1300 | OVERFLOW_CHECK(offset, sizeof(u64), sizeof(u64)) | |
98e1da90 | 1301 | |
a3f698fe | 1302 | int perf_evsel__parse_sample(struct perf_evsel *evsel, union perf_event *event, |
0807d2d8 | 1303 | struct perf_sample *data) |
d0dd74e8 | 1304 | { |
a3f698fe | 1305 | u64 type = evsel->attr.sample_type; |
0807d2d8 | 1306 | bool swapped = evsel->needs_swap; |
d0dd74e8 | 1307 | const u64 *array; |
03b6ea9b AH |
1308 | u16 max_size = event->header.size; |
1309 | const void *endp = (void *)event + max_size; | |
1310 | u64 sz; | |
d0dd74e8 | 1311 | |
936be503 DA |
1312 | /* |
1313 | * used for cross-endian analysis. See git commit 65014ab3 | |
1314 | * for why this goofiness is needed. | |
1315 | */ | |
6a11f92e | 1316 | union u64_swap u; |
936be503 | 1317 | |
f3bda2c9 | 1318 | memset(data, 0, sizeof(*data)); |
d0dd74e8 ACM |
1319 | data->cpu = data->pid = data->tid = -1; |
1320 | data->stream_id = data->id = data->time = -1ULL; | |
bc529086 | 1321 | data->period = evsel->attr.sample_period; |
05484298 | 1322 | data->weight = 0; |
d0dd74e8 ACM |
1323 | |
1324 | if (event->header.type != PERF_RECORD_SAMPLE) { | |
a3f698fe | 1325 | if (!evsel->attr.sample_id_all) |
d0dd74e8 | 1326 | return 0; |
0807d2d8 | 1327 | return perf_evsel__parse_id_sample(evsel, event, data); |
d0dd74e8 ACM |
1328 | } |
1329 | ||
1330 | array = event->sample.array; | |
1331 | ||
03b6ea9b AH |
1332 | /* |
1333 | * The evsel's sample_size is based on PERF_SAMPLE_MASK which includes | |
1334 | * up to PERF_SAMPLE_PERIOD. After that overflow() must be used to | |
1335 | * check the format does not go past the end of the event. | |
1336 | */ | |
a3f698fe | 1337 | if (evsel->sample_size + sizeof(event->header) > event->header.size) |
a2854124 FW |
1338 | return -EFAULT; |
1339 | ||
75562573 AH |
1340 | data->id = -1ULL; |
1341 | if (type & PERF_SAMPLE_IDENTIFIER) { | |
1342 | data->id = *array; | |
1343 | array++; | |
1344 | } | |
1345 | ||
d0dd74e8 | 1346 | if (type & PERF_SAMPLE_IP) { |
ef89325f | 1347 | data->ip = *array; |
d0dd74e8 ACM |
1348 | array++; |
1349 | } | |
1350 | ||
1351 | if (type & PERF_SAMPLE_TID) { | |
936be503 DA |
1352 | u.val64 = *array; |
1353 | if (swapped) { | |
1354 | /* undo swap of u64, then swap on individual u32s */ | |
1355 | u.val64 = bswap_64(u.val64); | |
1356 | u.val32[0] = bswap_32(u.val32[0]); | |
1357 | u.val32[1] = bswap_32(u.val32[1]); | |
1358 | } | |
1359 | ||
1360 | data->pid = u.val32[0]; | |
1361 | data->tid = u.val32[1]; | |
d0dd74e8 ACM |
1362 | array++; |
1363 | } | |
1364 | ||
1365 | if (type & PERF_SAMPLE_TIME) { | |
1366 | data->time = *array; | |
1367 | array++; | |
1368 | } | |
1369 | ||
7cec0922 | 1370 | data->addr = 0; |
d0dd74e8 ACM |
1371 | if (type & PERF_SAMPLE_ADDR) { |
1372 | data->addr = *array; | |
1373 | array++; | |
1374 | } | |
1375 | ||
d0dd74e8 ACM |
1376 | if (type & PERF_SAMPLE_ID) { |
1377 | data->id = *array; | |
1378 | array++; | |
1379 | } | |
1380 | ||
1381 | if (type & PERF_SAMPLE_STREAM_ID) { | |
1382 | data->stream_id = *array; | |
1383 | array++; | |
1384 | } | |
1385 | ||
1386 | if (type & PERF_SAMPLE_CPU) { | |
936be503 DA |
1387 | |
1388 | u.val64 = *array; | |
1389 | if (swapped) { | |
1390 | /* undo swap of u64, then swap on individual u32s */ | |
1391 | u.val64 = bswap_64(u.val64); | |
1392 | u.val32[0] = bswap_32(u.val32[0]); | |
1393 | } | |
1394 | ||
1395 | data->cpu = u.val32[0]; | |
d0dd74e8 ACM |
1396 | array++; |
1397 | } | |
1398 | ||
1399 | if (type & PERF_SAMPLE_PERIOD) { | |
1400 | data->period = *array; | |
1401 | array++; | |
1402 | } | |
1403 | ||
1404 | if (type & PERF_SAMPLE_READ) { | |
9ede473c JO |
1405 | u64 read_format = evsel->attr.read_format; |
1406 | ||
03b6ea9b | 1407 | OVERFLOW_CHECK_u64(array); |
9ede473c JO |
1408 | if (read_format & PERF_FORMAT_GROUP) |
1409 | data->read.group.nr = *array; | |
1410 | else | |
1411 | data->read.one.value = *array; | |
1412 | ||
1413 | array++; | |
1414 | ||
1415 | if (read_format & PERF_FORMAT_TOTAL_TIME_ENABLED) { | |
03b6ea9b | 1416 | OVERFLOW_CHECK_u64(array); |
9ede473c JO |
1417 | data->read.time_enabled = *array; |
1418 | array++; | |
1419 | } | |
1420 | ||
1421 | if (read_format & PERF_FORMAT_TOTAL_TIME_RUNNING) { | |
03b6ea9b | 1422 | OVERFLOW_CHECK_u64(array); |
9ede473c JO |
1423 | data->read.time_running = *array; |
1424 | array++; | |
1425 | } | |
1426 | ||
1427 | /* PERF_FORMAT_ID is forced for PERF_SAMPLE_READ */ | |
1428 | if (read_format & PERF_FORMAT_GROUP) { | |
03b6ea9b AH |
1429 | const u64 max_group_nr = UINT64_MAX / |
1430 | sizeof(struct sample_read_value); | |
1431 | ||
1432 | if (data->read.group.nr > max_group_nr) | |
1433 | return -EFAULT; | |
1434 | sz = data->read.group.nr * | |
1435 | sizeof(struct sample_read_value); | |
1436 | OVERFLOW_CHECK(array, sz, max_size); | |
1437 | data->read.group.values = | |
1438 | (struct sample_read_value *)array; | |
1439 | array = (void *)array + sz; | |
9ede473c | 1440 | } else { |
03b6ea9b | 1441 | OVERFLOW_CHECK_u64(array); |
9ede473c JO |
1442 | data->read.one.id = *array; |
1443 | array++; | |
1444 | } | |
d0dd74e8 ACM |
1445 | } |
1446 | ||
1447 | if (type & PERF_SAMPLE_CALLCHAIN) { | |
03b6ea9b | 1448 | const u64 max_callchain_nr = UINT64_MAX / sizeof(u64); |
98e1da90 | 1449 | |
03b6ea9b AH |
1450 | OVERFLOW_CHECK_u64(array); |
1451 | data->callchain = (struct ip_callchain *)array++; | |
1452 | if (data->callchain->nr > max_callchain_nr) | |
98e1da90 | 1453 | return -EFAULT; |
03b6ea9b AH |
1454 | sz = data->callchain->nr * sizeof(u64); |
1455 | OVERFLOW_CHECK(array, sz, max_size); | |
1456 | array = (void *)array + sz; | |
d0dd74e8 ACM |
1457 | } |
1458 | ||
1459 | if (type & PERF_SAMPLE_RAW) { | |
03b6ea9b | 1460 | OVERFLOW_CHECK_u64(array); |
936be503 DA |
1461 | u.val64 = *array; |
1462 | if (WARN_ONCE(swapped, | |
1463 | "Endianness of raw data not corrected!\n")) { | |
1464 | /* undo swap of u64, then swap on individual u32s */ | |
1465 | u.val64 = bswap_64(u.val64); | |
1466 | u.val32[0] = bswap_32(u.val32[0]); | |
1467 | u.val32[1] = bswap_32(u.val32[1]); | |
1468 | } | |
936be503 | 1469 | data->raw_size = u.val32[0]; |
03b6ea9b | 1470 | array = (void *)array + sizeof(u32); |
98e1da90 | 1471 | |
03b6ea9b AH |
1472 | OVERFLOW_CHECK(array, data->raw_size, max_size); |
1473 | data->raw_data = (void *)array; | |
1474 | array = (void *)array + data->raw_size; | |
d0dd74e8 ACM |
1475 | } |
1476 | ||
b5387528 | 1477 | if (type & PERF_SAMPLE_BRANCH_STACK) { |
03b6ea9b AH |
1478 | const u64 max_branch_nr = UINT64_MAX / |
1479 | sizeof(struct branch_entry); | |
b5387528 | 1480 | |
03b6ea9b AH |
1481 | OVERFLOW_CHECK_u64(array); |
1482 | data->branch_stack = (struct branch_stack *)array++; | |
b5387528 | 1483 | |
03b6ea9b AH |
1484 | if (data->branch_stack->nr > max_branch_nr) |
1485 | return -EFAULT; | |
b5387528 | 1486 | sz = data->branch_stack->nr * sizeof(struct branch_entry); |
03b6ea9b AH |
1487 | OVERFLOW_CHECK(array, sz, max_size); |
1488 | array = (void *)array + sz; | |
b5387528 | 1489 | } |
0f6a3015 JO |
1490 | |
1491 | if (type & PERF_SAMPLE_REGS_USER) { | |
03b6ea9b | 1492 | OVERFLOW_CHECK_u64(array); |
5b95a4a3 AH |
1493 | data->user_regs.abi = *array; |
1494 | array++; | |
0f6a3015 | 1495 | |
5b95a4a3 | 1496 | if (data->user_regs.abi) { |
352ea45a | 1497 | u64 mask = evsel->attr.sample_regs_user; |
03b6ea9b | 1498 | |
352ea45a | 1499 | sz = hweight_long(mask) * sizeof(u64); |
03b6ea9b | 1500 | OVERFLOW_CHECK(array, sz, max_size); |
352ea45a | 1501 | data->user_regs.mask = mask; |
0f6a3015 | 1502 | data->user_regs.regs = (u64 *)array; |
03b6ea9b | 1503 | array = (void *)array + sz; |
0f6a3015 JO |
1504 | } |
1505 | } | |
1506 | ||
1507 | if (type & PERF_SAMPLE_STACK_USER) { | |
03b6ea9b AH |
1508 | OVERFLOW_CHECK_u64(array); |
1509 | sz = *array++; | |
0f6a3015 JO |
1510 | |
1511 | data->user_stack.offset = ((char *)(array - 1) | |
1512 | - (char *) event); | |
1513 | ||
03b6ea9b | 1514 | if (!sz) { |
0f6a3015 JO |
1515 | data->user_stack.size = 0; |
1516 | } else { | |
03b6ea9b | 1517 | OVERFLOW_CHECK(array, sz, max_size); |
0f6a3015 | 1518 | data->user_stack.data = (char *)array; |
03b6ea9b AH |
1519 | array = (void *)array + sz; |
1520 | OVERFLOW_CHECK_u64(array); | |
54bd2692 | 1521 | data->user_stack.size = *array++; |
a65cb4b9 JO |
1522 | if (WARN_ONCE(data->user_stack.size > sz, |
1523 | "user stack dump failure\n")) | |
1524 | return -EFAULT; | |
0f6a3015 JO |
1525 | } |
1526 | } | |
1527 | ||
05484298 AK |
1528 | data->weight = 0; |
1529 | if (type & PERF_SAMPLE_WEIGHT) { | |
03b6ea9b | 1530 | OVERFLOW_CHECK_u64(array); |
05484298 AK |
1531 | data->weight = *array; |
1532 | array++; | |
1533 | } | |
1534 | ||
98a3b32c SE |
1535 | data->data_src = PERF_MEM_DATA_SRC_NONE; |
1536 | if (type & PERF_SAMPLE_DATA_SRC) { | |
03b6ea9b | 1537 | OVERFLOW_CHECK_u64(array); |
98a3b32c SE |
1538 | data->data_src = *array; |
1539 | array++; | |
1540 | } | |
1541 | ||
475eeab9 AK |
1542 | data->transaction = 0; |
1543 | if (type & PERF_SAMPLE_TRANSACTION) { | |
87b95524 | 1544 | OVERFLOW_CHECK_u64(array); |
475eeab9 AK |
1545 | data->transaction = *array; |
1546 | array++; | |
1547 | } | |
1548 | ||
6a21c0b5 SE |
1549 | data->intr_regs.abi = PERF_SAMPLE_REGS_ABI_NONE; |
1550 | if (type & PERF_SAMPLE_REGS_INTR) { | |
1551 | OVERFLOW_CHECK_u64(array); | |
1552 | data->intr_regs.abi = *array; | |
1553 | array++; | |
1554 | ||
1555 | if (data->intr_regs.abi != PERF_SAMPLE_REGS_ABI_NONE) { | |
1556 | u64 mask = evsel->attr.sample_regs_intr; | |
1557 | ||
1558 | sz = hweight_long(mask) * sizeof(u64); | |
1559 | OVERFLOW_CHECK(array, sz, max_size); | |
1560 | data->intr_regs.mask = mask; | |
1561 | data->intr_regs.regs = (u64 *)array; | |
1562 | array = (void *)array + sz; | |
1563 | } | |
1564 | } | |
1565 | ||
d0dd74e8 ACM |
1566 | return 0; |
1567 | } | |
74eec26f | 1568 | |
b1cf6f65 | 1569 | size_t perf_event__sample_event_size(const struct perf_sample *sample, u64 type, |
352ea45a | 1570 | u64 read_format) |
b1cf6f65 AH |
1571 | { |
1572 | size_t sz, result = sizeof(struct sample_event); | |
1573 | ||
1574 | if (type & PERF_SAMPLE_IDENTIFIER) | |
1575 | result += sizeof(u64); | |
1576 | ||
1577 | if (type & PERF_SAMPLE_IP) | |
1578 | result += sizeof(u64); | |
1579 | ||
1580 | if (type & PERF_SAMPLE_TID) | |
1581 | result += sizeof(u64); | |
1582 | ||
1583 | if (type & PERF_SAMPLE_TIME) | |
1584 | result += sizeof(u64); | |
1585 | ||
1586 | if (type & PERF_SAMPLE_ADDR) | |
1587 | result += sizeof(u64); | |
1588 | ||
1589 | if (type & PERF_SAMPLE_ID) | |
1590 | result += sizeof(u64); | |
1591 | ||
1592 | if (type & PERF_SAMPLE_STREAM_ID) | |
1593 | result += sizeof(u64); | |
1594 | ||
1595 | if (type & PERF_SAMPLE_CPU) | |
1596 | result += sizeof(u64); | |
1597 | ||
1598 | if (type & PERF_SAMPLE_PERIOD) | |
1599 | result += sizeof(u64); | |
1600 | ||
1601 | if (type & PERF_SAMPLE_READ) { | |
1602 | result += sizeof(u64); | |
1603 | if (read_format & PERF_FORMAT_TOTAL_TIME_ENABLED) | |
1604 | result += sizeof(u64); | |
1605 | if (read_format & PERF_FORMAT_TOTAL_TIME_RUNNING) | |
1606 | result += sizeof(u64); | |
1607 | /* PERF_FORMAT_ID is forced for PERF_SAMPLE_READ */ | |
1608 | if (read_format & PERF_FORMAT_GROUP) { | |
1609 | sz = sample->read.group.nr * | |
1610 | sizeof(struct sample_read_value); | |
1611 | result += sz; | |
1612 | } else { | |
1613 | result += sizeof(u64); | |
1614 | } | |
1615 | } | |
1616 | ||
1617 | if (type & PERF_SAMPLE_CALLCHAIN) { | |
1618 | sz = (sample->callchain->nr + 1) * sizeof(u64); | |
1619 | result += sz; | |
1620 | } | |
1621 | ||
1622 | if (type & PERF_SAMPLE_RAW) { | |
1623 | result += sizeof(u32); | |
1624 | result += sample->raw_size; | |
1625 | } | |
1626 | ||
1627 | if (type & PERF_SAMPLE_BRANCH_STACK) { | |
1628 | sz = sample->branch_stack->nr * sizeof(struct branch_entry); | |
1629 | sz += sizeof(u64); | |
1630 | result += sz; | |
1631 | } | |
1632 | ||
1633 | if (type & PERF_SAMPLE_REGS_USER) { | |
1634 | if (sample->user_regs.abi) { | |
1635 | result += sizeof(u64); | |
352ea45a | 1636 | sz = hweight_long(sample->user_regs.mask) * sizeof(u64); |
b1cf6f65 AH |
1637 | result += sz; |
1638 | } else { | |
1639 | result += sizeof(u64); | |
1640 | } | |
1641 | } | |
1642 | ||
1643 | if (type & PERF_SAMPLE_STACK_USER) { | |
1644 | sz = sample->user_stack.size; | |
1645 | result += sizeof(u64); | |
1646 | if (sz) { | |
1647 | result += sz; | |
1648 | result += sizeof(u64); | |
1649 | } | |
1650 | } | |
1651 | ||
1652 | if (type & PERF_SAMPLE_WEIGHT) | |
1653 | result += sizeof(u64); | |
1654 | ||
1655 | if (type & PERF_SAMPLE_DATA_SRC) | |
1656 | result += sizeof(u64); | |
1657 | ||
42d88910 AH |
1658 | if (type & PERF_SAMPLE_TRANSACTION) |
1659 | result += sizeof(u64); | |
1660 | ||
6a21c0b5 SE |
1661 | if (type & PERF_SAMPLE_REGS_INTR) { |
1662 | if (sample->intr_regs.abi) { | |
1663 | result += sizeof(u64); | |
1664 | sz = hweight_long(sample->intr_regs.mask) * sizeof(u64); | |
1665 | result += sz; | |
1666 | } else { | |
1667 | result += sizeof(u64); | |
1668 | } | |
1669 | } | |
1670 | ||
b1cf6f65 AH |
1671 | return result; |
1672 | } | |
1673 | ||
74eec26f | 1674 | int perf_event__synthesize_sample(union perf_event *event, u64 type, |
352ea45a | 1675 | u64 read_format, |
74eec26f AV |
1676 | const struct perf_sample *sample, |
1677 | bool swapped) | |
1678 | { | |
1679 | u64 *array; | |
d03f2170 | 1680 | size_t sz; |
74eec26f AV |
1681 | /* |
1682 | * used for cross-endian analysis. See git commit 65014ab3 | |
1683 | * for why this goofiness is needed. | |
1684 | */ | |
6a11f92e | 1685 | union u64_swap u; |
74eec26f AV |
1686 | |
1687 | array = event->sample.array; | |
1688 | ||
75562573 AH |
1689 | if (type & PERF_SAMPLE_IDENTIFIER) { |
1690 | *array = sample->id; | |
1691 | array++; | |
1692 | } | |
1693 | ||
74eec26f | 1694 | if (type & PERF_SAMPLE_IP) { |
ef89325f | 1695 | *array = sample->ip; |
74eec26f AV |
1696 | array++; |
1697 | } | |
1698 | ||
1699 | if (type & PERF_SAMPLE_TID) { | |
1700 | u.val32[0] = sample->pid; | |
1701 | u.val32[1] = sample->tid; | |
1702 | if (swapped) { | |
1703 | /* | |
a3f698fe | 1704 | * Inverse of what is done in perf_evsel__parse_sample |
74eec26f AV |
1705 | */ |
1706 | u.val32[0] = bswap_32(u.val32[0]); | |
1707 | u.val32[1] = bswap_32(u.val32[1]); | |
1708 | u.val64 = bswap_64(u.val64); | |
1709 | } | |
1710 | ||
1711 | *array = u.val64; | |
1712 | array++; | |
1713 | } | |
1714 | ||
1715 | if (type & PERF_SAMPLE_TIME) { | |
1716 | *array = sample->time; | |
1717 | array++; | |
1718 | } | |
1719 | ||
1720 | if (type & PERF_SAMPLE_ADDR) { | |
1721 | *array = sample->addr; | |
1722 | array++; | |
1723 | } | |
1724 | ||
1725 | if (type & PERF_SAMPLE_ID) { | |
1726 | *array = sample->id; | |
1727 | array++; | |
1728 | } | |
1729 | ||
1730 | if (type & PERF_SAMPLE_STREAM_ID) { | |
1731 | *array = sample->stream_id; | |
1732 | array++; | |
1733 | } | |
1734 | ||
1735 | if (type & PERF_SAMPLE_CPU) { | |
1736 | u.val32[0] = sample->cpu; | |
1737 | if (swapped) { | |
1738 | /* | |
a3f698fe | 1739 | * Inverse of what is done in perf_evsel__parse_sample |
74eec26f AV |
1740 | */ |
1741 | u.val32[0] = bswap_32(u.val32[0]); | |
1742 | u.val64 = bswap_64(u.val64); | |
1743 | } | |
1744 | *array = u.val64; | |
1745 | array++; | |
1746 | } | |
1747 | ||
1748 | if (type & PERF_SAMPLE_PERIOD) { | |
1749 | *array = sample->period; | |
1750 | array++; | |
1751 | } | |
1752 | ||
d03f2170 AH |
1753 | if (type & PERF_SAMPLE_READ) { |
1754 | if (read_format & PERF_FORMAT_GROUP) | |
1755 | *array = sample->read.group.nr; | |
1756 | else | |
1757 | *array = sample->read.one.value; | |
1758 | array++; | |
1759 | ||
1760 | if (read_format & PERF_FORMAT_TOTAL_TIME_ENABLED) { | |
1761 | *array = sample->read.time_enabled; | |
1762 | array++; | |
1763 | } | |
1764 | ||
1765 | if (read_format & PERF_FORMAT_TOTAL_TIME_RUNNING) { | |
1766 | *array = sample->read.time_running; | |
1767 | array++; | |
1768 | } | |
1769 | ||
1770 | /* PERF_FORMAT_ID is forced for PERF_SAMPLE_READ */ | |
1771 | if (read_format & PERF_FORMAT_GROUP) { | |
1772 | sz = sample->read.group.nr * | |
1773 | sizeof(struct sample_read_value); | |
1774 | memcpy(array, sample->read.group.values, sz); | |
1775 | array = (void *)array + sz; | |
1776 | } else { | |
1777 | *array = sample->read.one.id; | |
1778 | array++; | |
1779 | } | |
1780 | } | |
1781 | ||
1782 | if (type & PERF_SAMPLE_CALLCHAIN) { | |
1783 | sz = (sample->callchain->nr + 1) * sizeof(u64); | |
1784 | memcpy(array, sample->callchain, sz); | |
1785 | array = (void *)array + sz; | |
1786 | } | |
1787 | ||
1788 | if (type & PERF_SAMPLE_RAW) { | |
1789 | u.val32[0] = sample->raw_size; | |
1790 | if (WARN_ONCE(swapped, | |
1791 | "Endianness of raw data not corrected!\n")) { | |
1792 | /* | |
1793 | * Inverse of what is done in perf_evsel__parse_sample | |
1794 | */ | |
1795 | u.val32[0] = bswap_32(u.val32[0]); | |
1796 | u.val32[1] = bswap_32(u.val32[1]); | |
1797 | u.val64 = bswap_64(u.val64); | |
1798 | } | |
1799 | *array = u.val64; | |
1800 | array = (void *)array + sizeof(u32); | |
1801 | ||
1802 | memcpy(array, sample->raw_data, sample->raw_size); | |
1803 | array = (void *)array + sample->raw_size; | |
1804 | } | |
1805 | ||
1806 | if (type & PERF_SAMPLE_BRANCH_STACK) { | |
1807 | sz = sample->branch_stack->nr * sizeof(struct branch_entry); | |
1808 | sz += sizeof(u64); | |
1809 | memcpy(array, sample->branch_stack, sz); | |
1810 | array = (void *)array + sz; | |
1811 | } | |
1812 | ||
1813 | if (type & PERF_SAMPLE_REGS_USER) { | |
1814 | if (sample->user_regs.abi) { | |
1815 | *array++ = sample->user_regs.abi; | |
352ea45a | 1816 | sz = hweight_long(sample->user_regs.mask) * sizeof(u64); |
d03f2170 AH |
1817 | memcpy(array, sample->user_regs.regs, sz); |
1818 | array = (void *)array + sz; | |
1819 | } else { | |
1820 | *array++ = 0; | |
1821 | } | |
1822 | } | |
1823 | ||
1824 | if (type & PERF_SAMPLE_STACK_USER) { | |
1825 | sz = sample->user_stack.size; | |
1826 | *array++ = sz; | |
1827 | if (sz) { | |
1828 | memcpy(array, sample->user_stack.data, sz); | |
1829 | array = (void *)array + sz; | |
1830 | *array++ = sz; | |
1831 | } | |
1832 | } | |
1833 | ||
1834 | if (type & PERF_SAMPLE_WEIGHT) { | |
1835 | *array = sample->weight; | |
1836 | array++; | |
1837 | } | |
1838 | ||
1839 | if (type & PERF_SAMPLE_DATA_SRC) { | |
1840 | *array = sample->data_src; | |
1841 | array++; | |
1842 | } | |
1843 | ||
42d88910 AH |
1844 | if (type & PERF_SAMPLE_TRANSACTION) { |
1845 | *array = sample->transaction; | |
1846 | array++; | |
1847 | } | |
1848 | ||
6a21c0b5 SE |
1849 | if (type & PERF_SAMPLE_REGS_INTR) { |
1850 | if (sample->intr_regs.abi) { | |
1851 | *array++ = sample->intr_regs.abi; | |
1852 | sz = hweight_long(sample->intr_regs.mask) * sizeof(u64); | |
1853 | memcpy(array, sample->intr_regs.regs, sz); | |
1854 | array = (void *)array + sz; | |
1855 | } else { | |
1856 | *array++ = 0; | |
1857 | } | |
1858 | } | |
1859 | ||
74eec26f AV |
1860 | return 0; |
1861 | } | |
5555ded4 | 1862 | |
efd2b924 ACM |
1863 | struct format_field *perf_evsel__field(struct perf_evsel *evsel, const char *name) |
1864 | { | |
1865 | return pevent_find_field(evsel->tp_format, name); | |
1866 | } | |
1867 | ||
5d2074ea | 1868 | void *perf_evsel__rawptr(struct perf_evsel *evsel, struct perf_sample *sample, |
5555ded4 ACM |
1869 | const char *name) |
1870 | { | |
efd2b924 | 1871 | struct format_field *field = perf_evsel__field(evsel, name); |
5555ded4 ACM |
1872 | int offset; |
1873 | ||
efd2b924 ACM |
1874 | if (!field) |
1875 | return NULL; | |
5555ded4 ACM |
1876 | |
1877 | offset = field->offset; | |
1878 | ||
1879 | if (field->flags & FIELD_IS_DYNAMIC) { | |
1880 | offset = *(int *)(sample->raw_data + field->offset); | |
1881 | offset &= 0xffff; | |
1882 | } | |
1883 | ||
1884 | return sample->raw_data + offset; | |
1885 | } | |
1886 | ||
1887 | u64 perf_evsel__intval(struct perf_evsel *evsel, struct perf_sample *sample, | |
1888 | const char *name) | |
1889 | { | |
efd2b924 | 1890 | struct format_field *field = perf_evsel__field(evsel, name); |
e6b6f679 ACM |
1891 | void *ptr; |
1892 | u64 value; | |
5555ded4 | 1893 | |
efd2b924 ACM |
1894 | if (!field) |
1895 | return 0; | |
5555ded4 | 1896 | |
e6b6f679 | 1897 | ptr = sample->raw_data + field->offset; |
5555ded4 | 1898 | |
e6b6f679 ACM |
1899 | switch (field->size) { |
1900 | case 1: | |
1901 | return *(u8 *)ptr; | |
1902 | case 2: | |
1903 | value = *(u16 *)ptr; | |
1904 | break; | |
1905 | case 4: | |
1906 | value = *(u32 *)ptr; | |
1907 | break; | |
1908 | case 8: | |
1909 | value = *(u64 *)ptr; | |
1910 | break; | |
1911 | default: | |
1912 | return 0; | |
1913 | } | |
1914 | ||
1915 | if (!evsel->needs_swap) | |
1916 | return value; | |
1917 | ||
1918 | switch (field->size) { | |
1919 | case 2: | |
1920 | return bswap_16(value); | |
1921 | case 4: | |
1922 | return bswap_32(value); | |
1923 | case 8: | |
1924 | return bswap_64(value); | |
1925 | default: | |
1926 | return 0; | |
1927 | } | |
1928 | ||
1929 | return 0; | |
5555ded4 | 1930 | } |
0698aedd ACM |
1931 | |
1932 | static int comma_fprintf(FILE *fp, bool *first, const char *fmt, ...) | |
1933 | { | |
1934 | va_list args; | |
1935 | int ret = 0; | |
1936 | ||
1937 | if (!*first) { | |
1938 | ret += fprintf(fp, ","); | |
1939 | } else { | |
1940 | ret += fprintf(fp, ":"); | |
1941 | *first = false; | |
1942 | } | |
1943 | ||
1944 | va_start(args, fmt); | |
1945 | ret += vfprintf(fp, fmt, args); | |
1946 | va_end(args); | |
1947 | return ret; | |
1948 | } | |
1949 | ||
1950 | static int __if_fprintf(FILE *fp, bool *first, const char *field, u64 value) | |
1951 | { | |
1952 | if (value == 0) | |
1953 | return 0; | |
1954 | ||
1955 | return comma_fprintf(fp, first, " %s: %" PRIu64, field, value); | |
1956 | } | |
1957 | ||
1958 | #define if_print(field) printed += __if_fprintf(fp, &first, #field, evsel->attr.field) | |
1959 | ||
c79a4393 ACM |
1960 | struct bit_names { |
1961 | int bit; | |
1962 | const char *name; | |
1963 | }; | |
1964 | ||
1965 | static int bits__fprintf(FILE *fp, const char *field, u64 value, | |
1966 | struct bit_names *bits, bool *first) | |
1967 | { | |
1968 | int i = 0, printed = comma_fprintf(fp, first, " %s: ", field); | |
1969 | bool first_bit = true; | |
1970 | ||
1971 | do { | |
1972 | if (value & bits[i].bit) { | |
1973 | printed += fprintf(fp, "%s%s", first_bit ? "" : "|", bits[i].name); | |
1974 | first_bit = false; | |
1975 | } | |
1976 | } while (bits[++i].name != NULL); | |
1977 | ||
1978 | return printed; | |
1979 | } | |
1980 | ||
1981 | static int sample_type__fprintf(FILE *fp, bool *first, u64 value) | |
1982 | { | |
1983 | #define bit_name(n) { PERF_SAMPLE_##n, #n } | |
1984 | struct bit_names bits[] = { | |
1985 | bit_name(IP), bit_name(TID), bit_name(TIME), bit_name(ADDR), | |
1986 | bit_name(READ), bit_name(CALLCHAIN), bit_name(ID), bit_name(CPU), | |
1987 | bit_name(PERIOD), bit_name(STREAM_ID), bit_name(RAW), | |
1988 | bit_name(BRANCH_STACK), bit_name(REGS_USER), bit_name(STACK_USER), | |
6a21c0b5 | 1989 | bit_name(IDENTIFIER), bit_name(REGS_INTR), |
c79a4393 ACM |
1990 | { .name = NULL, } |
1991 | }; | |
1992 | #undef bit_name | |
1993 | return bits__fprintf(fp, "sample_type", value, bits, first); | |
1994 | } | |
1995 | ||
1996 | static int read_format__fprintf(FILE *fp, bool *first, u64 value) | |
1997 | { | |
1998 | #define bit_name(n) { PERF_FORMAT_##n, #n } | |
1999 | struct bit_names bits[] = { | |
2000 | bit_name(TOTAL_TIME_ENABLED), bit_name(TOTAL_TIME_RUNNING), | |
2001 | bit_name(ID), bit_name(GROUP), | |
2002 | { .name = NULL, } | |
2003 | }; | |
2004 | #undef bit_name | |
2005 | return bits__fprintf(fp, "read_format", value, bits, first); | |
2006 | } | |
2007 | ||
0698aedd ACM |
2008 | int perf_evsel__fprintf(struct perf_evsel *evsel, |
2009 | struct perf_attr_details *details, FILE *fp) | |
2010 | { | |
2011 | bool first = true; | |
e6ab07d0 NK |
2012 | int printed = 0; |
2013 | ||
e35ef355 | 2014 | if (details->event_group) { |
e6ab07d0 NK |
2015 | struct perf_evsel *pos; |
2016 | ||
2017 | if (!perf_evsel__is_group_leader(evsel)) | |
2018 | return 0; | |
2019 | ||
2020 | if (evsel->nr_members > 1) | |
2021 | printed += fprintf(fp, "%s{", evsel->group_name ?: ""); | |
2022 | ||
2023 | printed += fprintf(fp, "%s", perf_evsel__name(evsel)); | |
2024 | for_each_group_member(pos, evsel) | |
2025 | printed += fprintf(fp, ",%s", perf_evsel__name(pos)); | |
2026 | ||
2027 | if (evsel->nr_members > 1) | |
2028 | printed += fprintf(fp, "}"); | |
2029 | goto out; | |
2030 | } | |
2031 | ||
2032 | printed += fprintf(fp, "%s", perf_evsel__name(evsel)); | |
0698aedd ACM |
2033 | |
2034 | if (details->verbose || details->freq) { | |
2035 | printed += comma_fprintf(fp, &first, " sample_freq=%" PRIu64, | |
2036 | (u64)evsel->attr.sample_freq); | |
2037 | } | |
2038 | ||
2039 | if (details->verbose) { | |
2040 | if_print(type); | |
2041 | if_print(config); | |
2042 | if_print(config1); | |
2043 | if_print(config2); | |
2044 | if_print(size); | |
c79a4393 ACM |
2045 | printed += sample_type__fprintf(fp, &first, evsel->attr.sample_type); |
2046 | if (evsel->attr.read_format) | |
2047 | printed += read_format__fprintf(fp, &first, evsel->attr.read_format); | |
0698aedd ACM |
2048 | if_print(disabled); |
2049 | if_print(inherit); | |
2050 | if_print(pinned); | |
2051 | if_print(exclusive); | |
2052 | if_print(exclude_user); | |
2053 | if_print(exclude_kernel); | |
2054 | if_print(exclude_hv); | |
2055 | if_print(exclude_idle); | |
2056 | if_print(mmap); | |
5c5e854b | 2057 | if_print(mmap2); |
0698aedd | 2058 | if_print(comm); |
022c50d0 | 2059 | if_print(comm_exec); |
0698aedd ACM |
2060 | if_print(freq); |
2061 | if_print(inherit_stat); | |
2062 | if_print(enable_on_exec); | |
2063 | if_print(task); | |
2064 | if_print(watermark); | |
2065 | if_print(precise_ip); | |
2066 | if_print(mmap_data); | |
2067 | if_print(sample_id_all); | |
2068 | if_print(exclude_host); | |
2069 | if_print(exclude_guest); | |
2070 | if_print(__reserved_1); | |
2071 | if_print(wakeup_events); | |
2072 | if_print(bp_type); | |
2073 | if_print(branch_sample_type); | |
2074 | } | |
e6ab07d0 | 2075 | out: |
0698aedd ACM |
2076 | fputc('\n', fp); |
2077 | return ++printed; | |
2078 | } | |
c0a54341 ACM |
2079 | |
2080 | bool perf_evsel__fallback(struct perf_evsel *evsel, int err, | |
2081 | char *msg, size_t msgsize) | |
2082 | { | |
2b821cce | 2083 | if ((err == ENOENT || err == ENXIO || err == ENODEV) && |
c0a54341 ACM |
2084 | evsel->attr.type == PERF_TYPE_HARDWARE && |
2085 | evsel->attr.config == PERF_COUNT_HW_CPU_CYCLES) { | |
2086 | /* | |
2087 | * If it's cycles then fall back to hrtimer based | |
2088 | * cpu-clock-tick sw counter, which is always available even if | |
2089 | * no PMU support. | |
2090 | * | |
2091 | * PPC returns ENXIO until 2.6.37 (behavior changed with commit | |
2092 | * b0a873e). | |
2093 | */ | |
2094 | scnprintf(msg, msgsize, "%s", | |
2095 | "The cycles event is not supported, trying to fall back to cpu-clock-ticks"); | |
2096 | ||
2097 | evsel->attr.type = PERF_TYPE_SOFTWARE; | |
2098 | evsel->attr.config = PERF_COUNT_SW_CPU_CLOCK; | |
2099 | ||
04662523 | 2100 | zfree(&evsel->name); |
c0a54341 ACM |
2101 | return true; |
2102 | } | |
2103 | ||
2104 | return false; | |
2105 | } | |
56e52e85 | 2106 | |
602ad878 | 2107 | int perf_evsel__open_strerror(struct perf_evsel *evsel, struct target *target, |
56e52e85 ACM |
2108 | int err, char *msg, size_t size) |
2109 | { | |
6e81c74c MH |
2110 | char sbuf[STRERR_BUFSIZE]; |
2111 | ||
56e52e85 ACM |
2112 | switch (err) { |
2113 | case EPERM: | |
2114 | case EACCES: | |
b69e63a4 | 2115 | return scnprintf(msg, size, |
56e52e85 ACM |
2116 | "You may not have permission to collect %sstats.\n" |
2117 | "Consider tweaking /proc/sys/kernel/perf_event_paranoid:\n" | |
2118 | " -1 - Not paranoid at all\n" | |
2119 | " 0 - Disallow raw tracepoint access for unpriv\n" | |
2120 | " 1 - Disallow cpu events for unpriv\n" | |
2121 | " 2 - Disallow kernel profiling for unpriv", | |
2122 | target->system_wide ? "system-wide " : ""); | |
2123 | case ENOENT: | |
2124 | return scnprintf(msg, size, "The %s event is not supported.", | |
2125 | perf_evsel__name(evsel)); | |
2126 | case EMFILE: | |
2127 | return scnprintf(msg, size, "%s", | |
2128 | "Too many events are opened.\n" | |
2129 | "Try again after reducing the number of events."); | |
2130 | case ENODEV: | |
2131 | if (target->cpu_list) | |
2132 | return scnprintf(msg, size, "%s", | |
2133 | "No such device - did you specify an out-of-range profile CPU?\n"); | |
2134 | break; | |
2135 | case EOPNOTSUPP: | |
2136 | if (evsel->attr.precise_ip) | |
2137 | return scnprintf(msg, size, "%s", | |
2138 | "\'precise\' request may not be supported. Try removing 'p' modifier."); | |
2139 | #if defined(__i386__) || defined(__x86_64__) | |
2140 | if (evsel->attr.type == PERF_TYPE_HARDWARE) | |
2141 | return scnprintf(msg, size, "%s", | |
2142 | "No hardware sampling interrupt available.\n" | |
2143 | "No APIC? If so then you can boot the kernel with the \"lapic\" boot parameter to force-enable it."); | |
2144 | #endif | |
2145 | break; | |
63914aca JO |
2146 | case EBUSY: |
2147 | if (find_process("oprofiled")) | |
2148 | return scnprintf(msg, size, | |
2149 | "The PMU counters are busy/taken by another profiler.\n" | |
2150 | "We found oprofile daemon running, please stop it and try again."); | |
2151 | break; | |
56e52e85 ACM |
2152 | default: |
2153 | break; | |
2154 | } | |
2155 | ||
2156 | return scnprintf(msg, size, | |
6e81c74c | 2157 | "The sys_perf_event_open() syscall returned with %d (%s) for event (%s).\n" |
56e52e85 ACM |
2158 | "/bin/dmesg may provide additional information.\n" |
2159 | "No CONFIG_PERF_EVENTS=y kernel support configured?\n", | |
6e81c74c MH |
2160 | err, strerror_r(err, sbuf, sizeof(sbuf)), |
2161 | perf_evsel__name(evsel)); | |
56e52e85 | 2162 | } |