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1use crate::common::Register;
2
3macro_rules! registers {
4 ($struct_name:ident, { $($name:ident = ($val:expr, $disp:expr)),+ $(,)? }) => {
5 #[allow(missing_docs)]
6 impl $struct_name {
7 $(
8 pub const $name: Register = Register($val);
9 )+
10 }
11
12 impl $struct_name {
13 /// The name of a register, or `None` if the register number is unknown.
14 pub fn register_name(register: Register) -> Option<&'static str> {
15 match register {
16 $(
17 Self::$name => Some($disp),
18 )+
19 _ => return None,
20 }
21 }
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22
23 /// Converts a register name into a register number.
24 pub fn name_to_register(value: &str) -> Option<Register> {
25 match value {
26 $(
27 $disp => Some(Self::$name),
28 )+
29 _ => return None,
30 }
31 }
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32 }
33 };
34}
35
36/// ARM architecture specific definitions.
37///
38/// See [DWARF for the ARM Architecture](http://infocenter.arm.com/help/topic/com.arm.doc.ihi0040b/IHI0040B_aadwarf.pdf).
39#[derive(Debug, Clone, Copy)]
40pub struct Arm;
41
42// TODO: add more registers.
43registers!(Arm, {
44 R0 = (0, "R0"),
45 R1 = (1, "R1"),
46 R2 = (2, "R2"),
47 R3 = (3, "R3"),
48 R4 = (4, "R4"),
49 R5 = (5, "R5"),
50 R6 = (6, "R6"),
51 R7 = (7, "R7"),
52 R8 = (8, "R8"),
53 R9 = (9, "R9"),
54 R10 = (10, "R10"),
55 R11 = (11, "R11"),
56 R12 = (12, "R12"),
57 R13 = (13, "R13"),
58 R14 = (14, "R14"),
59 R15 = (15, "R15"),
60});
61
62/// Intel i386 architecture specific definitions.
63///
64/// See Intel386 psABi version 1.1 at the [X86 psABI wiki](https://github.com/hjl-tools/x86-psABI/wiki/X86-psABI).
65#[derive(Debug, Clone, Copy)]
66pub struct X86;
67
68registers!(X86, {
69 EAX = (0, "eax"),
70 ECX = (1, "ecx"),
71 EDX = (2, "edx"),
72 EBX = (3, "ebx"),
73 ESP = (4, "esp"),
74 EBP = (5, "ebp"),
75 ESI = (6, "esi"),
76 EDI = (7, "edi"),
77
78 // Return Address register. This is stored in `0(%esp, "")` and is not a physical register.
79 RA = (8, "RA"),
80
81 ST0 = (11, "st0"),
82 ST1 = (12, "st1"),
83 ST2 = (13, "st2"),
84 ST3 = (14, "st3"),
85 ST4 = (15, "st4"),
86 ST5 = (16, "st5"),
87 ST6 = (17, "st6"),
88 ST7 = (18, "st7"),
89
90 XMM0 = (21, "xmm0"),
91 XMM1 = (22, "xmm1"),
92 XMM2 = (23, "xmm2"),
93 XMM3 = (24, "xmm3"),
94 XMM4 = (25, "xmm4"),
95 XMM5 = (26, "xmm5"),
96 XMM6 = (27, "xmm6"),
97 XMM7 = (28, "xmm7"),
98
99 MM0 = (29, "mm0"),
100 MM1 = (30, "mm1"),
101 MM2 = (31, "mm2"),
102 MM3 = (32, "mm3"),
103 MM4 = (33, "mm4"),
104 MM5 = (34, "mm5"),
105 MM6 = (35, "mm6"),
106 MM7 = (36, "mm7"),
107
108 MXCSR = (39, "mxcsr"),
109
110 ES = (40, "es"),
111 CS = (41, "cs"),
112 SS = (42, "ss"),
113 DS = (43, "ds"),
114 FS = (44, "fs"),
115 GS = (45, "gs"),
116
117 TR = (48, "tr"),
118 LDTR = (49, "ldtr"),
119
120 FS_BASE = (93, "fs.base"),
121 GS_BASE = (94, "gs.base"),
122});
123
124/// AMD64 architecture specific definitions.
125///
126/// See x86-64 psABI version 1.0 at the [X86 psABI wiki](https://github.com/hjl-tools/x86-psABI/wiki/X86-psABI).
127#[derive(Debug, Clone, Copy)]
128pub struct X86_64;
129
130registers!(X86_64, {
131 RAX = (0, "rax"),
132 RDX = (1, "rdx"),
133 RCX = (2, "rcx"),
134 RBX = (3, "rbx"),
135 RSI = (4, "rsi"),
136 RDI = (5, "rdi"),
137 RBP = (6, "rbp"),
138 RSP = (7, "rsp"),
139
140 R8 = (8, "r8"),
141 R9 = (9, "r9"),
142 R10 = (10, "r10"),
143 R11 = (11, "r11"),
144 R12 = (12, "r12"),
145 R13 = (13, "r13"),
146 R14 = (14, "r14"),
147 R15 = (15, "r15"),
148
149 // Return Address register. This is stored in `0(%rsp, "")` and is not a physical register.
150 RA = (16, "RA"),
151
152 XMM0 = (17, "xmm0"),
153 XMM1 = (18, "xmm1"),
154 XMM2 = (19, "xmm2"),
155 XMM3 = (20, "xmm3"),
156 XMM4 = (21, "xmm4"),
157 XMM5 = (22, "xmm5"),
158 XMM6 = (23, "xmm6"),
159 XMM7 = (24, "xmm7"),
160
161 XMM8 = (25, "xmm8"),
162 XMM9 = (26, "xmm9"),
163 XMM10 = (27, "xmm10"),
164 XMM11 = (28, "xmm11"),
165 XMM12 = (29, "xmm12"),
166 XMM13 = (30, "xmm13"),
167 XMM14 = (31, "xmm14"),
168 XMM15 = (32, "xmm15"),
169
170 ST0 = (33, "st0"),
171 ST1 = (34, "st1"),
172 ST2 = (35, "st2"),
173 ST3 = (36, "st3"),
174 ST4 = (37, "st4"),
175 ST5 = (38, "st5"),
176 ST6 = (39, "st6"),
177 ST7 = (40, "st7"),
178
179 MM0 = (41, "mm0"),
180 MM1 = (42, "mm1"),
181 MM2 = (43, "mm2"),
182 MM3 = (44, "mm3"),
183 MM4 = (45, "mm4"),
184 MM5 = (46, "mm5"),
185 MM6 = (47, "mm6"),
186 MM7 = (48, "mm7"),
187
188 RFLAGS = (49, "rFLAGS"),
189 ES = (50, "es"),
190 CS = (51, "cs"),
191 SS = (52, "ss"),
192 DS = (53, "ds"),
193 FS = (54, "fs"),
194 GS = (55, "gs"),
195
196 FS_BASE = (58, "fs.base"),
197 GS_BASE = (59, "gs.base"),
198
199 TR = (62, "tr"),
200 LDTR = (63, "ldtr"),
201 MXCSR = (64, "mxcsr"),
202 FCW = (65, "fcw"),
203 FSW = (66, "fsw"),
204
205 XMM16 = (67, "xmm16"),
206 XMM17 = (68, "xmm17"),
207 XMM18 = (69, "xmm18"),
208 XMM19 = (70, "xmm19"),
209 XMM20 = (71, "xmm20"),
210 XMM21 = (72, "xmm21"),
211 XMM22 = (73, "xmm22"),
212 XMM23 = (74, "xmm23"),
213 XMM24 = (75, "xmm24"),
214 XMM25 = (76, "xmm25"),
215 XMM26 = (77, "xmm26"),
216 XMM27 = (78, "xmm27"),
217 XMM28 = (79, "xmm28"),
218 XMM29 = (80, "xmm29"),
219 XMM30 = (81, "xmm30"),
220 XMM31 = (82, "xmm31"),
221
222 K0 = (118, "k0"),
223 K1 = (119, "k1"),
224 K2 = (120, "k2"),
225 K3 = (121, "k3"),
226 K4 = (122, "k4"),
227 K5 = (123, "k5"),
228 K6 = (124, "k6"),
229 K7 = (125, "k7"),
230});