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1 | /** @file\r | |
2 | Common header file for MP Initialize Library.\r | |
3 | \r | |
4 | Copyright (c) 2016 - 2021, Intel Corporation. All rights reserved.<BR>\r | |
5 | Copyright (c) 2020, AMD Inc. All rights reserved.<BR>\r | |
6 | \r | |
7 | SPDX-License-Identifier: BSD-2-Clause-Patent\r | |
8 | \r | |
9 | **/\r | |
10 | \r | |
11 | #ifndef _MP_LIB_H_\r | |
12 | #define _MP_LIB_H_\r | |
13 | \r | |
14 | #include <PiPei.h>\r | |
15 | \r | |
16 | #include <Register/Intel/Cpuid.h>\r | |
17 | #include <Register/Amd/Cpuid.h>\r | |
18 | #include <Register/Amd/Ghcb.h>\r | |
19 | #include <Register/Intel/Msr.h>\r | |
20 | #include <Register/Intel/LocalApic.h>\r | |
21 | #include <Register/Intel/Microcode.h>\r | |
22 | \r | |
23 | #include <Library/MpInitLib.h>\r | |
24 | #include <Library/BaseLib.h>\r | |
25 | #include <Library/BaseMemoryLib.h>\r | |
26 | #include <Library/MemoryAllocationLib.h>\r | |
27 | #include <Library/DebugLib.h>\r | |
28 | #include <Library/LocalApicLib.h>\r | |
29 | #include <Library/CpuLib.h>\r | |
30 | #include <Library/UefiCpuLib.h>\r | |
31 | #include <Library/TimerLib.h>\r | |
32 | #include <Library/SynchronizationLib.h>\r | |
33 | #include <Library/MtrrLib.h>\r | |
34 | #include <Library/HobLib.h>\r | |
35 | #include <Library/PcdLib.h>\r | |
36 | #include <Library/MicrocodeLib.h>\r | |
37 | #include <ConfidentialComputingGuestAttr.h>\r | |
38 | \r | |
39 | #include <Register/Amd/Fam17Msr.h>\r | |
40 | #include <Register/Amd/Ghcb.h>\r | |
41 | \r | |
42 | #include <Guid/MicrocodePatchHob.h>\r | |
43 | \r | |
44 | #define WAKEUP_AP_SIGNAL SIGNATURE_32 ('S', 'T', 'A', 'P')\r | |
45 | \r | |
46 | #define CPU_INIT_MP_LIB_HOB_GUID \\r | |
47 | { \\r | |
48 | 0x58eb6a19, 0x3699, 0x4c68, { 0xa8, 0x36, 0xda, 0xcd, 0x8e, 0xdc, 0xad, 0x4a } \\r | |
49 | }\r | |
50 | \r | |
51 | //\r | |
52 | // The MP data for switch BSP\r | |
53 | //\r | |
54 | #define CPU_SWITCH_STATE_IDLE 0\r | |
55 | #define CPU_SWITCH_STATE_STORED 1\r | |
56 | #define CPU_SWITCH_STATE_LOADED 2\r | |
57 | \r | |
58 | //\r | |
59 | // Default maximum number of entries to store the microcode patches information\r | |
60 | //\r | |
61 | #define DEFAULT_MAX_MICROCODE_PATCH_NUM 8\r | |
62 | \r | |
63 | //\r | |
64 | // Data structure for microcode patch information\r | |
65 | //\r | |
66 | typedef struct {\r | |
67 | UINTN Address;\r | |
68 | UINTN Size;\r | |
69 | } MICROCODE_PATCH_INFO;\r | |
70 | \r | |
71 | //\r | |
72 | // CPU exchange information for switch BSP\r | |
73 | //\r | |
74 | typedef struct {\r | |
75 | UINT8 State; // offset 0\r | |
76 | UINTN StackPointer; // offset 4 / 8\r | |
77 | IA32_DESCRIPTOR Gdtr; // offset 8 / 16\r | |
78 | IA32_DESCRIPTOR Idtr; // offset 14 / 26\r | |
79 | } CPU_EXCHANGE_ROLE_INFO;\r | |
80 | \r | |
81 | //\r | |
82 | // AP loop state when APs are in idle state\r | |
83 | // It's value is the same with PcdCpuApLoopMode\r | |
84 | //\r | |
85 | typedef enum {\r | |
86 | ApInHltLoop = 1,\r | |
87 | ApInMwaitLoop = 2,\r | |
88 | ApInRunLoop = 3\r | |
89 | } AP_LOOP_MODE;\r | |
90 | \r | |
91 | //\r | |
92 | // AP initialization state during APs wakeup\r | |
93 | //\r | |
94 | typedef enum {\r | |
95 | ApInitConfig = 1,\r | |
96 | ApInitReconfig = 2,\r | |
97 | ApInitDone = 3\r | |
98 | } AP_INIT_STATE;\r | |
99 | \r | |
100 | //\r | |
101 | // AP state\r | |
102 | //\r | |
103 | // The state transitions for an AP when it process a procedure are:\r | |
104 | // Idle ----> Ready ----> Busy ----> Idle\r | |
105 | // [BSP] [AP] [AP]\r | |
106 | //\r | |
107 | typedef enum {\r | |
108 | CpuStateIdle,\r | |
109 | CpuStateReady,\r | |
110 | CpuStateBusy,\r | |
111 | CpuStateFinished,\r | |
112 | CpuStateDisabled\r | |
113 | } CPU_STATE;\r | |
114 | \r | |
115 | //\r | |
116 | // CPU volatile registers around INIT-SIPI-SIPI\r | |
117 | //\r | |
118 | typedef struct {\r | |
119 | UINTN Cr0;\r | |
120 | UINTN Cr3;\r | |
121 | UINTN Cr4;\r | |
122 | UINTN Dr0;\r | |
123 | UINTN Dr1;\r | |
124 | UINTN Dr2;\r | |
125 | UINTN Dr3;\r | |
126 | UINTN Dr6;\r | |
127 | UINTN Dr7;\r | |
128 | IA32_DESCRIPTOR Gdtr;\r | |
129 | IA32_DESCRIPTOR Idtr;\r | |
130 | UINT16 Tr;\r | |
131 | } CPU_VOLATILE_REGISTERS;\r | |
132 | \r | |
133 | //\r | |
134 | // AP related data\r | |
135 | //\r | |
136 | typedef struct {\r | |
137 | SPIN_LOCK ApLock;\r | |
138 | volatile UINT32 *StartupApSignal;\r | |
139 | volatile UINTN ApFunction;\r | |
140 | volatile UINTN ApFunctionArgument;\r | |
141 | BOOLEAN CpuHealthy;\r | |
142 | volatile CPU_STATE State;\r | |
143 | CPU_VOLATILE_REGISTERS VolatileRegisters;\r | |
144 | BOOLEAN Waiting;\r | |
145 | BOOLEAN *Finished;\r | |
146 | UINT64 ExpectedTime;\r | |
147 | UINT64 CurrentTime;\r | |
148 | UINT64 TotalTime;\r | |
149 | EFI_EVENT WaitEvent;\r | |
150 | UINT32 ProcessorSignature;\r | |
151 | UINT8 PlatformId;\r | |
152 | UINT64 MicrocodeEntryAddr;\r | |
153 | UINT32 MicrocodeRevision;\r | |
154 | SEV_ES_SAVE_AREA *SevEsSaveArea;\r | |
155 | } CPU_AP_DATA;\r | |
156 | \r | |
157 | //\r | |
158 | // Basic CPU information saved in Guided HOB.\r | |
159 | // Because the contents will be shard between PEI and DXE,\r | |
160 | // we need to make sure the each fields offset same in different\r | |
161 | // architecture.\r | |
162 | //\r | |
163 | #pragma pack (1)\r | |
164 | typedef struct {\r | |
165 | UINT32 InitialApicId;\r | |
166 | UINT32 ApicId;\r | |
167 | UINT32 Health;\r | |
168 | UINT64 ApTopOfStack;\r | |
169 | } CPU_INFO_IN_HOB;\r | |
170 | #pragma pack ()\r | |
171 | \r | |
172 | //\r | |
173 | // AP reset code information including code address and size,\r | |
174 | // this structure will be shared be C code and assembly code.\r | |
175 | // It is natural aligned by design.\r | |
176 | //\r | |
177 | typedef struct {\r | |
178 | UINT8 *RendezvousFunnelAddress;\r | |
179 | UINTN ModeEntryOffset;\r | |
180 | UINTN RendezvousFunnelSize;\r | |
181 | UINT8 *RelocateApLoopFuncAddress;\r | |
182 | UINTN RelocateApLoopFuncSize;\r | |
183 | UINTN ModeTransitionOffset;\r | |
184 | UINTN SwitchToRealSize;\r | |
185 | UINTN SwitchToRealOffset;\r | |
186 | UINTN SwitchToRealNoNxOffset;\r | |
187 | UINTN SwitchToRealPM16ModeOffset;\r | |
188 | UINTN SwitchToRealPM16ModeSize;\r | |
189 | } MP_ASSEMBLY_ADDRESS_MAP;\r | |
190 | \r | |
191 | typedef struct _CPU_MP_DATA CPU_MP_DATA;\r | |
192 | \r | |
193 | #pragma pack(1)\r | |
194 | \r | |
195 | //\r | |
196 | // MP CPU exchange information for AP reset code\r | |
197 | // This structure is required to be packed because fixed field offsets\r | |
198 | // into this structure are used in assembly code in this module\r | |
199 | //\r | |
200 | typedef struct {\r | |
201 | UINTN StackStart;\r | |
202 | UINTN StackSize;\r | |
203 | UINTN CFunction;\r | |
204 | IA32_DESCRIPTOR GdtrProfile;\r | |
205 | IA32_DESCRIPTOR IdtrProfile;\r | |
206 | UINTN BufferStart;\r | |
207 | UINTN ModeOffset;\r | |
208 | UINTN ApIndex;\r | |
209 | UINTN CodeSegment;\r | |
210 | UINTN DataSegment;\r | |
211 | UINTN EnableExecuteDisable;\r | |
212 | UINTN Cr3;\r | |
213 | UINTN InitFlag;\r | |
214 | CPU_INFO_IN_HOB *CpuInfo;\r | |
215 | UINTN NumApsExecuting;\r | |
216 | CPU_MP_DATA *CpuMpData;\r | |
217 | UINTN InitializeFloatingPointUnitsAddress;\r | |
218 | UINT32 ModeTransitionMemory;\r | |
219 | UINT16 ModeTransitionSegment;\r | |
220 | UINT32 ModeHighMemory;\r | |
221 | UINT16 ModeHighSegment;\r | |
222 | //\r | |
223 | // Enable5LevelPaging indicates whether 5-level paging is enabled in long mode.\r | |
224 | //\r | |
225 | BOOLEAN Enable5LevelPaging;\r | |
226 | BOOLEAN SevEsIsEnabled;\r | |
227 | BOOLEAN SevSnpIsEnabled;\r | |
228 | UINTN GhcbBase;\r | |
229 | BOOLEAN ExtTopoAvail;\r | |
230 | } MP_CPU_EXCHANGE_INFO;\r | |
231 | \r | |
232 | #pragma pack()\r | |
233 | \r | |
234 | //\r | |
235 | // CPU MP Data save in memory\r | |
236 | //\r | |
237 | struct _CPU_MP_DATA {\r | |
238 | UINT64 CpuInfoInHob;\r | |
239 | UINT32 CpuCount;\r | |
240 | UINT32 BspNumber;\r | |
241 | //\r | |
242 | // The above fields data will be passed from PEI to DXE\r | |
243 | // Please make sure the fields offset same in the different\r | |
244 | // architecture.\r | |
245 | //\r | |
246 | SPIN_LOCK MpLock;\r | |
247 | UINTN Buffer;\r | |
248 | UINTN CpuApStackSize;\r | |
249 | MP_ASSEMBLY_ADDRESS_MAP AddressMap;\r | |
250 | UINTN WakeupBuffer;\r | |
251 | UINTN WakeupBufferHigh;\r | |
252 | UINTN BackupBuffer;\r | |
253 | UINTN BackupBufferSize;\r | |
254 | \r | |
255 | volatile UINT32 FinishedCount;\r | |
256 | UINT32 RunningCount;\r | |
257 | BOOLEAN SingleThread;\r | |
258 | EFI_AP_PROCEDURE Procedure;\r | |
259 | VOID *ProcArguments;\r | |
260 | BOOLEAN *Finished;\r | |
261 | UINT64 ExpectedTime;\r | |
262 | UINT64 CurrentTime;\r | |
263 | UINT64 TotalTime;\r | |
264 | EFI_EVENT WaitEvent;\r | |
265 | UINTN **FailedCpuList;\r | |
266 | \r | |
267 | AP_INIT_STATE InitFlag;\r | |
268 | BOOLEAN SwitchBspFlag;\r | |
269 | UINTN NewBspNumber;\r | |
270 | CPU_EXCHANGE_ROLE_INFO BSPInfo;\r | |
271 | CPU_EXCHANGE_ROLE_INFO APInfo;\r | |
272 | MTRR_SETTINGS MtrrTable;\r | |
273 | UINT8 ApLoopMode;\r | |
274 | UINT8 ApTargetCState;\r | |
275 | UINT16 PmCodeSegment;\r | |
276 | UINT16 Pm16CodeSegment;\r | |
277 | CPU_AP_DATA *CpuData;\r | |
278 | volatile MP_CPU_EXCHANGE_INFO *MpCpuExchangeInfo;\r | |
279 | \r | |
280 | UINT32 CurrentTimerCount;\r | |
281 | UINTN DivideValue;\r | |
282 | UINT8 Vector;\r | |
283 | BOOLEAN PeriodicMode;\r | |
284 | BOOLEAN TimerInterruptState;\r | |
285 | UINT64 MicrocodePatchAddress;\r | |
286 | UINT64 MicrocodePatchRegionSize;\r | |
287 | \r | |
288 | //\r | |
289 | // Whether need to use Init-Sipi-Sipi to wake up the APs.\r | |
290 | // Two cases need to set this value to TRUE. One is in HLT\r | |
291 | // loop mode, the other is resume from S3 which loop mode\r | |
292 | // will be hardcode change to HLT mode by PiSmmCpuDxeSmm\r | |
293 | // driver.\r | |
294 | //\r | |
295 | BOOLEAN WakeUpByInitSipiSipi;\r | |
296 | \r | |
297 | BOOLEAN SevEsIsEnabled;\r | |
298 | BOOLEAN SevSnpIsEnabled;\r | |
299 | BOOLEAN UseSevEsAPMethod;\r | |
300 | UINTN SevEsAPBuffer;\r | |
301 | UINTN SevEsAPResetStackStart;\r | |
302 | CPU_MP_DATA *NewCpuMpData;\r | |
303 | \r | |
304 | UINT64 GhcbBase;\r | |
305 | };\r | |
306 | \r | |
307 | #define AP_SAFE_STACK_SIZE 128\r | |
308 | #define AP_RESET_STACK_SIZE AP_SAFE_STACK_SIZE\r | |
309 | \r | |
310 | #pragma pack(1)\r | |
311 | \r | |
312 | typedef struct {\r | |
313 | UINT8 InsnBuffer[8];\r | |
314 | UINT16 Rip;\r | |
315 | UINT16 Segment;\r | |
316 | } SEV_ES_AP_JMP_FAR;\r | |
317 | \r | |
318 | #pragma pack()\r | |
319 | \r | |
320 | /**\r | |
321 | Assembly code to move an AP from long mode to real mode.\r | |
322 | \r | |
323 | Move an AP from long mode to real mode in preparation to invoking\r | |
324 | the reset vector. This is used for SEV-ES guests where a hypervisor\r | |
325 | is not allowed to set the CS and RIP to point to the reset vector.\r | |
326 | \r | |
327 | @param[in] BufferStart The reset vector target.\r | |
328 | @param[in] Code16 16-bit protected mode code segment value.\r | |
329 | @param[in] Code32 32-bit protected mode code segment value.\r | |
330 | @param[in] StackStart The start of a stack to be used for transitioning\r | |
331 | from long mode to real mode.\r | |
332 | **/\r | |
333 | typedef\r | |
334 | VOID\r | |
335 | (EFIAPI AP_RESET)(\r | |
336 | IN UINTN BufferStart,\r | |
337 | IN UINT16 Code16,\r | |
338 | IN UINT16 Code32,\r | |
339 | IN UINTN StackStart\r | |
340 | );\r | |
341 | \r | |
342 | extern EFI_GUID mCpuInitMpLibHobGuid;\r | |
343 | \r | |
344 | /**\r | |
345 | Assembly code to place AP into safe loop mode.\r | |
346 | \r | |
347 | Place AP into targeted C-State if MONITOR is supported, otherwise\r | |
348 | place AP into hlt state.\r | |
349 | Place AP in protected mode if the current is long mode. Due to AP maybe\r | |
350 | wakeup by some hardware event. It could avoid accessing page table that\r | |
351 | may not available during booting to OS.\r | |
352 | \r | |
353 | @param[in] MwaitSupport TRUE indicates MONITOR is supported.\r | |
354 | FALSE indicates MONITOR is not supported.\r | |
355 | @param[in] ApTargetCState Target C-State value.\r | |
356 | @param[in] PmCodeSegment Protected mode code segment value.\r | |
357 | **/\r | |
358 | typedef\r | |
359 | VOID\r | |
360 | (EFIAPI *ASM_RELOCATE_AP_LOOP)(\r | |
361 | IN BOOLEAN MwaitSupport,\r | |
362 | IN UINTN ApTargetCState,\r | |
363 | IN UINTN PmCodeSegment,\r | |
364 | IN UINTN TopOfApStack,\r | |
365 | IN UINTN NumberToFinish,\r | |
366 | IN UINTN Pm16CodeSegment,\r | |
367 | IN UINTN SevEsAPJumpTable,\r | |
368 | IN UINTN WakeupBuffer\r | |
369 | );\r | |
370 | \r | |
371 | /**\r | |
372 | Assembly code to get starting address and size of the rendezvous entry for APs.\r | |
373 | Information for fixing a jump instruction in the code is also returned.\r | |
374 | \r | |
375 | @param[out] AddressMap Output buffer for address map information.\r | |
376 | **/\r | |
377 | VOID\r | |
378 | EFIAPI\r | |
379 | AsmGetAddressMap (\r | |
380 | OUT MP_ASSEMBLY_ADDRESS_MAP *AddressMap\r | |
381 | );\r | |
382 | \r | |
383 | /**\r | |
384 | This function is called by both the BSP and the AP which is to become the BSP to\r | |
385 | Exchange execution context including stack between them. After return from this\r | |
386 | function, the BSP becomes AP and the AP becomes the BSP.\r | |
387 | \r | |
388 | @param[in] MyInfo Pointer to buffer holding the exchanging information for the executing processor.\r | |
389 | @param[in] OthersInfo Pointer to buffer holding the exchanging information for the peer.\r | |
390 | \r | |
391 | **/\r | |
392 | VOID\r | |
393 | EFIAPI\r | |
394 | AsmExchangeRole (\r | |
395 | IN CPU_EXCHANGE_ROLE_INFO *MyInfo,\r | |
396 | IN CPU_EXCHANGE_ROLE_INFO *OthersInfo\r | |
397 | );\r | |
398 | \r | |
399 | /**\r | |
400 | Get the pointer to CPU MP Data structure.\r | |
401 | \r | |
402 | @return The pointer to CPU MP Data structure.\r | |
403 | **/\r | |
404 | CPU_MP_DATA *\r | |
405 | GetCpuMpData (\r | |
406 | VOID\r | |
407 | );\r | |
408 | \r | |
409 | /**\r | |
410 | Save the pointer to CPU MP Data structure.\r | |
411 | \r | |
412 | @param[in] CpuMpData The pointer to CPU MP Data structure will be saved.\r | |
413 | **/\r | |
414 | VOID\r | |
415 | SaveCpuMpData (\r | |
416 | IN CPU_MP_DATA *CpuMpData\r | |
417 | );\r | |
418 | \r | |
419 | /**\r | |
420 | Get available system memory below 1MB by specified size.\r | |
421 | \r | |
422 | @param[in] WakeupBufferSize Wakeup buffer size required\r | |
423 | \r | |
424 | @retval other Return wakeup buffer address below 1MB.\r | |
425 | @retval -1 Cannot find free memory below 1MB.\r | |
426 | **/\r | |
427 | UINTN\r | |
428 | GetWakeupBuffer (\r | |
429 | IN UINTN WakeupBufferSize\r | |
430 | );\r | |
431 | \r | |
432 | /**\r | |
433 | Get available EfiBootServicesCode memory below 4GB by specified size.\r | |
434 | \r | |
435 | This buffer is required to safely transfer AP from real address mode to\r | |
436 | protected mode or long mode, due to the fact that the buffer returned by\r | |
437 | GetWakeupBuffer() may be marked as non-executable.\r | |
438 | \r | |
439 | @param[in] BufferSize Wakeup transition buffer size.\r | |
440 | \r | |
441 | @retval other Return wakeup transition buffer address below 4GB.\r | |
442 | @retval 0 Cannot find free memory below 4GB.\r | |
443 | **/\r | |
444 | UINTN\r | |
445 | GetModeTransitionBuffer (\r | |
446 | IN UINTN BufferSize\r | |
447 | );\r | |
448 | \r | |
449 | /**\r | |
450 | Return the address of the SEV-ES AP jump table.\r | |
451 | \r | |
452 | This buffer is required in order for an SEV-ES guest to transition from\r | |
453 | UEFI into an OS.\r | |
454 | \r | |
455 | @return Return SEV-ES AP jump table buffer\r | |
456 | **/\r | |
457 | UINTN\r | |
458 | GetSevEsAPMemory (\r | |
459 | VOID\r | |
460 | );\r | |
461 | \r | |
462 | /**\r | |
463 | This function will be called by BSP to wakeup AP.\r | |
464 | \r | |
465 | @param[in] CpuMpData Pointer to CPU MP Data\r | |
466 | @param[in] Broadcast TRUE: Send broadcast IPI to all APs\r | |
467 | FALSE: Send IPI to AP by ApicId\r | |
468 | @param[in] ProcessorNumber The handle number of specified processor\r | |
469 | @param[in] Procedure The function to be invoked by AP\r | |
470 | @param[in] ProcedureArgument The argument to be passed into AP function\r | |
471 | @param[in] WakeUpDisabledAps Whether need to wake up disabled APs in broadcast mode.\r | |
472 | **/\r | |
473 | VOID\r | |
474 | WakeUpAP (\r | |
475 | IN CPU_MP_DATA *CpuMpData,\r | |
476 | IN BOOLEAN Broadcast,\r | |
477 | IN UINTN ProcessorNumber,\r | |
478 | IN EFI_AP_PROCEDURE Procedure OPTIONAL,\r | |
479 | IN VOID *ProcedureArgument OPTIONAL,\r | |
480 | IN BOOLEAN WakeUpDisabledAps\r | |
481 | );\r | |
482 | \r | |
483 | /**\r | |
484 | Initialize global data for MP support.\r | |
485 | \r | |
486 | @param[in] CpuMpData The pointer to CPU MP Data structure.\r | |
487 | **/\r | |
488 | VOID\r | |
489 | InitMpGlobalData (\r | |
490 | IN CPU_MP_DATA *CpuMpData\r | |
491 | );\r | |
492 | \r | |
493 | /**\r | |
494 | Worker function to execute a caller provided function on all enabled APs.\r | |
495 | \r | |
496 | @param[in] Procedure A pointer to the function to be run on\r | |
497 | enabled APs of the system.\r | |
498 | @param[in] SingleThread If TRUE, then all the enabled APs execute\r | |
499 | the function specified by Procedure one by\r | |
500 | one, in ascending order of processor handle\r | |
501 | number. If FALSE, then all the enabled APs\r | |
502 | execute the function specified by Procedure\r | |
503 | simultaneously.\r | |
504 | @param[in] ExcludeBsp Whether let BSP also trig this task.\r | |
505 | @param[in] WaitEvent The event created by the caller with CreateEvent()\r | |
506 | service.\r | |
507 | @param[in] TimeoutInMicroseconds Indicates the time limit in microseconds for\r | |
508 | APs to return from Procedure, either for\r | |
509 | blocking or non-blocking mode.\r | |
510 | @param[in] ProcedureArgument The parameter passed into Procedure for\r | |
511 | all APs.\r | |
512 | @param[out] FailedCpuList If all APs finish successfully, then its\r | |
513 | content is set to NULL. If not all APs\r | |
514 | finish before timeout expires, then its\r | |
515 | content is set to address of the buffer\r | |
516 | holding handle numbers of the failed APs.\r | |
517 | \r | |
518 | @retval EFI_SUCCESS In blocking mode, all APs have finished before\r | |
519 | the timeout expired.\r | |
520 | @retval EFI_SUCCESS In non-blocking mode, function has been dispatched\r | |
521 | to all enabled APs.\r | |
522 | @retval others Failed to Startup all APs.\r | |
523 | \r | |
524 | **/\r | |
525 | EFI_STATUS\r | |
526 | StartupAllCPUsWorker (\r | |
527 | IN EFI_AP_PROCEDURE Procedure,\r | |
528 | IN BOOLEAN SingleThread,\r | |
529 | IN BOOLEAN ExcludeBsp,\r | |
530 | IN EFI_EVENT WaitEvent OPTIONAL,\r | |
531 | IN UINTN TimeoutInMicroseconds,\r | |
532 | IN VOID *ProcedureArgument OPTIONAL,\r | |
533 | OUT UINTN **FailedCpuList OPTIONAL\r | |
534 | );\r | |
535 | \r | |
536 | /**\r | |
537 | Worker function to let the caller get one enabled AP to execute a caller-provided\r | |
538 | function.\r | |
539 | \r | |
540 | @param[in] Procedure A pointer to the function to be run on\r | |
541 | enabled APs of the system.\r | |
542 | @param[in] ProcessorNumber The handle number of the AP.\r | |
543 | @param[in] WaitEvent The event created by the caller with CreateEvent()\r | |
544 | service.\r | |
545 | @param[in] TimeoutInMicroseconds Indicates the time limit in microseconds for\r | |
546 | APs to return from Procedure, either for\r | |
547 | blocking or non-blocking mode.\r | |
548 | @param[in] ProcedureArgument The parameter passed into Procedure for\r | |
549 | all APs.\r | |
550 | @param[out] Finished If AP returns from Procedure before the\r | |
551 | timeout expires, its content is set to TRUE.\r | |
552 | Otherwise, the value is set to FALSE.\r | |
553 | \r | |
554 | @retval EFI_SUCCESS In blocking mode, specified AP finished before\r | |
555 | the timeout expires.\r | |
556 | @retval others Failed to Startup AP.\r | |
557 | \r | |
558 | **/\r | |
559 | EFI_STATUS\r | |
560 | StartupThisAPWorker (\r | |
561 | IN EFI_AP_PROCEDURE Procedure,\r | |
562 | IN UINTN ProcessorNumber,\r | |
563 | IN EFI_EVENT WaitEvent OPTIONAL,\r | |
564 | IN UINTN TimeoutInMicroseconds,\r | |
565 | IN VOID *ProcedureArgument OPTIONAL,\r | |
566 | OUT BOOLEAN *Finished OPTIONAL\r | |
567 | );\r | |
568 | \r | |
569 | /**\r | |
570 | Worker function to switch the requested AP to be the BSP from that point onward.\r | |
571 | \r | |
572 | @param[in] ProcessorNumber The handle number of AP that is to become the new BSP.\r | |
573 | @param[in] EnableOldBSP If TRUE, then the old BSP will be listed as an\r | |
574 | enabled AP. Otherwise, it will be disabled.\r | |
575 | \r | |
576 | @retval EFI_SUCCESS BSP successfully switched.\r | |
577 | @retval others Failed to switch BSP.\r | |
578 | \r | |
579 | **/\r | |
580 | EFI_STATUS\r | |
581 | SwitchBSPWorker (\r | |
582 | IN UINTN ProcessorNumber,\r | |
583 | IN BOOLEAN EnableOldBSP\r | |
584 | );\r | |
585 | \r | |
586 | /**\r | |
587 | Worker function to let the caller enable or disable an AP from this point onward.\r | |
588 | This service may only be called from the BSP.\r | |
589 | \r | |
590 | @param[in] ProcessorNumber The handle number of AP.\r | |
591 | @param[in] EnableAP Specifies the new state for the processor for\r | |
592 | enabled, FALSE for disabled.\r | |
593 | @param[in] HealthFlag If not NULL, a pointer to a value that specifies\r | |
594 | the new health status of the AP.\r | |
595 | \r | |
596 | @retval EFI_SUCCESS The specified AP was enabled or disabled successfully.\r | |
597 | @retval others Failed to Enable/Disable AP.\r | |
598 | \r | |
599 | **/\r | |
600 | EFI_STATUS\r | |
601 | EnableDisableApWorker (\r | |
602 | IN UINTN ProcessorNumber,\r | |
603 | IN BOOLEAN EnableAP,\r | |
604 | IN UINT32 *HealthFlag OPTIONAL\r | |
605 | );\r | |
606 | \r | |
607 | /**\r | |
608 | Get pointer to CPU MP Data structure from GUIDed HOB.\r | |
609 | \r | |
610 | @return The pointer to CPU MP Data structure.\r | |
611 | **/\r | |
612 | CPU_MP_DATA *\r | |
613 | GetCpuMpDataFromGuidedHob (\r | |
614 | VOID\r | |
615 | );\r | |
616 | \r | |
617 | /** Checks status of specified AP.\r | |
618 | \r | |
619 | This function checks whether the specified AP has finished the task assigned\r | |
620 | by StartupThisAP(), and whether timeout expires.\r | |
621 | \r | |
622 | @param[in] ProcessorNumber The handle number of processor.\r | |
623 | \r | |
624 | @retval EFI_SUCCESS Specified AP has finished task assigned by StartupThisAPs().\r | |
625 | @retval EFI_TIMEOUT The timeout expires.\r | |
626 | @retval EFI_NOT_READY Specified AP has not finished task and timeout has not expired.\r | |
627 | **/\r | |
628 | EFI_STATUS\r | |
629 | CheckThisAP (\r | |
630 | IN UINTN ProcessorNumber\r | |
631 | );\r | |
632 | \r | |
633 | /**\r | |
634 | Checks status of all APs.\r | |
635 | \r | |
636 | This function checks whether all APs have finished task assigned by StartupAllAPs(),\r | |
637 | and whether timeout expires.\r | |
638 | \r | |
639 | @retval EFI_SUCCESS All APs have finished task assigned by StartupAllAPs().\r | |
640 | @retval EFI_TIMEOUT The timeout expires.\r | |
641 | @retval EFI_NOT_READY APs have not finished task and timeout has not expired.\r | |
642 | **/\r | |
643 | EFI_STATUS\r | |
644 | CheckAllAPs (\r | |
645 | VOID\r | |
646 | );\r | |
647 | \r | |
648 | /**\r | |
649 | Checks APs status and updates APs status if needed.\r | |
650 | \r | |
651 | **/\r | |
652 | VOID\r | |
653 | CheckAndUpdateApsStatus (\r | |
654 | VOID\r | |
655 | );\r | |
656 | \r | |
657 | /**\r | |
658 | Detect whether specified processor can find matching microcode patch and load it.\r | |
659 | \r | |
660 | @param[in] CpuMpData The pointer to CPU MP Data structure.\r | |
661 | @param[in] ProcessorNumber The handle number of the processor. The range is\r | |
662 | from 0 to the total number of logical processors\r | |
663 | minus 1.\r | |
664 | **/\r | |
665 | VOID\r | |
666 | MicrocodeDetect (\r | |
667 | IN CPU_MP_DATA *CpuMpData,\r | |
668 | IN UINTN ProcessorNumber\r | |
669 | );\r | |
670 | \r | |
671 | /**\r | |
672 | Shadow the required microcode patches data into memory.\r | |
673 | \r | |
674 | @param[in, out] CpuMpData The pointer to CPU MP Data structure.\r | |
675 | **/\r | |
676 | VOID\r | |
677 | ShadowMicrocodeUpdatePatch (\r | |
678 | IN OUT CPU_MP_DATA *CpuMpData\r | |
679 | );\r | |
680 | \r | |
681 | /**\r | |
682 | Get the cached microcode patch base address and size from the microcode patch\r | |
683 | information cache HOB.\r | |
684 | \r | |
685 | @param[out] Address Base address of the microcode patches data.\r | |
686 | It will be updated if the microcode patch\r | |
687 | information cache HOB is found.\r | |
688 | @param[out] RegionSize Size of the microcode patches data.\r | |
689 | It will be updated if the microcode patch\r | |
690 | information cache HOB is found.\r | |
691 | \r | |
692 | @retval TRUE The microcode patch information cache HOB is found.\r | |
693 | @retval FALSE The microcode patch information cache HOB is not found.\r | |
694 | \r | |
695 | **/\r | |
696 | BOOLEAN\r | |
697 | GetMicrocodePatchInfoFromHob (\r | |
698 | UINT64 *Address,\r | |
699 | UINT64 *RegionSize\r | |
700 | );\r | |
701 | \r | |
702 | /**\r | |
703 | Detect whether Mwait-monitor feature is supported.\r | |
704 | \r | |
705 | @retval TRUE Mwait-monitor feature is supported.\r | |
706 | @retval FALSE Mwait-monitor feature is not supported.\r | |
707 | **/\r | |
708 | BOOLEAN\r | |
709 | IsMwaitSupport (\r | |
710 | VOID\r | |
711 | );\r | |
712 | \r | |
713 | /**\r | |
714 | Enable Debug Agent to support source debugging on AP function.\r | |
715 | \r | |
716 | **/\r | |
717 | VOID\r | |
718 | EnableDebugAgent (\r | |
719 | VOID\r | |
720 | );\r | |
721 | \r | |
722 | /**\r | |
723 | Find the current Processor number by APIC ID.\r | |
724 | \r | |
725 | @param[in] CpuMpData Pointer to PEI CPU MP Data\r | |
726 | @param[out] ProcessorNumber Return the pocessor number found\r | |
727 | \r | |
728 | @retval EFI_SUCCESS ProcessorNumber is found and returned.\r | |
729 | @retval EFI_NOT_FOUND ProcessorNumber is not found.\r | |
730 | **/\r | |
731 | EFI_STATUS\r | |
732 | GetProcessorNumber (\r | |
733 | IN CPU_MP_DATA *CpuMpData,\r | |
734 | OUT UINTN *ProcessorNumber\r | |
735 | );\r | |
736 | \r | |
737 | /**\r | |
738 | This funtion will try to invoke platform specific microcode shadow logic to\r | |
739 | relocate microcode update patches into memory.\r | |
740 | \r | |
741 | @param[in, out] CpuMpData The pointer to CPU MP Data structure.\r | |
742 | \r | |
743 | @retval EFI_SUCCESS Shadow microcode success.\r | |
744 | @retval EFI_OUT_OF_RESOURCES No enough resource to complete the operation.\r | |
745 | @retval EFI_UNSUPPORTED Can't find platform specific microcode shadow\r | |
746 | PPI/Protocol.\r | |
747 | **/\r | |
748 | EFI_STATUS\r | |
749 | PlatformShadowMicrocode (\r | |
750 | IN OUT CPU_MP_DATA *CpuMpData\r | |
751 | );\r | |
752 | \r | |
753 | /**\r | |
754 | Allocate the SEV-ES AP jump table buffer.\r | |
755 | \r | |
756 | @param[in, out] CpuMpData The pointer to CPU MP Data structure.\r | |
757 | **/\r | |
758 | VOID\r | |
759 | AllocateSevEsAPMemory (\r | |
760 | IN OUT CPU_MP_DATA *CpuMpData\r | |
761 | );\r | |
762 | \r | |
763 | /**\r | |
764 | Program the SEV-ES AP jump table buffer.\r | |
765 | \r | |
766 | @param[in] SipiVector The SIPI vector used for the AP Reset\r | |
767 | **/\r | |
768 | VOID\r | |
769 | SetSevEsJumpTable (\r | |
770 | IN UINTN SipiVector\r | |
771 | );\r | |
772 | \r | |
773 | /**\r | |
774 | The function puts the AP in halt loop.\r | |
775 | \r | |
776 | @param[in] CpuMpData The pointer to CPU MP Data structure.\r | |
777 | **/\r | |
778 | VOID\r | |
779 | SevEsPlaceApHlt (\r | |
780 | CPU_MP_DATA *CpuMpData\r | |
781 | );\r | |
782 | \r | |
783 | /**\r | |
784 | Check if the specified confidential computing attribute is active.\r | |
785 | \r | |
786 | @retval TRUE The specified Attr is active.\r | |
787 | @retval FALSE The specified Attr is not active.\r | |
788 | **/\r | |
789 | BOOLEAN\r | |
790 | EFIAPI\r | |
791 | ConfidentialComputingGuestHas (\r | |
792 | CONFIDENTIAL_COMPUTING_GUEST_ATTR Attr\r | |
793 | );\r | |
794 | \r | |
795 | /**\r | |
796 | The function fills the exchange data for the AP.\r | |
797 | \r | |
798 | @param[in] ExchangeInfo The pointer to CPU Exchange Data structure\r | |
799 | **/\r | |
800 | VOID\r | |
801 | FillExchangeInfoDataSevEs (\r | |
802 | IN volatile MP_CPU_EXCHANGE_INFO *ExchangeInfo\r | |
803 | );\r | |
804 | \r | |
805 | /**\r | |
806 | Issue RMPADJUST to adjust the VMSA attribute of an SEV-SNP page.\r | |
807 | \r | |
808 | @param[in] PageAddress\r | |
809 | @param[in] VmsaPage\r | |
810 | \r | |
811 | @return RMPADJUST return value\r | |
812 | **/\r | |
813 | UINT32\r | |
814 | SevSnpRmpAdjust (\r | |
815 | IN EFI_PHYSICAL_ADDRESS PageAddress,\r | |
816 | IN BOOLEAN VmsaPage\r | |
817 | );\r | |
818 | \r | |
819 | /**\r | |
820 | Create an SEV-SNP AP save area (VMSA) for use in running the vCPU.\r | |
821 | \r | |
822 | @param[in] CpuMpData Pointer to CPU MP Data\r | |
823 | @param[in] CpuData Pointer to CPU AP Data\r | |
824 | @param[in] ApicId APIC ID of the vCPU\r | |
825 | **/\r | |
826 | VOID\r | |
827 | SevSnpCreateSaveArea (\r | |
828 | IN CPU_MP_DATA *CpuMpData,\r | |
829 | IN CPU_AP_DATA *CpuData,\r | |
830 | UINT32 ApicId\r | |
831 | );\r | |
832 | \r | |
833 | /**\r | |
834 | Create SEV-SNP APs.\r | |
835 | \r | |
836 | @param[in] CpuMpData Pointer to CPU MP Data\r | |
837 | @param[in] ProcessorNumber The handle number of specified processor\r | |
838 | (-1 for all APs)\r | |
839 | **/\r | |
840 | VOID\r | |
841 | SevSnpCreateAP (\r | |
842 | IN CPU_MP_DATA *CpuMpData,\r | |
843 | IN INTN ProcessorNumber\r | |
844 | );\r | |
845 | \r | |
846 | #endif\r |