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1 | /*++\r | |
2 | \r | |
3 | Copyright (c) 1999 - 2014, Intel Corporation. All rights reserved\r | |
4 | \r | |
5 | This program and the accompanying materials are licensed and made available under\r | |
6 | the terms and conditions of the BSD License that accompanies this distribution.\r | |
7 | The full text of the license may be found at\r | |
8 | http://opensource.org/licenses/bsd-license.php.\r | |
9 | \r | |
10 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
11 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
12 | \r | |
13 | \r | |
14 | \r | |
15 | Module Name:\r | |
16 | \r | |
17 | HOST_BUS.ASL\r | |
18 | \r | |
19 | Abstract:\r | |
20 | \r | |
21 | Baytrail PCI configuration space definition.\r | |
22 | \r | |
23 | ---*/\r | |
24 | Device(VLVC)\r | |
25 | {\r | |
26 | Name(_ADR, 0x00000000) // Device 0, Function 0\r | |
27 | \r | |
28 | // Define various MCH Controller PCI Configuration Space\r | |
29 | // registers which will be used to dynamically produce all\r | |
30 | // resources in the Host Bus _CRS.\r | |
31 | OperationRegion(HBUS, PCI_Config, 0x00, 0xFF)\r | |
32 | Field(HBUS, DWordAcc, NoLock, Preserve)\r | |
33 | {\r | |
34 | Offset(0xD0),\r | |
35 | SMCR, 32, // VLV Message Control Register (0xD0)\r | |
36 | Offset(0xD4),\r | |
37 | SMDR, 32, // VLV Message Data Register (0xD4)\r | |
38 | Offset(0xD8),\r | |
39 | MCRX, 32, // VLV Message Control Register Extension (0xD8)\r | |
40 | }\r | |
41 | \r | |
42 | // Define a method to read a 32-bit register on the VLV Message bus.\r | |
43 | // Arg0 = Port\r | |
44 | // Arg1 = Register\r | |
45 | //\r | |
46 | // Returns 32-bit register value\r | |
47 | \r | |
48 | Method(RMBR, 2, Serialized)\r | |
49 | {\r | |
50 | \r | |
51 | // Initiate regsiter read message on VLV Message Bus MCR\r | |
52 | \r | |
53 | Or(ShiftLeft(Arg0, 16), ShiftLeft(Arg1, 8), Local0)\r | |
54 | Or(0x100000F0, Local0, SMCR)\r | |
55 | \r | |
56 | // Read register value from Message Data Register\r | |
57 | \r | |
58 | Return(SMDR)\r | |
59 | }\r | |
60 | \r | |
61 | \r | |
62 | // Define a method to write a 32-bit register on the VLV Message bus MDR.\r | |
63 | // Arg0 = Port\r | |
64 | // Arg1 = Register\r | |
65 | // Arg2 = 32-bit value\r | |
66 | \r | |
67 | Method(WMBR, 3, Serialized)\r | |
68 | {\r | |
69 | \r | |
70 | // Write register value to Message Data Register\r | |
71 | \r | |
72 | Store(Arg2, SMDR)\r | |
73 | \r | |
74 | // Initiate register write message on VLV Message Bus\r | |
75 | \r | |
76 | Or(ShiftLeft(Arg0, 16), ShiftLeft(Arg1, 8), Local0)\r | |
77 | Or(0x110000F0, Local0, SMCR)\r | |
78 | }\r | |
79 | }\r | |
80 | \r | |
81 | //\r | |
82 | // BUS, I/O, and MMIO resources\r | |
83 | //\r | |
84 | Method(_CRS,0,Serialized)\r | |
85 | {\r | |
86 | //Update ISP0 reserved memory\r | |
87 | CreateDwordField(RES0, ^ISP0._MIN,ISMN)\r | |
88 | CreateDwordField(RES0, ^ISP0._MAX,ISMX)\r | |
89 | CreateDwordField(RES0, ^ISP0._LEN,ISLN)\r | |
90 | If (LEqual(ISPD,1))\r | |
91 | {\r | |
92 | Store (ISPA, ISMN)\r | |
93 | Add (ISMN, ISLN, ISMX)\r | |
94 | Subtract(ISMX, 1, ISMX)\r | |
95 | } Else\r | |
96 | {\r | |
97 | Store (0, ISMN)\r | |
98 | Store (0, ISMX)\r | |
99 | Store (0, ISLN)\r | |
100 | }\r | |
101 | \r | |
102 | //PCI MMIO SPACE\r | |
103 | CreateDwordField(RES0, ^PM01._MIN,M1MN)\r | |
104 | CreateDwordField(RES0, ^PM01._MAX,M1MX)\r | |
105 | CreateDwordField(RES0, ^PM01._LEN,M1LN)\r | |
106 | \r | |
107 | //Get dBMBOUND Base\r | |
108 | And(BMBD, 0xFF000000, M1MN)\r | |
109 | \r | |
110 | //Get ECBASE\r | |
111 | Store(PCIT, M1MX)\r | |
112 | Add(Subtract(M1MX, M1MN), 1, M1LN)\r | |
113 | Subtract(M1MX, 1, M1MX)\r | |
114 | \r | |
115 | // Create pointers to Gfx Stolen Memory Sizing values.\r | |
116 | CreateDwordField(RES0, ^STOM._MIN,GSMN)\r | |
117 | CreateDwordField(RES0, ^STOM._MAX,GSMX)\r | |
118 | CreateDwordField(RES0, ^STOM._LEN,GSLN)\r | |
119 | \r | |
120 | If (LNotEqual (\_SB.PCI0.GFX0.GSTM, 0xFFFFFFFF))\r | |
121 | {\r | |
122 | Store(0x00, GSMN) //Read the Stolen memory base from B0:D2:F0:R5C\r | |
123 | } else\r | |
124 | {\r | |
125 | Store(\_SB.PCI0.GFX0.GSTM, GSMN) //Read the Stolen memory base from B0:D2:F0:R5C\r | |
126 | }\r | |
127 | If (LNotEqual (\_SB.PCI0.GFX0.GUMA, 0xFFFFFFFF))\r | |
128 | {\r | |
129 | Store(0x00, GSLN) //Read the Stolen memory base from B0:D2:F0:R5C\r | |
130 | } else\r | |
131 | {\r | |
132 | ShiftLeft(\_SB.PCI0.GFX0.GUMA, 25, GSLN) //Read Stolen memory base form B0:D2:F0:R50\r | |
133 | }\r | |
134 | Add(GSMN, GSLN, GSMX) //Store the Stolen Memory Size\r | |
135 | Subtract(GSMX, 1, GSMX)\r | |
136 | \r | |
137 | Return(RES0)\r | |
138 | }\r | |
139 | \r | |
140 | Name( RES0,ResourceTemplate()\r | |
141 | {\r | |
142 | WORDBusNumber ( // Bus number resource (0); the bridge produces bus numbers for its subsequent buses\r | |
143 | ResourceProducer, // bit 0 of general flags is 1\r | |
144 | MinFixed, // Range is fixed\r | |
145 | MaxFixed, // Range is fixed\r | |
146 | PosDecode, // PosDecode\r | |
147 | 0x0000, // Granularity\r | |
148 | 0x0000, // Min\r | |
149 | 0x00FF, // Max\r | |
150 | 0x0000, // Translation\r | |
151 | 0x0100 // Range Length = Max-Min+1\r | |
152 | )\r | |
153 | \r | |
154 | IO (Decode16, 0x70, 0x77, 0x01, 0x08) //Consumed resource (0xCF8-0xCFF)\r | |
155 | IO (Decode16, 0xCF8, 0xCF8, 0x01, 0x08) //Consumed resource (0xCF8-0xCFF)\r | |
156 | \r | |
157 | WORDIO ( // Consumed-and-produced resource (all I/O below CF8)\r | |
158 | ResourceProducer, // bit 0 of general flags is 0\r | |
159 | MinFixed, // Range is fixed\r | |
160 | MaxFixed, // Range is fixed\r | |
161 | PosDecode,\r | |
162 | EntireRange,\r | |
163 | 0x0000, // Granularity\r | |
164 | 0x0000, // Min\r | |
165 | 0x006F, // Max\r | |
166 | 0x0000, // Translation\r | |
167 | 0x0070 // Range Length\r | |
168 | )\r | |
169 | \r | |
170 | WORDIO ( // Consumed-and-produced resource\r | |
171 | ResourceProducer, // bit 0 of general flags is 0\r | |
172 | MinFixed, // Range is fixed\r | |
173 | MaxFixed, // Range is fixed\r | |
174 | PosDecode,\r | |
175 | EntireRange,\r | |
176 | 0x0000, // Granularity\r | |
177 | 0x0078, // Min\r | |
178 | 0x0CF7, // Max\r | |
179 | 0x0000, // Translation\r | |
180 | 0x0C80 // Range Length\r | |
181 | )\r | |
182 | \r | |
183 | WORDIO ( // Consumed-and-produced resource (all I/O above CFF)\r | |
184 | ResourceProducer, // bit 0 of general flags is 0\r | |
185 | MinFixed, // Range is fixed\r | |
186 | MaxFixed, // Range is fixed\r | |
187 | PosDecode,\r | |
188 | EntireRange,\r | |
189 | 0x0000, // Granularity\r | |
190 | 0x0D00, // Min\r | |
191 | 0xFFFF, // Max\r | |
192 | 0x0000, // Translation\r | |
193 | 0xF300 // Range Length\r | |
194 | )\r | |
195 | \r | |
196 | DWORDMEMORY ( // Descriptor for legacy VGA video RAM\r | |
197 | ResourceProducer, // bit 0 of general flags is 0\r | |
198 | PosDecode,\r | |
199 | MinFixed, // Range is fixed\r | |
200 | MaxFixed, // Range is fixed\r | |
201 | Cacheable,\r | |
202 | ReadWrite,\r | |
203 | 0x00000000, // Granularity\r | |
204 | 0x000A0000, // Min\r | |
205 | 0x000BFFFF, // Max\r | |
206 | 0x00000000, // Translation\r | |
207 | 0x00020000 // Range Length\r | |
208 | )\r | |
209 | \r | |
210 | DWORDMEMORY ( // Descriptor for legacy OptionRom\r | |
211 | ResourceProducer, // bit 0 of general flags is 0\r | |
212 | PosDecode,\r | |
213 | MinFixed, // Range is fixed\r | |
214 | MaxFixed, // Range is fixed\r | |
215 | Cacheable,\r | |
216 | ReadWrite,\r | |
217 | 0x00000000, // Granularity\r | |
218 | 0x000C0000, // Min\r | |
219 | 0x000DFFFF, // Max\r | |
220 | 0x00000000, // Translation\r | |
221 | 0x00020000 // Range Length\r | |
222 | )\r | |
223 | \r | |
224 | DWORDMEMORY ( // Descriptor for BIOS Area\r | |
225 | ResourceProducer, // bit 0 of general flags is 0\r | |
226 | PosDecode,\r | |
227 | MinFixed, // Range is fixed\r | |
228 | MaxFixed, // Range is fixed\r | |
229 | Cacheable,\r | |
230 | ReadWrite,\r | |
231 | 0x00000000, // Granularity\r | |
232 | 0x000E0000, // Min\r | |
233 | 0x000FFFFF, // Max\r | |
234 | 0x00000000, // Translation\r | |
235 | 0x00020000 // Range Length\r | |
236 | )\r | |
237 | \r | |
238 | DWORDMEMORY ( // Descriptor for ISP0 reserved Mem\r | |
239 | ResourceProducer, // bit 0 of general flags is 0\r | |
240 | PosDecode,\r | |
241 | MinFixed, // Range is fixed\r | |
242 | MaxFixed, // Range is fixed\r | |
243 | Cacheable,\r | |
244 | ReadWrite,\r | |
245 | 0x00000000, // Granularity\r | |
246 | 0x7A000000, // Min\r | |
247 | 0x7A3FFFFF, // Max\r | |
248 | 0x00000000, // Translation\r | |
249 | 0x00400000 // Range Length\r | |
250 | ,,,\r | |
251 | ISP0\r | |
252 | )\r | |
253 | \r | |
254 | DWORDMEMORY ( // Descriptor for VGA Stolen Mem\r | |
255 | ResourceProducer, // bit 0 of general flags is 0\r | |
256 | PosDecode,\r | |
257 | MinFixed, // Range is fixed\r | |
258 | MaxFixed, // Range is fixed\r | |
259 | Cacheable,\r | |
260 | ReadWrite,\r | |
261 | 0x00000000, // Granularity\r | |
262 | 0x7C000000, // Min\r | |
263 | 0x7FFFFFFF, // Max\r | |
264 | 0x00000000, // Translation\r | |
265 | 0x04000000 // Range Length\r | |
266 | ,,,\r | |
267 | STOM\r | |
268 | )\r | |
269 | \r | |
270 | DWORDMEMORY ( // Descriptor for PCI MMIO\r | |
271 | ResourceProducer, // bit 0 of general flags is 0\r | |
272 | PosDecode,\r | |
273 | MinFixed, // Range is fixed\r | |
274 | MaxFixed, // Range is fixed\r | |
275 | Cacheable,\r | |
276 | ReadWrite,\r | |
277 | 0x00000000, // Granularity\r | |
278 | 0x80000000, // Min\r | |
279 | 0xDFFFFFFF, // Max\r | |
280 | 0x00000000, // Translation\r | |
281 | 0x60000000 // Range Length\r | |
282 | ,,,\r | |
283 | PM01\r | |
284 | )\r | |
285 | })\r | |
286 | \r | |
287 | //Name(GUID,UUID("33DB4D5B-1FF7-401C-9657-7441C03DD766"))\r | |
288 | Name(GUID,Buffer()\r | |
289 | {\r | |
290 | 0x5b, 0x4d, 0xdb, 0x33,\r | |
291 | 0xf7, 0x1f,\r | |
292 | 0x1c, 0x40,\r | |
293 | 0x96, 0x57,\r | |
294 | 0x74, 0x41, 0xc0, 0x3d, 0xd7, 0x66\r | |
295 | })\r | |
296 | \r | |
297 | \r | |
298 | Name(SUPP,0) // PCI _OSC Support Field value\r | |
299 | Name(CTRL,0) // PCI _OSC Control Field value\r | |
300 | \r | |
301 | Method(_OSC,4,Serialized)\r | |
302 | {\r | |
303 | // Check for proper UUID\r | |
304 | // Save the capabilities buffer\r | |
305 | Store(Arg3,Local0)\r | |
306 | \r | |
307 | // Create DWord-adressable fields from the Capabilties Buffer\r | |
308 | CreateDWordField(Local0,0,CDW1)\r | |
309 | CreateDWordField(Local0,4,CDW2)\r | |
310 | CreateDWordField(Local0,8,CDW3)\r | |
311 | \r | |
312 | // Check for proper UUID\r | |
313 | If(LAnd(LEqual(Arg0,GUID),NEXP))\r | |
314 | {\r | |
315 | // Save Capabilities DWord2 & 3\r | |
316 | Store(CDW2,SUPP)\r | |
317 | Store(CDW3,CTRL)\r | |
318 | \r | |
319 | If(Not(And(CDW1,1))) // Query flag clear?\r | |
320 | {\r | |
321 | // Disable GPEs for features granted native control.\r | |
322 | If(And(CTRL,0x02))\r | |
323 | {\r | |
324 | NHPG()\r | |
325 | }\r | |
326 | If(And(CTRL,0x04)) // PME control granted?\r | |
327 | {\r | |
328 | NPME()\r | |
329 | }\r | |
330 | }\r | |
331 | \r | |
332 | If(LNotEqual(Arg1,One))\r | |
333 | {\r | |
334 | // Unknown revision\r | |
335 | Or(CDW1,0x08,CDW1)\r | |
336 | }\r | |
337 | \r | |
338 | If(LNotEqual(CDW3,CTRL))\r | |
339 | {\r | |
340 | // Capabilities bits were masked\r | |
341 | Or(CDW1,0x10,CDW1)\r | |
342 | }\r | |
343 | // Update DWORD3 in the buffer\r | |
344 | And(CTRL,0xfe,CTRL) \r | |
345 | Store(CTRL,CDW3)\r | |
346 | Store(CTRL,OSCC)\r | |
347 | Return(Local0)\r | |
348 | } Else\r | |
349 | {\r | |
350 | Or(CDW1,4,CDW1) // Unrecognized UUID\r | |
351 | Return(Local0)\r | |
352 | }\r | |
353 | } // End _OSC\r |