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1 | /** @file\r | |
2 | \r | |
3 | Copyright (c) 2004 - 2014, Intel Corporation. All rights reserved.<BR>\r | |
4 | \r\r | |
5 | This program and the accompanying materials are licensed and made available under\r\r | |
6 | the terms and conditions of the BSD License that accompanies this distribution. \r\r | |
7 | The full text of the license may be found at \r\r | |
8 | http://opensource.org/licenses/bsd-license.php. \r\r | |
9 | \r\r | |
10 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r\r | |
11 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r\r | |
12 | \r\r | |
13 | \r | |
14 | Module Name:\r | |
15 | \r | |
16 | Module Name:\r | |
17 | \r | |
18 | LpcSio.c\r | |
19 | \r | |
20 | Abstract: Sio implementation\r | |
21 | \r | |
22 | Revision History\r | |
23 | \r | |
24 | --*/\r | |
25 | \r | |
26 | #include "LpcDriver.h"\r | |
27 | #include <Library/S3BootScriptLib.h>\r | |
28 | \r | |
29 | VOID\r | |
30 | WriteRegister (\r | |
31 | IN UINT8 Index,\r | |
32 | IN UINT8 Data\r | |
33 | );\r | |
34 | \r | |
35 | typedef struct {\r | |
36 | UINT8 Register;\r | |
37 | UINT8 Value;\r | |
38 | } EFI_SIO_TABLE;\r | |
39 | \r | |
40 | EFI_SIO_TABLE mSioTable[] = {\r | |
41 | //\r | |
42 | // Init keyboard controller\r | |
43 | //\r | |
44 | { REG_LOGICAL_DEVICE, SIO_KEYBOARD },\r | |
45 | { BASE_ADDRESS_HIGH, 0x00 },\r | |
46 | { BASE_ADDRESS_LOW, 0x60 },\r | |
47 | { BASE_ADDRESS_HIGH2, 0x00 },\r | |
48 | { BASE_ADDRESS_LOW2, 0x64 },\r | |
49 | { PRIMARY_INTERRUPT_SELECT, 0x01 },\r | |
50 | { ACTIVATE, 0x1 },\r | |
51 | \r | |
52 | //\r | |
53 | // Init Mouse controller\r | |
54 | //\r | |
55 | { REG_LOGICAL_DEVICE, SIO_MOUSE },\r | |
56 | { BASE_ADDRESS_HIGH, 0x00 },\r | |
57 | { BASE_ADDRESS_LOW, 0x60 },\r | |
58 | { BASE_ADDRESS_HIGH2, 0x00 },\r | |
59 | { BASE_ADDRESS_LOW2, 0x64 },\r | |
60 | { PRIMARY_INTERRUPT_SELECT, 0x0c },\r | |
61 | { ACTIVATE, 0x1 },\r | |
62 | \r | |
63 | { REG_LOGICAL_DEVICE, SIO_COM },\r | |
64 | { BASE_ADDRESS_HIGH, 0x03 },\r | |
65 | { BASE_ADDRESS_LOW, 0xf8 },\r | |
66 | { PRIMARY_INTERRUPT_SELECT, 0x04 },\r | |
67 | { ACTIVATE, 0x1 },\r | |
68 | \r | |
69 | \r | |
70 | };\r | |
71 | \r | |
72 | VOID\r | |
73 | LPCWPCE791SetDefault ()\r | |
74 | {\r | |
75 | UINT8 Index;\r | |
76 | \r | |
77 | for (Index = 0; Index < sizeof(mSioTable)/sizeof(EFI_SIO_TABLE); Index++) {\r | |
78 | WriteRegisterAndSaveToScript (mSioTable[Index].Register, mSioTable[Index].Value);\r | |
79 | }\r | |
80 | \r | |
81 | return;\r | |
82 | }\r | |
83 | \r | |
84 | VOID\r | |
85 | DisableLogicalDevice (\r | |
86 | UINT8 DeviceId\r | |
87 | )\r | |
88 | {\r | |
89 | WriteRegisterAndSaveToScript (REG_LOGICAL_DEVICE, DeviceId);\r | |
90 | WriteRegisterAndSaveToScript (ACTIVATE, 0);\r | |
91 | WriteRegisterAndSaveToScript (BASE_ADDRESS_HIGH, 0);\r | |
92 | WriteRegisterAndSaveToScript (BASE_ADDRESS_LOW, 0);\r | |
93 | \r | |
94 | return;\r | |
95 | }\r | |
96 | \r | |
97 | VOID\r | |
98 | WriteRegister (\r | |
99 | IN UINT8 Index,\r | |
100 | IN UINT8 Data\r | |
101 | )\r | |
102 | {\r | |
103 | LpcIoWrite8(CONFIG_PORT, Index);\r | |
104 | LpcIoWrite8(DATA_PORT, Data);\r | |
105 | \r | |
106 | return;\r | |
107 | }\r | |
108 | \r | |
109 | VOID\r | |
110 | WriteRegisterAndSaveToScript (\r | |
111 | IN UINT8 Index,\r | |
112 | IN UINT8 Data\r | |
113 | )\r | |
114 | {\r | |
115 | UINT8 Buffer[2];\r | |
116 | \r | |
117 | LpcIoWrite8(CONFIG_PORT, Index);\r | |
118 | LpcIoWrite8(DATA_PORT, Data);\r | |
119 | \r | |
120 | Buffer[0] = Index;\r | |
121 | Buffer[1] = Data;\r | |
122 | S3BootScriptSaveIoWrite (\r | |
123 | EfiBootScriptWidthUint8,\r | |
124 | INDEX_PORT,\r | |
125 | 2,\r | |
126 | Buffer\r | |
127 | );\r | |
128 | \r | |
129 | return;\r | |
130 | }\r | |
131 | \r |