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KVM: MMU: split kvm_sync_page() function
[mirror_ubuntu-jammy-kernel.git] / arch / x86 / kvm / mmu.c
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1/*
2 * Kernel-based Virtual Machine driver for Linux
3 *
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
6 *
7 * MMU support
8 *
9 * Copyright (C) 2006 Qumranet, Inc.
10 *
11 * Authors:
12 * Yaniv Kamay <yaniv@qumranet.com>
13 * Avi Kivity <avi@qumranet.com>
14 *
15 * This work is licensed under the terms of the GNU GPL, version 2. See
16 * the COPYING file in the top-level directory.
17 *
18 */
19
20#include "mmu.h"
21#include "x86.h"
22#include "kvm_cache_regs.h"
23
24#include <linux/kvm_host.h>
25#include <linux/types.h>
26#include <linux/string.h>
27#include <linux/mm.h>
28#include <linux/highmem.h>
29#include <linux/module.h>
30#include <linux/swap.h>
31#include <linux/hugetlb.h>
32#include <linux/compiler.h>
33#include <linux/srcu.h>
34#include <linux/slab.h>
35#include <linux/uaccess.h>
36
37#include <asm/page.h>
38#include <asm/cmpxchg.h>
39#include <asm/io.h>
40#include <asm/vmx.h>
41
42/*
43 * When setting this variable to true it enables Two-Dimensional-Paging
44 * where the hardware walks 2 page tables:
45 * 1. the guest-virtual to guest-physical
46 * 2. while doing 1. it walks guest-physical to host-physical
47 * If the hardware supports that we don't need to do shadow paging.
48 */
49bool tdp_enabled = false;
50
51#undef MMU_DEBUG
52
53#undef AUDIT
54
55#ifdef AUDIT
56static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
57#else
58static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
59#endif
60
61#ifdef MMU_DEBUG
62
63#define pgprintk(x...) do { if (dbg) printk(x); } while (0)
64#define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
65
66#else
67
68#define pgprintk(x...) do { } while (0)
69#define rmap_printk(x...) do { } while (0)
70
71#endif
72
73#if defined(MMU_DEBUG) || defined(AUDIT)
74static int dbg = 0;
75module_param(dbg, bool, 0644);
76#endif
77
78static int oos_shadow = 1;
79module_param(oos_shadow, bool, 0644);
80
81#ifndef MMU_DEBUG
82#define ASSERT(x) do { } while (0)
83#else
84#define ASSERT(x) \
85 if (!(x)) { \
86 printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
87 __FILE__, __LINE__, #x); \
88 }
89#endif
90
91#define PT_FIRST_AVAIL_BITS_SHIFT 9
92#define PT64_SECOND_AVAIL_BITS_SHIFT 52
93
94#define VALID_PAGE(x) ((x) != INVALID_PAGE)
95
96#define PT64_LEVEL_BITS 9
97
98#define PT64_LEVEL_SHIFT(level) \
99 (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
100
101#define PT64_LEVEL_MASK(level) \
102 (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
103
104#define PT64_INDEX(address, level)\
105 (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
106
107
108#define PT32_LEVEL_BITS 10
109
110#define PT32_LEVEL_SHIFT(level) \
111 (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
112
113#define PT32_LEVEL_MASK(level) \
114 (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
115#define PT32_LVL_OFFSET_MASK(level) \
116 (PT32_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
117 * PT32_LEVEL_BITS))) - 1))
118
119#define PT32_INDEX(address, level)\
120 (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
121
122
123#define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
124#define PT64_DIR_BASE_ADDR_MASK \
125 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
126#define PT64_LVL_ADDR_MASK(level) \
127 (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
128 * PT64_LEVEL_BITS))) - 1))
129#define PT64_LVL_OFFSET_MASK(level) \
130 (PT64_BASE_ADDR_MASK & ((1ULL << (PAGE_SHIFT + (((level) - 1) \
131 * PT64_LEVEL_BITS))) - 1))
132
133#define PT32_BASE_ADDR_MASK PAGE_MASK
134#define PT32_DIR_BASE_ADDR_MASK \
135 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
136#define PT32_LVL_ADDR_MASK(level) \
137 (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + (((level) - 1) \
138 * PT32_LEVEL_BITS))) - 1))
139
140#define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
141 | PT64_NX_MASK)
142
143#define RMAP_EXT 4
144
145#define ACC_EXEC_MASK 1
146#define ACC_WRITE_MASK PT_WRITABLE_MASK
147#define ACC_USER_MASK PT_USER_MASK
148#define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
149
150#include <trace/events/kvm.h>
151
152#define CREATE_TRACE_POINTS
153#include "mmutrace.h"
154
155#define SPTE_HOST_WRITEABLE (1ULL << PT_FIRST_AVAIL_BITS_SHIFT)
156
157#define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
158
159struct kvm_rmap_desc {
160 u64 *sptes[RMAP_EXT];
161 struct kvm_rmap_desc *more;
162};
163
164struct kvm_shadow_walk_iterator {
165 u64 addr;
166 hpa_t shadow_addr;
167 int level;
168 u64 *sptep;
169 unsigned index;
170};
171
172#define for_each_shadow_entry(_vcpu, _addr, _walker) \
173 for (shadow_walk_init(&(_walker), _vcpu, _addr); \
174 shadow_walk_okay(&(_walker)); \
175 shadow_walk_next(&(_walker)))
176
177typedef int (*mmu_parent_walk_fn) (struct kvm_mmu_page *sp);
178
179static struct kmem_cache *pte_chain_cache;
180static struct kmem_cache *rmap_desc_cache;
181static struct kmem_cache *mmu_page_header_cache;
182
183static u64 __read_mostly shadow_trap_nonpresent_pte;
184static u64 __read_mostly shadow_notrap_nonpresent_pte;
185static u64 __read_mostly shadow_base_present_pte;
186static u64 __read_mostly shadow_nx_mask;
187static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */
188static u64 __read_mostly shadow_user_mask;
189static u64 __read_mostly shadow_accessed_mask;
190static u64 __read_mostly shadow_dirty_mask;
191
192static inline u64 rsvd_bits(int s, int e)
193{
194 return ((1ULL << (e - s + 1)) - 1) << s;
195}
196
197void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
198{
199 shadow_trap_nonpresent_pte = trap_pte;
200 shadow_notrap_nonpresent_pte = notrap_pte;
201}
202EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
203
204void kvm_mmu_set_base_ptes(u64 base_pte)
205{
206 shadow_base_present_pte = base_pte;
207}
208EXPORT_SYMBOL_GPL(kvm_mmu_set_base_ptes);
209
210void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
211 u64 dirty_mask, u64 nx_mask, u64 x_mask)
212{
213 shadow_user_mask = user_mask;
214 shadow_accessed_mask = accessed_mask;
215 shadow_dirty_mask = dirty_mask;
216 shadow_nx_mask = nx_mask;
217 shadow_x_mask = x_mask;
218}
219EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
220
221static bool is_write_protection(struct kvm_vcpu *vcpu)
222{
223 return kvm_read_cr0_bits(vcpu, X86_CR0_WP);
224}
225
226static int is_cpuid_PSE36(void)
227{
228 return 1;
229}
230
231static int is_nx(struct kvm_vcpu *vcpu)
232{
233 return vcpu->arch.efer & EFER_NX;
234}
235
236static int is_shadow_present_pte(u64 pte)
237{
238 return pte != shadow_trap_nonpresent_pte
239 && pte != shadow_notrap_nonpresent_pte;
240}
241
242static int is_large_pte(u64 pte)
243{
244 return pte & PT_PAGE_SIZE_MASK;
245}
246
247static int is_writable_pte(unsigned long pte)
248{
249 return pte & PT_WRITABLE_MASK;
250}
251
252static int is_dirty_gpte(unsigned long pte)
253{
254 return pte & PT_DIRTY_MASK;
255}
256
257static int is_rmap_spte(u64 pte)
258{
259 return is_shadow_present_pte(pte);
260}
261
262static int is_last_spte(u64 pte, int level)
263{
264 if (level == PT_PAGE_TABLE_LEVEL)
265 return 1;
266 if (is_large_pte(pte))
267 return 1;
268 return 0;
269}
270
271static pfn_t spte_to_pfn(u64 pte)
272{
273 return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
274}
275
276static gfn_t pse36_gfn_delta(u32 gpte)
277{
278 int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
279
280 return (gpte & PT32_DIR_PSE36_MASK) << shift;
281}
282
283static void __set_spte(u64 *sptep, u64 spte)
284{
285#ifdef CONFIG_X86_64
286 set_64bit((unsigned long *)sptep, spte);
287#else
288 set_64bit((unsigned long long *)sptep, spte);
289#endif
290}
291
292static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
293 struct kmem_cache *base_cache, int min)
294{
295 void *obj;
296
297 if (cache->nobjs >= min)
298 return 0;
299 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
300 obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
301 if (!obj)
302 return -ENOMEM;
303 cache->objects[cache->nobjs++] = obj;
304 }
305 return 0;
306}
307
308static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc,
309 struct kmem_cache *cache)
310{
311 while (mc->nobjs)
312 kmem_cache_free(cache, mc->objects[--mc->nobjs]);
313}
314
315static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
316 int min)
317{
318 struct page *page;
319
320 if (cache->nobjs >= min)
321 return 0;
322 while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
323 page = alloc_page(GFP_KERNEL);
324 if (!page)
325 return -ENOMEM;
326 cache->objects[cache->nobjs++] = page_address(page);
327 }
328 return 0;
329}
330
331static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
332{
333 while (mc->nobjs)
334 free_page((unsigned long)mc->objects[--mc->nobjs]);
335}
336
337static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
338{
339 int r;
340
341 r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache,
342 pte_chain_cache, 4);
343 if (r)
344 goto out;
345 r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache,
346 rmap_desc_cache, 4);
347 if (r)
348 goto out;
349 r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
350 if (r)
351 goto out;
352 r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
353 mmu_page_header_cache, 4);
354out:
355 return r;
356}
357
358static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
359{
360 mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache, pte_chain_cache);
361 mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache, rmap_desc_cache);
362 mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
363 mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache,
364 mmu_page_header_cache);
365}
366
367static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
368 size_t size)
369{
370 void *p;
371
372 BUG_ON(!mc->nobjs);
373 p = mc->objects[--mc->nobjs];
374 return p;
375}
376
377static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
378{
379 return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache,
380 sizeof(struct kvm_pte_chain));
381}
382
383static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
384{
385 kmem_cache_free(pte_chain_cache, pc);
386}
387
388static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
389{
390 return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache,
391 sizeof(struct kvm_rmap_desc));
392}
393
394static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
395{
396 kmem_cache_free(rmap_desc_cache, rd);
397}
398
399/*
400 * Return the pointer to the largepage write count for a given
401 * gfn, handling slots that are not large page aligned.
402 */
403static int *slot_largepage_idx(gfn_t gfn,
404 struct kvm_memory_slot *slot,
405 int level)
406{
407 unsigned long idx;
408
409 idx = (gfn / KVM_PAGES_PER_HPAGE(level)) -
410 (slot->base_gfn / KVM_PAGES_PER_HPAGE(level));
411 return &slot->lpage_info[level - 2][idx].write_count;
412}
413
414static void account_shadowed(struct kvm *kvm, gfn_t gfn)
415{
416 struct kvm_memory_slot *slot;
417 int *write_count;
418 int i;
419
420 gfn = unalias_gfn(kvm, gfn);
421
422 slot = gfn_to_memslot_unaliased(kvm, gfn);
423 for (i = PT_DIRECTORY_LEVEL;
424 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
425 write_count = slot_largepage_idx(gfn, slot, i);
426 *write_count += 1;
427 }
428}
429
430static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn)
431{
432 struct kvm_memory_slot *slot;
433 int *write_count;
434 int i;
435
436 gfn = unalias_gfn(kvm, gfn);
437 slot = gfn_to_memslot_unaliased(kvm, gfn);
438 for (i = PT_DIRECTORY_LEVEL;
439 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
440 write_count = slot_largepage_idx(gfn, slot, i);
441 *write_count -= 1;
442 WARN_ON(*write_count < 0);
443 }
444}
445
446static int has_wrprotected_page(struct kvm *kvm,
447 gfn_t gfn,
448 int level)
449{
450 struct kvm_memory_slot *slot;
451 int *largepage_idx;
452
453 gfn = unalias_gfn(kvm, gfn);
454 slot = gfn_to_memslot_unaliased(kvm, gfn);
455 if (slot) {
456 largepage_idx = slot_largepage_idx(gfn, slot, level);
457 return *largepage_idx;
458 }
459
460 return 1;
461}
462
463static int host_mapping_level(struct kvm *kvm, gfn_t gfn)
464{
465 unsigned long page_size;
466 int i, ret = 0;
467
468 page_size = kvm_host_page_size(kvm, gfn);
469
470 for (i = PT_PAGE_TABLE_LEVEL;
471 i < (PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES); ++i) {
472 if (page_size >= KVM_HPAGE_SIZE(i))
473 ret = i;
474 else
475 break;
476 }
477
478 return ret;
479}
480
481static int mapping_level(struct kvm_vcpu *vcpu, gfn_t large_gfn)
482{
483 struct kvm_memory_slot *slot;
484 int host_level, level, max_level;
485
486 slot = gfn_to_memslot(vcpu->kvm, large_gfn);
487 if (slot && slot->dirty_bitmap)
488 return PT_PAGE_TABLE_LEVEL;
489
490 host_level = host_mapping_level(vcpu->kvm, large_gfn);
491
492 if (host_level == PT_PAGE_TABLE_LEVEL)
493 return host_level;
494
495 max_level = kvm_x86_ops->get_lpage_level() < host_level ?
496 kvm_x86_ops->get_lpage_level() : host_level;
497
498 for (level = PT_DIRECTORY_LEVEL; level <= max_level; ++level)
499 if (has_wrprotected_page(vcpu->kvm, large_gfn, level))
500 break;
501
502 return level - 1;
503}
504
505/*
506 * Take gfn and return the reverse mapping to it.
507 * Note: gfn must be unaliased before this function get called
508 */
509
510static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int level)
511{
512 struct kvm_memory_slot *slot;
513 unsigned long idx;
514
515 slot = gfn_to_memslot(kvm, gfn);
516 if (likely(level == PT_PAGE_TABLE_LEVEL))
517 return &slot->rmap[gfn - slot->base_gfn];
518
519 idx = (gfn / KVM_PAGES_PER_HPAGE(level)) -
520 (slot->base_gfn / KVM_PAGES_PER_HPAGE(level));
521
522 return &slot->lpage_info[level - 2][idx].rmap_pde;
523}
524
525/*
526 * Reverse mapping data structures:
527 *
528 * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
529 * that points to page_address(page).
530 *
531 * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
532 * containing more mappings.
533 *
534 * Returns the number of rmap entries before the spte was added or zero if
535 * the spte was not added.
536 *
537 */
538static int rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
539{
540 struct kvm_mmu_page *sp;
541 struct kvm_rmap_desc *desc;
542 unsigned long *rmapp;
543 int i, count = 0;
544
545 if (!is_rmap_spte(*spte))
546 return count;
547 gfn = unalias_gfn(vcpu->kvm, gfn);
548 sp = page_header(__pa(spte));
549 sp->gfns[spte - sp->spt] = gfn;
550 rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
551 if (!*rmapp) {
552 rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
553 *rmapp = (unsigned long)spte;
554 } else if (!(*rmapp & 1)) {
555 rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
556 desc = mmu_alloc_rmap_desc(vcpu);
557 desc->sptes[0] = (u64 *)*rmapp;
558 desc->sptes[1] = spte;
559 *rmapp = (unsigned long)desc | 1;
560 } else {
561 rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
562 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
563 while (desc->sptes[RMAP_EXT-1] && desc->more) {
564 desc = desc->more;
565 count += RMAP_EXT;
566 }
567 if (desc->sptes[RMAP_EXT-1]) {
568 desc->more = mmu_alloc_rmap_desc(vcpu);
569 desc = desc->more;
570 }
571 for (i = 0; desc->sptes[i]; ++i)
572 ;
573 desc->sptes[i] = spte;
574 }
575 return count;
576}
577
578static void rmap_desc_remove_entry(unsigned long *rmapp,
579 struct kvm_rmap_desc *desc,
580 int i,
581 struct kvm_rmap_desc *prev_desc)
582{
583 int j;
584
585 for (j = RMAP_EXT - 1; !desc->sptes[j] && j > i; --j)
586 ;
587 desc->sptes[i] = desc->sptes[j];
588 desc->sptes[j] = NULL;
589 if (j != 0)
590 return;
591 if (!prev_desc && !desc->more)
592 *rmapp = (unsigned long)desc->sptes[0];
593 else
594 if (prev_desc)
595 prev_desc->more = desc->more;
596 else
597 *rmapp = (unsigned long)desc->more | 1;
598 mmu_free_rmap_desc(desc);
599}
600
601static void rmap_remove(struct kvm *kvm, u64 *spte)
602{
603 struct kvm_rmap_desc *desc;
604 struct kvm_rmap_desc *prev_desc;
605 struct kvm_mmu_page *sp;
606 pfn_t pfn;
607 unsigned long *rmapp;
608 int i;
609
610 if (!is_rmap_spte(*spte))
611 return;
612 sp = page_header(__pa(spte));
613 pfn = spte_to_pfn(*spte);
614 if (*spte & shadow_accessed_mask)
615 kvm_set_pfn_accessed(pfn);
616 if (is_writable_pte(*spte))
617 kvm_set_pfn_dirty(pfn);
618 rmapp = gfn_to_rmap(kvm, sp->gfns[spte - sp->spt], sp->role.level);
619 if (!*rmapp) {
620 printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
621 BUG();
622 } else if (!(*rmapp & 1)) {
623 rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
624 if ((u64 *)*rmapp != spte) {
625 printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
626 spte, *spte);
627 BUG();
628 }
629 *rmapp = 0;
630 } else {
631 rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
632 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
633 prev_desc = NULL;
634 while (desc) {
635 for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i)
636 if (desc->sptes[i] == spte) {
637 rmap_desc_remove_entry(rmapp,
638 desc, i,
639 prev_desc);
640 return;
641 }
642 prev_desc = desc;
643 desc = desc->more;
644 }
645 pr_err("rmap_remove: %p %llx many->many\n", spte, *spte);
646 BUG();
647 }
648}
649
650static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
651{
652 struct kvm_rmap_desc *desc;
653 u64 *prev_spte;
654 int i;
655
656 if (!*rmapp)
657 return NULL;
658 else if (!(*rmapp & 1)) {
659 if (!spte)
660 return (u64 *)*rmapp;
661 return NULL;
662 }
663 desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
664 prev_spte = NULL;
665 while (desc) {
666 for (i = 0; i < RMAP_EXT && desc->sptes[i]; ++i) {
667 if (prev_spte == spte)
668 return desc->sptes[i];
669 prev_spte = desc->sptes[i];
670 }
671 desc = desc->more;
672 }
673 return NULL;
674}
675
676static int rmap_write_protect(struct kvm *kvm, u64 gfn)
677{
678 unsigned long *rmapp;
679 u64 *spte;
680 int i, write_protected = 0;
681
682 gfn = unalias_gfn(kvm, gfn);
683 rmapp = gfn_to_rmap(kvm, gfn, PT_PAGE_TABLE_LEVEL);
684
685 spte = rmap_next(kvm, rmapp, NULL);
686 while (spte) {
687 BUG_ON(!spte);
688 BUG_ON(!(*spte & PT_PRESENT_MASK));
689 rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
690 if (is_writable_pte(*spte)) {
691 __set_spte(spte, *spte & ~PT_WRITABLE_MASK);
692 write_protected = 1;
693 }
694 spte = rmap_next(kvm, rmapp, spte);
695 }
696 if (write_protected) {
697 pfn_t pfn;
698
699 spte = rmap_next(kvm, rmapp, NULL);
700 pfn = spte_to_pfn(*spte);
701 kvm_set_pfn_dirty(pfn);
702 }
703
704 /* check for huge page mappings */
705 for (i = PT_DIRECTORY_LEVEL;
706 i < PT_PAGE_TABLE_LEVEL + KVM_NR_PAGE_SIZES; ++i) {
707 rmapp = gfn_to_rmap(kvm, gfn, i);
708 spte = rmap_next(kvm, rmapp, NULL);
709 while (spte) {
710 BUG_ON(!spte);
711 BUG_ON(!(*spte & PT_PRESENT_MASK));
712 BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK));
713 pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn);
714 if (is_writable_pte(*spte)) {
715 rmap_remove(kvm, spte);
716 --kvm->stat.lpages;
717 __set_spte(spte, shadow_trap_nonpresent_pte);
718 spte = NULL;
719 write_protected = 1;
720 }
721 spte = rmap_next(kvm, rmapp, spte);
722 }
723 }
724
725 return write_protected;
726}
727
728static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp,
729 unsigned long data)
730{
731 u64 *spte;
732 int need_tlb_flush = 0;
733
734 while ((spte = rmap_next(kvm, rmapp, NULL))) {
735 BUG_ON(!(*spte & PT_PRESENT_MASK));
736 rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", spte, *spte);
737 rmap_remove(kvm, spte);
738 __set_spte(spte, shadow_trap_nonpresent_pte);
739 need_tlb_flush = 1;
740 }
741 return need_tlb_flush;
742}
743
744static int kvm_set_pte_rmapp(struct kvm *kvm, unsigned long *rmapp,
745 unsigned long data)
746{
747 int need_flush = 0;
748 u64 *spte, new_spte;
749 pte_t *ptep = (pte_t *)data;
750 pfn_t new_pfn;
751
752 WARN_ON(pte_huge(*ptep));
753 new_pfn = pte_pfn(*ptep);
754 spte = rmap_next(kvm, rmapp, NULL);
755 while (spte) {
756 BUG_ON(!is_shadow_present_pte(*spte));
757 rmap_printk("kvm_set_pte_rmapp: spte %p %llx\n", spte, *spte);
758 need_flush = 1;
759 if (pte_write(*ptep)) {
760 rmap_remove(kvm, spte);
761 __set_spte(spte, shadow_trap_nonpresent_pte);
762 spte = rmap_next(kvm, rmapp, NULL);
763 } else {
764 new_spte = *spte &~ (PT64_BASE_ADDR_MASK);
765 new_spte |= (u64)new_pfn << PAGE_SHIFT;
766
767 new_spte &= ~PT_WRITABLE_MASK;
768 new_spte &= ~SPTE_HOST_WRITEABLE;
769 if (is_writable_pte(*spte))
770 kvm_set_pfn_dirty(spte_to_pfn(*spte));
771 __set_spte(spte, new_spte);
772 spte = rmap_next(kvm, rmapp, spte);
773 }
774 }
775 if (need_flush)
776 kvm_flush_remote_tlbs(kvm);
777
778 return 0;
779}
780
781static int kvm_handle_hva(struct kvm *kvm, unsigned long hva,
782 unsigned long data,
783 int (*handler)(struct kvm *kvm, unsigned long *rmapp,
784 unsigned long data))
785{
786 int i, j;
787 int ret;
788 int retval = 0;
789 struct kvm_memslots *slots;
790
791 slots = kvm_memslots(kvm);
792
793 for (i = 0; i < slots->nmemslots; i++) {
794 struct kvm_memory_slot *memslot = &slots->memslots[i];
795 unsigned long start = memslot->userspace_addr;
796 unsigned long end;
797
798 end = start + (memslot->npages << PAGE_SHIFT);
799 if (hva >= start && hva < end) {
800 gfn_t gfn_offset = (hva - start) >> PAGE_SHIFT;
801
802 ret = handler(kvm, &memslot->rmap[gfn_offset], data);
803
804 for (j = 0; j < KVM_NR_PAGE_SIZES - 1; ++j) {
805 int idx = gfn_offset;
806 idx /= KVM_PAGES_PER_HPAGE(PT_DIRECTORY_LEVEL + j);
807 ret |= handler(kvm,
808 &memslot->lpage_info[j][idx].rmap_pde,
809 data);
810 }
811 trace_kvm_age_page(hva, memslot, ret);
812 retval |= ret;
813 }
814 }
815
816 return retval;
817}
818
819int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
820{
821 return kvm_handle_hva(kvm, hva, 0, kvm_unmap_rmapp);
822}
823
824void kvm_set_spte_hva(struct kvm *kvm, unsigned long hva, pte_t pte)
825{
826 kvm_handle_hva(kvm, hva, (unsigned long)&pte, kvm_set_pte_rmapp);
827}
828
829static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp,
830 unsigned long data)
831{
832 u64 *spte;
833 int young = 0;
834
835 /*
836 * Emulate the accessed bit for EPT, by checking if this page has
837 * an EPT mapping, and clearing it if it does. On the next access,
838 * a new EPT mapping will be established.
839 * This has some overhead, but not as much as the cost of swapping
840 * out actively used pages or breaking up actively used hugepages.
841 */
842 if (!shadow_accessed_mask)
843 return kvm_unmap_rmapp(kvm, rmapp, data);
844
845 spte = rmap_next(kvm, rmapp, NULL);
846 while (spte) {
847 int _young;
848 u64 _spte = *spte;
849 BUG_ON(!(_spte & PT_PRESENT_MASK));
850 _young = _spte & PT_ACCESSED_MASK;
851 if (_young) {
852 young = 1;
853 clear_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
854 }
855 spte = rmap_next(kvm, rmapp, spte);
856 }
857 return young;
858}
859
860#define RMAP_RECYCLE_THRESHOLD 1000
861
862static void rmap_recycle(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn)
863{
864 unsigned long *rmapp;
865 struct kvm_mmu_page *sp;
866
867 sp = page_header(__pa(spte));
868
869 gfn = unalias_gfn(vcpu->kvm, gfn);
870 rmapp = gfn_to_rmap(vcpu->kvm, gfn, sp->role.level);
871
872 kvm_unmap_rmapp(vcpu->kvm, rmapp, 0);
873 kvm_flush_remote_tlbs(vcpu->kvm);
874}
875
876int kvm_age_hva(struct kvm *kvm, unsigned long hva)
877{
878 return kvm_handle_hva(kvm, hva, 0, kvm_age_rmapp);
879}
880
881#ifdef MMU_DEBUG
882static int is_empty_shadow_page(u64 *spt)
883{
884 u64 *pos;
885 u64 *end;
886
887 for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
888 if (is_shadow_present_pte(*pos)) {
889 printk(KERN_ERR "%s: %p %llx\n", __func__,
890 pos, *pos);
891 return 0;
892 }
893 return 1;
894}
895#endif
896
897static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
898{
899 ASSERT(is_empty_shadow_page(sp->spt));
900 list_del(&sp->link);
901 __free_page(virt_to_page(sp->spt));
902 __free_page(virt_to_page(sp->gfns));
903 kmem_cache_free(mmu_page_header_cache, sp);
904 ++kvm->arch.n_free_mmu_pages;
905}
906
907static unsigned kvm_page_table_hashfn(gfn_t gfn)
908{
909 return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1);
910}
911
912static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
913 u64 *parent_pte)
914{
915 struct kvm_mmu_page *sp;
916
917 sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp);
918 sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
919 sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
920 set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
921 list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
922 bitmap_zero(sp->slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS);
923 sp->multimapped = 0;
924 sp->parent_pte = parent_pte;
925 --vcpu->kvm->arch.n_free_mmu_pages;
926 return sp;
927}
928
929static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
930 struct kvm_mmu_page *sp, u64 *parent_pte)
931{
932 struct kvm_pte_chain *pte_chain;
933 struct hlist_node *node;
934 int i;
935
936 if (!parent_pte)
937 return;
938 if (!sp->multimapped) {
939 u64 *old = sp->parent_pte;
940
941 if (!old) {
942 sp->parent_pte = parent_pte;
943 return;
944 }
945 sp->multimapped = 1;
946 pte_chain = mmu_alloc_pte_chain(vcpu);
947 INIT_HLIST_HEAD(&sp->parent_ptes);
948 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
949 pte_chain->parent_ptes[0] = old;
950 }
951 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
952 if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
953 continue;
954 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
955 if (!pte_chain->parent_ptes[i]) {
956 pte_chain->parent_ptes[i] = parent_pte;
957 return;
958 }
959 }
960 pte_chain = mmu_alloc_pte_chain(vcpu);
961 BUG_ON(!pte_chain);
962 hlist_add_head(&pte_chain->link, &sp->parent_ptes);
963 pte_chain->parent_ptes[0] = parent_pte;
964}
965
966static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
967 u64 *parent_pte)
968{
969 struct kvm_pte_chain *pte_chain;
970 struct hlist_node *node;
971 int i;
972
973 if (!sp->multimapped) {
974 BUG_ON(sp->parent_pte != parent_pte);
975 sp->parent_pte = NULL;
976 return;
977 }
978 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
979 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
980 if (!pte_chain->parent_ptes[i])
981 break;
982 if (pte_chain->parent_ptes[i] != parent_pte)
983 continue;
984 while (i + 1 < NR_PTE_CHAIN_ENTRIES
985 && pte_chain->parent_ptes[i + 1]) {
986 pte_chain->parent_ptes[i]
987 = pte_chain->parent_ptes[i + 1];
988 ++i;
989 }
990 pte_chain->parent_ptes[i] = NULL;
991 if (i == 0) {
992 hlist_del(&pte_chain->link);
993 mmu_free_pte_chain(pte_chain);
994 if (hlist_empty(&sp->parent_ptes)) {
995 sp->multimapped = 0;
996 sp->parent_pte = NULL;
997 }
998 }
999 return;
1000 }
1001 BUG();
1002}
1003
1004
1005static void mmu_parent_walk(struct kvm_mmu_page *sp, mmu_parent_walk_fn fn)
1006{
1007 struct kvm_pte_chain *pte_chain;
1008 struct hlist_node *node;
1009 struct kvm_mmu_page *parent_sp;
1010 int i;
1011
1012 if (!sp->multimapped && sp->parent_pte) {
1013 parent_sp = page_header(__pa(sp->parent_pte));
1014 fn(parent_sp);
1015 mmu_parent_walk(parent_sp, fn);
1016 return;
1017 }
1018 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
1019 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
1020 if (!pte_chain->parent_ptes[i])
1021 break;
1022 parent_sp = page_header(__pa(pte_chain->parent_ptes[i]));
1023 fn(parent_sp);
1024 mmu_parent_walk(parent_sp, fn);
1025 }
1026}
1027
1028static void kvm_mmu_update_unsync_bitmap(u64 *spte)
1029{
1030 unsigned int index;
1031 struct kvm_mmu_page *sp = page_header(__pa(spte));
1032
1033 index = spte - sp->spt;
1034 if (!__test_and_set_bit(index, sp->unsync_child_bitmap))
1035 sp->unsync_children++;
1036 WARN_ON(!sp->unsync_children);
1037}
1038
1039static void kvm_mmu_update_parents_unsync(struct kvm_mmu_page *sp)
1040{
1041 struct kvm_pte_chain *pte_chain;
1042 struct hlist_node *node;
1043 int i;
1044
1045 if (!sp->parent_pte)
1046 return;
1047
1048 if (!sp->multimapped) {
1049 kvm_mmu_update_unsync_bitmap(sp->parent_pte);
1050 return;
1051 }
1052
1053 hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
1054 for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
1055 if (!pte_chain->parent_ptes[i])
1056 break;
1057 kvm_mmu_update_unsync_bitmap(pte_chain->parent_ptes[i]);
1058 }
1059}
1060
1061static int unsync_walk_fn(struct kvm_mmu_page *sp)
1062{
1063 kvm_mmu_update_parents_unsync(sp);
1064 return 1;
1065}
1066
1067static void kvm_mmu_mark_parents_unsync(struct kvm_mmu_page *sp)
1068{
1069 mmu_parent_walk(sp, unsync_walk_fn);
1070 kvm_mmu_update_parents_unsync(sp);
1071}
1072
1073static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
1074 struct kvm_mmu_page *sp)
1075{
1076 int i;
1077
1078 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
1079 sp->spt[i] = shadow_trap_nonpresent_pte;
1080}
1081
1082static int nonpaging_sync_page(struct kvm_vcpu *vcpu,
1083 struct kvm_mmu_page *sp)
1084{
1085 return 1;
1086}
1087
1088static void nonpaging_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
1089{
1090}
1091
1092#define KVM_PAGE_ARRAY_NR 16
1093
1094struct kvm_mmu_pages {
1095 struct mmu_page_and_offset {
1096 struct kvm_mmu_page *sp;
1097 unsigned int idx;
1098 } page[KVM_PAGE_ARRAY_NR];
1099 unsigned int nr;
1100};
1101
1102#define for_each_unsync_children(bitmap, idx) \
1103 for (idx = find_first_bit(bitmap, 512); \
1104 idx < 512; \
1105 idx = find_next_bit(bitmap, 512, idx+1))
1106
1107static int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp,
1108 int idx)
1109{
1110 int i;
1111
1112 if (sp->unsync)
1113 for (i=0; i < pvec->nr; i++)
1114 if (pvec->page[i].sp == sp)
1115 return 0;
1116
1117 pvec->page[pvec->nr].sp = sp;
1118 pvec->page[pvec->nr].idx = idx;
1119 pvec->nr++;
1120 return (pvec->nr == KVM_PAGE_ARRAY_NR);
1121}
1122
1123static int __mmu_unsync_walk(struct kvm_mmu_page *sp,
1124 struct kvm_mmu_pages *pvec)
1125{
1126 int i, ret, nr_unsync_leaf = 0;
1127
1128 for_each_unsync_children(sp->unsync_child_bitmap, i) {
1129 u64 ent = sp->spt[i];
1130
1131 if (is_shadow_present_pte(ent) && !is_large_pte(ent)) {
1132 struct kvm_mmu_page *child;
1133 child = page_header(ent & PT64_BASE_ADDR_MASK);
1134
1135 if (child->unsync_children) {
1136 if (mmu_pages_add(pvec, child, i))
1137 return -ENOSPC;
1138
1139 ret = __mmu_unsync_walk(child, pvec);
1140 if (!ret)
1141 __clear_bit(i, sp->unsync_child_bitmap);
1142 else if (ret > 0)
1143 nr_unsync_leaf += ret;
1144 else
1145 return ret;
1146 }
1147
1148 if (child->unsync) {
1149 nr_unsync_leaf++;
1150 if (mmu_pages_add(pvec, child, i))
1151 return -ENOSPC;
1152 }
1153 }
1154 }
1155
1156 if (find_first_bit(sp->unsync_child_bitmap, 512) == 512)
1157 sp->unsync_children = 0;
1158
1159 return nr_unsync_leaf;
1160}
1161
1162static int mmu_unsync_walk(struct kvm_mmu_page *sp,
1163 struct kvm_mmu_pages *pvec)
1164{
1165 if (!sp->unsync_children)
1166 return 0;
1167
1168 mmu_pages_add(pvec, sp, 0);
1169 return __mmu_unsync_walk(sp, pvec);
1170}
1171
1172static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, gfn_t gfn)
1173{
1174 unsigned index;
1175 struct hlist_head *bucket;
1176 struct kvm_mmu_page *sp;
1177 struct hlist_node *node;
1178
1179 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
1180 index = kvm_page_table_hashfn(gfn);
1181 bucket = &kvm->arch.mmu_page_hash[index];
1182 hlist_for_each_entry(sp, node, bucket, hash_link)
1183 if (sp->gfn == gfn && !sp->role.direct
1184 && !sp->role.invalid) {
1185 pgprintk("%s: found role %x\n",
1186 __func__, sp->role.word);
1187 return sp;
1188 }
1189 return NULL;
1190}
1191
1192static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1193{
1194 WARN_ON(!sp->unsync);
1195 trace_kvm_mmu_sync_page(sp);
1196 sp->unsync = 0;
1197 --kvm->stat.mmu_unsync;
1198}
1199
1200static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp);
1201
1202static int __kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
1203 bool clear_unsync)
1204{
1205 if (sp->role.cr4_pae != !!is_pae(vcpu)) {
1206 kvm_mmu_zap_page(vcpu->kvm, sp);
1207 return 1;
1208 }
1209
1210 if (clear_unsync) {
1211 if (rmap_write_protect(vcpu->kvm, sp->gfn))
1212 kvm_flush_remote_tlbs(vcpu->kvm);
1213 kvm_unlink_unsync_page(vcpu->kvm, sp);
1214 }
1215
1216 if (vcpu->arch.mmu.sync_page(vcpu, sp)) {
1217 kvm_mmu_zap_page(vcpu->kvm, sp);
1218 return 1;
1219 }
1220
1221 kvm_mmu_flush_tlb(vcpu);
1222 return 0;
1223}
1224
1225static void mmu_convert_notrap(struct kvm_mmu_page *sp);
1226static int kvm_sync_page_transient(struct kvm_vcpu *vcpu,
1227 struct kvm_mmu_page *sp)
1228{
1229 int ret;
1230
1231 ret = __kvm_sync_page(vcpu, sp, false);
1232 if (!ret)
1233 mmu_convert_notrap(sp);
1234 return ret;
1235}
1236
1237static int kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1238{
1239 return __kvm_sync_page(vcpu, sp, true);
1240}
1241
1242struct mmu_page_path {
1243 struct kvm_mmu_page *parent[PT64_ROOT_LEVEL-1];
1244 unsigned int idx[PT64_ROOT_LEVEL-1];
1245};
1246
1247#define for_each_sp(pvec, sp, parents, i) \
1248 for (i = mmu_pages_next(&pvec, &parents, -1), \
1249 sp = pvec.page[i].sp; \
1250 i < pvec.nr && ({ sp = pvec.page[i].sp; 1;}); \
1251 i = mmu_pages_next(&pvec, &parents, i))
1252
1253static int mmu_pages_next(struct kvm_mmu_pages *pvec,
1254 struct mmu_page_path *parents,
1255 int i)
1256{
1257 int n;
1258
1259 for (n = i+1; n < pvec->nr; n++) {
1260 struct kvm_mmu_page *sp = pvec->page[n].sp;
1261
1262 if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
1263 parents->idx[0] = pvec->page[n].idx;
1264 return n;
1265 }
1266
1267 parents->parent[sp->role.level-2] = sp;
1268 parents->idx[sp->role.level-1] = pvec->page[n].idx;
1269 }
1270
1271 return n;
1272}
1273
1274static void mmu_pages_clear_parents(struct mmu_page_path *parents)
1275{
1276 struct kvm_mmu_page *sp;
1277 unsigned int level = 0;
1278
1279 do {
1280 unsigned int idx = parents->idx[level];
1281
1282 sp = parents->parent[level];
1283 if (!sp)
1284 return;
1285
1286 --sp->unsync_children;
1287 WARN_ON((int)sp->unsync_children < 0);
1288 __clear_bit(idx, sp->unsync_child_bitmap);
1289 level++;
1290 } while (level < PT64_ROOT_LEVEL-1 && !sp->unsync_children);
1291}
1292
1293static void kvm_mmu_pages_init(struct kvm_mmu_page *parent,
1294 struct mmu_page_path *parents,
1295 struct kvm_mmu_pages *pvec)
1296{
1297 parents->parent[parent->role.level-1] = NULL;
1298 pvec->nr = 0;
1299}
1300
1301static void mmu_sync_children(struct kvm_vcpu *vcpu,
1302 struct kvm_mmu_page *parent)
1303{
1304 int i;
1305 struct kvm_mmu_page *sp;
1306 struct mmu_page_path parents;
1307 struct kvm_mmu_pages pages;
1308
1309 kvm_mmu_pages_init(parent, &parents, &pages);
1310 while (mmu_unsync_walk(parent, &pages)) {
1311 int protected = 0;
1312
1313 for_each_sp(pages, sp, parents, i)
1314 protected |= rmap_write_protect(vcpu->kvm, sp->gfn);
1315
1316 if (protected)
1317 kvm_flush_remote_tlbs(vcpu->kvm);
1318
1319 for_each_sp(pages, sp, parents, i) {
1320 kvm_sync_page(vcpu, sp);
1321 mmu_pages_clear_parents(&parents);
1322 }
1323 cond_resched_lock(&vcpu->kvm->mmu_lock);
1324 kvm_mmu_pages_init(parent, &parents, &pages);
1325 }
1326}
1327
1328static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
1329 gfn_t gfn,
1330 gva_t gaddr,
1331 unsigned level,
1332 int direct,
1333 unsigned access,
1334 u64 *parent_pte)
1335{
1336 union kvm_mmu_page_role role;
1337 unsigned index;
1338 unsigned quadrant;
1339 struct hlist_head *bucket;
1340 struct kvm_mmu_page *sp;
1341 struct hlist_node *node, *tmp;
1342
1343 role = vcpu->arch.mmu.base_role;
1344 role.level = level;
1345 role.direct = direct;
1346 if (role.direct)
1347 role.cr4_pae = 0;
1348 role.access = access;
1349 if (vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
1350 quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
1351 quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
1352 role.quadrant = quadrant;
1353 }
1354 index = kvm_page_table_hashfn(gfn);
1355 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
1356 hlist_for_each_entry_safe(sp, node, tmp, bucket, hash_link)
1357 if (sp->gfn == gfn) {
1358 if (sp->unsync)
1359 if (kvm_sync_page(vcpu, sp))
1360 continue;
1361
1362 if (sp->role.word != role.word)
1363 continue;
1364
1365 mmu_page_add_parent_pte(vcpu, sp, parent_pte);
1366 if (sp->unsync_children) {
1367 set_bit(KVM_REQ_MMU_SYNC, &vcpu->requests);
1368 kvm_mmu_mark_parents_unsync(sp);
1369 }
1370 trace_kvm_mmu_get_page(sp, false);
1371 return sp;
1372 }
1373 ++vcpu->kvm->stat.mmu_cache_miss;
1374 sp = kvm_mmu_alloc_page(vcpu, parent_pte);
1375 if (!sp)
1376 return sp;
1377 sp->gfn = gfn;
1378 sp->role = role;
1379 hlist_add_head(&sp->hash_link, bucket);
1380 if (!direct) {
1381 if (rmap_write_protect(vcpu->kvm, gfn))
1382 kvm_flush_remote_tlbs(vcpu->kvm);
1383 account_shadowed(vcpu->kvm, gfn);
1384 }
1385 if (shadow_trap_nonpresent_pte != shadow_notrap_nonpresent_pte)
1386 vcpu->arch.mmu.prefetch_page(vcpu, sp);
1387 else
1388 nonpaging_prefetch_page(vcpu, sp);
1389 trace_kvm_mmu_get_page(sp, true);
1390 return sp;
1391}
1392
1393static void shadow_walk_init(struct kvm_shadow_walk_iterator *iterator,
1394 struct kvm_vcpu *vcpu, u64 addr)
1395{
1396 iterator->addr = addr;
1397 iterator->shadow_addr = vcpu->arch.mmu.root_hpa;
1398 iterator->level = vcpu->arch.mmu.shadow_root_level;
1399 if (iterator->level == PT32E_ROOT_LEVEL) {
1400 iterator->shadow_addr
1401 = vcpu->arch.mmu.pae_root[(addr >> 30) & 3];
1402 iterator->shadow_addr &= PT64_BASE_ADDR_MASK;
1403 --iterator->level;
1404 if (!iterator->shadow_addr)
1405 iterator->level = 0;
1406 }
1407}
1408
1409static bool shadow_walk_okay(struct kvm_shadow_walk_iterator *iterator)
1410{
1411 if (iterator->level < PT_PAGE_TABLE_LEVEL)
1412 return false;
1413
1414 if (iterator->level == PT_PAGE_TABLE_LEVEL)
1415 if (is_large_pte(*iterator->sptep))
1416 return false;
1417
1418 iterator->index = SHADOW_PT_INDEX(iterator->addr, iterator->level);
1419 iterator->sptep = ((u64 *)__va(iterator->shadow_addr)) + iterator->index;
1420 return true;
1421}
1422
1423static void shadow_walk_next(struct kvm_shadow_walk_iterator *iterator)
1424{
1425 iterator->shadow_addr = *iterator->sptep & PT64_BASE_ADDR_MASK;
1426 --iterator->level;
1427}
1428
1429static void kvm_mmu_page_unlink_children(struct kvm *kvm,
1430 struct kvm_mmu_page *sp)
1431{
1432 unsigned i;
1433 u64 *pt;
1434 u64 ent;
1435
1436 pt = sp->spt;
1437
1438 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1439 ent = pt[i];
1440
1441 if (is_shadow_present_pte(ent)) {
1442 if (!is_last_spte(ent, sp->role.level)) {
1443 ent &= PT64_BASE_ADDR_MASK;
1444 mmu_page_remove_parent_pte(page_header(ent),
1445 &pt[i]);
1446 } else {
1447 if (is_large_pte(ent))
1448 --kvm->stat.lpages;
1449 rmap_remove(kvm, &pt[i]);
1450 }
1451 }
1452 pt[i] = shadow_trap_nonpresent_pte;
1453 }
1454}
1455
1456static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
1457{
1458 mmu_page_remove_parent_pte(sp, parent_pte);
1459}
1460
1461static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
1462{
1463 int i;
1464 struct kvm_vcpu *vcpu;
1465
1466 kvm_for_each_vcpu(i, vcpu, kvm)
1467 vcpu->arch.last_pte_updated = NULL;
1468}
1469
1470static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp)
1471{
1472 u64 *parent_pte;
1473
1474 while (sp->multimapped || sp->parent_pte) {
1475 if (!sp->multimapped)
1476 parent_pte = sp->parent_pte;
1477 else {
1478 struct kvm_pte_chain *chain;
1479
1480 chain = container_of(sp->parent_ptes.first,
1481 struct kvm_pte_chain, link);
1482 parent_pte = chain->parent_ptes[0];
1483 }
1484 BUG_ON(!parent_pte);
1485 kvm_mmu_put_page(sp, parent_pte);
1486 __set_spte(parent_pte, shadow_trap_nonpresent_pte);
1487 }
1488}
1489
1490static int mmu_zap_unsync_children(struct kvm *kvm,
1491 struct kvm_mmu_page *parent)
1492{
1493 int i, zapped = 0;
1494 struct mmu_page_path parents;
1495 struct kvm_mmu_pages pages;
1496
1497 if (parent->role.level == PT_PAGE_TABLE_LEVEL)
1498 return 0;
1499
1500 kvm_mmu_pages_init(parent, &parents, &pages);
1501 while (mmu_unsync_walk(parent, &pages)) {
1502 struct kvm_mmu_page *sp;
1503
1504 for_each_sp(pages, sp, parents, i) {
1505 kvm_mmu_zap_page(kvm, sp);
1506 mmu_pages_clear_parents(&parents);
1507 zapped++;
1508 }
1509 kvm_mmu_pages_init(parent, &parents, &pages);
1510 }
1511
1512 return zapped;
1513}
1514
1515static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp)
1516{
1517 int ret;
1518
1519 trace_kvm_mmu_zap_page(sp);
1520 ++kvm->stat.mmu_shadow_zapped;
1521 ret = mmu_zap_unsync_children(kvm, sp);
1522 kvm_mmu_page_unlink_children(kvm, sp);
1523 kvm_mmu_unlink_parents(kvm, sp);
1524 kvm_flush_remote_tlbs(kvm);
1525 if (!sp->role.invalid && !sp->role.direct)
1526 unaccount_shadowed(kvm, sp->gfn);
1527 if (sp->unsync)
1528 kvm_unlink_unsync_page(kvm, sp);
1529 if (!sp->root_count) {
1530 /* Count self */
1531 ret++;
1532 hlist_del(&sp->hash_link);
1533 kvm_mmu_free_page(kvm, sp);
1534 } else {
1535 sp->role.invalid = 1;
1536 list_move(&sp->link, &kvm->arch.active_mmu_pages);
1537 kvm_reload_remote_mmus(kvm);
1538 }
1539 kvm_mmu_reset_last_pte_updated(kvm);
1540 return ret;
1541}
1542
1543/*
1544 * Changing the number of mmu pages allocated to the vm
1545 * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
1546 */
1547void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
1548{
1549 int used_pages;
1550
1551 used_pages = kvm->arch.n_alloc_mmu_pages - kvm->arch.n_free_mmu_pages;
1552 used_pages = max(0, used_pages);
1553
1554 /*
1555 * If we set the number of mmu pages to be smaller be than the
1556 * number of actived pages , we must to free some mmu pages before we
1557 * change the value
1558 */
1559
1560 if (used_pages > kvm_nr_mmu_pages) {
1561 while (used_pages > kvm_nr_mmu_pages &&
1562 !list_empty(&kvm->arch.active_mmu_pages)) {
1563 struct kvm_mmu_page *page;
1564
1565 page = container_of(kvm->arch.active_mmu_pages.prev,
1566 struct kvm_mmu_page, link);
1567 used_pages -= kvm_mmu_zap_page(kvm, page);
1568 }
1569 kvm_nr_mmu_pages = used_pages;
1570 kvm->arch.n_free_mmu_pages = 0;
1571 }
1572 else
1573 kvm->arch.n_free_mmu_pages += kvm_nr_mmu_pages
1574 - kvm->arch.n_alloc_mmu_pages;
1575
1576 kvm->arch.n_alloc_mmu_pages = kvm_nr_mmu_pages;
1577}
1578
1579static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
1580{
1581 unsigned index;
1582 struct hlist_head *bucket;
1583 struct kvm_mmu_page *sp;
1584 struct hlist_node *node, *n;
1585 int r;
1586
1587 pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
1588 r = 0;
1589 index = kvm_page_table_hashfn(gfn);
1590 bucket = &kvm->arch.mmu_page_hash[index];
1591restart:
1592 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link)
1593 if (sp->gfn == gfn && !sp->role.direct) {
1594 pgprintk("%s: gfn %lx role %x\n", __func__, gfn,
1595 sp->role.word);
1596 r = 1;
1597 if (kvm_mmu_zap_page(kvm, sp))
1598 goto restart;
1599 }
1600 return r;
1601}
1602
1603static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
1604{
1605 unsigned index;
1606 struct hlist_head *bucket;
1607 struct kvm_mmu_page *sp;
1608 struct hlist_node *node, *nn;
1609
1610 index = kvm_page_table_hashfn(gfn);
1611 bucket = &kvm->arch.mmu_page_hash[index];
1612restart:
1613 hlist_for_each_entry_safe(sp, node, nn, bucket, hash_link) {
1614 if (sp->gfn == gfn && !sp->role.direct
1615 && !sp->role.invalid) {
1616 pgprintk("%s: zap %lx %x\n",
1617 __func__, gfn, sp->role.word);
1618 if (kvm_mmu_zap_page(kvm, sp))
1619 goto restart;
1620 }
1621 }
1622}
1623
1624static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
1625{
1626 int slot = memslot_id(kvm, gfn);
1627 struct kvm_mmu_page *sp = page_header(__pa(pte));
1628
1629 __set_bit(slot, sp->slot_bitmap);
1630}
1631
1632static void mmu_convert_notrap(struct kvm_mmu_page *sp)
1633{
1634 int i;
1635 u64 *pt = sp->spt;
1636
1637 if (shadow_trap_nonpresent_pte == shadow_notrap_nonpresent_pte)
1638 return;
1639
1640 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
1641 if (pt[i] == shadow_notrap_nonpresent_pte)
1642 __set_spte(&pt[i], shadow_trap_nonpresent_pte);
1643 }
1644}
1645
1646/*
1647 * The function is based on mtrr_type_lookup() in
1648 * arch/x86/kernel/cpu/mtrr/generic.c
1649 */
1650static int get_mtrr_type(struct mtrr_state_type *mtrr_state,
1651 u64 start, u64 end)
1652{
1653 int i;
1654 u64 base, mask;
1655 u8 prev_match, curr_match;
1656 int num_var_ranges = KVM_NR_VAR_MTRR;
1657
1658 if (!mtrr_state->enabled)
1659 return 0xFF;
1660
1661 /* Make end inclusive end, instead of exclusive */
1662 end--;
1663
1664 /* Look in fixed ranges. Just return the type as per start */
1665 if (mtrr_state->have_fixed && (start < 0x100000)) {
1666 int idx;
1667
1668 if (start < 0x80000) {
1669 idx = 0;
1670 idx += (start >> 16);
1671 return mtrr_state->fixed_ranges[idx];
1672 } else if (start < 0xC0000) {
1673 idx = 1 * 8;
1674 idx += ((start - 0x80000) >> 14);
1675 return mtrr_state->fixed_ranges[idx];
1676 } else if (start < 0x1000000) {
1677 idx = 3 * 8;
1678 idx += ((start - 0xC0000) >> 12);
1679 return mtrr_state->fixed_ranges[idx];
1680 }
1681 }
1682
1683 /*
1684 * Look in variable ranges
1685 * Look of multiple ranges matching this address and pick type
1686 * as per MTRR precedence
1687 */
1688 if (!(mtrr_state->enabled & 2))
1689 return mtrr_state->def_type;
1690
1691 prev_match = 0xFF;
1692 for (i = 0; i < num_var_ranges; ++i) {
1693 unsigned short start_state, end_state;
1694
1695 if (!(mtrr_state->var_ranges[i].mask_lo & (1 << 11)))
1696 continue;
1697
1698 base = (((u64)mtrr_state->var_ranges[i].base_hi) << 32) +
1699 (mtrr_state->var_ranges[i].base_lo & PAGE_MASK);
1700 mask = (((u64)mtrr_state->var_ranges[i].mask_hi) << 32) +
1701 (mtrr_state->var_ranges[i].mask_lo & PAGE_MASK);
1702
1703 start_state = ((start & mask) == (base & mask));
1704 end_state = ((end & mask) == (base & mask));
1705 if (start_state != end_state)
1706 return 0xFE;
1707
1708 if ((start & mask) != (base & mask))
1709 continue;
1710
1711 curr_match = mtrr_state->var_ranges[i].base_lo & 0xff;
1712 if (prev_match == 0xFF) {
1713 prev_match = curr_match;
1714 continue;
1715 }
1716
1717 if (prev_match == MTRR_TYPE_UNCACHABLE ||
1718 curr_match == MTRR_TYPE_UNCACHABLE)
1719 return MTRR_TYPE_UNCACHABLE;
1720
1721 if ((prev_match == MTRR_TYPE_WRBACK &&
1722 curr_match == MTRR_TYPE_WRTHROUGH) ||
1723 (prev_match == MTRR_TYPE_WRTHROUGH &&
1724 curr_match == MTRR_TYPE_WRBACK)) {
1725 prev_match = MTRR_TYPE_WRTHROUGH;
1726 curr_match = MTRR_TYPE_WRTHROUGH;
1727 }
1728
1729 if (prev_match != curr_match)
1730 return MTRR_TYPE_UNCACHABLE;
1731 }
1732
1733 if (prev_match != 0xFF)
1734 return prev_match;
1735
1736 return mtrr_state->def_type;
1737}
1738
1739u8 kvm_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn)
1740{
1741 u8 mtrr;
1742
1743 mtrr = get_mtrr_type(&vcpu->arch.mtrr_state, gfn << PAGE_SHIFT,
1744 (gfn << PAGE_SHIFT) + PAGE_SIZE);
1745 if (mtrr == 0xfe || mtrr == 0xff)
1746 mtrr = MTRR_TYPE_WRBACK;
1747 return mtrr;
1748}
1749EXPORT_SYMBOL_GPL(kvm_get_guest_memory_type);
1750
1751static int kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
1752{
1753 unsigned index;
1754 struct hlist_head *bucket;
1755 struct kvm_mmu_page *s;
1756 struct hlist_node *node, *n;
1757
1758 index = kvm_page_table_hashfn(sp->gfn);
1759 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
1760 /* don't unsync if pagetable is shadowed with multiple roles */
1761 hlist_for_each_entry_safe(s, node, n, bucket, hash_link) {
1762 if (s->gfn != sp->gfn || s->role.direct)
1763 continue;
1764 if (s->role.word != sp->role.word)
1765 return 1;
1766 }
1767 trace_kvm_mmu_unsync_page(sp);
1768 ++vcpu->kvm->stat.mmu_unsync;
1769 sp->unsync = 1;
1770
1771 kvm_mmu_mark_parents_unsync(sp);
1772
1773 mmu_convert_notrap(sp);
1774 return 0;
1775}
1776
1777static int mmu_need_write_protect(struct kvm_vcpu *vcpu, gfn_t gfn,
1778 bool can_unsync)
1779{
1780 struct kvm_mmu_page *shadow;
1781
1782 shadow = kvm_mmu_lookup_page(vcpu->kvm, gfn);
1783 if (shadow) {
1784 if (shadow->role.level != PT_PAGE_TABLE_LEVEL)
1785 return 1;
1786 if (shadow->unsync)
1787 return 0;
1788 if (can_unsync && oos_shadow)
1789 return kvm_unsync_page(vcpu, shadow);
1790 return 1;
1791 }
1792 return 0;
1793}
1794
1795static int set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1796 unsigned pte_access, int user_fault,
1797 int write_fault, int dirty, int level,
1798 gfn_t gfn, pfn_t pfn, bool speculative,
1799 bool can_unsync, bool reset_host_protection)
1800{
1801 u64 spte;
1802 int ret = 0;
1803
1804 /*
1805 * We don't set the accessed bit, since we sometimes want to see
1806 * whether the guest actually used the pte (in order to detect
1807 * demand paging).
1808 */
1809 spte = shadow_base_present_pte | shadow_dirty_mask;
1810 if (!speculative)
1811 spte |= shadow_accessed_mask;
1812 if (!dirty)
1813 pte_access &= ~ACC_WRITE_MASK;
1814 if (pte_access & ACC_EXEC_MASK)
1815 spte |= shadow_x_mask;
1816 else
1817 spte |= shadow_nx_mask;
1818 if (pte_access & ACC_USER_MASK)
1819 spte |= shadow_user_mask;
1820 if (level > PT_PAGE_TABLE_LEVEL)
1821 spte |= PT_PAGE_SIZE_MASK;
1822 if (tdp_enabled)
1823 spte |= kvm_x86_ops->get_mt_mask(vcpu, gfn,
1824 kvm_is_mmio_pfn(pfn));
1825
1826 if (reset_host_protection)
1827 spte |= SPTE_HOST_WRITEABLE;
1828
1829 spte |= (u64)pfn << PAGE_SHIFT;
1830
1831 if ((pte_access & ACC_WRITE_MASK)
1832 || (write_fault && !is_write_protection(vcpu) && !user_fault)) {
1833
1834 if (level > PT_PAGE_TABLE_LEVEL &&
1835 has_wrprotected_page(vcpu->kvm, gfn, level)) {
1836 ret = 1;
1837 rmap_remove(vcpu->kvm, sptep);
1838 spte = shadow_trap_nonpresent_pte;
1839 goto set_pte;
1840 }
1841
1842 spte |= PT_WRITABLE_MASK;
1843
1844 if (!tdp_enabled && !(pte_access & ACC_WRITE_MASK))
1845 spte &= ~PT_USER_MASK;
1846
1847 /*
1848 * Optimization: for pte sync, if spte was writable the hash
1849 * lookup is unnecessary (and expensive). Write protection
1850 * is responsibility of mmu_get_page / kvm_sync_page.
1851 * Same reasoning can be applied to dirty page accounting.
1852 */
1853 if (!can_unsync && is_writable_pte(*sptep))
1854 goto set_pte;
1855
1856 if (mmu_need_write_protect(vcpu, gfn, can_unsync)) {
1857 pgprintk("%s: found shadow page for %lx, marking ro\n",
1858 __func__, gfn);
1859 ret = 1;
1860 pte_access &= ~ACC_WRITE_MASK;
1861 if (is_writable_pte(spte))
1862 spte &= ~PT_WRITABLE_MASK;
1863 }
1864 }
1865
1866 if (pte_access & ACC_WRITE_MASK)
1867 mark_page_dirty(vcpu->kvm, gfn);
1868
1869set_pte:
1870 __set_spte(sptep, spte);
1871 return ret;
1872}
1873
1874static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *sptep,
1875 unsigned pt_access, unsigned pte_access,
1876 int user_fault, int write_fault, int dirty,
1877 int *ptwrite, int level, gfn_t gfn,
1878 pfn_t pfn, bool speculative,
1879 bool reset_host_protection)
1880{
1881 int was_rmapped = 0;
1882 int was_writable = is_writable_pte(*sptep);
1883 int rmap_count;
1884
1885 pgprintk("%s: spte %llx access %x write_fault %d"
1886 " user_fault %d gfn %lx\n",
1887 __func__, *sptep, pt_access,
1888 write_fault, user_fault, gfn);
1889
1890 if (is_rmap_spte(*sptep)) {
1891 /*
1892 * If we overwrite a PTE page pointer with a 2MB PMD, unlink
1893 * the parent of the now unreachable PTE.
1894 */
1895 if (level > PT_PAGE_TABLE_LEVEL &&
1896 !is_large_pte(*sptep)) {
1897 struct kvm_mmu_page *child;
1898 u64 pte = *sptep;
1899
1900 child = page_header(pte & PT64_BASE_ADDR_MASK);
1901 mmu_page_remove_parent_pte(child, sptep);
1902 __set_spte(sptep, shadow_trap_nonpresent_pte);
1903 kvm_flush_remote_tlbs(vcpu->kvm);
1904 } else if (pfn != spte_to_pfn(*sptep)) {
1905 pgprintk("hfn old %lx new %lx\n",
1906 spte_to_pfn(*sptep), pfn);
1907 rmap_remove(vcpu->kvm, sptep);
1908 __set_spte(sptep, shadow_trap_nonpresent_pte);
1909 kvm_flush_remote_tlbs(vcpu->kvm);
1910 } else
1911 was_rmapped = 1;
1912 }
1913
1914 if (set_spte(vcpu, sptep, pte_access, user_fault, write_fault,
1915 dirty, level, gfn, pfn, speculative, true,
1916 reset_host_protection)) {
1917 if (write_fault)
1918 *ptwrite = 1;
1919 kvm_x86_ops->tlb_flush(vcpu);
1920 }
1921
1922 pgprintk("%s: setting spte %llx\n", __func__, *sptep);
1923 pgprintk("instantiating %s PTE (%s) at %ld (%llx) addr %p\n",
1924 is_large_pte(*sptep)? "2MB" : "4kB",
1925 *sptep & PT_PRESENT_MASK ?"RW":"R", gfn,
1926 *sptep, sptep);
1927 if (!was_rmapped && is_large_pte(*sptep))
1928 ++vcpu->kvm->stat.lpages;
1929
1930 page_header_update_slot(vcpu->kvm, sptep, gfn);
1931 if (!was_rmapped) {
1932 rmap_count = rmap_add(vcpu, sptep, gfn);
1933 kvm_release_pfn_clean(pfn);
1934 if (rmap_count > RMAP_RECYCLE_THRESHOLD)
1935 rmap_recycle(vcpu, sptep, gfn);
1936 } else {
1937 if (was_writable)
1938 kvm_release_pfn_dirty(pfn);
1939 else
1940 kvm_release_pfn_clean(pfn);
1941 }
1942 if (speculative) {
1943 vcpu->arch.last_pte_updated = sptep;
1944 vcpu->arch.last_pte_gfn = gfn;
1945 }
1946}
1947
1948static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
1949{
1950}
1951
1952static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
1953 int level, gfn_t gfn, pfn_t pfn)
1954{
1955 struct kvm_shadow_walk_iterator iterator;
1956 struct kvm_mmu_page *sp;
1957 int pt_write = 0;
1958 gfn_t pseudo_gfn;
1959
1960 for_each_shadow_entry(vcpu, (u64)gfn << PAGE_SHIFT, iterator) {
1961 if (iterator.level == level) {
1962 mmu_set_spte(vcpu, iterator.sptep, ACC_ALL, ACC_ALL,
1963 0, write, 1, &pt_write,
1964 level, gfn, pfn, false, true);
1965 ++vcpu->stat.pf_fixed;
1966 break;
1967 }
1968
1969 if (*iterator.sptep == shadow_trap_nonpresent_pte) {
1970 pseudo_gfn = (iterator.addr & PT64_DIR_BASE_ADDR_MASK) >> PAGE_SHIFT;
1971 sp = kvm_mmu_get_page(vcpu, pseudo_gfn, iterator.addr,
1972 iterator.level - 1,
1973 1, ACC_ALL, iterator.sptep);
1974 if (!sp) {
1975 pgprintk("nonpaging_map: ENOMEM\n");
1976 kvm_release_pfn_clean(pfn);
1977 return -ENOMEM;
1978 }
1979
1980 __set_spte(iterator.sptep,
1981 __pa(sp->spt)
1982 | PT_PRESENT_MASK | PT_WRITABLE_MASK
1983 | shadow_user_mask | shadow_x_mask);
1984 }
1985 }
1986 return pt_write;
1987}
1988
1989static void kvm_send_hwpoison_signal(struct kvm *kvm, gfn_t gfn)
1990{
1991 char buf[1];
1992 void __user *hva;
1993 int r;
1994
1995 /* Touch the page, so send SIGBUS */
1996 hva = (void __user *)gfn_to_hva(kvm, gfn);
1997 r = copy_from_user(buf, hva, 1);
1998}
1999
2000static int kvm_handle_bad_page(struct kvm *kvm, gfn_t gfn, pfn_t pfn)
2001{
2002 kvm_release_pfn_clean(pfn);
2003 if (is_hwpoison_pfn(pfn)) {
2004 kvm_send_hwpoison_signal(kvm, gfn);
2005 return 0;
2006 }
2007 return 1;
2008}
2009
2010static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
2011{
2012 int r;
2013 int level;
2014 pfn_t pfn;
2015 unsigned long mmu_seq;
2016
2017 level = mapping_level(vcpu, gfn);
2018
2019 /*
2020 * This path builds a PAE pagetable - so we can map 2mb pages at
2021 * maximum. Therefore check if the level is larger than that.
2022 */
2023 if (level > PT_DIRECTORY_LEVEL)
2024 level = PT_DIRECTORY_LEVEL;
2025
2026 gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
2027
2028 mmu_seq = vcpu->kvm->mmu_notifier_seq;
2029 smp_rmb();
2030 pfn = gfn_to_pfn(vcpu->kvm, gfn);
2031
2032 /* mmio */
2033 if (is_error_pfn(pfn))
2034 return kvm_handle_bad_page(vcpu->kvm, gfn, pfn);
2035
2036 spin_lock(&vcpu->kvm->mmu_lock);
2037 if (mmu_notifier_retry(vcpu, mmu_seq))
2038 goto out_unlock;
2039 kvm_mmu_free_some_pages(vcpu);
2040 r = __direct_map(vcpu, v, write, level, gfn, pfn);
2041 spin_unlock(&vcpu->kvm->mmu_lock);
2042
2043
2044 return r;
2045
2046out_unlock:
2047 spin_unlock(&vcpu->kvm->mmu_lock);
2048 kvm_release_pfn_clean(pfn);
2049 return 0;
2050}
2051
2052
2053static void mmu_free_roots(struct kvm_vcpu *vcpu)
2054{
2055 int i;
2056 struct kvm_mmu_page *sp;
2057
2058 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2059 return;
2060 spin_lock(&vcpu->kvm->mmu_lock);
2061 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2062 hpa_t root = vcpu->arch.mmu.root_hpa;
2063
2064 sp = page_header(root);
2065 --sp->root_count;
2066 if (!sp->root_count && sp->role.invalid)
2067 kvm_mmu_zap_page(vcpu->kvm, sp);
2068 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2069 spin_unlock(&vcpu->kvm->mmu_lock);
2070 return;
2071 }
2072 for (i = 0; i < 4; ++i) {
2073 hpa_t root = vcpu->arch.mmu.pae_root[i];
2074
2075 if (root) {
2076 root &= PT64_BASE_ADDR_MASK;
2077 sp = page_header(root);
2078 --sp->root_count;
2079 if (!sp->root_count && sp->role.invalid)
2080 kvm_mmu_zap_page(vcpu->kvm, sp);
2081 }
2082 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
2083 }
2084 spin_unlock(&vcpu->kvm->mmu_lock);
2085 vcpu->arch.mmu.root_hpa = INVALID_PAGE;
2086}
2087
2088static int mmu_check_root(struct kvm_vcpu *vcpu, gfn_t root_gfn)
2089{
2090 int ret = 0;
2091
2092 if (!kvm_is_visible_gfn(vcpu->kvm, root_gfn)) {
2093 set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
2094 ret = 1;
2095 }
2096
2097 return ret;
2098}
2099
2100static int mmu_alloc_roots(struct kvm_vcpu *vcpu)
2101{
2102 int i;
2103 gfn_t root_gfn;
2104 struct kvm_mmu_page *sp;
2105 int direct = 0;
2106 u64 pdptr;
2107
2108 root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT;
2109
2110 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2111 hpa_t root = vcpu->arch.mmu.root_hpa;
2112
2113 ASSERT(!VALID_PAGE(root));
2114 if (mmu_check_root(vcpu, root_gfn))
2115 return 1;
2116 if (tdp_enabled) {
2117 direct = 1;
2118 root_gfn = 0;
2119 }
2120 spin_lock(&vcpu->kvm->mmu_lock);
2121 kvm_mmu_free_some_pages(vcpu);
2122 sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
2123 PT64_ROOT_LEVEL, direct,
2124 ACC_ALL, NULL);
2125 root = __pa(sp->spt);
2126 ++sp->root_count;
2127 spin_unlock(&vcpu->kvm->mmu_lock);
2128 vcpu->arch.mmu.root_hpa = root;
2129 return 0;
2130 }
2131 direct = !is_paging(vcpu);
2132 for (i = 0; i < 4; ++i) {
2133 hpa_t root = vcpu->arch.mmu.pae_root[i];
2134
2135 ASSERT(!VALID_PAGE(root));
2136 if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
2137 pdptr = kvm_pdptr_read(vcpu, i);
2138 if (!is_present_gpte(pdptr)) {
2139 vcpu->arch.mmu.pae_root[i] = 0;
2140 continue;
2141 }
2142 root_gfn = pdptr >> PAGE_SHIFT;
2143 } else if (vcpu->arch.mmu.root_level == 0)
2144 root_gfn = 0;
2145 if (mmu_check_root(vcpu, root_gfn))
2146 return 1;
2147 if (tdp_enabled) {
2148 direct = 1;
2149 root_gfn = i << 30;
2150 }
2151 spin_lock(&vcpu->kvm->mmu_lock);
2152 kvm_mmu_free_some_pages(vcpu);
2153 sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
2154 PT32_ROOT_LEVEL, direct,
2155 ACC_ALL, NULL);
2156 root = __pa(sp->spt);
2157 ++sp->root_count;
2158 spin_unlock(&vcpu->kvm->mmu_lock);
2159
2160 vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
2161 }
2162 vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
2163 return 0;
2164}
2165
2166static void mmu_sync_roots(struct kvm_vcpu *vcpu)
2167{
2168 int i;
2169 struct kvm_mmu_page *sp;
2170
2171 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
2172 return;
2173 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
2174 hpa_t root = vcpu->arch.mmu.root_hpa;
2175 sp = page_header(root);
2176 mmu_sync_children(vcpu, sp);
2177 return;
2178 }
2179 for (i = 0; i < 4; ++i) {
2180 hpa_t root = vcpu->arch.mmu.pae_root[i];
2181
2182 if (root && VALID_PAGE(root)) {
2183 root &= PT64_BASE_ADDR_MASK;
2184 sp = page_header(root);
2185 mmu_sync_children(vcpu, sp);
2186 }
2187 }
2188}
2189
2190void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu)
2191{
2192 spin_lock(&vcpu->kvm->mmu_lock);
2193 mmu_sync_roots(vcpu);
2194 spin_unlock(&vcpu->kvm->mmu_lock);
2195}
2196
2197static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr,
2198 u32 access, u32 *error)
2199{
2200 if (error)
2201 *error = 0;
2202 return vaddr;
2203}
2204
2205static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
2206 u32 error_code)
2207{
2208 gfn_t gfn;
2209 int r;
2210
2211 pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code);
2212 r = mmu_topup_memory_caches(vcpu);
2213 if (r)
2214 return r;
2215
2216 ASSERT(vcpu);
2217 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2218
2219 gfn = gva >> PAGE_SHIFT;
2220
2221 return nonpaging_map(vcpu, gva & PAGE_MASK,
2222 error_code & PFERR_WRITE_MASK, gfn);
2223}
2224
2225static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa,
2226 u32 error_code)
2227{
2228 pfn_t pfn;
2229 int r;
2230 int level;
2231 gfn_t gfn = gpa >> PAGE_SHIFT;
2232 unsigned long mmu_seq;
2233
2234 ASSERT(vcpu);
2235 ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
2236
2237 r = mmu_topup_memory_caches(vcpu);
2238 if (r)
2239 return r;
2240
2241 level = mapping_level(vcpu, gfn);
2242
2243 gfn &= ~(KVM_PAGES_PER_HPAGE(level) - 1);
2244
2245 mmu_seq = vcpu->kvm->mmu_notifier_seq;
2246 smp_rmb();
2247 pfn = gfn_to_pfn(vcpu->kvm, gfn);
2248 if (is_error_pfn(pfn))
2249 return kvm_handle_bad_page(vcpu->kvm, gfn, pfn);
2250 spin_lock(&vcpu->kvm->mmu_lock);
2251 if (mmu_notifier_retry(vcpu, mmu_seq))
2252 goto out_unlock;
2253 kvm_mmu_free_some_pages(vcpu);
2254 r = __direct_map(vcpu, gpa, error_code & PFERR_WRITE_MASK,
2255 level, gfn, pfn);
2256 spin_unlock(&vcpu->kvm->mmu_lock);
2257
2258 return r;
2259
2260out_unlock:
2261 spin_unlock(&vcpu->kvm->mmu_lock);
2262 kvm_release_pfn_clean(pfn);
2263 return 0;
2264}
2265
2266static void nonpaging_free(struct kvm_vcpu *vcpu)
2267{
2268 mmu_free_roots(vcpu);
2269}
2270
2271static int nonpaging_init_context(struct kvm_vcpu *vcpu)
2272{
2273 struct kvm_mmu *context = &vcpu->arch.mmu;
2274
2275 context->new_cr3 = nonpaging_new_cr3;
2276 context->page_fault = nonpaging_page_fault;
2277 context->gva_to_gpa = nonpaging_gva_to_gpa;
2278 context->free = nonpaging_free;
2279 context->prefetch_page = nonpaging_prefetch_page;
2280 context->sync_page = nonpaging_sync_page;
2281 context->invlpg = nonpaging_invlpg;
2282 context->root_level = 0;
2283 context->shadow_root_level = PT32E_ROOT_LEVEL;
2284 context->root_hpa = INVALID_PAGE;
2285 return 0;
2286}
2287
2288void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
2289{
2290 ++vcpu->stat.tlb_flush;
2291 kvm_x86_ops->tlb_flush(vcpu);
2292}
2293
2294static void paging_new_cr3(struct kvm_vcpu *vcpu)
2295{
2296 pgprintk("%s: cr3 %lx\n", __func__, vcpu->arch.cr3);
2297 mmu_free_roots(vcpu);
2298}
2299
2300static void inject_page_fault(struct kvm_vcpu *vcpu,
2301 u64 addr,
2302 u32 err_code)
2303{
2304 kvm_inject_page_fault(vcpu, addr, err_code);
2305}
2306
2307static void paging_free(struct kvm_vcpu *vcpu)
2308{
2309 nonpaging_free(vcpu);
2310}
2311
2312static bool is_rsvd_bits_set(struct kvm_vcpu *vcpu, u64 gpte, int level)
2313{
2314 int bit7;
2315
2316 bit7 = (gpte >> 7) & 1;
2317 return (gpte & vcpu->arch.mmu.rsvd_bits_mask[bit7][level-1]) != 0;
2318}
2319
2320#define PTTYPE 64
2321#include "paging_tmpl.h"
2322#undef PTTYPE
2323
2324#define PTTYPE 32
2325#include "paging_tmpl.h"
2326#undef PTTYPE
2327
2328static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu, int level)
2329{
2330 struct kvm_mmu *context = &vcpu->arch.mmu;
2331 int maxphyaddr = cpuid_maxphyaddr(vcpu);
2332 u64 exb_bit_rsvd = 0;
2333
2334 if (!is_nx(vcpu))
2335 exb_bit_rsvd = rsvd_bits(63, 63);
2336 switch (level) {
2337 case PT32_ROOT_LEVEL:
2338 /* no rsvd bits for 2 level 4K page table entries */
2339 context->rsvd_bits_mask[0][1] = 0;
2340 context->rsvd_bits_mask[0][0] = 0;
2341 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
2342
2343 if (!is_pse(vcpu)) {
2344 context->rsvd_bits_mask[1][1] = 0;
2345 break;
2346 }
2347
2348 if (is_cpuid_PSE36())
2349 /* 36bits PSE 4MB page */
2350 context->rsvd_bits_mask[1][1] = rsvd_bits(17, 21);
2351 else
2352 /* 32 bits PSE 4MB page */
2353 context->rsvd_bits_mask[1][1] = rsvd_bits(13, 21);
2354 break;
2355 case PT32E_ROOT_LEVEL:
2356 context->rsvd_bits_mask[0][2] =
2357 rsvd_bits(maxphyaddr, 63) |
2358 rsvd_bits(7, 8) | rsvd_bits(1, 2); /* PDPTE */
2359 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2360 rsvd_bits(maxphyaddr, 62); /* PDE */
2361 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2362 rsvd_bits(maxphyaddr, 62); /* PTE */
2363 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2364 rsvd_bits(maxphyaddr, 62) |
2365 rsvd_bits(13, 20); /* large page */
2366 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
2367 break;
2368 case PT64_ROOT_LEVEL:
2369 context->rsvd_bits_mask[0][3] = exb_bit_rsvd |
2370 rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2371 context->rsvd_bits_mask[0][2] = exb_bit_rsvd |
2372 rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
2373 context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
2374 rsvd_bits(maxphyaddr, 51);
2375 context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
2376 rsvd_bits(maxphyaddr, 51);
2377 context->rsvd_bits_mask[1][3] = context->rsvd_bits_mask[0][3];
2378 context->rsvd_bits_mask[1][2] = exb_bit_rsvd |
2379 rsvd_bits(maxphyaddr, 51) |
2380 rsvd_bits(13, 29);
2381 context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
2382 rsvd_bits(maxphyaddr, 51) |
2383 rsvd_bits(13, 20); /* large page */
2384 context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[0][0];
2385 break;
2386 }
2387}
2388
2389static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
2390{
2391 struct kvm_mmu *context = &vcpu->arch.mmu;
2392
2393 ASSERT(is_pae(vcpu));
2394 context->new_cr3 = paging_new_cr3;
2395 context->page_fault = paging64_page_fault;
2396 context->gva_to_gpa = paging64_gva_to_gpa;
2397 context->prefetch_page = paging64_prefetch_page;
2398 context->sync_page = paging64_sync_page;
2399 context->invlpg = paging64_invlpg;
2400 context->free = paging_free;
2401 context->root_level = level;
2402 context->shadow_root_level = level;
2403 context->root_hpa = INVALID_PAGE;
2404 return 0;
2405}
2406
2407static int paging64_init_context(struct kvm_vcpu *vcpu)
2408{
2409 reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
2410 return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
2411}
2412
2413static int paging32_init_context(struct kvm_vcpu *vcpu)
2414{
2415 struct kvm_mmu *context = &vcpu->arch.mmu;
2416
2417 reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
2418 context->new_cr3 = paging_new_cr3;
2419 context->page_fault = paging32_page_fault;
2420 context->gva_to_gpa = paging32_gva_to_gpa;
2421 context->free = paging_free;
2422 context->prefetch_page = paging32_prefetch_page;
2423 context->sync_page = paging32_sync_page;
2424 context->invlpg = paging32_invlpg;
2425 context->root_level = PT32_ROOT_LEVEL;
2426 context->shadow_root_level = PT32E_ROOT_LEVEL;
2427 context->root_hpa = INVALID_PAGE;
2428 return 0;
2429}
2430
2431static int paging32E_init_context(struct kvm_vcpu *vcpu)
2432{
2433 reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
2434 return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
2435}
2436
2437static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
2438{
2439 struct kvm_mmu *context = &vcpu->arch.mmu;
2440
2441 context->new_cr3 = nonpaging_new_cr3;
2442 context->page_fault = tdp_page_fault;
2443 context->free = nonpaging_free;
2444 context->prefetch_page = nonpaging_prefetch_page;
2445 context->sync_page = nonpaging_sync_page;
2446 context->invlpg = nonpaging_invlpg;
2447 context->shadow_root_level = kvm_x86_ops->get_tdp_level();
2448 context->root_hpa = INVALID_PAGE;
2449
2450 if (!is_paging(vcpu)) {
2451 context->gva_to_gpa = nonpaging_gva_to_gpa;
2452 context->root_level = 0;
2453 } else if (is_long_mode(vcpu)) {
2454 reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
2455 context->gva_to_gpa = paging64_gva_to_gpa;
2456 context->root_level = PT64_ROOT_LEVEL;
2457 } else if (is_pae(vcpu)) {
2458 reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
2459 context->gva_to_gpa = paging64_gva_to_gpa;
2460 context->root_level = PT32E_ROOT_LEVEL;
2461 } else {
2462 reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
2463 context->gva_to_gpa = paging32_gva_to_gpa;
2464 context->root_level = PT32_ROOT_LEVEL;
2465 }
2466
2467 return 0;
2468}
2469
2470static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
2471{
2472 int r;
2473
2474 ASSERT(vcpu);
2475 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2476
2477 if (!is_paging(vcpu))
2478 r = nonpaging_init_context(vcpu);
2479 else if (is_long_mode(vcpu))
2480 r = paging64_init_context(vcpu);
2481 else if (is_pae(vcpu))
2482 r = paging32E_init_context(vcpu);
2483 else
2484 r = paging32_init_context(vcpu);
2485
2486 vcpu->arch.mmu.base_role.cr4_pae = !!is_pae(vcpu);
2487 vcpu->arch.mmu.base_role.cr0_wp = is_write_protection(vcpu);
2488
2489 return r;
2490}
2491
2492static int init_kvm_mmu(struct kvm_vcpu *vcpu)
2493{
2494 vcpu->arch.update_pte.pfn = bad_pfn;
2495
2496 if (tdp_enabled)
2497 return init_kvm_tdp_mmu(vcpu);
2498 else
2499 return init_kvm_softmmu(vcpu);
2500}
2501
2502static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
2503{
2504 ASSERT(vcpu);
2505 if (VALID_PAGE(vcpu->arch.mmu.root_hpa))
2506 /* mmu.free() should set root_hpa = INVALID_PAGE */
2507 vcpu->arch.mmu.free(vcpu);
2508}
2509
2510int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
2511{
2512 destroy_kvm_mmu(vcpu);
2513 return init_kvm_mmu(vcpu);
2514}
2515EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
2516
2517int kvm_mmu_load(struct kvm_vcpu *vcpu)
2518{
2519 int r;
2520
2521 r = mmu_topup_memory_caches(vcpu);
2522 if (r)
2523 goto out;
2524 r = mmu_alloc_roots(vcpu);
2525 spin_lock(&vcpu->kvm->mmu_lock);
2526 mmu_sync_roots(vcpu);
2527 spin_unlock(&vcpu->kvm->mmu_lock);
2528 if (r)
2529 goto out;
2530 /* set_cr3() should ensure TLB has been flushed */
2531 kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
2532out:
2533 return r;
2534}
2535EXPORT_SYMBOL_GPL(kvm_mmu_load);
2536
2537void kvm_mmu_unload(struct kvm_vcpu *vcpu)
2538{
2539 mmu_free_roots(vcpu);
2540}
2541
2542static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
2543 struct kvm_mmu_page *sp,
2544 u64 *spte)
2545{
2546 u64 pte;
2547 struct kvm_mmu_page *child;
2548
2549 pte = *spte;
2550 if (is_shadow_present_pte(pte)) {
2551 if (is_last_spte(pte, sp->role.level))
2552 rmap_remove(vcpu->kvm, spte);
2553 else {
2554 child = page_header(pte & PT64_BASE_ADDR_MASK);
2555 mmu_page_remove_parent_pte(child, spte);
2556 }
2557 }
2558 __set_spte(spte, shadow_trap_nonpresent_pte);
2559 if (is_large_pte(pte))
2560 --vcpu->kvm->stat.lpages;
2561}
2562
2563static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
2564 struct kvm_mmu_page *sp,
2565 u64 *spte,
2566 const void *new)
2567{
2568 if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
2569 ++vcpu->kvm->stat.mmu_pde_zapped;
2570 return;
2571 }
2572
2573 ++vcpu->kvm->stat.mmu_pte_updated;
2574 if (!sp->role.cr4_pae)
2575 paging32_update_pte(vcpu, sp, spte, new);
2576 else
2577 paging64_update_pte(vcpu, sp, spte, new);
2578}
2579
2580static bool need_remote_flush(u64 old, u64 new)
2581{
2582 if (!is_shadow_present_pte(old))
2583 return false;
2584 if (!is_shadow_present_pte(new))
2585 return true;
2586 if ((old ^ new) & PT64_BASE_ADDR_MASK)
2587 return true;
2588 old ^= PT64_NX_MASK;
2589 new ^= PT64_NX_MASK;
2590 return (old & ~new & PT64_PERM_MASK) != 0;
2591}
2592
2593static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, u64 old, u64 new)
2594{
2595 if (need_remote_flush(old, new))
2596 kvm_flush_remote_tlbs(vcpu->kvm);
2597 else
2598 kvm_mmu_flush_tlb(vcpu);
2599}
2600
2601static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
2602{
2603 u64 *spte = vcpu->arch.last_pte_updated;
2604
2605 return !!(spte && (*spte & shadow_accessed_mask));
2606}
2607
2608static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2609 u64 gpte)
2610{
2611 gfn_t gfn;
2612 pfn_t pfn;
2613
2614 if (!is_present_gpte(gpte))
2615 return;
2616 gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
2617
2618 vcpu->arch.update_pte.mmu_seq = vcpu->kvm->mmu_notifier_seq;
2619 smp_rmb();
2620 pfn = gfn_to_pfn(vcpu->kvm, gfn);
2621
2622 if (is_error_pfn(pfn)) {
2623 kvm_release_pfn_clean(pfn);
2624 return;
2625 }
2626 vcpu->arch.update_pte.gfn = gfn;
2627 vcpu->arch.update_pte.pfn = pfn;
2628}
2629
2630static void kvm_mmu_access_page(struct kvm_vcpu *vcpu, gfn_t gfn)
2631{
2632 u64 *spte = vcpu->arch.last_pte_updated;
2633
2634 if (spte
2635 && vcpu->arch.last_pte_gfn == gfn
2636 && shadow_accessed_mask
2637 && !(*spte & shadow_accessed_mask)
2638 && is_shadow_present_pte(*spte))
2639 set_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
2640}
2641
2642void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
2643 const u8 *new, int bytes,
2644 bool guest_initiated)
2645{
2646 gfn_t gfn = gpa >> PAGE_SHIFT;
2647 struct kvm_mmu_page *sp;
2648 struct hlist_node *node, *n;
2649 struct hlist_head *bucket;
2650 unsigned index;
2651 u64 entry, gentry;
2652 u64 *spte;
2653 unsigned offset = offset_in_page(gpa);
2654 unsigned pte_size;
2655 unsigned page_offset;
2656 unsigned misaligned;
2657 unsigned quadrant;
2658 int level;
2659 int flooded = 0;
2660 int npte;
2661 int r;
2662 int invlpg_counter;
2663
2664 pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
2665
2666 invlpg_counter = atomic_read(&vcpu->kvm->arch.invlpg_counter);
2667
2668 /*
2669 * Assume that the pte write on a page table of the same type
2670 * as the current vcpu paging mode. This is nearly always true
2671 * (might be false while changing modes). Note it is verified later
2672 * by update_pte().
2673 */
2674 if ((is_pae(vcpu) && bytes == 4) || !new) {
2675 /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
2676 if (is_pae(vcpu)) {
2677 gpa &= ~(gpa_t)7;
2678 bytes = 8;
2679 }
2680 r = kvm_read_guest(vcpu->kvm, gpa, &gentry, min(bytes, 8));
2681 if (r)
2682 gentry = 0;
2683 new = (const u8 *)&gentry;
2684 }
2685
2686 switch (bytes) {
2687 case 4:
2688 gentry = *(const u32 *)new;
2689 break;
2690 case 8:
2691 gentry = *(const u64 *)new;
2692 break;
2693 default:
2694 gentry = 0;
2695 break;
2696 }
2697
2698 mmu_guess_page_from_pte_write(vcpu, gpa, gentry);
2699 spin_lock(&vcpu->kvm->mmu_lock);
2700 if (atomic_read(&vcpu->kvm->arch.invlpg_counter) != invlpg_counter)
2701 gentry = 0;
2702 kvm_mmu_access_page(vcpu, gfn);
2703 kvm_mmu_free_some_pages(vcpu);
2704 ++vcpu->kvm->stat.mmu_pte_write;
2705 kvm_mmu_audit(vcpu, "pre pte write");
2706 if (guest_initiated) {
2707 if (gfn == vcpu->arch.last_pt_write_gfn
2708 && !last_updated_pte_accessed(vcpu)) {
2709 ++vcpu->arch.last_pt_write_count;
2710 if (vcpu->arch.last_pt_write_count >= 3)
2711 flooded = 1;
2712 } else {
2713 vcpu->arch.last_pt_write_gfn = gfn;
2714 vcpu->arch.last_pt_write_count = 1;
2715 vcpu->arch.last_pte_updated = NULL;
2716 }
2717 }
2718 index = kvm_page_table_hashfn(gfn);
2719 bucket = &vcpu->kvm->arch.mmu_page_hash[index];
2720
2721restart:
2722 hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) {
2723 if (sp->gfn != gfn || sp->role.direct || sp->role.invalid)
2724 continue;
2725 pte_size = sp->role.cr4_pae ? 8 : 4;
2726 misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
2727 misaligned |= bytes < 4;
2728 if (misaligned || flooded) {
2729 /*
2730 * Misaligned accesses are too much trouble to fix
2731 * up; also, they usually indicate a page is not used
2732 * as a page table.
2733 *
2734 * If we're seeing too many writes to a page,
2735 * it may no longer be a page table, or we may be
2736 * forking, in which case it is better to unmap the
2737 * page.
2738 */
2739 pgprintk("misaligned: gpa %llx bytes %d role %x\n",
2740 gpa, bytes, sp->role.word);
2741 if (kvm_mmu_zap_page(vcpu->kvm, sp))
2742 goto restart;
2743 ++vcpu->kvm->stat.mmu_flooded;
2744 continue;
2745 }
2746 page_offset = offset;
2747 level = sp->role.level;
2748 npte = 1;
2749 if (!sp->role.cr4_pae) {
2750 page_offset <<= 1; /* 32->64 */
2751 /*
2752 * A 32-bit pde maps 4MB while the shadow pdes map
2753 * only 2MB. So we need to double the offset again
2754 * and zap two pdes instead of one.
2755 */
2756 if (level == PT32_ROOT_LEVEL) {
2757 page_offset &= ~7; /* kill rounding error */
2758 page_offset <<= 1;
2759 npte = 2;
2760 }
2761 quadrant = page_offset >> PAGE_SHIFT;
2762 page_offset &= ~PAGE_MASK;
2763 if (quadrant != sp->role.quadrant)
2764 continue;
2765 }
2766 spte = &sp->spt[page_offset / sizeof(*spte)];
2767 while (npte--) {
2768 entry = *spte;
2769 mmu_pte_write_zap_pte(vcpu, sp, spte);
2770 if (gentry)
2771 mmu_pte_write_new_pte(vcpu, sp, spte, &gentry);
2772 mmu_pte_write_flush_tlb(vcpu, entry, *spte);
2773 ++spte;
2774 }
2775 }
2776 kvm_mmu_audit(vcpu, "post pte write");
2777 spin_unlock(&vcpu->kvm->mmu_lock);
2778 if (!is_error_pfn(vcpu->arch.update_pte.pfn)) {
2779 kvm_release_pfn_clean(vcpu->arch.update_pte.pfn);
2780 vcpu->arch.update_pte.pfn = bad_pfn;
2781 }
2782}
2783
2784int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
2785{
2786 gpa_t gpa;
2787 int r;
2788
2789 if (tdp_enabled)
2790 return 0;
2791
2792 gpa = kvm_mmu_gva_to_gpa_read(vcpu, gva, NULL);
2793
2794 spin_lock(&vcpu->kvm->mmu_lock);
2795 r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
2796 spin_unlock(&vcpu->kvm->mmu_lock);
2797 return r;
2798}
2799EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt);
2800
2801void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
2802{
2803 while (vcpu->kvm->arch.n_free_mmu_pages < KVM_REFILL_PAGES &&
2804 !list_empty(&vcpu->kvm->arch.active_mmu_pages)) {
2805 struct kvm_mmu_page *sp;
2806
2807 sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev,
2808 struct kvm_mmu_page, link);
2809 kvm_mmu_zap_page(vcpu->kvm, sp);
2810 ++vcpu->kvm->stat.mmu_recycled;
2811 }
2812}
2813
2814int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
2815{
2816 int r;
2817 enum emulation_result er;
2818
2819 r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code);
2820 if (r < 0)
2821 goto out;
2822
2823 if (!r) {
2824 r = 1;
2825 goto out;
2826 }
2827
2828 r = mmu_topup_memory_caches(vcpu);
2829 if (r)
2830 goto out;
2831
2832 er = emulate_instruction(vcpu, cr2, error_code, 0);
2833
2834 switch (er) {
2835 case EMULATE_DONE:
2836 return 1;
2837 case EMULATE_DO_MMIO:
2838 ++vcpu->stat.mmio_exits;
2839 /* fall through */
2840 case EMULATE_FAIL:
2841 return 0;
2842 default:
2843 BUG();
2844 }
2845out:
2846 return r;
2847}
2848EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
2849
2850void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
2851{
2852 vcpu->arch.mmu.invlpg(vcpu, gva);
2853 kvm_mmu_flush_tlb(vcpu);
2854 ++vcpu->stat.invlpg;
2855}
2856EXPORT_SYMBOL_GPL(kvm_mmu_invlpg);
2857
2858void kvm_enable_tdp(void)
2859{
2860 tdp_enabled = true;
2861}
2862EXPORT_SYMBOL_GPL(kvm_enable_tdp);
2863
2864void kvm_disable_tdp(void)
2865{
2866 tdp_enabled = false;
2867}
2868EXPORT_SYMBOL_GPL(kvm_disable_tdp);
2869
2870static void free_mmu_pages(struct kvm_vcpu *vcpu)
2871{
2872 free_page((unsigned long)vcpu->arch.mmu.pae_root);
2873}
2874
2875static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
2876{
2877 struct page *page;
2878 int i;
2879
2880 ASSERT(vcpu);
2881
2882 /*
2883 * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
2884 * Therefore we need to allocate shadow page tables in the first
2885 * 4GB of memory, which happens to fit the DMA32 zone.
2886 */
2887 page = alloc_page(GFP_KERNEL | __GFP_DMA32);
2888 if (!page)
2889 return -ENOMEM;
2890
2891 vcpu->arch.mmu.pae_root = page_address(page);
2892 for (i = 0; i < 4; ++i)
2893 vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
2894
2895 return 0;
2896}
2897
2898int kvm_mmu_create(struct kvm_vcpu *vcpu)
2899{
2900 ASSERT(vcpu);
2901 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2902
2903 return alloc_mmu_pages(vcpu);
2904}
2905
2906int kvm_mmu_setup(struct kvm_vcpu *vcpu)
2907{
2908 ASSERT(vcpu);
2909 ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
2910
2911 return init_kvm_mmu(vcpu);
2912}
2913
2914void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
2915{
2916 ASSERT(vcpu);
2917
2918 destroy_kvm_mmu(vcpu);
2919 free_mmu_pages(vcpu);
2920 mmu_free_memory_caches(vcpu);
2921}
2922
2923void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
2924{
2925 struct kvm_mmu_page *sp;
2926
2927 list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
2928 int i;
2929 u64 *pt;
2930
2931 if (!test_bit(slot, sp->slot_bitmap))
2932 continue;
2933
2934 pt = sp->spt;
2935 for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
2936 /* avoid RMW */
2937 if (pt[i] & PT_WRITABLE_MASK)
2938 pt[i] &= ~PT_WRITABLE_MASK;
2939 }
2940 kvm_flush_remote_tlbs(kvm);
2941}
2942
2943void kvm_mmu_zap_all(struct kvm *kvm)
2944{
2945 struct kvm_mmu_page *sp, *node;
2946
2947 spin_lock(&kvm->mmu_lock);
2948restart:
2949 list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link)
2950 if (kvm_mmu_zap_page(kvm, sp))
2951 goto restart;
2952
2953 spin_unlock(&kvm->mmu_lock);
2954
2955 kvm_flush_remote_tlbs(kvm);
2956}
2957
2958static int kvm_mmu_remove_some_alloc_mmu_pages(struct kvm *kvm)
2959{
2960 struct kvm_mmu_page *page;
2961
2962 page = container_of(kvm->arch.active_mmu_pages.prev,
2963 struct kvm_mmu_page, link);
2964 return kvm_mmu_zap_page(kvm, page);
2965}
2966
2967static int mmu_shrink(struct shrinker *shrink, int nr_to_scan, gfp_t gfp_mask)
2968{
2969 struct kvm *kvm;
2970 struct kvm *kvm_freed = NULL;
2971 int cache_count = 0;
2972
2973 spin_lock(&kvm_lock);
2974
2975 list_for_each_entry(kvm, &vm_list, vm_list) {
2976 int npages, idx, freed_pages;
2977
2978 idx = srcu_read_lock(&kvm->srcu);
2979 spin_lock(&kvm->mmu_lock);
2980 npages = kvm->arch.n_alloc_mmu_pages -
2981 kvm->arch.n_free_mmu_pages;
2982 cache_count += npages;
2983 if (!kvm_freed && nr_to_scan > 0 && npages > 0) {
2984 freed_pages = kvm_mmu_remove_some_alloc_mmu_pages(kvm);
2985 cache_count -= freed_pages;
2986 kvm_freed = kvm;
2987 }
2988 nr_to_scan--;
2989
2990 spin_unlock(&kvm->mmu_lock);
2991 srcu_read_unlock(&kvm->srcu, idx);
2992 }
2993 if (kvm_freed)
2994 list_move_tail(&kvm_freed->vm_list, &vm_list);
2995
2996 spin_unlock(&kvm_lock);
2997
2998 return cache_count;
2999}
3000
3001static struct shrinker mmu_shrinker = {
3002 .shrink = mmu_shrink,
3003 .seeks = DEFAULT_SEEKS * 10,
3004};
3005
3006static void mmu_destroy_caches(void)
3007{
3008 if (pte_chain_cache)
3009 kmem_cache_destroy(pte_chain_cache);
3010 if (rmap_desc_cache)
3011 kmem_cache_destroy(rmap_desc_cache);
3012 if (mmu_page_header_cache)
3013 kmem_cache_destroy(mmu_page_header_cache);
3014}
3015
3016void kvm_mmu_module_exit(void)
3017{
3018 mmu_destroy_caches();
3019 unregister_shrinker(&mmu_shrinker);
3020}
3021
3022int kvm_mmu_module_init(void)
3023{
3024 pte_chain_cache = kmem_cache_create("kvm_pte_chain",
3025 sizeof(struct kvm_pte_chain),
3026 0, 0, NULL);
3027 if (!pte_chain_cache)
3028 goto nomem;
3029 rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
3030 sizeof(struct kvm_rmap_desc),
3031 0, 0, NULL);
3032 if (!rmap_desc_cache)
3033 goto nomem;
3034
3035 mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
3036 sizeof(struct kvm_mmu_page),
3037 0, 0, NULL);
3038 if (!mmu_page_header_cache)
3039 goto nomem;
3040
3041 register_shrinker(&mmu_shrinker);
3042
3043 return 0;
3044
3045nomem:
3046 mmu_destroy_caches();
3047 return -ENOMEM;
3048}
3049
3050/*
3051 * Caculate mmu pages needed for kvm.
3052 */
3053unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
3054{
3055 int i;
3056 unsigned int nr_mmu_pages;
3057 unsigned int nr_pages = 0;
3058 struct kvm_memslots *slots;
3059
3060 slots = kvm_memslots(kvm);
3061
3062 for (i = 0; i < slots->nmemslots; i++)
3063 nr_pages += slots->memslots[i].npages;
3064
3065 nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
3066 nr_mmu_pages = max(nr_mmu_pages,
3067 (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
3068
3069 return nr_mmu_pages;
3070}
3071
3072static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer *buffer,
3073 unsigned len)
3074{
3075 if (len > buffer->len)
3076 return NULL;
3077 return buffer->ptr;
3078}
3079
3080static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer *buffer,
3081 unsigned len)
3082{
3083 void *ret;
3084
3085 ret = pv_mmu_peek_buffer(buffer, len);
3086 if (!ret)
3087 return ret;
3088 buffer->ptr += len;
3089 buffer->len -= len;
3090 buffer->processed += len;
3091 return ret;
3092}
3093
3094static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu,
3095 gpa_t addr, gpa_t value)
3096{
3097 int bytes = 8;
3098 int r;
3099
3100 if (!is_long_mode(vcpu) && !is_pae(vcpu))
3101 bytes = 4;
3102
3103 r = mmu_topup_memory_caches(vcpu);
3104 if (r)
3105 return r;
3106
3107 if (!emulator_write_phys(vcpu, addr, &value, bytes))
3108 return -EFAULT;
3109
3110 return 1;
3111}
3112
3113static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu)
3114{
3115 kvm_set_cr3(vcpu, vcpu->arch.cr3);
3116 return 1;
3117}
3118
3119static int kvm_pv_mmu_release_pt(struct kvm_vcpu *vcpu, gpa_t addr)
3120{
3121 spin_lock(&vcpu->kvm->mmu_lock);
3122 mmu_unshadow(vcpu->kvm, addr >> PAGE_SHIFT);
3123 spin_unlock(&vcpu->kvm->mmu_lock);
3124 return 1;
3125}
3126
3127static int kvm_pv_mmu_op_one(struct kvm_vcpu *vcpu,
3128 struct kvm_pv_mmu_op_buffer *buffer)
3129{
3130 struct kvm_mmu_op_header *header;
3131
3132 header = pv_mmu_peek_buffer(buffer, sizeof *header);
3133 if (!header)
3134 return 0;
3135 switch (header->op) {
3136 case KVM_MMU_OP_WRITE_PTE: {
3137 struct kvm_mmu_op_write_pte *wpte;
3138
3139 wpte = pv_mmu_read_buffer(buffer, sizeof *wpte);
3140 if (!wpte)
3141 return 0;
3142 return kvm_pv_mmu_write(vcpu, wpte->pte_phys,
3143 wpte->pte_val);
3144 }
3145 case KVM_MMU_OP_FLUSH_TLB: {
3146 struct kvm_mmu_op_flush_tlb *ftlb;
3147
3148 ftlb = pv_mmu_read_buffer(buffer, sizeof *ftlb);
3149 if (!ftlb)
3150 return 0;
3151 return kvm_pv_mmu_flush_tlb(vcpu);
3152 }
3153 case KVM_MMU_OP_RELEASE_PT: {
3154 struct kvm_mmu_op_release_pt *rpt;
3155
3156 rpt = pv_mmu_read_buffer(buffer, sizeof *rpt);
3157 if (!rpt)
3158 return 0;
3159 return kvm_pv_mmu_release_pt(vcpu, rpt->pt_phys);
3160 }
3161 default: return 0;
3162 }
3163}
3164
3165int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
3166 gpa_t addr, unsigned long *ret)
3167{
3168 int r;
3169 struct kvm_pv_mmu_op_buffer *buffer = &vcpu->arch.mmu_op_buffer;
3170
3171 buffer->ptr = buffer->buf;
3172 buffer->len = min_t(unsigned long, bytes, sizeof buffer->buf);
3173 buffer->processed = 0;
3174
3175 r = kvm_read_guest(vcpu->kvm, addr, buffer->buf, buffer->len);
3176 if (r)
3177 goto out;
3178
3179 while (buffer->len) {
3180 r = kvm_pv_mmu_op_one(vcpu, buffer);
3181 if (r < 0)
3182 goto out;
3183 if (r == 0)
3184 break;
3185 }
3186
3187 r = 1;
3188out:
3189 *ret = buffer->processed;
3190 return r;
3191}
3192
3193int kvm_mmu_get_spte_hierarchy(struct kvm_vcpu *vcpu, u64 addr, u64 sptes[4])
3194{
3195 struct kvm_shadow_walk_iterator iterator;
3196 int nr_sptes = 0;
3197
3198 spin_lock(&vcpu->kvm->mmu_lock);
3199 for_each_shadow_entry(vcpu, addr, iterator) {
3200 sptes[iterator.level-1] = *iterator.sptep;
3201 nr_sptes++;
3202 if (!is_shadow_present_pte(*iterator.sptep))
3203 break;
3204 }
3205 spin_unlock(&vcpu->kvm->mmu_lock);
3206
3207 return nr_sptes;
3208}
3209EXPORT_SYMBOL_GPL(kvm_mmu_get_spte_hierarchy);
3210
3211#ifdef AUDIT
3212
3213static const char *audit_msg;
3214
3215static gva_t canonicalize(gva_t gva)
3216{
3217#ifdef CONFIG_X86_64
3218 gva = (long long)(gva << 16) >> 16;
3219#endif
3220 return gva;
3221}
3222
3223
3224typedef void (*inspect_spte_fn) (struct kvm *kvm, u64 *sptep);
3225
3226static void __mmu_spte_walk(struct kvm *kvm, struct kvm_mmu_page *sp,
3227 inspect_spte_fn fn)
3228{
3229 int i;
3230
3231 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3232 u64 ent = sp->spt[i];
3233
3234 if (is_shadow_present_pte(ent)) {
3235 if (!is_last_spte(ent, sp->role.level)) {
3236 struct kvm_mmu_page *child;
3237 child = page_header(ent & PT64_BASE_ADDR_MASK);
3238 __mmu_spte_walk(kvm, child, fn);
3239 } else
3240 fn(kvm, &sp->spt[i]);
3241 }
3242 }
3243}
3244
3245static void mmu_spte_walk(struct kvm_vcpu *vcpu, inspect_spte_fn fn)
3246{
3247 int i;
3248 struct kvm_mmu_page *sp;
3249
3250 if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
3251 return;
3252 if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
3253 hpa_t root = vcpu->arch.mmu.root_hpa;
3254 sp = page_header(root);
3255 __mmu_spte_walk(vcpu->kvm, sp, fn);
3256 return;
3257 }
3258 for (i = 0; i < 4; ++i) {
3259 hpa_t root = vcpu->arch.mmu.pae_root[i];
3260
3261 if (root && VALID_PAGE(root)) {
3262 root &= PT64_BASE_ADDR_MASK;
3263 sp = page_header(root);
3264 __mmu_spte_walk(vcpu->kvm, sp, fn);
3265 }
3266 }
3267 return;
3268}
3269
3270static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
3271 gva_t va, int level)
3272{
3273 u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
3274 int i;
3275 gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
3276
3277 for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
3278 u64 ent = pt[i];
3279
3280 if (ent == shadow_trap_nonpresent_pte)
3281 continue;
3282
3283 va = canonicalize(va);
3284 if (is_shadow_present_pte(ent) && !is_last_spte(ent, level))
3285 audit_mappings_page(vcpu, ent, va, level - 1);
3286 else {
3287 gpa_t gpa = kvm_mmu_gva_to_gpa_read(vcpu, va, NULL);
3288 gfn_t gfn = gpa >> PAGE_SHIFT;
3289 pfn_t pfn = gfn_to_pfn(vcpu->kvm, gfn);
3290 hpa_t hpa = (hpa_t)pfn << PAGE_SHIFT;
3291
3292 if (is_error_pfn(pfn)) {
3293 kvm_release_pfn_clean(pfn);
3294 continue;
3295 }
3296
3297 if (is_shadow_present_pte(ent)
3298 && (ent & PT64_BASE_ADDR_MASK) != hpa)
3299 printk(KERN_ERR "xx audit error: (%s) levels %d"
3300 " gva %lx gpa %llx hpa %llx ent %llx %d\n",
3301 audit_msg, vcpu->arch.mmu.root_level,
3302 va, gpa, hpa, ent,
3303 is_shadow_present_pte(ent));
3304 else if (ent == shadow_notrap_nonpresent_pte
3305 && !is_error_hpa(hpa))
3306 printk(KERN_ERR "audit: (%s) notrap shadow,"
3307 " valid guest gva %lx\n", audit_msg, va);
3308 kvm_release_pfn_clean(pfn);
3309
3310 }
3311 }
3312}
3313
3314static void audit_mappings(struct kvm_vcpu *vcpu)
3315{
3316 unsigned i;
3317
3318 if (vcpu->arch.mmu.root_level == 4)
3319 audit_mappings_page(vcpu, vcpu->arch.mmu.root_hpa, 0, 4);
3320 else
3321 for (i = 0; i < 4; ++i)
3322 if (vcpu->arch.mmu.pae_root[i] & PT_PRESENT_MASK)
3323 audit_mappings_page(vcpu,
3324 vcpu->arch.mmu.pae_root[i],
3325 i << 30,
3326 2);
3327}
3328
3329static int count_rmaps(struct kvm_vcpu *vcpu)
3330{
3331 struct kvm *kvm = vcpu->kvm;
3332 struct kvm_memslots *slots;
3333 int nmaps = 0;
3334 int i, j, k, idx;
3335
3336 idx = srcu_read_lock(&kvm->srcu);
3337 slots = kvm_memslots(kvm);
3338 for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
3339 struct kvm_memory_slot *m = &slots->memslots[i];
3340 struct kvm_rmap_desc *d;
3341
3342 for (j = 0; j < m->npages; ++j) {
3343 unsigned long *rmapp = &m->rmap[j];
3344
3345 if (!*rmapp)
3346 continue;
3347 if (!(*rmapp & 1)) {
3348 ++nmaps;
3349 continue;
3350 }
3351 d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
3352 while (d) {
3353 for (k = 0; k < RMAP_EXT; ++k)
3354 if (d->sptes[k])
3355 ++nmaps;
3356 else
3357 break;
3358 d = d->more;
3359 }
3360 }
3361 }
3362 srcu_read_unlock(&kvm->srcu, idx);
3363 return nmaps;
3364}
3365
3366void inspect_spte_has_rmap(struct kvm *kvm, u64 *sptep)
3367{
3368 unsigned long *rmapp;
3369 struct kvm_mmu_page *rev_sp;
3370 gfn_t gfn;
3371
3372 if (*sptep & PT_WRITABLE_MASK) {
3373 rev_sp = page_header(__pa(sptep));
3374 gfn = rev_sp->gfns[sptep - rev_sp->spt];
3375
3376 if (!gfn_to_memslot(kvm, gfn)) {
3377 if (!printk_ratelimit())
3378 return;
3379 printk(KERN_ERR "%s: no memslot for gfn %ld\n",
3380 audit_msg, gfn);
3381 printk(KERN_ERR "%s: index %ld of sp (gfn=%lx)\n",
3382 audit_msg, (long int)(sptep - rev_sp->spt),
3383 rev_sp->gfn);
3384 dump_stack();
3385 return;
3386 }
3387
3388 rmapp = gfn_to_rmap(kvm, rev_sp->gfns[sptep - rev_sp->spt],
3389 rev_sp->role.level);
3390 if (!*rmapp) {
3391 if (!printk_ratelimit())
3392 return;
3393 printk(KERN_ERR "%s: no rmap for writable spte %llx\n",
3394 audit_msg, *sptep);
3395 dump_stack();
3396 }
3397 }
3398
3399}
3400
3401void audit_writable_sptes_have_rmaps(struct kvm_vcpu *vcpu)
3402{
3403 mmu_spte_walk(vcpu, inspect_spte_has_rmap);
3404}
3405
3406static void check_writable_mappings_rmap(struct kvm_vcpu *vcpu)
3407{
3408 struct kvm_mmu_page *sp;
3409 int i;
3410
3411 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
3412 u64 *pt = sp->spt;
3413
3414 if (sp->role.level != PT_PAGE_TABLE_LEVEL)
3415 continue;
3416
3417 for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
3418 u64 ent = pt[i];
3419
3420 if (!(ent & PT_PRESENT_MASK))
3421 continue;
3422 if (!(ent & PT_WRITABLE_MASK))
3423 continue;
3424 inspect_spte_has_rmap(vcpu->kvm, &pt[i]);
3425 }
3426 }
3427 return;
3428}
3429
3430static void audit_rmap(struct kvm_vcpu *vcpu)
3431{
3432 check_writable_mappings_rmap(vcpu);
3433 count_rmaps(vcpu);
3434}
3435
3436static void audit_write_protection(struct kvm_vcpu *vcpu)
3437{
3438 struct kvm_mmu_page *sp;
3439 struct kvm_memory_slot *slot;
3440 unsigned long *rmapp;
3441 u64 *spte;
3442 gfn_t gfn;
3443
3444 list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
3445 if (sp->role.direct)
3446 continue;
3447 if (sp->unsync)
3448 continue;
3449
3450 gfn = unalias_gfn(vcpu->kvm, sp->gfn);
3451 slot = gfn_to_memslot_unaliased(vcpu->kvm, sp->gfn);
3452 rmapp = &slot->rmap[gfn - slot->base_gfn];
3453
3454 spte = rmap_next(vcpu->kvm, rmapp, NULL);
3455 while (spte) {
3456 if (*spte & PT_WRITABLE_MASK)
3457 printk(KERN_ERR "%s: (%s) shadow page has "
3458 "writable mappings: gfn %lx role %x\n",
3459 __func__, audit_msg, sp->gfn,
3460 sp->role.word);
3461 spte = rmap_next(vcpu->kvm, rmapp, spte);
3462 }
3463 }
3464}
3465
3466static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
3467{
3468 int olddbg = dbg;
3469
3470 dbg = 0;
3471 audit_msg = msg;
3472 audit_rmap(vcpu);
3473 audit_write_protection(vcpu);
3474 if (strcmp("pre pte write", audit_msg) != 0)
3475 audit_mappings(vcpu);
3476 audit_writable_sptes_have_rmaps(vcpu);
3477 dbg = olddbg;
3478}
3479
3480#endif
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