[mirror_ubuntu-bionic-kernel.git] / drivers / gpu / drm / amd / display / dc / core / dc_stream.c

/*
 * Copyright 2012-15 Advanced Micro Devices, Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 * Authors: AMD
 *
 */

#include "dm_services.h"
#include "dc.h"
#include "core_types.h"
#include "resource.h"
#include "ipp.h"
#include "timing_generator.h"

/*******************************************************************************
 * Private functions
 ******************************************************************************/
#define TMDS_MAX_PIXEL_CLOCK_IN_KHZ_UPMOST 297000
static void update_stream_signal(struct dc_stream_state *stream)
{
	if (stream->output_signal == SIGNAL_TYPE_NONE) {
		struct dc_sink *dc_sink = stream->sink;

		if (dc_sink->sink_signal == SIGNAL_TYPE_NONE)
			stream->signal = stream->sink->link->connector_signal;
		else
			stream->signal = dc_sink->sink_signal;
	} else {
		stream->signal = stream->output_signal;
	}

	if (dc_is_dvi_signal(stream->signal)) {
		if (stream->timing.pix_clk_khz > TMDS_MAX_PIXEL_CLOCK_IN_KHZ_UPMOST &&
			stream->sink->sink_signal != SIGNAL_TYPE_DVI_SINGLE_LINK)
			stream->signal = SIGNAL_TYPE_DVI_DUAL_LINK;
		else
			stream->signal = SIGNAL_TYPE_DVI_SINGLE_LINK;
	}
}

static void construct(struct dc_stream_state *stream,
	struct dc_sink *dc_sink_data)
{
	uint32_t i = 0;

	stream->sink = dc_sink_data;
	stream->ctx = stream->sink->ctx;

	dc_sink_retain(dc_sink_data);

	/* Copy audio modes */
	/* TODO - Remove this translation */
	for (i = 0; i < (dc_sink_data->edid_caps.audio_mode_count); i++)
	{
		stream->audio_info.modes[i].channel_count = dc_sink_data->edid_caps.audio_modes[i].channel_count;
		stream->audio_info.modes[i].format_code = dc_sink_data->edid_caps.audio_modes[i].format_code;
		stream->audio_info.modes[i].sample_rates.all = dc_sink_data->edid_caps.audio_modes[i].sample_rate;
		stream->audio_info.modes[i].sample_size = dc_sink_data->edid_caps.audio_modes[i].sample_size;
	}
	stream->audio_info.mode_count = dc_sink_data->edid_caps.audio_mode_count;
	stream->audio_info.audio_latency = dc_sink_data->edid_caps.audio_latency;
	stream->audio_info.video_latency = dc_sink_data->edid_caps.video_latency;
	memmove(
		stream->audio_info.display_name,
		dc_sink_data->edid_caps.display_name,
		AUDIO_INFO_DISPLAY_NAME_SIZE_IN_CHARS);
	stream->audio_info.manufacture_id = dc_sink_data->edid_caps.manufacturer_id;
	stream->audio_info.product_id = dc_sink_data->edid_caps.product_id;
	stream->audio_info.flags.all = dc_sink_data->edid_caps.speaker_flags;

	if (dc_sink_data->dc_container_id != NULL) {
		struct dc_container_id *dc_container_id = dc_sink_data->dc_container_id;

		stream->audio_info.port_id[0] = dc_container_id->portId[0];
		stream->audio_info.port_id[1] = dc_container_id->portId[1];
	} else {
		/* TODO - WindowDM has implemented,
		other DMs need Unhardcode port_id */
		stream->audio_info.port_id[0] = 0x5558859e;
		stream->audio_info.port_id[1] = 0xd989449;
	}

	/* EDID CAP translation for HDMI 2.0 */
	stream->timing.flags.LTE_340MCSC_SCRAMBLE = dc_sink_data->edid_caps.lte_340mcsc_scramble;

	stream->status.link = stream->sink->link;

	update_stream_signal(stream);
}

static void destruct(struct dc_stream_state *stream)
{
	dc_sink_release(stream->sink);
	if (stream->out_transfer_func != NULL) {
		dc_transfer_func_release(
				stream->out_transfer_func);
		stream->out_transfer_func = NULL;
	}
}

void dc_stream_retain(struct dc_stream_state *stream)
{
	kref_get(&stream->refcount);
}

static void dc_stream_free(struct kref *kref)
{
	struct dc_stream_state *stream = container_of(kref, struct dc_stream_state, refcount);

	destruct(stream);
	kfree(stream);
}

void dc_stream_release(struct dc_stream_state *stream)
{
	if (stream != NULL) {
		kref_put(&stream->refcount, dc_stream_free);
	}
}

struct dc_stream_state *dc_create_stream_for_sink(
		struct dc_sink *sink)
{
	struct dc_stream_state *stream;

	if (sink == NULL)
		return NULL;

	stream = kzalloc(sizeof(struct dc_stream_state), GFP_KERNEL);
	if (stream == NULL)
		return NULL;

	construct(stream, sink);

	kref_init(&stream->refcount);

	return stream;
}

struct dc_stream_status *dc_stream_get_status(
	struct dc_stream_state *stream)
{
	uint8_t i;
	struct dc  *dc = stream->ctx->dc;

	for (i = 0; i < dc->current_state->stream_count; i++) {
		if (stream == dc->current_state->streams[i])
			return &dc->current_state->stream_status[i];
	}

	return NULL;
}

/**
 * Update the cursor attributes and set cursor surface address
 */
bool dc_stream_set_cursor_attributes(
	struct dc_stream_state *stream,
	const struct dc_cursor_attributes *attributes)
{
	int i;
	struct dc  *core_dc;
	struct resource_context *res_ctx;

	if (NULL == stream) {
		dm_error("DC: dc_stream is NULL!\n");
		return false;
	}
	if (NULL == attributes) {
		dm_error("DC: attributes is NULL!\n");
		return false;
	}

	if (attributes->address.quad_part == 0) {
		dm_output_to_console("DC: Cursor address is 0!\n");
		return false;
	}

	core_dc = stream->ctx->dc;
	res_ctx = &core_dc->current_state->res_ctx;

	for (i = 0; i < MAX_PIPES; i++) {
		struct pipe_ctx *pipe_ctx = &res_ctx->pipe_ctx[i];

		if (pipe_ctx->stream != stream || (!pipe_ctx->plane_res.xfm &&
		    !pipe_ctx->plane_res.dpp) || !pipe_ctx->plane_res.ipp)
			continue;
		if (pipe_ctx->top_pipe && pipe_ctx->plane_state != pipe_ctx->top_pipe->plane_state)
			continue;


		if (pipe_ctx->plane_res.ipp->funcs->ipp_cursor_set_attributes != NULL)
			pipe_ctx->plane_res.ipp->funcs->ipp_cursor_set_attributes(
						pipe_ctx->plane_res.ipp, attributes);

		if (pipe_ctx->plane_res.hubp != NULL &&
				pipe_ctx->plane_res.hubp->funcs->set_cursor_attributes != NULL)
			pipe_ctx->plane_res.hubp->funcs->set_cursor_attributes(
					pipe_ctx->plane_res.hubp, attributes);

		if (pipe_ctx->plane_res.mi != NULL &&
				pipe_ctx->plane_res.mi->funcs->set_cursor_attributes != NULL)
			pipe_ctx->plane_res.mi->funcs->set_cursor_attributes(
					pipe_ctx->plane_res.mi, attributes);


		if (pipe_ctx->plane_res.xfm != NULL &&
				pipe_ctx->plane_res.xfm->funcs->set_cursor_attributes != NULL)
			pipe_ctx->plane_res.xfm->funcs->set_cursor_attributes(
				pipe_ctx->plane_res.xfm, attributes);

		if (pipe_ctx->plane_res.dpp != NULL &&
				pipe_ctx->plane_res.dpp->funcs->set_cursor_attributes != NULL)
			pipe_ctx->plane_res.dpp->funcs->set_cursor_attributes(
				pipe_ctx->plane_res.dpp, attributes);
	}

	stream->cursor_attributes = *attributes;

	return true;
}

bool dc_stream_set_cursor_position(
	struct dc_stream_state *stream,
	const struct dc_cursor_position *position)
{
	int i;
	struct dc  *core_dc;
	struct resource_context *res_ctx;

	if (NULL == stream) {
		dm_error("DC: dc_stream is NULL!\n");
		return false;
	}

	if (NULL == position) {
		dm_error("DC: cursor position is NULL!\n");
		return false;
	}

	core_dc = stream->ctx->dc;
	res_ctx = &core_dc->current_state->res_ctx;

	for (i = 0; i < MAX_PIPES; i++) {
		struct pipe_ctx *pipe_ctx = &res_ctx->pipe_ctx[i];
		struct input_pixel_processor *ipp = pipe_ctx->plane_res.ipp;
		struct mem_input *mi = pipe_ctx->plane_res.mi;
		struct hubp *hubp = pipe_ctx->plane_res.hubp;
		struct dpp *dpp = pipe_ctx->plane_res.dpp;
		struct dc_cursor_position pos_cpy = *position;
		struct dc_cursor_mi_param param = {
			.pixel_clk_khz = stream->timing.pix_clk_khz,
			.ref_clk_khz = core_dc->res_pool->ref_clock_inKhz,
			.viewport_x_start = pipe_ctx->plane_res.scl_data.viewport.x,
			.viewport_width = pipe_ctx->plane_res.scl_data.viewport.width,
			.h_scale_ratio = pipe_ctx->plane_res.scl_data.ratios.horz
		};

		if (pipe_ctx->stream != stream ||
				(!pipe_ctx->plane_res.mi  && !pipe_ctx->plane_res.hubp) ||
				!pipe_ctx->plane_state ||
				(!pipe_ctx->plane_res.xfm && !pipe_ctx->plane_res.dpp) ||
				!pipe_ctx->plane_res.ipp)
			continue;

		if (pipe_ctx->plane_state->address.type
				== PLN_ADDR_TYPE_VIDEO_PROGRESSIVE)
			pos_cpy.enable = false;

		if (pipe_ctx->top_pipe && pipe_ctx->plane_state != pipe_ctx->top_pipe->plane_state)
			pos_cpy.enable = false;


		if (ipp != NULL && ipp->funcs->ipp_cursor_set_position != NULL)
			ipp->funcs->ipp_cursor_set_position(ipp, &pos_cpy, &param);

		if (mi != NULL && mi->funcs->set_cursor_position != NULL)
			mi->funcs->set_cursor_position(mi, &pos_cpy, &param);

		if (!hubp)
			continue;

		if (hubp->funcs->set_cursor_position != NULL)
			hubp->funcs->set_cursor_position(hubp, &pos_cpy, &param);

		if (dpp != NULL && dpp->funcs->set_cursor_position != NULL)
			dpp->funcs->set_cursor_position(dpp, &pos_cpy, &param, hubp->curs_attr.width);

	}

	return true;
}

uint32_t dc_stream_get_vblank_counter(const struct dc_stream_state *stream)
{
	uint8_t i;
	struct dc  *core_dc = stream->ctx->dc;
	struct resource_context *res_ctx =
		&core_dc->current_state->res_ctx;

	for (i = 0; i < MAX_PIPES; i++) {
		struct timing_generator *tg = res_ctx->pipe_ctx[i].stream_res.tg;

		if (res_ctx->pipe_ctx[i].stream != stream)
			continue;

		return tg->funcs->get_frame_count(tg);
	}

	return 0;
}

bool dc_stream_get_scanoutpos(const struct dc_stream_state *stream,
				  uint32_t *v_blank_start,
				  uint32_t *v_blank_end,
				  uint32_t *h_position,
				  uint32_t *v_position)
{
	uint8_t i;
	bool ret = false;
	struct dc  *core_dc = stream->ctx->dc;
	struct resource_context *res_ctx =
		&core_dc->current_state->res_ctx;

	for (i = 0; i < MAX_PIPES; i++) {
		struct timing_generator *tg = res_ctx->pipe_ctx[i].stream_res.tg;

		if (res_ctx->pipe_ctx[i].stream != stream)
			continue;

		tg->funcs->get_scanoutpos(tg,
					  v_blank_start,
					  v_blank_end,
					  h_position,
					  v_position);

		ret = true;
		break;
	}

	return ret;
}


void dc_stream_log(
	const struct dc_stream_state *stream,
	struct dal_logger *dm_logger,
	enum dc_log_type log_type)
{

	dm_logger_write(dm_logger,
			log_type,
			"core_stream 0x%x: src: %d, %d, %d, %d; dst: %d, %d, %d, %d, colorSpace:%d\n",
			stream,
			stream->src.x,
			stream->src.y,
			stream->src.width,
			stream->src.height,
			stream->dst.x,
			stream->dst.y,
			stream->dst.width,
			stream->dst.height,
			stream->output_color_space);
	dm_logger_write(dm_logger,
			log_type,
			"\tpix_clk_khz: %d, h_total: %d, v_total: %d, pixelencoder:%d, displaycolorDepth:%d\n",
			stream->timing.pix_clk_khz,
			stream->timing.h_total,
			stream->timing.v_total,
			stream->timing.pixel_encoding,
			stream->timing.display_color_depth);
	dm_logger_write(dm_logger,
			log_type,
			"\tsink name: %s, serial: %d\n",
			stream->sink->edid_caps.display_name,
			stream->sink->edid_caps.serial_number);
	dm_logger_write(dm_logger,
			log_type,
			"\tlink: %d\n",
			stream->sink->link->link_index);
}
Commit	Line	Data
	1	/*
	2	* Copyright 2012-15 Advanced Micro Devices, Inc.
	3	*
	4	* Permission is hereby granted, free of charge, to any person obtaining a
	5	* copy of this software and associated documentation files (the "Software"),
	6	* to deal in the Software without restriction, including without limitation
	7	* the rights to use, copy, modify, merge, publish, distribute, sublicense,
	8	* and/or sell copies of the Software, and to permit persons to whom the
	9	* Software is furnished to do so, subject to the following conditions:
	10	*
	11	* The above copyright notice and this permission notice shall be included in
	12	* all copies or substantial portions of the Software.
	13	*
	14	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
	15	* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
	16	* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
	17	* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
	18	* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
	19	* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
	20	* OTHER DEALINGS IN THE SOFTWARE.
	21	*
	22	* Authors: AMD
	23	*
	24	*/
	25
	26	#include "dm_services.h"
	27	#include "dc.h"
	28	#include "core_types.h"
	29	#include "resource.h"
	30	#include "ipp.h"
	31	#include "timing_generator.h"
	32
	33	/*******************************************************************************
	34	* Private functions
	35	******************************************************************************/
	36	#define TMDS_MAX_PIXEL_CLOCK_IN_KHZ_UPMOST 297000
	37	static void update_stream_signal(struct dc_stream_state *stream)
	38	{
	39	if (stream->output_signal == SIGNAL_TYPE_NONE) {
	40	struct dc_sink *dc_sink = stream->sink;
	41
	42	if (dc_sink->sink_signal == SIGNAL_TYPE_NONE)
	43	stream->signal = stream->sink->link->connector_signal;
	44	else
	45	stream->signal = dc_sink->sink_signal;
	46	} else {
	47	stream->signal = stream->output_signal;
	48	}
	49
	50	if (dc_is_dvi_signal(stream->signal)) {
	51	if (stream->timing.pix_clk_khz > TMDS_MAX_PIXEL_CLOCK_IN_KHZ_UPMOST &&
	52	stream->sink->sink_signal != SIGNAL_TYPE_DVI_SINGLE_LINK)
	53	stream->signal = SIGNAL_TYPE_DVI_DUAL_LINK;
	54	else
	55	stream->signal = SIGNAL_TYPE_DVI_SINGLE_LINK;
	56	}
	57	}
	58
	59	static void construct(struct dc_stream_state *stream,
	60	struct dc_sink *dc_sink_data)
	61	{
	62	uint32_t i = 0;
	63
	64	stream->sink = dc_sink_data;
	65	stream->ctx = stream->sink->ctx;
	66
	67	dc_sink_retain(dc_sink_data);
	68
	69	/* Copy audio modes */
	70	/* TODO - Remove this translation */
	71	for (i = 0; i < (dc_sink_data->edid_caps.audio_mode_count); i++)
	72	{
	73	stream->audio_info.modes[i].channel_count = dc_sink_data->edid_caps.audio_modes[i].channel_count;
	74	stream->audio_info.modes[i].format_code = dc_sink_data->edid_caps.audio_modes[i].format_code;
	75	stream->audio_info.modes[i].sample_rates.all = dc_sink_data->edid_caps.audio_modes[i].sample_rate;
	76	stream->audio_info.modes[i].sample_size = dc_sink_data->edid_caps.audio_modes[i].sample_size;
	77	}
	78	stream->audio_info.mode_count = dc_sink_data->edid_caps.audio_mode_count;
	79	stream->audio_info.audio_latency = dc_sink_data->edid_caps.audio_latency;
	80	stream->audio_info.video_latency = dc_sink_data->edid_caps.video_latency;
	81	memmove(
	82	stream->audio_info.display_name,
	83	dc_sink_data->edid_caps.display_name,
	84	AUDIO_INFO_DISPLAY_NAME_SIZE_IN_CHARS);
	85	stream->audio_info.manufacture_id = dc_sink_data->edid_caps.manufacturer_id;
	86	stream->audio_info.product_id = dc_sink_data->edid_caps.product_id;
	87	stream->audio_info.flags.all = dc_sink_data->edid_caps.speaker_flags;
	88
	89	if (dc_sink_data->dc_container_id != NULL) {
	90	struct dc_container_id *dc_container_id = dc_sink_data->dc_container_id;
	91
	92	stream->audio_info.port_id[0] = dc_container_id->portId[0];
	93	stream->audio_info.port_id[1] = dc_container_id->portId[1];
	94	} else {
	95	/* TODO - WindowDM has implemented,
	96	other DMs need Unhardcode port_id */
	97	stream->audio_info.port_id[0] = 0x5558859e;
	98	stream->audio_info.port_id[1] = 0xd989449;
	99	}
	100
	101	/* EDID CAP translation for HDMI 2.0 */
	102	stream->timing.flags.LTE_340MCSC_SCRAMBLE = dc_sink_data->edid_caps.lte_340mcsc_scramble;
	103
	104	stream->status.link = stream->sink->link;
	105
	106	update_stream_signal(stream);
	107	}
	108
	109	static void destruct(struct dc_stream_state *stream)
	110	{
	111	dc_sink_release(stream->sink);
	112	if (stream->out_transfer_func != NULL) {
	113	dc_transfer_func_release(
	114	stream->out_transfer_func);
	115	stream->out_transfer_func = NULL;
	116	}
	117	}
	118
	119	void dc_stream_retain(struct dc_stream_state *stream)
	120	{
	121	kref_get(&stream->refcount);
	122	}
	123
	124	static void dc_stream_free(struct kref *kref)
	125	{
	126	struct dc_stream_state *stream = container_of(kref, struct dc_stream_state, refcount);
	127
	128	destruct(stream);
	129	kfree(stream);
	130	}
	131
	132	void dc_stream_release(struct dc_stream_state *stream)
	133	{
	134	if (stream != NULL) {
	135	kref_put(&stream->refcount, dc_stream_free);
	136	}
	137	}
	138
	139	struct dc_stream_state *dc_create_stream_for_sink(
	140	struct dc_sink *sink)
	141	{
	142	struct dc_stream_state *stream;
	143
	144	if (sink == NULL)
	145	return NULL;
	146
	147	stream = kzalloc(sizeof(struct dc_stream_state), GFP_KERNEL);
	148	if (stream == NULL)
	149	return NULL;
	150
	151	construct(stream, sink);
	152
	153	kref_init(&stream->refcount);
	154
	155	return stream;
	156	}
	157
	158	struct dc_stream_status *dc_stream_get_status(
	159	struct dc_stream_state *stream)
	160	{
	161	uint8_t i;
	162	struct dc *dc = stream->ctx->dc;
	163
	164	for (i = 0; i < dc->current_state->stream_count; i++) {
	165	if (stream == dc->current_state->streams[i])
	166	return &dc->current_state->stream_status[i];
	167	}
	168
	169	return NULL;
	170	}
	171
	172	/**
	173	* Update the cursor attributes and set cursor surface address
	174	*/
	175	bool dc_stream_set_cursor_attributes(
	176	struct dc_stream_state *stream,
	177	const struct dc_cursor_attributes *attributes)
	178	{
	179	int i;
	180	struct dc *core_dc;
	181	struct resource_context *res_ctx;
	182
	183	if (NULL == stream) {
	184	dm_error("DC: dc_stream is NULL!\n");
	185	return false;
	186	}
	187	if (NULL == attributes) {
	188	dm_error("DC: attributes is NULL!\n");
	189	return false;
	190	}
	191
	192	if (attributes->address.quad_part == 0) {
	193	dm_output_to_console("DC: Cursor address is 0!\n");
	194	return false;
	195	}
	196
	197	core_dc = stream->ctx->dc;
	198	res_ctx = &core_dc->current_state->res_ctx;
	199
	200	for (i = 0; i < MAX_PIPES; i++) {
	201	struct pipe_ctx *pipe_ctx = &res_ctx->pipe_ctx[i];
	202
	203	if (pipe_ctx->stream != stream \|\| (!pipe_ctx->plane_res.xfm &&
	204	!pipe_ctx->plane_res.dpp) \|\| !pipe_ctx->plane_res.ipp)
	205	continue;
	206	if (pipe_ctx->top_pipe && pipe_ctx->plane_state != pipe_ctx->top_pipe->plane_state)
	207	continue;
	208
	209
	210	if (pipe_ctx->plane_res.ipp->funcs->ipp_cursor_set_attributes != NULL)
	211	pipe_ctx->plane_res.ipp->funcs->ipp_cursor_set_attributes(
	212	pipe_ctx->plane_res.ipp, attributes);
	213
	214	if (pipe_ctx->plane_res.hubp != NULL &&
	215	pipe_ctx->plane_res.hubp->funcs->set_cursor_attributes != NULL)
	216	pipe_ctx->plane_res.hubp->funcs->set_cursor_attributes(
	217	pipe_ctx->plane_res.hubp, attributes);
	218
	219	if (pipe_ctx->plane_res.mi != NULL &&
	220	pipe_ctx->plane_res.mi->funcs->set_cursor_attributes != NULL)
	221	pipe_ctx->plane_res.mi->funcs->set_cursor_attributes(
	222	pipe_ctx->plane_res.mi, attributes);
	223
	224
	225	if (pipe_ctx->plane_res.xfm != NULL &&
	226	pipe_ctx->plane_res.xfm->funcs->set_cursor_attributes != NULL)
	227	pipe_ctx->plane_res.xfm->funcs->set_cursor_attributes(
	228	pipe_ctx->plane_res.xfm, attributes);
	229
	230	if (pipe_ctx->plane_res.dpp != NULL &&
	231	pipe_ctx->plane_res.dpp->funcs->set_cursor_attributes != NULL)
	232	pipe_ctx->plane_res.dpp->funcs->set_cursor_attributes(
	233	pipe_ctx->plane_res.dpp, attributes);
	234	}
	235
	236	stream->cursor_attributes = *attributes;
	237
	238	return true;
	239	}
	240
	241	bool dc_stream_set_cursor_position(
	242	struct dc_stream_state *stream,
	243	const struct dc_cursor_position *position)
	244	{
	245	int i;
	246	struct dc *core_dc;
	247	struct resource_context *res_ctx;
	248
	249	if (NULL == stream) {
	250	dm_error("DC: dc_stream is NULL!\n");
	251	return false;
	252	}
	253
	254	if (NULL == position) {
	255	dm_error("DC: cursor position is NULL!\n");
	256	return false;
	257	}
	258
	259	core_dc = stream->ctx->dc;
	260	res_ctx = &core_dc->current_state->res_ctx;
	261
	262	for (i = 0; i < MAX_PIPES; i++) {
	263	struct pipe_ctx *pipe_ctx = &res_ctx->pipe_ctx[i];
	264	struct input_pixel_processor *ipp = pipe_ctx->plane_res.ipp;
	265	struct mem_input *mi = pipe_ctx->plane_res.mi;
	266	struct hubp *hubp = pipe_ctx->plane_res.hubp;
	267	struct dpp *dpp = pipe_ctx->plane_res.dpp;
	268	struct dc_cursor_position pos_cpy = *position;
	269	struct dc_cursor_mi_param param = {
	270	.pixel_clk_khz = stream->timing.pix_clk_khz,
	271	.ref_clk_khz = core_dc->res_pool->ref_clock_inKhz,
	272	.viewport_x_start = pipe_ctx->plane_res.scl_data.viewport.x,
	273	.viewport_width = pipe_ctx->plane_res.scl_data.viewport.width,
	274	.h_scale_ratio = pipe_ctx->plane_res.scl_data.ratios.horz
	275	};
	276
	277	if (pipe_ctx->stream != stream \|\|
	278	(!pipe_ctx->plane_res.mi && !pipe_ctx->plane_res.hubp) \|\|
	279	!pipe_ctx->plane_state \|\|
	280	(!pipe_ctx->plane_res.xfm && !pipe_ctx->plane_res.dpp) \|\|
	281	!pipe_ctx->plane_res.ipp)
	282	continue;
	283
	284	if (pipe_ctx->plane_state->address.type
	285	== PLN_ADDR_TYPE_VIDEO_PROGRESSIVE)
	286	pos_cpy.enable = false;
	287
	288	if (pipe_ctx->top_pipe && pipe_ctx->plane_state != pipe_ctx->top_pipe->plane_state)
	289	pos_cpy.enable = false;
	290
	291
	292	if (ipp != NULL && ipp->funcs->ipp_cursor_set_position != NULL)
	293	ipp->funcs->ipp_cursor_set_position(ipp, &pos_cpy, &param);
	294
	295	if (mi != NULL && mi->funcs->set_cursor_position != NULL)
	296	mi->funcs->set_cursor_position(mi, &pos_cpy, &param);
	297
	298	if (!hubp)
	299	continue;
	300
	301	if (hubp->funcs->set_cursor_position != NULL)
	302	hubp->funcs->set_cursor_position(hubp, &pos_cpy, &param);
	303
	304	if (dpp != NULL && dpp->funcs->set_cursor_position != NULL)
	305	dpp->funcs->set_cursor_position(dpp, &pos_cpy, &param, hubp->curs_attr.width);
	306
	307	}
	308
	309	return true;
	310	}
	311
	312	uint32_t dc_stream_get_vblank_counter(const struct dc_stream_state *stream)
	313	{
	314	uint8_t i;
	315	struct dc *core_dc = stream->ctx->dc;
	316	struct resource_context *res_ctx =
	317	&core_dc->current_state->res_ctx;
	318
	319	for (i = 0; i < MAX_PIPES; i++) {
	320	struct timing_generator *tg = res_ctx->pipe_ctx[i].stream_res.tg;
	321
	322	if (res_ctx->pipe_ctx[i].stream != stream)
	323	continue;
	324
	325	return tg->funcs->get_frame_count(tg);
	326	}
	327
	328	return 0;
	329	}
	330
	331	bool dc_stream_get_scanoutpos(const struct dc_stream_state *stream,
	332	uint32_t *v_blank_start,
	333	uint32_t *v_blank_end,
	334	uint32_t *h_position,
	335	uint32_t *v_position)
	336	{
	337	uint8_t i;
	338	bool ret = false;
	339	struct dc *core_dc = stream->ctx->dc;
	340	struct resource_context *res_ctx =
	341	&core_dc->current_state->res_ctx;
	342
	343	for (i = 0; i < MAX_PIPES; i++) {
	344	struct timing_generator *tg = res_ctx->pipe_ctx[i].stream_res.tg;
	345
	346	if (res_ctx->pipe_ctx[i].stream != stream)
	347	continue;
	348
	349	tg->funcs->get_scanoutpos(tg,
	350	v_blank_start,
	351	v_blank_end,
	352	h_position,
	353	v_position);
	354
	355	ret = true;
	356	break;
	357	}
	358
	359	return ret;
	360	}
	361
	362
	363	void dc_stream_log(
	364	const struct dc_stream_state *stream,
	365	struct dal_logger *dm_logger,
	366	enum dc_log_type log_type)
	367	{
	368
	369	dm_logger_write(dm_logger,
	370	log_type,
	371	"core_stream 0x%x: src: %d, %d, %d, %d; dst: %d, %d, %d, %d, colorSpace:%d\n",
	372	stream,
	373	stream->src.x,
	374	stream->src.y,
	375	stream->src.width,
	376	stream->src.height,
	377	stream->dst.x,
	378	stream->dst.y,
	379	stream->dst.width,
	380	stream->dst.height,
	381	stream->output_color_space);
	382	dm_logger_write(dm_logger,
	383	log_type,
	384	"\tpix_clk_khz: %d, h_total: %d, v_total: %d, pixelencoder:%d, displaycolorDepth:%d\n",
	385	stream->timing.pix_clk_khz,
	386	stream->timing.h_total,
	387	stream->timing.v_total,
	388	stream->timing.pixel_encoding,
	389	stream->timing.display_color_depth);
	390	dm_logger_write(dm_logger,
	391	log_type,
	392	"\tsink name: %s, serial: %d\n",
	393	stream->sink->edid_caps.display_name,
	394	stream->sink->edid_caps.serial_number);
	395	dm_logger_write(dm_logger,
	396	log_type,
	397	"\tlink: %d\n",
	398	stream->sink->link->link_index);
	399	}