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1 | /* | |
2 | * pci.h | |
3 | * | |
4 | * PCI defines and function prototypes | |
5 | * Copyright 1994, Drew Eckhardt | |
6 | * Copyright 1997--1999 Martin Mares <mj@ucw.cz> | |
7 | * | |
8 | * For more information, please consult the following manuals (look at | |
9 | * http://www.pcisig.com/ for how to get them): | |
10 | * | |
11 | * PCI BIOS Specification | |
12 | * PCI Local Bus Specification | |
13 | * PCI to PCI Bridge Specification | |
14 | * PCI System Design Guide | |
15 | */ | |
16 | ||
17 | #ifndef LINUX_PCI_H | |
18 | #define LINUX_PCI_H | |
19 | ||
20 | #include <linux/pci_regs.h> /* The pci register defines */ | |
21 | ||
22 | /* | |
23 | * The PCI interface treats multi-function devices as independent | |
24 | * devices. The slot/function address of each device is encoded | |
25 | * in a single byte as follows: | |
26 | * | |
27 | * 7:3 = slot | |
28 | * 2:0 = function | |
29 | */ | |
30 | #define PCI_DEVFN(slot, func) ((((slot) & 0x1f) << 3) | ((func) & 0x07)) | |
31 | #define PCI_SLOT(devfn) (((devfn) >> 3) & 0x1f) | |
32 | #define PCI_FUNC(devfn) ((devfn) & 0x07) | |
33 | ||
34 | /* Ioctls for /proc/bus/pci/X/Y nodes. */ | |
35 | #define PCIIOC_BASE ('P' << 24 | 'C' << 16 | 'I' << 8) | |
36 | #define PCIIOC_CONTROLLER (PCIIOC_BASE | 0x00) /* Get controller for PCI device. */ | |
37 | #define PCIIOC_MMAP_IS_IO (PCIIOC_BASE | 0x01) /* Set mmap state to I/O space. */ | |
38 | #define PCIIOC_MMAP_IS_MEM (PCIIOC_BASE | 0x02) /* Set mmap state to MEM space. */ | |
39 | #define PCIIOC_WRITE_COMBINE (PCIIOC_BASE | 0x03) /* Enable/disable write-combining. */ | |
40 | ||
41 | #ifdef __KERNEL__ | |
42 | ||
43 | #include <linux/mod_devicetable.h> | |
44 | ||
45 | #include <linux/types.h> | |
46 | #include <linux/init.h> | |
47 | #include <linux/ioport.h> | |
48 | #include <linux/list.h> | |
49 | #include <linux/compiler.h> | |
50 | #include <linux/errno.h> | |
51 | #include <linux/kobject.h> | |
52 | #include <asm/atomic.h> | |
53 | #include <linux/device.h> | |
54 | ||
55 | /* Include the ID list */ | |
56 | #include <linux/pci_ids.h> | |
57 | ||
58 | /* pci_slot represents a physical slot */ | |
59 | struct pci_slot { | |
60 | struct pci_bus *bus; /* The bus this slot is on */ | |
61 | struct list_head list; /* node in list of slots on this bus */ | |
62 | struct hotplug_slot *hotplug; /* Hotplug info (migrate over time) */ | |
63 | unsigned char number; /* PCI_SLOT(pci_dev->devfn) */ | |
64 | struct kobject kobj; | |
65 | }; | |
66 | ||
67 | /* File state for mmap()s on /proc/bus/pci/X/Y */ | |
68 | enum pci_mmap_state { | |
69 | pci_mmap_io, | |
70 | pci_mmap_mem | |
71 | }; | |
72 | ||
73 | /* This defines the direction arg to the DMA mapping routines. */ | |
74 | #define PCI_DMA_BIDIRECTIONAL 0 | |
75 | #define PCI_DMA_TODEVICE 1 | |
76 | #define PCI_DMA_FROMDEVICE 2 | |
77 | #define PCI_DMA_NONE 3 | |
78 | ||
79 | #define DEVICE_COUNT_RESOURCE 12 | |
80 | ||
81 | typedef int __bitwise pci_power_t; | |
82 | ||
83 | #define PCI_D0 ((pci_power_t __force) 0) | |
84 | #define PCI_D1 ((pci_power_t __force) 1) | |
85 | #define PCI_D2 ((pci_power_t __force) 2) | |
86 | #define PCI_D3hot ((pci_power_t __force) 3) | |
87 | #define PCI_D3cold ((pci_power_t __force) 4) | |
88 | #define PCI_UNKNOWN ((pci_power_t __force) 5) | |
89 | #define PCI_POWER_ERROR ((pci_power_t __force) -1) | |
90 | ||
91 | /** The pci_channel state describes connectivity between the CPU and | |
92 | * the pci device. If some PCI bus between here and the pci device | |
93 | * has crashed or locked up, this info is reflected here. | |
94 | */ | |
95 | typedef unsigned int __bitwise pci_channel_state_t; | |
96 | ||
97 | enum pci_channel_state { | |
98 | /* I/O channel is in normal state */ | |
99 | pci_channel_io_normal = (__force pci_channel_state_t) 1, | |
100 | ||
101 | /* I/O to channel is blocked */ | |
102 | pci_channel_io_frozen = (__force pci_channel_state_t) 2, | |
103 | ||
104 | /* PCI card is dead */ | |
105 | pci_channel_io_perm_failure = (__force pci_channel_state_t) 3, | |
106 | }; | |
107 | ||
108 | typedef unsigned int __bitwise pcie_reset_state_t; | |
109 | ||
110 | enum pcie_reset_state { | |
111 | /* Reset is NOT asserted (Use to deassert reset) */ | |
112 | pcie_deassert_reset = (__force pcie_reset_state_t) 1, | |
113 | ||
114 | /* Use #PERST to reset PCI-E device */ | |
115 | pcie_warm_reset = (__force pcie_reset_state_t) 2, | |
116 | ||
117 | /* Use PCI-E Hot Reset to reset device */ | |
118 | pcie_hot_reset = (__force pcie_reset_state_t) 3 | |
119 | }; | |
120 | ||
121 | typedef unsigned short __bitwise pci_dev_flags_t; | |
122 | enum pci_dev_flags { | |
123 | /* INTX_DISABLE in PCI_COMMAND register disables MSI | |
124 | * generation too. | |
125 | */ | |
126 | PCI_DEV_FLAGS_MSI_INTX_DISABLE_BUG = (__force pci_dev_flags_t) 1, | |
127 | }; | |
128 | ||
129 | typedef unsigned short __bitwise pci_bus_flags_t; | |
130 | enum pci_bus_flags { | |
131 | PCI_BUS_FLAGS_NO_MSI = (__force pci_bus_flags_t) 1, | |
132 | PCI_BUS_FLAGS_NO_MMRBC = (__force pci_bus_flags_t) 2, | |
133 | }; | |
134 | ||
135 | struct pci_cap_saved_state { | |
136 | struct hlist_node next; | |
137 | char cap_nr; | |
138 | u32 data[0]; | |
139 | }; | |
140 | ||
141 | struct pcie_link_state; | |
142 | struct pci_vpd; | |
143 | ||
144 | /* | |
145 | * The pci_dev structure is used to describe PCI devices. | |
146 | */ | |
147 | struct pci_dev { | |
148 | struct list_head bus_list; /* node in per-bus list */ | |
149 | struct pci_bus *bus; /* bus this device is on */ | |
150 | struct pci_bus *subordinate; /* bus this device bridges to */ | |
151 | ||
152 | void *sysdata; /* hook for sys-specific extension */ | |
153 | struct proc_dir_entry *procent; /* device entry in /proc/bus/pci */ | |
154 | struct pci_slot *slot; /* Physical slot this device is in */ | |
155 | ||
156 | unsigned int devfn; /* encoded device & function index */ | |
157 | unsigned short vendor; | |
158 | unsigned short device; | |
159 | unsigned short subsystem_vendor; | |
160 | unsigned short subsystem_device; | |
161 | unsigned int class; /* 3 bytes: (base,sub,prog-if) */ | |
162 | u8 revision; /* PCI revision, low byte of class word */ | |
163 | u8 hdr_type; /* PCI header type (`multi' flag masked out) */ | |
164 | u8 pcie_type; /* PCI-E device/port type */ | |
165 | u8 rom_base_reg; /* which config register controls the ROM */ | |
166 | u8 pin; /* which interrupt pin this device uses */ | |
167 | ||
168 | struct pci_driver *driver; /* which driver has allocated this device */ | |
169 | u64 dma_mask; /* Mask of the bits of bus address this | |
170 | device implements. Normally this is | |
171 | 0xffffffff. You only need to change | |
172 | this if your device has broken DMA | |
173 | or supports 64-bit transfers. */ | |
174 | ||
175 | struct device_dma_parameters dma_parms; | |
176 | ||
177 | pci_power_t current_state; /* Current operating state. In ACPI-speak, | |
178 | this is D0-D3, D0 being fully functional, | |
179 | and D3 being off. */ | |
180 | ||
181 | #ifdef CONFIG_PCIEASPM | |
182 | struct pcie_link_state *link_state; /* ASPM link state. */ | |
183 | #endif | |
184 | ||
185 | pci_channel_state_t error_state; /* current connectivity state */ | |
186 | struct device dev; /* Generic device interface */ | |
187 | ||
188 | int cfg_size; /* Size of configuration space */ | |
189 | ||
190 | /* | |
191 | * Instead of touching interrupt line and base address registers | |
192 | * directly, use the values stored here. They might be different! | |
193 | */ | |
194 | unsigned int irq; | |
195 | struct resource resource[DEVICE_COUNT_RESOURCE]; /* I/O and memory regions + expansion ROMs */ | |
196 | ||
197 | /* These fields are used by common fixups */ | |
198 | unsigned int transparent:1; /* Transparent PCI bridge */ | |
199 | unsigned int multifunction:1;/* Part of multi-function device */ | |
200 | /* keep track of device state */ | |
201 | unsigned int is_added:1; | |
202 | unsigned int is_busmaster:1; /* device is busmaster */ | |
203 | unsigned int no_msi:1; /* device may not use msi */ | |
204 | unsigned int no_d1d2:1; /* only allow d0 or d3 */ | |
205 | unsigned int block_ucfg_access:1; /* userspace config space access is blocked */ | |
206 | unsigned int broken_parity_status:1; /* Device generates false positive parity */ | |
207 | unsigned int msi_enabled:1; | |
208 | unsigned int msix_enabled:1; | |
209 | unsigned int is_managed:1; | |
210 | unsigned int is_pcie:1; | |
211 | pci_dev_flags_t dev_flags; | |
212 | atomic_t enable_cnt; /* pci_enable_device has been called */ | |
213 | ||
214 | u32 saved_config_space[16]; /* config space saved at suspend time */ | |
215 | struct hlist_head saved_cap_space; | |
216 | struct bin_attribute *rom_attr; /* attribute descriptor for sysfs ROM entry */ | |
217 | int rom_attr_enabled; /* has display of the rom attribute been enabled? */ | |
218 | struct bin_attribute *res_attr[DEVICE_COUNT_RESOURCE]; /* sysfs file for resources */ | |
219 | #ifdef CONFIG_PCI_MSI | |
220 | struct list_head msi_list; | |
221 | #endif | |
222 | struct pci_vpd *vpd; | |
223 | }; | |
224 | ||
225 | extern struct pci_dev *alloc_pci_dev(void); | |
226 | ||
227 | #define pci_dev_b(n) list_entry(n, struct pci_dev, bus_list) | |
228 | #define to_pci_dev(n) container_of(n, struct pci_dev, dev) | |
229 | #define for_each_pci_dev(d) while ((d = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, d)) != NULL) | |
230 | ||
231 | static inline int pci_channel_offline(struct pci_dev *pdev) | |
232 | { | |
233 | return (pdev->error_state != pci_channel_io_normal); | |
234 | } | |
235 | ||
236 | static inline struct pci_cap_saved_state *pci_find_saved_cap( | |
237 | struct pci_dev *pci_dev, char cap) | |
238 | { | |
239 | struct pci_cap_saved_state *tmp; | |
240 | struct hlist_node *pos; | |
241 | ||
242 | hlist_for_each_entry(tmp, pos, &pci_dev->saved_cap_space, next) { | |
243 | if (tmp->cap_nr == cap) | |
244 | return tmp; | |
245 | } | |
246 | return NULL; | |
247 | } | |
248 | ||
249 | static inline void pci_add_saved_cap(struct pci_dev *pci_dev, | |
250 | struct pci_cap_saved_state *new_cap) | |
251 | { | |
252 | hlist_add_head(&new_cap->next, &pci_dev->saved_cap_space); | |
253 | } | |
254 | ||
255 | /* | |
256 | * For PCI devices, the region numbers are assigned this way: | |
257 | * | |
258 | * 0-5 standard PCI regions | |
259 | * 6 expansion ROM | |
260 | * 7-10 bridges: address space assigned to buses behind the bridge | |
261 | */ | |
262 | ||
263 | #define PCI_ROM_RESOURCE 6 | |
264 | #define PCI_BRIDGE_RESOURCES 7 | |
265 | #define PCI_NUM_RESOURCES 11 | |
266 | ||
267 | #ifndef PCI_BUS_NUM_RESOURCES | |
268 | #define PCI_BUS_NUM_RESOURCES 16 | |
269 | #endif | |
270 | ||
271 | #define PCI_REGION_FLAG_MASK 0x0fU /* These bits of resource flags tell us the PCI region flags */ | |
272 | ||
273 | struct pci_bus { | |
274 | struct list_head node; /* node in list of buses */ | |
275 | struct pci_bus *parent; /* parent bus this bridge is on */ | |
276 | struct list_head children; /* list of child buses */ | |
277 | struct list_head devices; /* list of devices on this bus */ | |
278 | struct pci_dev *self; /* bridge device as seen by parent */ | |
279 | struct list_head slots; /* list of slots on this bus */ | |
280 | struct resource *resource[PCI_BUS_NUM_RESOURCES]; | |
281 | /* address space routed to this bus */ | |
282 | ||
283 | struct pci_ops *ops; /* configuration access functions */ | |
284 | void *sysdata; /* hook for sys-specific extension */ | |
285 | struct proc_dir_entry *procdir; /* directory entry in /proc/bus/pci */ | |
286 | ||
287 | unsigned char number; /* bus number */ | |
288 | unsigned char primary; /* number of primary bridge */ | |
289 | unsigned char secondary; /* number of secondary bridge */ | |
290 | unsigned char subordinate; /* max number of subordinate buses */ | |
291 | ||
292 | char name[48]; | |
293 | ||
294 | unsigned short bridge_ctl; /* manage NO_ISA/FBB/et al behaviors */ | |
295 | pci_bus_flags_t bus_flags; /* Inherited by child busses */ | |
296 | struct device *bridge; | |
297 | struct device dev; | |
298 | struct bin_attribute *legacy_io; /* legacy I/O for this bus */ | |
299 | struct bin_attribute *legacy_mem; /* legacy mem */ | |
300 | unsigned int is_added:1; | |
301 | }; | |
302 | ||
303 | #define pci_bus_b(n) list_entry(n, struct pci_bus, node) | |
304 | #define to_pci_bus(n) container_of(n, struct pci_bus, dev) | |
305 | ||
306 | /* | |
307 | * Error values that may be returned by PCI functions. | |
308 | */ | |
309 | #define PCIBIOS_SUCCESSFUL 0x00 | |
310 | #define PCIBIOS_FUNC_NOT_SUPPORTED 0x81 | |
311 | #define PCIBIOS_BAD_VENDOR_ID 0x83 | |
312 | #define PCIBIOS_DEVICE_NOT_FOUND 0x86 | |
313 | #define PCIBIOS_BAD_REGISTER_NUMBER 0x87 | |
314 | #define PCIBIOS_SET_FAILED 0x88 | |
315 | #define PCIBIOS_BUFFER_TOO_SMALL 0x89 | |
316 | ||
317 | /* Low-level architecture-dependent routines */ | |
318 | ||
319 | struct pci_ops { | |
320 | int (*read)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val); | |
321 | int (*write)(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val); | |
322 | }; | |
323 | ||
324 | /* | |
325 | * ACPI needs to be able to access PCI config space before we've done a | |
326 | * PCI bus scan and created pci_bus structures. | |
327 | */ | |
328 | extern int raw_pci_read(unsigned int domain, unsigned int bus, | |
329 | unsigned int devfn, int reg, int len, u32 *val); | |
330 | extern int raw_pci_write(unsigned int domain, unsigned int bus, | |
331 | unsigned int devfn, int reg, int len, u32 val); | |
332 | ||
333 | struct pci_bus_region { | |
334 | resource_size_t start; | |
335 | resource_size_t end; | |
336 | }; | |
337 | ||
338 | struct pci_dynids { | |
339 | spinlock_t lock; /* protects list, index */ | |
340 | struct list_head list; /* for IDs added at runtime */ | |
341 | unsigned int use_driver_data:1; /* pci_device_id->driver_data is used */ | |
342 | }; | |
343 | ||
344 | /* ---------------------------------------------------------------- */ | |
345 | /** PCI Error Recovery System (PCI-ERS). If a PCI device driver provides | |
346 | * a set of callbacks in struct pci_error_handlers, then that device driver | |
347 | * will be notified of PCI bus errors, and will be driven to recovery | |
348 | * when an error occurs. | |
349 | */ | |
350 | ||
351 | typedef unsigned int __bitwise pci_ers_result_t; | |
352 | ||
353 | enum pci_ers_result { | |
354 | /* no result/none/not supported in device driver */ | |
355 | PCI_ERS_RESULT_NONE = (__force pci_ers_result_t) 1, | |
356 | ||
357 | /* Device driver can recover without slot reset */ | |
358 | PCI_ERS_RESULT_CAN_RECOVER = (__force pci_ers_result_t) 2, | |
359 | ||
360 | /* Device driver wants slot to be reset. */ | |
361 | PCI_ERS_RESULT_NEED_RESET = (__force pci_ers_result_t) 3, | |
362 | ||
363 | /* Device has completely failed, is unrecoverable */ | |
364 | PCI_ERS_RESULT_DISCONNECT = (__force pci_ers_result_t) 4, | |
365 | ||
366 | /* Device driver is fully recovered and operational */ | |
367 | PCI_ERS_RESULT_RECOVERED = (__force pci_ers_result_t) 5, | |
368 | }; | |
369 | ||
370 | /* PCI bus error event callbacks */ | |
371 | struct pci_error_handlers { | |
372 | /* PCI bus error detected on this device */ | |
373 | pci_ers_result_t (*error_detected)(struct pci_dev *dev, | |
374 | enum pci_channel_state error); | |
375 | ||
376 | /* MMIO has been re-enabled, but not DMA */ | |
377 | pci_ers_result_t (*mmio_enabled)(struct pci_dev *dev); | |
378 | ||
379 | /* PCI Express link has been reset */ | |
380 | pci_ers_result_t (*link_reset)(struct pci_dev *dev); | |
381 | ||
382 | /* PCI slot has been reset */ | |
383 | pci_ers_result_t (*slot_reset)(struct pci_dev *dev); | |
384 | ||
385 | /* Device driver may resume normal operations */ | |
386 | void (*resume)(struct pci_dev *dev); | |
387 | }; | |
388 | ||
389 | /* ---------------------------------------------------------------- */ | |
390 | ||
391 | struct module; | |
392 | struct pci_driver { | |
393 | struct list_head node; | |
394 | char *name; | |
395 | const struct pci_device_id *id_table; /* must be non-NULL for probe to be called */ | |
396 | int (*probe) (struct pci_dev *dev, const struct pci_device_id *id); /* New device inserted */ | |
397 | void (*remove) (struct pci_dev *dev); /* Device removed (NULL if not a hot-plug capable driver) */ | |
398 | int (*suspend) (struct pci_dev *dev, pm_message_t state); /* Device suspended */ | |
399 | int (*suspend_late) (struct pci_dev *dev, pm_message_t state); | |
400 | int (*resume_early) (struct pci_dev *dev); | |
401 | int (*resume) (struct pci_dev *dev); /* Device woken up */ | |
402 | void (*shutdown) (struct pci_dev *dev); | |
403 | struct pm_ext_ops *pm; | |
404 | struct pci_error_handlers *err_handler; | |
405 | struct device_driver driver; | |
406 | struct pci_dynids dynids; | |
407 | }; | |
408 | ||
409 | #define to_pci_driver(drv) container_of(drv, struct pci_driver, driver) | |
410 | ||
411 | /** | |
412 | * DEFINE_PCI_DEVICE_TABLE - macro used to describe a pci device table | |
413 | * @_table: device table name | |
414 | * | |
415 | * This macro is used to create a struct pci_device_id array (a device table) | |
416 | * in a generic manner. | |
417 | */ | |
418 | #define DEFINE_PCI_DEVICE_TABLE(_table) \ | |
419 | const struct pci_device_id _table[] __devinitconst | |
420 | ||
421 | /** | |
422 | * PCI_DEVICE - macro used to describe a specific pci device | |
423 | * @vend: the 16 bit PCI Vendor ID | |
424 | * @dev: the 16 bit PCI Device ID | |
425 | * | |
426 | * This macro is used to create a struct pci_device_id that matches a | |
427 | * specific device. The subvendor and subdevice fields will be set to | |
428 | * PCI_ANY_ID. | |
429 | */ | |
430 | #define PCI_DEVICE(vend,dev) \ | |
431 | .vendor = (vend), .device = (dev), \ | |
432 | .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID | |
433 | ||
434 | /** | |
435 | * PCI_DEVICE_CLASS - macro used to describe a specific pci device class | |
436 | * @dev_class: the class, subclass, prog-if triple for this device | |
437 | * @dev_class_mask: the class mask for this device | |
438 | * | |
439 | * This macro is used to create a struct pci_device_id that matches a | |
440 | * specific PCI class. The vendor, device, subvendor, and subdevice | |
441 | * fields will be set to PCI_ANY_ID. | |
442 | */ | |
443 | #define PCI_DEVICE_CLASS(dev_class,dev_class_mask) \ | |
444 | .class = (dev_class), .class_mask = (dev_class_mask), \ | |
445 | .vendor = PCI_ANY_ID, .device = PCI_ANY_ID, \ | |
446 | .subvendor = PCI_ANY_ID, .subdevice = PCI_ANY_ID | |
447 | ||
448 | /** | |
449 | * PCI_VDEVICE - macro used to describe a specific pci device in short form | |
450 | * @vend: the vendor name | |
451 | * @dev: the 16 bit PCI Device ID | |
452 | * | |
453 | * This macro is used to create a struct pci_device_id that matches a | |
454 | * specific PCI device. The subvendor, and subdevice fields will be set | |
455 | * to PCI_ANY_ID. The macro allows the next field to follow as the device | |
456 | * private data. | |
457 | */ | |
458 | ||
459 | #define PCI_VDEVICE(vendor, device) \ | |
460 | PCI_VENDOR_ID_##vendor, (device), \ | |
461 | PCI_ANY_ID, PCI_ANY_ID, 0, 0 | |
462 | ||
463 | /* these external functions are only available when PCI support is enabled */ | |
464 | #ifdef CONFIG_PCI | |
465 | ||
466 | extern struct bus_type pci_bus_type; | |
467 | ||
468 | /* Do NOT directly access these two variables, unless you are arch specific pci | |
469 | * code, or pci core code. */ | |
470 | extern struct list_head pci_root_buses; /* list of all known PCI buses */ | |
471 | /* Some device drivers need know if pci is initiated */ | |
472 | extern int no_pci_devices(void); | |
473 | ||
474 | void pcibios_fixup_bus(struct pci_bus *); | |
475 | int __must_check pcibios_enable_device(struct pci_dev *, int mask); | |
476 | char *pcibios_setup(char *str); | |
477 | ||
478 | /* Used only when drivers/pci/setup.c is used */ | |
479 | void pcibios_align_resource(void *, struct resource *, resource_size_t, | |
480 | resource_size_t); | |
481 | void pcibios_update_irq(struct pci_dev *, int irq); | |
482 | ||
483 | /* Generic PCI functions used internally */ | |
484 | ||
485 | extern struct pci_bus *pci_find_bus(int domain, int busnr); | |
486 | void pci_bus_add_devices(struct pci_bus *bus); | |
487 | struct pci_bus *pci_scan_bus_parented(struct device *parent, int bus, | |
488 | struct pci_ops *ops, void *sysdata); | |
489 | static inline struct pci_bus * __devinit pci_scan_bus(int bus, struct pci_ops *ops, | |
490 | void *sysdata) | |
491 | { | |
492 | struct pci_bus *root_bus; | |
493 | root_bus = pci_scan_bus_parented(NULL, bus, ops, sysdata); | |
494 | if (root_bus) | |
495 | pci_bus_add_devices(root_bus); | |
496 | return root_bus; | |
497 | } | |
498 | struct pci_bus *pci_create_bus(struct device *parent, int bus, | |
499 | struct pci_ops *ops, void *sysdata); | |
500 | struct pci_bus *pci_add_new_bus(struct pci_bus *parent, struct pci_dev *dev, | |
501 | int busnr); | |
502 | struct pci_slot *pci_create_slot(struct pci_bus *parent, int slot_nr, | |
503 | const char *name); | |
504 | void pci_destroy_slot(struct pci_slot *slot); | |
505 | void pci_update_slot_number(struct pci_slot *slot, int slot_nr); | |
506 | int pci_scan_slot(struct pci_bus *bus, int devfn); | |
507 | struct pci_dev *pci_scan_single_device(struct pci_bus *bus, int devfn); | |
508 | void pci_device_add(struct pci_dev *dev, struct pci_bus *bus); | |
509 | unsigned int pci_scan_child_bus(struct pci_bus *bus); | |
510 | int __must_check pci_bus_add_device(struct pci_dev *dev); | |
511 | void pci_read_bridge_bases(struct pci_bus *child); | |
512 | struct resource *pci_find_parent_resource(const struct pci_dev *dev, | |
513 | struct resource *res); | |
514 | int pci_get_interrupt_pin(struct pci_dev *dev, struct pci_dev **bridge); | |
515 | extern struct pci_dev *pci_dev_get(struct pci_dev *dev); | |
516 | extern void pci_dev_put(struct pci_dev *dev); | |
517 | extern void pci_remove_bus(struct pci_bus *b); | |
518 | extern void pci_remove_bus_device(struct pci_dev *dev); | |
519 | extern void pci_stop_bus_device(struct pci_dev *dev); | |
520 | void pci_setup_cardbus(struct pci_bus *bus); | |
521 | extern void pci_sort_breadthfirst(void); | |
522 | ||
523 | /* Generic PCI functions exported to card drivers */ | |
524 | ||
525 | #ifdef CONFIG_PCI_LEGACY | |
526 | struct pci_dev __deprecated *pci_find_device(unsigned int vendor, | |
527 | unsigned int device, | |
528 | const struct pci_dev *from); | |
529 | struct pci_dev __deprecated *pci_find_slot(unsigned int bus, | |
530 | unsigned int devfn); | |
531 | #endif /* CONFIG_PCI_LEGACY */ | |
532 | ||
533 | int pci_find_capability(struct pci_dev *dev, int cap); | |
534 | int pci_find_next_capability(struct pci_dev *dev, u8 pos, int cap); | |
535 | int pci_find_ext_capability(struct pci_dev *dev, int cap); | |
536 | int pci_find_ht_capability(struct pci_dev *dev, int ht_cap); | |
537 | int pci_find_next_ht_capability(struct pci_dev *dev, int pos, int ht_cap); | |
538 | struct pci_bus *pci_find_next_bus(const struct pci_bus *from); | |
539 | ||
540 | struct pci_dev *pci_get_device(unsigned int vendor, unsigned int device, | |
541 | struct pci_dev *from); | |
542 | struct pci_dev *pci_get_subsys(unsigned int vendor, unsigned int device, | |
543 | unsigned int ss_vendor, unsigned int ss_device, | |
544 | const struct pci_dev *from); | |
545 | struct pci_dev *pci_get_slot(struct pci_bus *bus, unsigned int devfn); | |
546 | struct pci_dev *pci_get_bus_and_slot(unsigned int bus, unsigned int devfn); | |
547 | struct pci_dev *pci_get_class(unsigned int class, struct pci_dev *from); | |
548 | int pci_dev_present(const struct pci_device_id *ids); | |
549 | ||
550 | int pci_bus_read_config_byte(struct pci_bus *bus, unsigned int devfn, | |
551 | int where, u8 *val); | |
552 | int pci_bus_read_config_word(struct pci_bus *bus, unsigned int devfn, | |
553 | int where, u16 *val); | |
554 | int pci_bus_read_config_dword(struct pci_bus *bus, unsigned int devfn, | |
555 | int where, u32 *val); | |
556 | int pci_bus_write_config_byte(struct pci_bus *bus, unsigned int devfn, | |
557 | int where, u8 val); | |
558 | int pci_bus_write_config_word(struct pci_bus *bus, unsigned int devfn, | |
559 | int where, u16 val); | |
560 | int pci_bus_write_config_dword(struct pci_bus *bus, unsigned int devfn, | |
561 | int where, u32 val); | |
562 | ||
563 | static inline int pci_read_config_byte(struct pci_dev *dev, int where, u8 *val) | |
564 | { | |
565 | return pci_bus_read_config_byte(dev->bus, dev->devfn, where, val); | |
566 | } | |
567 | static inline int pci_read_config_word(struct pci_dev *dev, int where, u16 *val) | |
568 | { | |
569 | return pci_bus_read_config_word(dev->bus, dev->devfn, where, val); | |
570 | } | |
571 | static inline int pci_read_config_dword(struct pci_dev *dev, int where, | |
572 | u32 *val) | |
573 | { | |
574 | return pci_bus_read_config_dword(dev->bus, dev->devfn, where, val); | |
575 | } | |
576 | static inline int pci_write_config_byte(struct pci_dev *dev, int where, u8 val) | |
577 | { | |
578 | return pci_bus_write_config_byte(dev->bus, dev->devfn, where, val); | |
579 | } | |
580 | static inline int pci_write_config_word(struct pci_dev *dev, int where, u16 val) | |
581 | { | |
582 | return pci_bus_write_config_word(dev->bus, dev->devfn, where, val); | |
583 | } | |
584 | static inline int pci_write_config_dword(struct pci_dev *dev, int where, | |
585 | u32 val) | |
586 | { | |
587 | return pci_bus_write_config_dword(dev->bus, dev->devfn, where, val); | |
588 | } | |
589 | ||
590 | int __must_check pci_enable_device(struct pci_dev *dev); | |
591 | int __must_check pci_enable_device_io(struct pci_dev *dev); | |
592 | int __must_check pci_enable_device_mem(struct pci_dev *dev); | |
593 | int __must_check pci_reenable_device(struct pci_dev *); | |
594 | int __must_check pcim_enable_device(struct pci_dev *pdev); | |
595 | void pcim_pin_device(struct pci_dev *pdev); | |
596 | ||
597 | static inline int pci_is_managed(struct pci_dev *pdev) | |
598 | { | |
599 | return pdev->is_managed; | |
600 | } | |
601 | ||
602 | void pci_disable_device(struct pci_dev *dev); | |
603 | void pci_set_master(struct pci_dev *dev); | |
604 | int pci_set_pcie_reset_state(struct pci_dev *dev, enum pcie_reset_state state); | |
605 | #define HAVE_PCI_SET_MWI | |
606 | int __must_check pci_set_mwi(struct pci_dev *dev); | |
607 | int pci_try_set_mwi(struct pci_dev *dev); | |
608 | void pci_clear_mwi(struct pci_dev *dev); | |
609 | void pci_intx(struct pci_dev *dev, int enable); | |
610 | void pci_msi_off(struct pci_dev *dev); | |
611 | int pci_set_dma_mask(struct pci_dev *dev, u64 mask); | |
612 | int pci_set_consistent_dma_mask(struct pci_dev *dev, u64 mask); | |
613 | int pci_set_dma_max_seg_size(struct pci_dev *dev, unsigned int size); | |
614 | int pci_set_dma_seg_boundary(struct pci_dev *dev, unsigned long mask); | |
615 | int pcix_get_max_mmrbc(struct pci_dev *dev); | |
616 | int pcix_get_mmrbc(struct pci_dev *dev); | |
617 | int pcix_set_mmrbc(struct pci_dev *dev, int mmrbc); | |
618 | int pcie_get_readrq(struct pci_dev *dev); | |
619 | int pcie_set_readrq(struct pci_dev *dev, int rq); | |
620 | void pci_update_resource(struct pci_dev *dev, struct resource *res, int resno); | |
621 | int __must_check pci_assign_resource(struct pci_dev *dev, int i); | |
622 | int pci_select_bars(struct pci_dev *dev, unsigned long flags); | |
623 | ||
624 | /* ROM control related routines */ | |
625 | void __iomem __must_check *pci_map_rom(struct pci_dev *pdev, size_t *size); | |
626 | void pci_unmap_rom(struct pci_dev *pdev, void __iomem *rom); | |
627 | size_t pci_get_rom_size(void __iomem *rom, size_t size); | |
628 | ||
629 | /* Power management related routines */ | |
630 | int pci_save_state(struct pci_dev *dev); | |
631 | int pci_restore_state(struct pci_dev *dev); | |
632 | int pci_set_power_state(struct pci_dev *dev, pci_power_t state); | |
633 | pci_power_t pci_choose_state(struct pci_dev *dev, pm_message_t state); | |
634 | int pci_enable_wake(struct pci_dev *dev, pci_power_t state, int enable); | |
635 | ||
636 | /* Functions for PCI Hotplug drivers to use */ | |
637 | int pci_bus_find_capability(struct pci_bus *bus, unsigned int devfn, int cap); | |
638 | ||
639 | /* Helper functions for low-level code (drivers/pci/setup-[bus,res].c) */ | |
640 | void pci_bus_assign_resources(struct pci_bus *bus); | |
641 | void pci_bus_size_bridges(struct pci_bus *bus); | |
642 | int pci_claim_resource(struct pci_dev *, int); | |
643 | void pci_assign_unassigned_resources(void); | |
644 | void pdev_enable_device(struct pci_dev *); | |
645 | void pdev_sort_resources(struct pci_dev *, struct resource_list *); | |
646 | int pci_enable_resources(struct pci_dev *, int mask); | |
647 | void pci_fixup_irqs(u8 (*)(struct pci_dev *, u8 *), | |
648 | int (*)(struct pci_dev *, u8, u8)); | |
649 | #define HAVE_PCI_REQ_REGIONS 2 | |
650 | int __must_check pci_request_regions(struct pci_dev *, const char *); | |
651 | void pci_release_regions(struct pci_dev *); | |
652 | int __must_check pci_request_region(struct pci_dev *, int, const char *); | |
653 | void pci_release_region(struct pci_dev *, int); | |
654 | int pci_request_selected_regions(struct pci_dev *, int, const char *); | |
655 | void pci_release_selected_regions(struct pci_dev *, int); | |
656 | ||
657 | /* drivers/pci/bus.c */ | |
658 | int __must_check pci_bus_alloc_resource(struct pci_bus *bus, | |
659 | struct resource *res, resource_size_t size, | |
660 | resource_size_t align, resource_size_t min, | |
661 | unsigned int type_mask, | |
662 | void (*alignf)(void *, struct resource *, | |
663 | resource_size_t, resource_size_t), | |
664 | void *alignf_data); | |
665 | void pci_enable_bridges(struct pci_bus *bus); | |
666 | ||
667 | /* Proper probing supporting hot-pluggable devices */ | |
668 | int __must_check __pci_register_driver(struct pci_driver *, struct module *, | |
669 | const char *mod_name); | |
670 | static inline int __must_check pci_register_driver(struct pci_driver *driver) | |
671 | { | |
672 | return __pci_register_driver(driver, THIS_MODULE, KBUILD_MODNAME); | |
673 | } | |
674 | ||
675 | void pci_unregister_driver(struct pci_driver *dev); | |
676 | void pci_remove_behind_bridge(struct pci_dev *dev); | |
677 | struct pci_driver *pci_dev_driver(const struct pci_dev *dev); | |
678 | const struct pci_device_id *pci_match_id(const struct pci_device_id *ids, | |
679 | struct pci_dev *dev); | |
680 | int pci_scan_bridge(struct pci_bus *bus, struct pci_dev *dev, int max, | |
681 | int pass); | |
682 | ||
683 | void pci_walk_bus(struct pci_bus *top, void (*cb)(struct pci_dev *, void *), | |
684 | void *userdata); | |
685 | int pci_cfg_space_size_ext(struct pci_dev *dev); | |
686 | int pci_cfg_space_size(struct pci_dev *dev); | |
687 | unsigned char pci_bus_max_busnr(struct pci_bus *bus); | |
688 | ||
689 | /* kmem_cache style wrapper around pci_alloc_consistent() */ | |
690 | ||
691 | #include <linux/dmapool.h> | |
692 | ||
693 | #define pci_pool dma_pool | |
694 | #define pci_pool_create(name, pdev, size, align, allocation) \ | |
695 | dma_pool_create(name, &pdev->dev, size, align, allocation) | |
696 | #define pci_pool_destroy(pool) dma_pool_destroy(pool) | |
697 | #define pci_pool_alloc(pool, flags, handle) dma_pool_alloc(pool, flags, handle) | |
698 | #define pci_pool_free(pool, vaddr, addr) dma_pool_free(pool, vaddr, addr) | |
699 | ||
700 | enum pci_dma_burst_strategy { | |
701 | PCI_DMA_BURST_INFINITY, /* make bursts as large as possible, | |
702 | strategy_parameter is N/A */ | |
703 | PCI_DMA_BURST_BOUNDARY, /* disconnect at every strategy_parameter | |
704 | byte boundaries */ | |
705 | PCI_DMA_BURST_MULTIPLE, /* disconnect at some multiple of | |
706 | strategy_parameter byte boundaries */ | |
707 | }; | |
708 | ||
709 | struct msix_entry { | |
710 | u16 vector; /* kernel uses to write allocated vector */ | |
711 | u16 entry; /* driver uses to specify entry, OS writes */ | |
712 | }; | |
713 | ||
714 | ||
715 | #ifndef CONFIG_PCI_MSI | |
716 | static inline int pci_enable_msi(struct pci_dev *dev) | |
717 | { | |
718 | return -1; | |
719 | } | |
720 | ||
721 | static inline void pci_msi_shutdown(struct pci_dev *dev) | |
722 | { } | |
723 | static inline void pci_disable_msi(struct pci_dev *dev) | |
724 | { } | |
725 | ||
726 | static inline int pci_enable_msix(struct pci_dev *dev, | |
727 | struct msix_entry *entries, int nvec) | |
728 | { | |
729 | return -1; | |
730 | } | |
731 | ||
732 | static inline void pci_msix_shutdown(struct pci_dev *dev) | |
733 | { } | |
734 | static inline void pci_disable_msix(struct pci_dev *dev) | |
735 | { } | |
736 | ||
737 | static inline void msi_remove_pci_irq_vectors(struct pci_dev *dev) | |
738 | { } | |
739 | ||
740 | static inline void pci_restore_msi_state(struct pci_dev *dev) | |
741 | { } | |
742 | #else | |
743 | extern int pci_enable_msi(struct pci_dev *dev); | |
744 | extern void pci_msi_shutdown(struct pci_dev *dev); | |
745 | extern void pci_disable_msi(struct pci_dev *dev); | |
746 | extern int pci_enable_msix(struct pci_dev *dev, | |
747 | struct msix_entry *entries, int nvec); | |
748 | extern void pci_msix_shutdown(struct pci_dev *dev); | |
749 | extern void pci_disable_msix(struct pci_dev *dev); | |
750 | extern void msi_remove_pci_irq_vectors(struct pci_dev *dev); | |
751 | extern void pci_restore_msi_state(struct pci_dev *dev); | |
752 | #endif | |
753 | ||
754 | #ifdef CONFIG_HT_IRQ | |
755 | /* The functions a driver should call */ | |
756 | int ht_create_irq(struct pci_dev *dev, int idx); | |
757 | void ht_destroy_irq(unsigned int irq); | |
758 | #endif /* CONFIG_HT_IRQ */ | |
759 | ||
760 | extern void pci_block_user_cfg_access(struct pci_dev *dev); | |
761 | extern void pci_unblock_user_cfg_access(struct pci_dev *dev); | |
762 | ||
763 | /* | |
764 | * PCI domain support. Sometimes called PCI segment (eg by ACPI), | |
765 | * a PCI domain is defined to be a set of PCI busses which share | |
766 | * configuration space. | |
767 | */ | |
768 | #ifdef CONFIG_PCI_DOMAINS | |
769 | extern int pci_domains_supported; | |
770 | #else | |
771 | enum { pci_domains_supported = 0 }; | |
772 | static inline int pci_domain_nr(struct pci_bus *bus) | |
773 | { | |
774 | return 0; | |
775 | } | |
776 | ||
777 | static inline int pci_proc_domain(struct pci_bus *bus) | |
778 | { | |
779 | return 0; | |
780 | } | |
781 | #endif /* CONFIG_PCI_DOMAINS */ | |
782 | ||
783 | #else /* CONFIG_PCI is not enabled */ | |
784 | ||
785 | /* | |
786 | * If the system does not have PCI, clearly these return errors. Define | |
787 | * these as simple inline functions to avoid hair in drivers. | |
788 | */ | |
789 | ||
790 | #define _PCI_NOP(o, s, t) \ | |
791 | static inline int pci_##o##_config_##s(struct pci_dev *dev, \ | |
792 | int where, t val) \ | |
793 | { return PCIBIOS_FUNC_NOT_SUPPORTED; } | |
794 | ||
795 | #define _PCI_NOP_ALL(o, x) _PCI_NOP(o, byte, u8 x) \ | |
796 | _PCI_NOP(o, word, u16 x) \ | |
797 | _PCI_NOP(o, dword, u32 x) | |
798 | _PCI_NOP_ALL(read, *) | |
799 | _PCI_NOP_ALL(write,) | |
800 | ||
801 | static inline struct pci_dev *pci_find_device(unsigned int vendor, | |
802 | unsigned int device, | |
803 | const struct pci_dev *from) | |
804 | { | |
805 | return NULL; | |
806 | } | |
807 | ||
808 | static inline struct pci_dev *pci_find_slot(unsigned int bus, | |
809 | unsigned int devfn) | |
810 | { | |
811 | return NULL; | |
812 | } | |
813 | ||
814 | static inline struct pci_dev *pci_get_device(unsigned int vendor, | |
815 | unsigned int device, | |
816 | struct pci_dev *from) | |
817 | { | |
818 | return NULL; | |
819 | } | |
820 | ||
821 | static inline struct pci_dev *pci_get_subsys(unsigned int vendor, | |
822 | unsigned int device, | |
823 | unsigned int ss_vendor, | |
824 | unsigned int ss_device, | |
825 | const struct pci_dev *from) | |
826 | { | |
827 | return NULL; | |
828 | } | |
829 | ||
830 | static inline struct pci_dev *pci_get_class(unsigned int class, | |
831 | struct pci_dev *from) | |
832 | { | |
833 | return NULL; | |
834 | } | |
835 | ||
836 | #define pci_dev_present(ids) (0) | |
837 | #define no_pci_devices() (1) | |
838 | #define pci_dev_put(dev) do { } while (0) | |
839 | ||
840 | static inline void pci_set_master(struct pci_dev *dev) | |
841 | { } | |
842 | ||
843 | static inline int pci_enable_device(struct pci_dev *dev) | |
844 | { | |
845 | return -EIO; | |
846 | } | |
847 | ||
848 | static inline void pci_disable_device(struct pci_dev *dev) | |
849 | { } | |
850 | ||
851 | static inline int pci_set_dma_mask(struct pci_dev *dev, u64 mask) | |
852 | { | |
853 | return -EIO; | |
854 | } | |
855 | ||
856 | static inline int pci_set_dma_max_seg_size(struct pci_dev *dev, | |
857 | unsigned int size) | |
858 | { | |
859 | return -EIO; | |
860 | } | |
861 | ||
862 | static inline int pci_set_dma_seg_boundary(struct pci_dev *dev, | |
863 | unsigned long mask) | |
864 | { | |
865 | return -EIO; | |
866 | } | |
867 | ||
868 | static inline int pci_assign_resource(struct pci_dev *dev, int i) | |
869 | { | |
870 | return -EBUSY; | |
871 | } | |
872 | ||
873 | static inline int __pci_register_driver(struct pci_driver *drv, | |
874 | struct module *owner) | |
875 | { | |
876 | return 0; | |
877 | } | |
878 | ||
879 | static inline int pci_register_driver(struct pci_driver *drv) | |
880 | { | |
881 | return 0; | |
882 | } | |
883 | ||
884 | static inline void pci_unregister_driver(struct pci_driver *drv) | |
885 | { } | |
886 | ||
887 | static inline int pci_find_capability(struct pci_dev *dev, int cap) | |
888 | { | |
889 | return 0; | |
890 | } | |
891 | ||
892 | static inline int pci_find_next_capability(struct pci_dev *dev, u8 post, | |
893 | int cap) | |
894 | { | |
895 | return 0; | |
896 | } | |
897 | ||
898 | static inline int pci_find_ext_capability(struct pci_dev *dev, int cap) | |
899 | { | |
900 | return 0; | |
901 | } | |
902 | ||
903 | /* Power management related routines */ | |
904 | static inline int pci_save_state(struct pci_dev *dev) | |
905 | { | |
906 | return 0; | |
907 | } | |
908 | ||
909 | static inline int pci_restore_state(struct pci_dev *dev) | |
910 | { | |
911 | return 0; | |
912 | } | |
913 | ||
914 | static inline int pci_set_power_state(struct pci_dev *dev, pci_power_t state) | |
915 | { | |
916 | return 0; | |
917 | } | |
918 | ||
919 | static inline pci_power_t pci_choose_state(struct pci_dev *dev, | |
920 | pm_message_t state) | |
921 | { | |
922 | return PCI_D0; | |
923 | } | |
924 | ||
925 | static inline int pci_enable_wake(struct pci_dev *dev, pci_power_t state, | |
926 | int enable) | |
927 | { | |
928 | return 0; | |
929 | } | |
930 | ||
931 | static inline int pci_request_regions(struct pci_dev *dev, const char *res_name) | |
932 | { | |
933 | return -EIO; | |
934 | } | |
935 | ||
936 | static inline void pci_release_regions(struct pci_dev *dev) | |
937 | { } | |
938 | ||
939 | #define pci_dma_burst_advice(pdev, strat, strategy_parameter) do { } while (0) | |
940 | ||
941 | static inline void pci_block_user_cfg_access(struct pci_dev *dev) | |
942 | { } | |
943 | ||
944 | static inline void pci_unblock_user_cfg_access(struct pci_dev *dev) | |
945 | { } | |
946 | ||
947 | static inline struct pci_bus *pci_find_next_bus(const struct pci_bus *from) | |
948 | { return NULL; } | |
949 | ||
950 | static inline struct pci_dev *pci_get_slot(struct pci_bus *bus, | |
951 | unsigned int devfn) | |
952 | { return NULL; } | |
953 | ||
954 | static inline struct pci_dev *pci_get_bus_and_slot(unsigned int bus, | |
955 | unsigned int devfn) | |
956 | { return NULL; } | |
957 | ||
958 | #endif /* CONFIG_PCI */ | |
959 | ||
960 | /* Include architecture-dependent settings and functions */ | |
961 | ||
962 | #include <asm/pci.h> | |
963 | ||
964 | /* these helpers provide future and backwards compatibility | |
965 | * for accessing popular PCI BAR info */ | |
966 | #define pci_resource_start(dev, bar) ((dev)->resource[(bar)].start) | |
967 | #define pci_resource_end(dev, bar) ((dev)->resource[(bar)].end) | |
968 | #define pci_resource_flags(dev, bar) ((dev)->resource[(bar)].flags) | |
969 | #define pci_resource_len(dev,bar) \ | |
970 | ((pci_resource_start((dev), (bar)) == 0 && \ | |
971 | pci_resource_end((dev), (bar)) == \ | |
972 | pci_resource_start((dev), (bar))) ? 0 : \ | |
973 | \ | |
974 | (pci_resource_end((dev), (bar)) - \ | |
975 | pci_resource_start((dev), (bar)) + 1)) | |
976 | ||
977 | /* Similar to the helpers above, these manipulate per-pci_dev | |
978 | * driver-specific data. They are really just a wrapper around | |
979 | * the generic device structure functions of these calls. | |
980 | */ | |
981 | static inline void *pci_get_drvdata(struct pci_dev *pdev) | |
982 | { | |
983 | return dev_get_drvdata(&pdev->dev); | |
984 | } | |
985 | ||
986 | static inline void pci_set_drvdata(struct pci_dev *pdev, void *data) | |
987 | { | |
988 | dev_set_drvdata(&pdev->dev, data); | |
989 | } | |
990 | ||
991 | /* If you want to know what to call your pci_dev, ask this function. | |
992 | * Again, it's a wrapper around the generic device. | |
993 | */ | |
994 | static inline char *pci_name(struct pci_dev *pdev) | |
995 | { | |
996 | return pdev->dev.bus_id; | |
997 | } | |
998 | ||
999 | ||
1000 | /* Some archs don't want to expose struct resource to userland as-is | |
1001 | * in sysfs and /proc | |
1002 | */ | |
1003 | #ifndef HAVE_ARCH_PCI_RESOURCE_TO_USER | |
1004 | static inline void pci_resource_to_user(const struct pci_dev *dev, int bar, | |
1005 | const struct resource *rsrc, resource_size_t *start, | |
1006 | resource_size_t *end) | |
1007 | { | |
1008 | *start = rsrc->start; | |
1009 | *end = rsrc->end; | |
1010 | } | |
1011 | #endif /* HAVE_ARCH_PCI_RESOURCE_TO_USER */ | |
1012 | ||
1013 | ||
1014 | /* | |
1015 | * The world is not perfect and supplies us with broken PCI devices. | |
1016 | * For at least a part of these bugs we need a work-around, so both | |
1017 | * generic (drivers/pci/quirks.c) and per-architecture code can define | |
1018 | * fixup hooks to be called for particular buggy devices. | |
1019 | */ | |
1020 | ||
1021 | struct pci_fixup { | |
1022 | u16 vendor, device; /* You can use PCI_ANY_ID here of course */ | |
1023 | void (*hook)(struct pci_dev *dev); | |
1024 | }; | |
1025 | ||
1026 | enum pci_fixup_pass { | |
1027 | pci_fixup_early, /* Before probing BARs */ | |
1028 | pci_fixup_header, /* After reading configuration header */ | |
1029 | pci_fixup_final, /* Final phase of device fixups */ | |
1030 | pci_fixup_enable, /* pci_enable_device() time */ | |
1031 | pci_fixup_resume, /* pci_device_resume() */ | |
1032 | pci_fixup_suspend, /* pci_device_suspend */ | |
1033 | pci_fixup_resume_early, /* pci_device_resume_early() */ | |
1034 | }; | |
1035 | ||
1036 | /* Anonymous variables would be nice... */ | |
1037 | #define DECLARE_PCI_FIXUP_SECTION(section, name, vendor, device, hook) \ | |
1038 | static const struct pci_fixup __pci_fixup_##name __used \ | |
1039 | __attribute__((__section__(#section))) = { vendor, device, hook }; | |
1040 | #define DECLARE_PCI_FIXUP_EARLY(vendor, device, hook) \ | |
1041 | DECLARE_PCI_FIXUP_SECTION(.pci_fixup_early, \ | |
1042 | vendor##device##hook, vendor, device, hook) | |
1043 | #define DECLARE_PCI_FIXUP_HEADER(vendor, device, hook) \ | |
1044 | DECLARE_PCI_FIXUP_SECTION(.pci_fixup_header, \ | |
1045 | vendor##device##hook, vendor, device, hook) | |
1046 | #define DECLARE_PCI_FIXUP_FINAL(vendor, device, hook) \ | |
1047 | DECLARE_PCI_FIXUP_SECTION(.pci_fixup_final, \ | |
1048 | vendor##device##hook, vendor, device, hook) | |
1049 | #define DECLARE_PCI_FIXUP_ENABLE(vendor, device, hook) \ | |
1050 | DECLARE_PCI_FIXUP_SECTION(.pci_fixup_enable, \ | |
1051 | vendor##device##hook, vendor, device, hook) | |
1052 | #define DECLARE_PCI_FIXUP_RESUME(vendor, device, hook) \ | |
1053 | DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume, \ | |
1054 | resume##vendor##device##hook, vendor, device, hook) | |
1055 | #define DECLARE_PCI_FIXUP_RESUME_EARLY(vendor, device, hook) \ | |
1056 | DECLARE_PCI_FIXUP_SECTION(.pci_fixup_resume_early, \ | |
1057 | resume_early##vendor##device##hook, vendor, device, hook) | |
1058 | #define DECLARE_PCI_FIXUP_SUSPEND(vendor, device, hook) \ | |
1059 | DECLARE_PCI_FIXUP_SECTION(.pci_fixup_suspend, \ | |
1060 | suspend##vendor##device##hook, vendor, device, hook) | |
1061 | ||
1062 | ||
1063 | void pci_fixup_device(enum pci_fixup_pass pass, struct pci_dev *dev); | |
1064 | ||
1065 | void __iomem *pcim_iomap(struct pci_dev *pdev, int bar, unsigned long maxlen); | |
1066 | void pcim_iounmap(struct pci_dev *pdev, void __iomem *addr); | |
1067 | void __iomem * const *pcim_iomap_table(struct pci_dev *pdev); | |
1068 | int pcim_iomap_regions(struct pci_dev *pdev, u16 mask, const char *name); | |
1069 | int pcim_iomap_regions_request_all(struct pci_dev *pdev, u16 mask, | |
1070 | const char *name); | |
1071 | void pcim_iounmap_regions(struct pci_dev *pdev, u16 mask); | |
1072 | ||
1073 | extern int pci_pci_problems; | |
1074 | #define PCIPCI_FAIL 1 /* No PCI PCI DMA */ | |
1075 | #define PCIPCI_TRITON 2 | |
1076 | #define PCIPCI_NATOMA 4 | |
1077 | #define PCIPCI_VIAETBF 8 | |
1078 | #define PCIPCI_VSFX 16 | |
1079 | #define PCIPCI_ALIMAGIK 32 /* Need low latency setting */ | |
1080 | #define PCIAGP_FAIL 64 /* No PCI to AGP DMA */ | |
1081 | ||
1082 | extern unsigned long pci_cardbus_io_size; | |
1083 | extern unsigned long pci_cardbus_mem_size; | |
1084 | ||
1085 | int pcibios_add_platform_entries(struct pci_dev *dev); | |
1086 | void pcibios_disable_device(struct pci_dev *dev); | |
1087 | int pcibios_set_pcie_reset_state(struct pci_dev *dev, | |
1088 | enum pcie_reset_state state); | |
1089 | ||
1090 | #ifdef CONFIG_PCI_MMCONFIG | |
1091 | extern void __init pci_mmcfg_early_init(void); | |
1092 | extern void __init pci_mmcfg_late_init(void); | |
1093 | #else | |
1094 | static inline void pci_mmcfg_early_init(void) { } | |
1095 | static inline void pci_mmcfg_late_init(void) { } | |
1096 | #endif | |
1097 | ||
1098 | #endif /* __KERNEL__ */ | |
1099 | #endif /* LINUX_PCI_H */ |