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1 | /* cpuid.h: Macros to identify the properties of an x86 host. | |
2 | * | |
3 | * This work is licensed under the terms of the GNU GPL, version 2 or later. | |
4 | * See the COPYING file in the top-level directory. | |
5 | */ | |
6 | ||
7 | #ifndef QEMU_CPUID_H | |
8 | #define QEMU_CPUID_H | |
9 | ||
10 | #ifndef CONFIG_CPUID_H | |
11 | # error "<cpuid.h> is unusable with this compiler" | |
12 | #endif | |
13 | ||
14 | #include <cpuid.h> | |
15 | ||
16 | /* Cover the uses that we have within qemu. */ | |
17 | /* ??? Irritating that we have the same information in target/i386/. */ | |
18 | ||
19 | /* Leaf 1, %edx */ | |
20 | #ifndef bit_CMOV | |
21 | #define bit_CMOV (1 << 15) | |
22 | #endif | |
23 | #ifndef bit_SSE2 | |
24 | #define bit_SSE2 (1 << 26) | |
25 | #endif | |
26 | ||
27 | /* Leaf 1, %ecx */ | |
28 | #ifndef bit_PCLMUL | |
29 | #define bit_PCLMUL (1 << 1) | |
30 | #endif | |
31 | #ifndef bit_SSE4_1 | |
32 | #define bit_SSE4_1 (1 << 19) | |
33 | #endif | |
34 | #ifndef bit_MOVBE | |
35 | #define bit_MOVBE (1 << 22) | |
36 | #endif | |
37 | #ifndef bit_OSXSAVE | |
38 | #define bit_OSXSAVE (1 << 27) | |
39 | #endif | |
40 | #ifndef bit_AVX | |
41 | #define bit_AVX (1 << 28) | |
42 | #endif | |
43 | ||
44 | /* Leaf 7, %ebx */ | |
45 | #ifndef bit_BMI | |
46 | #define bit_BMI (1 << 3) | |
47 | #endif | |
48 | #ifndef bit_AVX2 | |
49 | #define bit_AVX2 (1 << 5) | |
50 | #endif | |
51 | #ifndef bit_BMI2 | |
52 | #define bit_BMI2 (1 << 8) | |
53 | #endif | |
54 | #ifndef bit_AVX512F | |
55 | #define bit_AVX512F (1 << 16) | |
56 | #endif | |
57 | #ifndef bit_AVX512DQ | |
58 | #define bit_AVX512DQ (1 << 17) | |
59 | #endif | |
60 | #ifndef bit_AVX512BW | |
61 | #define bit_AVX512BW (1 << 30) | |
62 | #endif | |
63 | #ifndef bit_AVX512VL | |
64 | #define bit_AVX512VL (1u << 31) | |
65 | #endif | |
66 | ||
67 | /* Leaf 7, %ecx */ | |
68 | #ifndef bit_AVX512VBMI2 | |
69 | #define bit_AVX512VBMI2 (1 << 6) | |
70 | #endif | |
71 | ||
72 | /* Leaf 0x80000001, %ecx */ | |
73 | #ifndef bit_LZCNT | |
74 | #define bit_LZCNT (1 << 5) | |
75 | #endif | |
76 | ||
77 | /* | |
78 | * Signatures for different CPU implementations as returned from Leaf 0. | |
79 | */ | |
80 | ||
81 | #ifndef signature_INTEL_ecx | |
82 | /* "Genu" "ineI" "ntel" */ | |
83 | #define signature_INTEL_ebx 0x756e6547 | |
84 | #define signature_INTEL_edx 0x49656e69 | |
85 | #define signature_INTEL_ecx 0x6c65746e | |
86 | #endif | |
87 | ||
88 | #ifndef signature_AMD_ecx | |
89 | /* "Auth" "enti" "cAMD" */ | |
90 | #define signature_AMD_ebx 0x68747541 | |
91 | #define signature_AMD_edx 0x69746e65 | |
92 | #define signature_AMD_ecx 0x444d4163 | |
93 | #endif | |
94 | ||
95 | static inline unsigned xgetbv_low(unsigned c) | |
96 | { | |
97 | unsigned a, d; | |
98 | asm("xgetbv" : "=a"(a), "=d"(d) : "c"(c)); | |
99 | return a; | |
100 | } | |
101 | ||
102 | #endif /* QEMU_CPUID_H */ |