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1 | /* | |
2 | * QEMU CRIS CPU | |
3 | * | |
4 | * Copyright (c) 2008 AXIS Communications AB | |
5 | * Written by Edgar E. Iglesias. | |
6 | * | |
7 | * Copyright (c) 2012 SUSE LINUX Products GmbH | |
8 | * | |
9 | * This library is free software; you can redistribute it and/or | |
10 | * modify it under the terms of the GNU Lesser General Public | |
11 | * License as published by the Free Software Foundation; either | |
12 | * version 2.1 of the License, or (at your option) any later version. | |
13 | * | |
14 | * This library is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
17 | * Lesser General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU Lesser General Public | |
20 | * License along with this library; if not, see | |
21 | * <http://www.gnu.org/licenses/lgpl-2.1.html> | |
22 | */ | |
23 | ||
24 | #include "cpu.h" | |
25 | #include "qemu-common.h" | |
26 | #include "mmu.h" | |
27 | ||
28 | ||
29 | /* CPUClass::reset() */ | |
30 | static void cris_cpu_reset(CPUState *s) | |
31 | { | |
32 | CRISCPU *cpu = CRIS_CPU(s); | |
33 | CRISCPUClass *ccc = CRIS_CPU_GET_CLASS(cpu); | |
34 | CPUCRISState *env = &cpu->env; | |
35 | uint32_t vr; | |
36 | ||
37 | if (qemu_loglevel_mask(CPU_LOG_RESET)) { | |
38 | qemu_log("CPU Reset (CPU %d)\n", s->cpu_index); | |
39 | log_cpu_state(env, 0); | |
40 | } | |
41 | ||
42 | ccc->parent_reset(s); | |
43 | ||
44 | vr = env->pregs[PR_VR]; | |
45 | memset(env, 0, offsetof(CPUCRISState, breakpoints)); | |
46 | env->pregs[PR_VR] = vr; | |
47 | tlb_flush(env, 1); | |
48 | ||
49 | #if defined(CONFIG_USER_ONLY) | |
50 | /* start in user mode with interrupts enabled. */ | |
51 | env->pregs[PR_CCS] |= U_FLAG | I_FLAG | P_FLAG; | |
52 | #else | |
53 | cris_mmu_init(env); | |
54 | env->pregs[PR_CCS] = 0; | |
55 | #endif | |
56 | } | |
57 | ||
58 | static ObjectClass *cris_cpu_class_by_name(const char *cpu_model) | |
59 | { | |
60 | ObjectClass *oc; | |
61 | char *typename; | |
62 | ||
63 | if (cpu_model == NULL) { | |
64 | return NULL; | |
65 | } | |
66 | ||
67 | typename = g_strdup_printf("%s-" TYPE_CRIS_CPU, cpu_model); | |
68 | oc = object_class_by_name(typename); | |
69 | g_free(typename); | |
70 | if (oc != NULL && (!object_class_dynamic_cast(oc, TYPE_CRIS_CPU) || | |
71 | object_class_is_abstract(oc))) { | |
72 | oc = NULL; | |
73 | } | |
74 | return oc; | |
75 | } | |
76 | ||
77 | CRISCPU *cpu_cris_init(const char *cpu_model) | |
78 | { | |
79 | CRISCPU *cpu; | |
80 | ObjectClass *oc; | |
81 | ||
82 | oc = cris_cpu_class_by_name(cpu_model); | |
83 | if (oc == NULL) { | |
84 | return NULL; | |
85 | } | |
86 | cpu = CRIS_CPU(object_new(object_class_get_name(oc))); | |
87 | ||
88 | object_property_set_bool(OBJECT(cpu), true, "realized", NULL); | |
89 | ||
90 | return cpu; | |
91 | } | |
92 | ||
93 | /* Sort alphabetically by VR. */ | |
94 | static gint cris_cpu_list_compare(gconstpointer a, gconstpointer b) | |
95 | { | |
96 | CRISCPUClass *ccc_a = CRIS_CPU_CLASS(a); | |
97 | CRISCPUClass *ccc_b = CRIS_CPU_CLASS(b); | |
98 | ||
99 | /* */ | |
100 | if (ccc_a->vr > ccc_b->vr) { | |
101 | return 1; | |
102 | } else if (ccc_a->vr < ccc_b->vr) { | |
103 | return -1; | |
104 | } else { | |
105 | return 0; | |
106 | } | |
107 | } | |
108 | ||
109 | static void cris_cpu_list_entry(gpointer data, gpointer user_data) | |
110 | { | |
111 | ObjectClass *oc = data; | |
112 | CPUListState *s = user_data; | |
113 | const char *typename = object_class_get_name(oc); | |
114 | char *name; | |
115 | ||
116 | name = g_strndup(typename, strlen(typename) - strlen("-" TYPE_CRIS_CPU)); | |
117 | (*s->cpu_fprintf)(s->file, " %s\n", name); | |
118 | g_free(name); | |
119 | } | |
120 | ||
121 | void cris_cpu_list(FILE *f, fprintf_function cpu_fprintf) | |
122 | { | |
123 | CPUListState s = { | |
124 | .file = f, | |
125 | .cpu_fprintf = cpu_fprintf, | |
126 | }; | |
127 | GSList *list; | |
128 | ||
129 | list = object_class_get_list(TYPE_CRIS_CPU, false); | |
130 | list = g_slist_sort(list, cris_cpu_list_compare); | |
131 | (*cpu_fprintf)(f, "Available CPUs:\n"); | |
132 | g_slist_foreach(list, cris_cpu_list_entry, &s); | |
133 | g_slist_free(list); | |
134 | } | |
135 | ||
136 | static void cris_cpu_realizefn(DeviceState *dev, Error **errp) | |
137 | { | |
138 | CRISCPU *cpu = CRIS_CPU(dev); | |
139 | CRISCPUClass *ccc = CRIS_CPU_GET_CLASS(dev); | |
140 | ||
141 | cpu_reset(CPU(cpu)); | |
142 | qemu_init_vcpu(&cpu->env); | |
143 | ||
144 | ccc->parent_realize(dev, errp); | |
145 | } | |
146 | ||
147 | static void cris_cpu_initfn(Object *obj) | |
148 | { | |
149 | CPUState *cs = CPU(obj); | |
150 | CRISCPU *cpu = CRIS_CPU(obj); | |
151 | CRISCPUClass *ccc = CRIS_CPU_GET_CLASS(obj); | |
152 | CPUCRISState *env = &cpu->env; | |
153 | static bool tcg_initialized; | |
154 | ||
155 | cs->env_ptr = env; | |
156 | cpu_exec_init(env); | |
157 | ||
158 | env->pregs[PR_VR] = ccc->vr; | |
159 | ||
160 | if (tcg_enabled() && !tcg_initialized) { | |
161 | tcg_initialized = true; | |
162 | if (env->pregs[PR_VR] < 32) { | |
163 | cris_initialize_crisv10_tcg(); | |
164 | } else { | |
165 | cris_initialize_tcg(); | |
166 | } | |
167 | } | |
168 | } | |
169 | ||
170 | static void crisv8_cpu_class_init(ObjectClass *oc, void *data) | |
171 | { | |
172 | CPUClass *cc = CPU_CLASS(oc); | |
173 | CRISCPUClass *ccc = CRIS_CPU_CLASS(oc); | |
174 | ||
175 | ccc->vr = 8; | |
176 | cc->do_interrupt = crisv10_cpu_do_interrupt; | |
177 | } | |
178 | ||
179 | static void crisv9_cpu_class_init(ObjectClass *oc, void *data) | |
180 | { | |
181 | CPUClass *cc = CPU_CLASS(oc); | |
182 | CRISCPUClass *ccc = CRIS_CPU_CLASS(oc); | |
183 | ||
184 | ccc->vr = 9; | |
185 | cc->do_interrupt = crisv10_cpu_do_interrupt; | |
186 | } | |
187 | ||
188 | static void crisv10_cpu_class_init(ObjectClass *oc, void *data) | |
189 | { | |
190 | CPUClass *cc = CPU_CLASS(oc); | |
191 | CRISCPUClass *ccc = CRIS_CPU_CLASS(oc); | |
192 | ||
193 | ccc->vr = 10; | |
194 | cc->do_interrupt = crisv10_cpu_do_interrupt; | |
195 | } | |
196 | ||
197 | static void crisv11_cpu_class_init(ObjectClass *oc, void *data) | |
198 | { | |
199 | CPUClass *cc = CPU_CLASS(oc); | |
200 | CRISCPUClass *ccc = CRIS_CPU_CLASS(oc); | |
201 | ||
202 | ccc->vr = 11; | |
203 | cc->do_interrupt = crisv10_cpu_do_interrupt; | |
204 | } | |
205 | ||
206 | static void crisv32_cpu_class_init(ObjectClass *oc, void *data) | |
207 | { | |
208 | CRISCPUClass *ccc = CRIS_CPU_CLASS(oc); | |
209 | ||
210 | ccc->vr = 32; | |
211 | } | |
212 | ||
213 | #define TYPE(model) model "-" TYPE_CRIS_CPU | |
214 | ||
215 | static const TypeInfo cris_cpu_model_type_infos[] = { | |
216 | { | |
217 | .name = TYPE("crisv8"), | |
218 | .parent = TYPE_CRIS_CPU, | |
219 | .class_init = crisv8_cpu_class_init, | |
220 | }, { | |
221 | .name = TYPE("crisv9"), | |
222 | .parent = TYPE_CRIS_CPU, | |
223 | .class_init = crisv9_cpu_class_init, | |
224 | }, { | |
225 | .name = TYPE("crisv10"), | |
226 | .parent = TYPE_CRIS_CPU, | |
227 | .class_init = crisv10_cpu_class_init, | |
228 | }, { | |
229 | .name = TYPE("crisv11"), | |
230 | .parent = TYPE_CRIS_CPU, | |
231 | .class_init = crisv11_cpu_class_init, | |
232 | }, { | |
233 | .name = TYPE("crisv32"), | |
234 | .parent = TYPE_CRIS_CPU, | |
235 | .class_init = crisv32_cpu_class_init, | |
236 | } | |
237 | }; | |
238 | ||
239 | #undef TYPE | |
240 | ||
241 | static void cris_cpu_class_init(ObjectClass *oc, void *data) | |
242 | { | |
243 | DeviceClass *dc = DEVICE_CLASS(oc); | |
244 | CPUClass *cc = CPU_CLASS(oc); | |
245 | CRISCPUClass *ccc = CRIS_CPU_CLASS(oc); | |
246 | ||
247 | ccc->parent_realize = dc->realize; | |
248 | dc->realize = cris_cpu_realizefn; | |
249 | ||
250 | ccc->parent_reset = cc->reset; | |
251 | cc->reset = cris_cpu_reset; | |
252 | ||
253 | cc->class_by_name = cris_cpu_class_by_name; | |
254 | cc->do_interrupt = cris_cpu_do_interrupt; | |
255 | } | |
256 | ||
257 | static const TypeInfo cris_cpu_type_info = { | |
258 | .name = TYPE_CRIS_CPU, | |
259 | .parent = TYPE_CPU, | |
260 | .instance_size = sizeof(CRISCPU), | |
261 | .instance_init = cris_cpu_initfn, | |
262 | .abstract = true, | |
263 | .class_size = sizeof(CRISCPUClass), | |
264 | .class_init = cris_cpu_class_init, | |
265 | }; | |
266 | ||
267 | static void cris_cpu_register_types(void) | |
268 | { | |
269 | int i; | |
270 | ||
271 | type_register_static(&cris_cpu_type_info); | |
272 | for (i = 0; i < ARRAY_SIZE(cris_cpu_model_type_infos); i++) { | |
273 | type_register_static(&cris_cpu_model_type_infos[i]); | |
274 | } | |
275 | } | |
276 | ||
277 | type_init(cris_cpu_register_types) |